This is redundant. The correct ID number is right there in the
hardware anyway. We will introduce a mechanism later to hard-code
this for deviant cells.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This makes the PRCMU base address be selected at runtime for U8500
and U5500 instead of being compiled-in.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dynamically detect the DBx500 SOC an revision based on the ASIC ID.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
To allow the possiblity of building U8500 and U5500 support in the same
image.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
[Rebased to latest changes in Russells tree]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
This patch adds support for checking if the digital baseband (DB)
System-on-Chip (aka "cpu) ASIC hardware version is 1.0, 1.1 or
2.0. We print the result in the bootlog, the functions are then
used for runtime decisions based on hardware version.
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add basic support for the U5500 platform.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split up all the hardware register definitions previously found in
hardware.h into per-SoC files db8500-regs.h and db5500-regs.h. Rename a
couple of macros to prepare for sharing code between the variants.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds the different config options for SoCs DB8500 and DB5500 and
refines the SoC/CPU detection code to support the DB5500 as well via
these. The selection between DB5500 and DB8500 is currently a simple
compile-time choice.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the GPIOs on the U8500, using the plat-nomadik GPIO
driver.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add cpu_is_u8500{ed/v1}() functions to determine the variant based on
the CPU id, add the changed peripheral addresses, and fixup the MTU
address.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Correct the base addresses of the CLKRST registers.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Adds register definitions, shared peripheral interrupt
numbers (SHPI) and IO mappings for the U8500 core support.
SHPI are assigned to [160:32] where first 32 interrupts
are reserved.
Reviewed-by: Alessandro Rubin <rubini@unipv.it>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
