Commit Graph

14 Commits

Author SHA1 Message Date
Magnus Damm
a7b99f27a2 ARM: shmobile: Add r8a73a4 CMT10 clock event
Add clock event support for CMT1 timer channel 0
to the r8a73a4 SoC code. The CMT is used together
with a 32KHz clock in this case.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:26:53 +09:00
Guennadi Liakhovetski
1e453df900 ARM: shmobile: r8a73a4: add clocks for I2C controllers
r8a73a4 SoCs have numerous I2C controllers, of which 9 are compatible with
the i2c-sh_mobile.c driver. This patch adds clock definitions for them.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:25:37 +09:00
Guennadi Liakhovetski
a040f22d2c ARM: shmobile: r8a73a4: add Z2 clock support
The Z2 clock on r8a73a4 is used to clock the 4 Cortex A7 cores on the SoC.
Add a definition for this clock to later use it from the arm_big_little
CPUFreq driver.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:25:36 +09:00
Guennadi Liakhovetski
d1c3c959f2 ARM: shmobile: r8a73a4: safeguard against wrong clk_set_rate() uses
clk_set_rate() should only be called with exact rates, returned by
clk_round_rate(). However, it is still good to verify, that the value,
passed to clock's .set_rate() method is at least valid. This patch adds
such a check for the Z-clock on r8a73a4.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:25:36 +09:00
Guennadi Liakhovetski
181135e0b7 ARM: shmobile: r8a73a4: implement CPU clock scaling for CPUFreq
This patch adds support for the Z-clock on r8a73a4 SoCs, which is driving
the Cortex A15 core, and a "cpufreq-cpu0" platform device. Adding an
"operating-points" property to the CPU0 DT node and a regulator, this
patch allows platforms to use the generic cpufreq-cpu0 driver to use
SoC's DVFS capabilities.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:25:35 +09:00
Guennadi Liakhovetski
8d27657286 ARM: shmobile: r8a73a4: wait for completion when kicking the clock
To reconfigure clocks, controlled by FRQCRA and FRQCRB, a kick bit has to
be set and to make sure the setting has taken effect, it has to be read
back repeatedly until it is cleared by the hardware. This patch adds the
waiting part, that was missing until now.

Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-17 14:25:35 +09:00
Guennadi Liakhovetski
111fad56a8 ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI
interfaces on r8a73a4 (APE6).

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-12 21:07:38 +09:00
Kuninori Morimoto
9051e9125b ARM: shmobile: r8a73a4: add div6 clocks
DIV6 clocks control each core clocks.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-07 14:24:46 +09:00
Kuninori Morimoto
b89edf3446 ARM: shmobile: r8a73a4: add div4 clocks
DIV4 clocks control each core clocks.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-07 14:24:45 +09:00
Kuninori Morimoto
0c3091ad45 ARM: shmobile: r8a73a4: add pll clocks
PLL clocks are basis clock for other clock.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-07 14:24:45 +09:00
Kuninori Morimoto
5e634d9863 ARM: shmobile: r8a73a4: add main clock
Almost all clock needs main clock which is basis clock on r8a73a4.
This patch adds it, and, set parent clock via CKSCR register.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-07 14:24:44 +09:00
Kuninori Morimoto
c91cf2fad0 ARM: shmobile: r8a73a4: add thermal driver support
You can get current thermal by
> cat /sys/class/thermal/thermal_zone?/temp

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 10:58:25 +09:00
Magnus Damm
e481a52890 ARM: shmobile: r8a73a4 SCIF support V3
V3 of SCIF serial port support for the r8a73a4 SoC.
This is done by adding platform devices for SCIFA0
-> SCIFA1 as well as SCIFB0 -> SCIFB3 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 10:58:20 +09:00
Magnus Damm
eccf0607e4 ARM: shmobile: Initial r8a73a4 SoC support V3
V3 of initial support for the r8a73a4 SoC including:
 - Single Cortex-A15 CPU Core
 - GIC
 - Architecture timer

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 10:58:19 +09:00