Commit Graph

1081 Commits

Author SHA1 Message Date
Masahiro Yamada
505d3085d7 scripts/spelling.txt: add "overide" pattern and fix typo instances
Fix typos and add the following to the scripts/spelling.txt:

  overide||override

While we are here, fix the doubled "address" in the touched line
Documentation/devicetree/bindings/regulator/ti-abb-regulator.txt.

Also, fix the comment block style in the touched hunks in
drivers/media/dvb-frontends/drx39xyj/drx_driver.h.

Link: http://lkml.kernel.org/r/1481573103-11329-21-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-03-09 17:01:09 -08:00
Linus Torvalds
a1a0db36d8 ARM: SoC: late DT updates for v4.11
These updates have been kept in a separate branch mostly because
 they rely on updates to the respective clk drivers to keep the
 shared header files in sync.
 
 This includes two branches for arm64 dt updates, both following up
 on earlier changes for the same platforms that are already merged:
 
 Samsung:
   - add USB3 support in Exynos7
   - minor PM related updates
 
 Amlogic:
   - new machines: WeTek Set-top-boxes
   - various devices added to DT
 
 There are also a couple of bugfixes that trickled in since the
 start of the merge window:
 
 - The moxart_defconfig was not building the intended platform
 - CPU-hotplug was broken on ux500
 - Coresight was broken on Juno (never worked)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWLmRS2CrR//JCVInAQKrkQ//bd8TCGXA0tRwDMEGejtWChZcNkGZDaer
 sNMyE/c1p5+/4euSmf3jW1JsIx4JDtjr0psKeRpgYId8GVdvaYceFbSMJl6o9hDc
 pm3sqb66xEgrWQoSBA2Urz/RhSIrxkYbuTpYbN4teV9I/IFgTUggaBSzfkq3SLRE
 bEVSbCw0S/6t3vJgW4CKCI75+a3NexqImvi8txNwueQQMnDLnOkG97vMUQJgDq0j
 E+CeOk0mvlGF+TiVoAhUxT3YIt8azUTfUVw7CBIRvo/49sUCiETk6xie93FaC7GI
 Tmg9KK+oZhrmqt8PBGkikxQMHATnKrfJbMNi/K6nrxW91ylSkwTN/7jfhSjFDrdI
 4WNB2x3u6KUnQ0XOKVY36gUnV8kJ/2K9pTZpq0K7m4czo8YAid9LumvDnqhPI0Xg
 fXxq3YBx7AfzsdBL3+nQ7AH3tr9Bvt01kMZwYwNgpqtglEBScAgzyrPG/yyTBFq7
 KOkoyNojTaHZHcDtYqSaxYls+2tdeyvYuQJ7QGQ5DJCW99NgbRuFfIUJvgwRPoKt
 13ioIJxDUHmemR6xFURWVH1dPkkqwtJht7us5jcxuxBL9ZhmEb6vophvyxj62zTZ
 8A+PE3cC1azhKph7rVrUl9KEoYZzedwDaTGBNpYz1gN7DxDvWHYINEPB4bBLzYmv
 uWsSYVbV2Qs=
 =A3U6
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late DT updates from Arnd Bergmann:
 "These updates have been kept in a separate branch mostly because they
  rely on updates to the respective clk drivers to keep the shared
  header files in sync.

  This includes two branches for arm64 dt updates, both following up on
  earlier changes for the same platforms that are already merged:

  Samsung:
   - add USB3 support in Exynos7
   - minor PM related updates

  Amlogic:
   - new machines: WeTek Set-top-boxes
   - various devices added to DT

  There are also a couple of bugfixes that trickled in since the start
  of the merge window:

   - The moxart_defconfig was not building the intended platform
   - CPU-hotplug was broken on ux500
   - Coresight was broken on Juno (never worked)"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  ARM: deconfig: fix the moxart defconfig
  ARM: ux500: resume the second core properly
  arm64: dts: juno: update definition for programmable replicator
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ...
2017-03-03 16:15:48 -08:00
Arnd Bergmann
d4b80d9aac Merge branch 'next/late' with mainline
* next/late: (25 commits)
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ARM64: dts: meson-gxbb-vega-s95: Add LED
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-02 17:52:44 +01:00
Linus Torvalds
5d8a00eee2 The usual collection of new drivers, non-critical fixes, and updates
to existing clk drivers. The bulk of the work is on Allwinner and
 Rockchip SoCs, but there's also an Intel Atom driver in here too.
 
 New Drivers:
  - Tegra BPMP firmware
  - Hisilicon hi3660 SoCs
  - Rockchip rk3328 SoCs
  - Intel Atom PMC
  - STM32F746
  - IDT VersaClock 5P49V5923 and 5P49V5933
  - Marvell mv98dx3236 SoCs
  - Allwinner V3s SoCs
 
 Removed Drivers:
  - Samsung Exynos4415 SoCs
 
 Updates:
  - Migrate ABx500 to OF
  - Qualcomm IPQ4019 CPU clks and general PLL support
  - Qualcomm MSM8974 RPM
  - Rockchip non-critical fixes and clk id additions
  - Samsung Exynos4412 CPUs
  - Socionext UniPhier NAND and eMMC support
  - ZTE zx296718 i2s and other audio clks
  - Renesas CAN and MSIOF clks for R-Car M3-W
  - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
  - TI CDCE913, CDCE937, and CDCE949 clk generators
  - Marvell Armada ap806 CPU frequencies
  - STM32F4* I2S/SAI support
  - Broadcom BCM2835 DSI support
  - Allwinner sun5i and A80 conversion to new style clk bindings
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJYsLxxAAoJEK0CiJfG5JUl0p0P/AiBaYvrmHBx3H9jdC3iQxd2
 7luFN3OqpykmZc3xx2xO3WaZ96kwwxiMu8sj3+VQo6oCkEuOY2ru6uPiDOcF4P3+
 8ku2taoWlESDbVLebVTNJoRXBaBLaV+9BCN7AKvXpVw+/UkJI5hgr0yMdh4tgtvu
 K08tTMkDNDbA33KXuJo8/chQFqi2W6XBXk22YMkqqA8jx0F4EM759LcgUlD1YfBS
 HKkgSOgsW3Zwhl27ZEAJMthcmS4+wFaEgFBeipg/hxTLI3aQtmDtRfXwg0wkbBx2
 8sVz9SyBwkjOT9+41kve+Je94NK3blnJEjbxPASveMwyhdX1TlDQCPfrXya/1zxz
 N1By1NpA6iEYwi4hy+OtBYlcsBHztAM/+eljDY2kEDvfiKjMa44GYmgBu4n8pq+n
 75NJxws6ZkzPs5/QsLT3hvTaL1SNX6PaEW8HabDXO40ccZc4CYvFZVOXMAnKaXzZ
 31hj8EvQ5x6hci+SPYyVu6j3ipOxN96VcZqEJ+hWyyuZEMK6Up1o/0lGZFgwa0UD
 SIl7RiTFKO6ko+8hYlk1g0DGtEyWDsdso1Bw4zaHwMngM/CwjJVzpK5T2t1fJyEh
 lN5MdhcOi0nsiRWdRxOwOlHDLf93qSo87mvseU1MCEXYN1aqTV3VxSm1YU8ZgQVk
 sAjpsJqj45enfDa9BmIt
 =o8o/
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of new drivers, non-critical fixes, and updates
  to existing clk drivers. The bulk of the work is on Allwinner and
  Rockchip SoCs, but there's also an Intel Atom driver in here too.

  New Drivers:
   - Tegra BPMP firmware
   - Hisilicon hi3660 SoCs
   - Rockchip rk3328 SoCs
   - Intel Atom PMC
   - STM32F746
   - IDT VersaClock 5P49V5923 and 5P49V5933
   - Marvell mv98dx3236 SoCs
   - Allwinner V3s SoCs

  Removed Drivers:
   - Samsung Exynos4415 SoCs

  Updates:
   - Migrate ABx500 to OF
   - Qualcomm IPQ4019 CPU clks and general PLL support
   - Qualcomm MSM8974 RPM
   - Rockchip non-critical fixes and clk id additions
   - Samsung Exynos4412 CPUs
   - Socionext UniPhier NAND and eMMC support
   - ZTE zx296718 i2s and other audio clks
   - Renesas CAN and MSIOF clks for R-Car M3-W
   - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
   - TI CDCE913, CDCE937, and CDCE949 clk generators
   - Marvell Armada ap806 CPU frequencies
   - STM32F4* I2S/SAI support
   - Broadcom BCM2835 DSI support
   - Allwinner sun5i and A80 conversion to new style clk bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (130 commits)
  clk: renesas: mstp: ensure register writes complete
  clk: qcom: Do not drop device node twice
  clk: mvebu: adjust clock handling for the CP110 system controller
  clk: mvebu: Expand mv98dx3236-core-clock support
  clk: zte: add i2s clocks for zx296718
  clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()
  clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i
  clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
  clk: tegra: Add BPMP clock driver
  clk: uniphier: add eMMC clock for LD11 and LD20 SoCs
  clk: uniphier: add NAND clock for all UniPhier SoCs
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: qcom: SDHCI enablement on Nexus 5X / 6P
  ...
2017-02-25 14:28:06 -08:00
Linus Torvalds
b2e3c4319d ARM: SoC driver updates
Driver updates for ARM SoCs.
 
 A handful of driver changes this time around. The larger changes are:
 
  - Reset drivers for hi3660 and zx2967
  - AHCI driver for Davinci, acked by Tejun and brought in here due to
    platform dependencies
  - Cleanups of atmel-ebi (External Bus Interface)
  - Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc
    register range on the SoCs)
  - PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYrM7/AAoJEIwa5zzehBx3qisP/18NwvbYvC3rMza7k+TEU66n
 vuEF9KW5GhUpQPbNIsTer5qHhC7ZgL7RoR/H7mpZcCxfhYiNXuUaOv8TMGK+WTLQ
 HH6QTs4mARLh1IrRcog1hoElzzqMVxaQgODeaaG1DcPvTqHWsQurbXsf17tCQOri
 nWKyxFpLNlu0kktkGb5JWrM4XBjU9KsW7LME9H86wG8HmB6+mcT5ddeYwW5nD8cG
 txXgmMjdTEKcpbeTg3cAzL4504auhIl4R9uK+8dc1sw+e9T0nXNDS9IkmLPwWtSR
 u8q6zQ3zReoDw4jGUgPP0ILHudfQsiMdWS+P2hw/krpbtLlQ+irHDVa1VA3NLiUT
 9aG9cNTYRMo3ct22YEeWsnAC04XOxpCsqHTR+UWuZaBmf3eoMIXnsafTuwLzqKlQ
 Ent/4eFPInMAzDH8Kaf1Hh0918qkgF2bNlshem11TccQKvHP+qCoHk6mKGxwEj5k
 E1UEG4S6k6zNqjLwmTBBbk8sLMl/WVo6RMSMz+JflatgPmVZco4EX2O73iKGAJVU
 5GfHIUG9Yl4+aTIUORu59cWxOCApK0kqERrFKe412BMurXlLfqVcr/H2tiiuWnn1
 cEJ9d+uBd8IxTIQX0iEYGUAkX97mhxGUYdqGQuGJSV+MOfWX1zNP1sI4EscLGKQj
 sDDZScCaguM4xE20Jum1
 =od7u
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs.

  A handful of driver changes this time around. The larger changes are:

   - Reset drivers for hi3660 and zx2967

   - AHCI driver for Davinci, acked by Tejun and brought in here due to
     platform dependencies

   - Cleanups of atmel-ebi (External Bus Interface)

   - Tweaks for Rockchip GRF (General Register File) usage (kitchensink
     misc register range on the SoCs)

   - PM domains changes for support of two new ZTE SoCs (zx296718 and
     zx2967)"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  soc: samsung: pmu: Add register defines for pad retention control
  reset: make zx2967 explicitly non-modular
  reset: core: fix reset_control_put
  soc: samsung: pm_domains: Read domain name from the new label property
  soc: samsung: pm_domains: Remove message about failed memory allocation
  soc: samsung: pm_domains: Remove unused name field
  soc: samsung: pm_domains: Use full names in subdomains registration log
  sata: ahci-da850: un-hardcode the MPY bits
  sata: ahci-da850: add a workaround for controller instability
  sata: ahci: export ahci_do_hardreset() locally
  sata: ahci-da850: implement a workaround for the softreset quirk
  sata: ahci-da850: add device tree match table
  sata: ahci-da850: get the sata clock using a connection id
  soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
  memory: atmel-ebi: Enable the SMC clock if specified
  soc: samsung: pmu: Remove unused and duplicated defines
  memory: atmel-ebi: Properly handle multiple reference to the same CS
  memory: atmel-ebi: Fix the test to enable generic SMC logic
  soc: samsung: pm_domains: Add new Exynos5433 compatible
  soc: samsung: pmu: Add dummy support for Exynos5433 SoC
  ...
2017-02-23 15:57:04 -08:00
Linus Torvalds
c61c15e08a ARM: 64-bit DT updates for v4.11
ARM64 DT updates are fairly small this time, only two new SoCs and a handful
 of new machines get added, all of them similar to other hardware we already
 support.
 
 New SoC:
   - HiSilicon Kirin960/Hi3660 and HiKey960 development board
   - NXP LS1012a with three reference boards
     http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
 
 New development board:
   - Banana Pi M64, based on Allwinner A64
     http://www.banana-pi.org/m64.html
   - SolidRun MACCHIATOBin based on Marvell Armada 8K
     https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
   - Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
 
 A lot of platforms improve support for existing machines by adding
 extra devices for which a binding and driver is availabe:
 
 Allwinner: MMC, USB
 ARM Juno: Coresight, STM
 Broadcom: NS2 GICv2m irqchip and PCIe
 Marvell: Armada 3700 SPI, I2C, ethernet switch
 Mediatek: MT8173 thermal
 NXP i.MX: LS1046A thermal
 Qualcomm: coresight on MSM8916, HDMI, WCNSS, SCM
 Renesas: r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
 Rockchip: thermal, eDP, pinctrl enhancements
 Samsung: TM2 touchkey, Exynos5433 HDMI and power management improvements
 UniPhier: SD reset, eMMC controller
 ZTE: oppv2 cpufreq
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIUAwUAWK9htWCrR//JCVInAQL5sg/40ehZk89xuReYHaOoL0jkEGxt7ogae2Q0
 5SurlVNEjkr1A6KKcTKwy6c8E4GReq0ioVUxyYHlNo2MedtLQWssSvObfjt390E+
 OYXhuHHyHFgut9jF6nq1IZbSqkhaDcoRFdK0EPzjdxTMMk59xqzG2t9Kbq0MFz0I
 Fg0+xB44VAOwuM+45MjNzdpTzolkH3gxlK4TV/opbr2/9uEDCjFOLr1zqZuWqIDh
 uyXXqHYUZ54kz2GvhfYPgcm+f+PjuV2fw/Jh5u3+jNvwMQvA70Erv52im1o1a3GV
 UTjmBgccTKByrPk7gXP3lgRkHQGwPLNH0L+28AZ/BNuZbWqDrDe7uVfpq9nWb5Xl
 IR0uleNBOuiOdqR6Ya4xosGSm6AOgQhCbE52trHdUhb03eqRbqHcLHEVmZXXea/i
 EejGOciIvbV8ent9jjREw/kvGZ+Ws6v5notG4uPDwn+YZSJAyqvGh5Tul8WzZIxk
 Wr1WZgbuwkI0KYiFzSINfgDX0Om2l6YoVZLnkjst5Exto+TGRSINJpVCXsuGIU7O
 34qZD25yA8WlJTooBL0cvrW0NT2RewBqLogwhbwDnRW241SW5AnuzPsFPWldLzon
 L5sFgsF60gWiIlbB2/BKdpF2jB/+brXNR6epnQYADigweg/4+pS8HPZRFj7g8wyE
 s22+OYJ6Cg==
 =glug
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "ARM64 DT updates are fairly small this time, only two new SoCs and a
  handful of new machines get added, all of them similar to other
  hardware we already support.

  New SoC:

   - HiSilicon Kirin960/Hi3660 and HiKey960 development board

   - NXP LS1012a with three reference boards:
        http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A

  New development board:

   - Banana Pi M64, based on Allwinner A64:
        http://www.banana-pi.org/m64.html

   - SolidRun MACCHIATOBin based on Marvell Armada 8K:
        https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/

   - Broadcom BCM958712DxXMC NorthStar2 reference board (another one)

  A lot of platforms improve support for existing machines by adding
  extra devices for which a binding and driver is availabe:

  Allwinner:
   - MMC, USB

  ARM Juno:
   - Coresight, STM

  Broadcom:
   - NS2 GICv2m irqchip and PCIe

  Marvell:
   - Armada 3700 SPI, I2C, ethernet switch

  Mediatek:
   - MT8173 thermal

  NXP i.MX:
   - LS1046A thermal

  Qualcomm:
   - coresight on MSM8916, HDMI, WCNSS, SCM

  Renesas:
   - r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd

  Rockchip:
   - thermal, eDP, pinctrl enhancements

  Samsung:
   - TM2 touchkey, Exynos5433 HDMI and power management improvements

  UniPhier:
   - SD reset, eMMC controller

  ZTE:
   - oppv2 cpufreq"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
  arm64: dts: qcom: Add msm8916 CoreSight components
  arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
  arm64: allwinner: add BananaPi-M64 support
  arm64: allwinner: a64: add UART1 pin nodes
  arm64: allwinner: pine64: add MMC support
  arm64: allwinner: a64: Increase the MMC max frequency
  arm64: allwinner: a64: Add MMC pinctrl nodes
  arm64: allwinner: a64: Add MMC nodes
  dt-bindings: clockgen: Add compatible string for LS1012A
  Documentation: DT: add LS1012A compatible for SCFG and DCFG
  Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
  arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
  arm64: tegra: Use symbolic reset identifiers
  arm64: dts: r8a7796: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: tidyup audma definition order
  arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7796: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add R-Car Gen3 thermal support
  ...
2017-02-23 15:52:14 -08:00
Linus Torvalds
195849ea13 ARM: DT updates for v4.11
A total of 380 patches this time, mostly adding support for more hardware
 in the device tree descriptions. There is not much exciting here for 4.11,
 but I've tried my best to condense the information from the pull requests
 I got into a readable summary.
 
 Noteworthy changes to existing platforms include:
   - The GIC memory map was a bit wrong almost everywhere and now
     gets fixed up
   - The Allwinner platforms convert to the generic pinmux properties
   - The Marvell EBU platforms now use the new DSA binding
   - Samsung Exynos4212 was unused and gets removed
   - The Renesas power management got improved
 
 New production machines:
   - Lego Mindstorms EV3
     https://www.lego.com/en-us/mindstorms/about-ev3
   - Beelink X2 Android media box
     http://linux-sunxi.org/Beelink_X2
   - "Romulus" baseboard management controller for OpenPower
   - Axentia TSE-850 Data Radio Channel (DARC) encoder
     http://www.axentia.se/db/equipment.html
   - Luxul XAP-1410 and XWR-1200 wireless access points
     https://luxul.com/xap-1410
 
 New SoCs:
   - Allwinner H2+ and V3s, both minor variations of already
     supported chips
     http://www.allwinnertech.com/index.php?c=product&a=index&id=38
   - Marvell Prestera DX packet processors based on Armada XP architecture
     http://www.marvell.com/switching/prestera-dx/
   - Samsung Exynos4412 Prime gets added, a minor variation of Exynos4412
 
 New developer and reference boards:
   - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero,
     all based on Allwinner SoCs
     http://linux-sunxi.org/LicheePi_One
     http://www.orangepi.org/orangepizero/
   - SAMA5d36ek Reference platform
     http://www.atmel.com/tools/sama5d36-ek.aspx
   - Beaglebone Green Wireless and Black Wireless
     https://beagleboard.org/black-wireless
     https://beagleboard.org/green-wireless
   - phyCORE-AM335x System on Module
     http://phytec.com/products/system-on-modules/phycore/am335x/
   - New revision of "vf610-zii" Zodiac Inflight Innovations board
   - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam i.Core
     http://www.opossom.com/english/index.html
     http://www.savageboard.org/
     http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
     http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
   - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is
 
 Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas, qcom,
     rockchip, sti, stm32 and tegra
 
 New device supports added to some boards and SoCs, briefly by platform:
   - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU
   - Aspeed: network, ipmi bt, gpio, pinmux
   - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc
   - TI DaVinci: gpio, lcdc, usb, video-in, uart
   - TI Keystone 2: MSM RAM, power/reset, uart
   - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal
   - Marvell EBU: ethernet switch on Turris Omnia
   - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic,
     eeprom, mmc, nand
   - TI OMAP:
   - Qualcomm: coresight, gyro/accelerometer, hdmi
   - Renesas: pmic, soc-id
   - Rockchip: qos
   - Samsung: audio on Odroid-X
   - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor
   - STi: video in/out
   - STM32: timer, pwm, i2c, rtc, add, i2s
   - NVIDIA Tegra: tpm
   - Uniphier: mmc/sd pinmux
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWK9aamCrR//JCVInAQJPpBAA2qUQYRfCgzK1fEu6X+c8pzqITqlV+Hx7
 8tBsZFINywKLnUXLs4Ip4DDK8uDsIACXSmGMdmhUVIXLsuRxJBl8av+ndd+ERGoF
 bg/iAIyA9hjKRhorE1wDyC4wg1S4P8laPevbK7NcDYDbK9MRmGSmEyP2uvhfLtVy
 2zoPfIE5aEipx6GoIATzLRqpMO6rWB/eg9OUZVKN5Hwh3LNCKtkX726GC9WGVqoE
 zslF1S6VH63dfru2Vlu5eFdvmiox54gBJBMR7yld+EIiXWilNT0eWfEYRd3CMT6E
 EwRCNiNRa21DHstBdL9pTuE+K0LpAUXlznjiqeWrZVuJfdHJy51pGVWwoc4ynbhI
 TS/GFgJI4iG2xrE3EIJS5cAl1S9WtNOYYvZATM35blFbZv7ASoAGdj2EECIIPwJr
 CR4l9Y2k/fuNHAzhR4B0fEKj/uWj7ONqcolpf8W6lZx0MvVNgeDwdx0eoLrbrxY9
 MJFb9OgD+BhNp5lIElysl0L9aEp3PxV668nSg4qV+Mo4w/5/OXhHK8675bXlITFU
 4Rw6fxRUBeO2B0LSonE4Ds8QKMQCs2yfxyMPWMn8yK/xFkwpHzwoJuRR2RYpbQTb
 5Hrnfk23k+2rflht07XBxNqqaznDQyPPvAvoB0ZZ2kchPYl75MlpAfOGlgfhXcmm
 Kp4g7VYyfAs=
 =ucQ/
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "A total of 380 patches this time, mostly adding support for more
  hardware in the device tree descriptions. There is not much exciting
  here for 4.11, but I've tried my best to condense the information from
  the pull requests I got into a readable summary.

  Noteworthy changes to existing platforms include:

   - The GIC memory map was a bit wrong almost everywhere and now gets
     fixed up

   - The Allwinner platforms convert to the generic pinmux properties

   - The Marvell EBU platforms now use the new DSA binding

   - Samsung Exynos4212 was unused and gets removed

   - The Renesas power management got improved

  New production machines:

   - Lego Mindstorms EV3:
        https://www.lego.com/en-us/mindstorms/about-ev3

   - Beelink X2 Android media box:
        http://linux-sunxi.org/Beelink_X2

   - "Romulus" baseboard management controller for OpenPower

   - Axentia TSE-850 Data Radio Channel (DARC) encoder:
        http://www.axentia.se/db/equipment.html

   - Luxul XAP-1410 and XWR-1200 wireless access points:
        https://luxul.com/xap-1410

  New SoCs:

   - Allwinner H2+ and V3s, both minor variations of already supported
     chips:
        http://www.allwinnertech.com/index.php?c=product&a=index&id=38

   - Marvell Prestera DX packet processors based on Armada XP
     architecture:
        http://www.marvell.com/switching/prestera-dx/

   - Samsung Exynos4412 Prime gets added, a minor variation of
     Exynos4412

  New developer and reference boards:

   - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on
     Allwinner SoCs:
        http://linux-sunxi.org/LicheePi_One
        http://www.orangepi.org/orangepizero/

   - SAMA5d36ek Reference platform:
        http://www.atmel.com/tools/sama5d36-ek.aspx

   - Beaglebone Green Wireless and Black Wireless:
        https://beagleboard.org/black-wireless
        https://beagleboard.org/green-wireless

   - phyCORE-AM335x System on Module:
        http://phytec.com/products/system-on-modules/phycore/am335x/

   - New revision of "vf610-zii" Zodiac Inflight Innovations board

   - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam
     i.Core:
        http://www.opossom.com/english/index.html
        http://www.savageboard.org/
        http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
        http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

   - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is

   - Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas,
     qcom, rockchip, sti, stm32 and tegra

  New device supports added to some boards and SoCs, briefly by platform:

   - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU

   - Aspeed: network, ipmi bt, gpio, pinmux

   - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc

   - TI DaVinci: gpio, lcdc, usb, video-in, uart

   - TI Keystone 2: MSM RAM, power/reset, uart

   - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal

   - Marvell EBU: ethernet switch on Turris Omnia

   - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom,
     mmc, nand

   - TI OMAP:

   - Qualcomm: coresight, gyro/accelerometer, hdmi

   - Renesas: pmic, soc-id

   - Rockchip: qos

   - Samsung: audio on Odroid-X

   - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor

   - STi: video in/out

   - STM32: timer, pwm, i2c, rtc, add, i2s

   - NVIDIA Tegra: tpm

   - Uniphier: mmc/sd pinmux"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits)
  ARM: dts: armada-385-linksys: fix DSA compatible property
  ARM: dts: Fix typo in armada-xp-98dx4251
  ARM: DTS: Fix register map for virt-capable GIC
  dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
  ARM: dts: sun8i: sinlinx: Enable audio nodes
  ARM: dts: sun8i: parrot: Enable audio nodes
  ARM: dts: sun8i: Add audio codec, dai and card for A33
  ARM: dts: Add EMAC AXI settings for Arria10
  ARM: dts: am335x-chiliboard: Support charger
  ARM: dts: am335x-chiliboard: Support power button
  ARM: sun8i: dt: Add mali node
  dt-bindings: gpu: Add Mali Utgard bindings
  ARM: dts: stm32: Add I2C1 support for STM32429 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
  ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
  dt-bindings: mfd: stm32f4: Add missing binding definition
  dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
  ARM: dts: add the AB8500 sysclk to the device trees
  ...
2017-02-23 15:46:25 -08:00
Linus Torvalds
af8999f672 ARM: SoC non-urgent fixes for merge window
We sometimes collect non-critical fixes that come in during the later part
 of the merge window in a branch for the next release instead, and this is
 that contents for v4.11.
 
 Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
 and setup. There's also some fixes for Davinci and a Kconfig fix for SCPI
 to only enable on ARM{,64}.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYrMlHAAoJEIwa5zzehBx3oZ4P/3nRgb4dtwEwXwFmJf8Xd4nu
 yetQbcwRreHvh8utsU2Pe+8tffV8jLgsW8TxZ43d6deYFii046HhZAXtvTTVgFpE
 OA0fJpNJ00KYqP1Nx5q/kwZoH3uBz442uMUQ9lyziB3RpimhRsiKyHwnTyuWljyx
 hPmO1XKcF6pQBXk1uwOzO1lSDUeOn4eAmeLonlG1gQ5qtrkU0WbrTPxpmn/CB546
 LH5Nj0qVRzEa7xr8O+2nzeKPVwcXGwsKVKCDbSJmsey2KOEDnEjjxpToAh3WnA4W
 Tm1av5QdyqsLVqAMkNYezrS8EzBjRKa1ma4xUqsNoIhO1XI7xa/LkonU8a0+ZdSX
 p48DCvv7IHX5IqdIHHB0s1eICvTsW8Cp/4YUJzuZDFbS9B2t5b3412+n43tVa8l3
 HYPeTzL5S3VOrMtpQKkGAFrw5OGm+URy4CYQxpX5DxSRSqvXTj12ajBHRbfdbzCO
 r2i2rhKL07PF3DAf8L1coHcBQDS7Vc/k+fhKCQy+W1RDxmjYwYKSI9agOyZi1HQ7
 X+0HuUyKTthCE2kUrj4rye/87MffWwdjNgnOZiHR1X7YtWgnjp1g9K+mLZHh/y5m
 Tq/M55cK9h6dOghx121jYFkkvDclEQDemJuDbKY0sEMDrDXtppcI/T+znZ1LTq7i
 1eaK4lTyAX7dbQJUQCwe
 =NhZq
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "We sometimes collect non-critical fixes that come in during the later
  part of the merge window in a branch for the next release instead, and
  this is that contents for v4.11.

  Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
  and setup. There's also some fixes for Davinci and a Kconfig fix for
  SCPI to only enable on ARM{,64}"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  firmware: arm_scpi: Add hardware dependencies
  ARM: OMAP3: Fix SoC detection of OMAP36/37 Family
  ARM: OMAP5: Add HWMOD_SWSUP_SIDLE_ACT flag for UART
  ARM: dts: Fix compatible for ti81xx uarts for 8250
  ARM: dts: Fix am335x and dm814x scm syscon to probe children
  ARM: OMAP2+: Fix init for multiple quirks for the same SoC
  ARM: dts: Fix omap3 off mode pull defines
  bus: da850-mstpri: fix my e-mail address
  ARM: davinci: da850: fix da850_set_pll0rate()
  ARM: davinci: da850: coding style fix
2017-02-23 15:28:04 -08:00
Linus Torvalds
3051bf36c2 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
 "Highlights:

   1) Support TX_RING in AF_PACKET TPACKET_V3 mode, from Sowmini
      Varadhan.

   2) Simplify classifier state on sk_buff in order to shrink it a bit.
      From Willem de Bruijn.

   3) Introduce SIPHASH and it's usage for secure sequence numbers and
      syncookies. From Jason A. Donenfeld.

   4) Reduce CPU usage for ICMP replies we are going to limit or
      suppress, from Jesper Dangaard Brouer.

   5) Introduce Shared Memory Communications socket layer, from Ursula
      Braun.

   6) Add RACK loss detection and allow it to actually trigger fast
      recovery instead of just assisting after other algorithms have
      triggered it. From Yuchung Cheng.

   7) Add xmit_more and BQL support to mvneta driver, from Simon Guinot.

   8) skb_cow_data avoidance in esp4 and esp6, from Steffen Klassert.

   9) Export MPLS packet stats via netlink, from Robert Shearman.

  10) Significantly improve inet port bind conflict handling, especially
      when an application is restarted and changes it's setting of
      reuseport. From Josef Bacik.

  11) Implement TX batching in vhost_net, from Jason Wang.

  12) Extend the dummy device so that VF (virtual function) features,
      such as configuration, can be more easily tested. From Phil
      Sutter.

  13) Avoid two atomic ops per page on x86 in bnx2x driver, from Eric
      Dumazet.

  14) Add new bpf MAP, implementing a longest prefix match trie. From
      Daniel Mack.

  15) Packet sample offloading support in mlxsw driver, from Yotam Gigi.

  16) Add new aquantia driver, from David VomLehn.

  17) Add bpf tracepoints, from Daniel Borkmann.

  18) Add support for port mirroring to b53 and bcm_sf2 drivers, from
      Florian Fainelli.

  19) Remove custom busy polling in many drivers, it is done in the core
      networking since 4.5 times. From Eric Dumazet.

  20) Support XDP adjust_head in virtio_net, from John Fastabend.

  21) Fix several major holes in neighbour entry confirmation, from
      Julian Anastasov.

  22) Add XDP support to bnxt_en driver, from Michael Chan.

  23) VXLAN offloads for enic driver, from Govindarajulu Varadarajan.

  24) Add IPVTAP driver (IP-VLAN based tap driver) from Sainath Grandhi.

  25) Support GRO in IPSEC protocols, from Steffen Klassert"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1764 commits)
  Revert "ath10k: Search SMBIOS for OEM board file extension"
  net: socket: fix recvmmsg not returning error from sock_error
  bnxt_en: use eth_hw_addr_random()
  bpf: fix unlocking of jited image when module ronx not set
  arch: add ARCH_HAS_SET_MEMORY config
  net: napi_watchdog() can use napi_schedule_irqoff()
  tcp: Revert "tcp: tcp_probe: use spin_lock_bh()"
  net/hsr: use eth_hw_addr_random()
  net: mvpp2: enable building on 64-bit platforms
  net: mvpp2: switch to build_skb() in the RX path
  net: mvpp2: simplify MVPP2_PRS_RI_* definitions
  net: mvpp2: fix indentation of MVPP2_EXT_GLOBAL_CTRL_DEFAULT
  net: mvpp2: remove unused register definitions
  net: mvpp2: simplify mvpp2_bm_bufs_add()
  net: mvpp2: drop useless fields in mvpp2_bm_pool and related code
  net: mvpp2: remove unused 'tx_skb' field of 'struct mvpp2_tx_queue'
  net: mvpp2: release reference to txq_cpu[] entry after unmapping
  net: mvpp2: handle too large value in mvpp2_rx_time_coal_set()
  net: mvpp2: handle too large value handling in mvpp2_rx_pkts_coal_set()
  net: mvpp2: remove useless arguments in mvpp2_rx_{pkts, time}_coal_set
  ...
2017-02-22 10:15:09 -08:00
Linus Torvalds
5ab356626f Pin control bulk changes for the v4.11 kernel cycle:
Core changes:
 
 - Switch the generic pin config argument from 16 to 24 bits,
   only use 8 bits for the configuration type. We might need to
   encode more information about a certain setting than we need
   to encode different generic settings.
 
 - Add a cross-talk API to the pin control GPIO back-end,
   utilizing pinctrl_gpio_set_config() from GPIO drivers that
   want to set up a certain pin configuration in the back-end.
   This also includes the .set_config() refactoring of the
   GPIO chips, so that they pass a generic configuration for
   things like debouncing and single ended (typically open
   drain). This change has also been merged in an immutable
   branch to the GPIO tree.
 
 - Take hogs with a delayed work, so that we finalize probing
   a pin controller before trying to get any hogs.
 
 - For pin controllers putting all group and function definitions
   into the device tree, we now have generic code to deal with
   this and it is used in two drivers so far.
 
 - Simplifications of the pin request conflict check.
 
 - Make dt_free_map() optional.
 
 Updates to drivers:
 
 - pinctrl-single now use the generic helpers to generate dynamic
   group and function tables from the device tree.
 
 - Texas Instruments IOdelay configuration driver add-on to
   pinctrl-single.
 
 - i.MX: use radix trees to store groups and functions, use the new
   generic group and function helpers to manage them.
 
 - Intel: add support for hardware debouncing and 1K pull-down.
   New subdriver for the Gemini Lake SoC.
 
 - Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
   MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.
 
 - Aspeed: use syscon cross-dependencies to set up related bits in
   the LPC host controller and display controller.
 
 - Aspeed: finalize G4 and G5 support. Fix mux configuration on
   GPIOs. Add banks Y, Z, AA, AB and AC.
 
 - AMD: support additional GPIO.
 
 - STM32: set this controller to strict muxing mode.
   STM32H743 MCU support.
 
 - Allwinner sunxi: deep simplifications on how to support
   subvariants of SoCs without adding to much SoC-specific data
   for each subvariant, especially for sun5i variants. New driver
   for V3s SoCs. New driver for the H5 SoC. Support A31/A31s
   variants with the new variant framework.
 
 - Mvebu: simplifications to use a MMIO and regmap abstraction.
   New subdrivers for the 98DX3236, 98DX5241 SoCs.
 
 - Samsung Exynos: delete Exynos4415 support. Add crosstalk to the
   SoC driver to access regmaps. Add infrastructure for pin-bank
   retention control. Clean out the pin retention control from
   arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly
   in the Samsung pin control driver(s).
 
 - Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.
 
 - Qualcomm: use raw spinlock variants: this makes the qualcomm
   driver realtime-safe.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJYq/7kAAoJEEEQszewGV1zf4oQALVaN5tuaCbzN4QOq87jzXmk
 K195kKG0nkNvN6o5llNhBszHfCSmX1+oSscxuCF/88kH4mFHeDIbvg0KOk5IZYxA
 YlT8NA75C9+flARE3gQUyL320ulahWbvOthntQprzsVU4RJa0zP38peQsfiUd8W1
 ch8GInJYYkczcsAbmziyUOBu5a2o9tX3u8BF8FaBf2uyrCiBC/ZT2VpzvbOR5NeU
 MvjFvc7bq2fNltzDNHdZZUo/5iCbnPlRNig2umDp5fFa8rZcdPmGMAOl4p6nizHY
 S16xDl38xxDQx8sp1IH4n+th3G2cXoONEj9eZ6woWTJhLbLc13CacYPfleYfqEOe
 +JyrUgBgFBINiFWDHHaebWJeD2M/QF4FnSDGnnJBy/bKWe6lJnknGvSZNcIEvdvB
 QeeKyfrvnKiCyjNY4N+ZNdMLA2vj5o86vG2hSqztPiwYWDePbN76yeZ7l79bFfOo
 ZnCa2ay70Np7xwrQWors4Gl2LV2zJG7AkaNA7vvS9NX6OURu/SkNVePkY1XHCLwu
 lNvYd4iwFJxzXm08TsgtLC080eZfvCot9xqbgzvoapnwx7tBuaAakXI4bh0T3x4n
 pEauKO3oNE/K89mN9QK2jfsD9kDWvm4xvc+ilA6DGU0C37XnDQjF+Q5xy16262Gh
 9w0yWMlqzrr7stUXAjS4
 =IMY0
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pin control bulk changes for the v4.11 kernel cycle.

  Core changes:

   - Switch the generic pin config argument from 16 to 24 bits, only use
     8 bits for the configuration type. We might need to encode more
     information about a certain setting than we need to encode
     different generic settings.

   - Add a cross-talk API to the pin control GPIO back-end, utilizing
     pinctrl_gpio_set_config() from GPIO drivers that want to set up a
     certain pin configuration in the back-end.

     This also includes the .set_config() refactoring of the GPIO chips,
     so that they pass a generic configuration for things like
     debouncing and single ended (typically open drain). This change has
     also been merged in an immutable branch to the GPIO tree.

   - Take hogs with a delayed work, so that we finalize probing a pin
     controller before trying to get any hogs.

   - For pin controllers putting all group and function definitions into
     the device tree, we now have generic code to deal with this and it
     is used in two drivers so far.

   - Simplifications of the pin request conflict check.

   - Make dt_free_map() optional.

  Updates to drivers:

   - pinctrl-single now use the generic helpers to generate dynamic
     group and function tables from the device tree.

   - Texas Instruments IOdelay configuration driver add-on to
     pinctrl-single.

   - i.MX: use radix trees to store groups and functions, use the new
     generic group and function helpers to manage them.

   - Intel: add support for hardware debouncing and 1K pull-down. New
     subdriver for the Gemini Lake SoC.

   - Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
     MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.

   - Aspeed: use syscon cross-dependencies to set up related bits in the
     LPC host controller and display controller.

   - Aspeed: finalize G4 and G5 support. Fix mux configuration on GPIOs.
     Add banks Y, Z, AA, AB and AC.

   - AMD: support additional GPIO.

   - STM32: set this controller to strict muxing mode. STM32H743 MCU
     support.

   - Allwinner sunxi: deep simplifications on how to support subvariants
     of SoCs without adding to much SoC-specific data for each
     subvariant, especially for sun5i variants. New driver for V3s SoCs.
     New driver for the H5 SoC. Support A31/A31s variants with the new
     variant framework.

   - Mvebu: simplifications to use a MMIO and regmap abstraction. New
     subdrivers for the 98DX3236, 98DX5241 SoCs.

   - Samsung Exynos: delete Exynos4415 support. Add crosstalk to the SoC
     driver to access regmaps. Add infrastructure for pin-bank retention
     control. Clean out the pin retention control from
     arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly in
     the Samsung pin control driver(s).

   - Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.

   - Qualcomm: use raw spinlock variants: this makes the qualcomm driver
     realtime-safe"

* tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (111 commits)
  pinctrl: samsung: Fix return value check in samsung_pinctrl_get_soc_data()
  pinctrl: intel: unlock on error in intel_config_set_pull()
  pinctrl: berlin: make bool drivers explicitly non-modular
  pinctrl: spear: make bool drivers explicitly non-modular
  pinctrl: mvebu: make bool drivers explicitly non-modular
  pinctrl: sunxi: make sun5i explicitly non-modular
  pinctrl: sunxi: Remove stray printk call in sun5i driver's probe function
  pinctrl: samsung: mark PM functions as __maybe_unused
  pinctrl: sunxi: Remove redundant A31s pinctrl driver
  pinctrl: sunxi: Support A31/A31s with pinctrl variants
  pinctrl: Amend bindings for STM32 pinctrl
  pinctrl: Add STM32 pinctrl driver DT bindings
  pinctrl: stm32: Add STM32H743 MCU support
  include: dt-bindings: Add STM32H7 pinctrl DT defines
  gpio: aspeed: Remove dependence on GPIOF_* macros
  pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
  drivers: pinctrl: add driver for Allwinner H5 SoC
  pinctrl: intel: Add Intel Gemini Lake pin controller support
  pinctrl: intel: Add support for 1k additional pull-down
  pinctrl: intel: Add support for hardware debouncer
  ...
2017-02-21 16:34:22 -08:00
Linus Torvalds
507b500726 hwmon updates for v4.11
- new driver for stts751
 - it87: Added support for IT8622E and IT8792E; improved support for other chips
 - lm70: Added support for TMP122/124
 - use permission-specific DEVICE_ATTR variants where possible
 - fixed overflows in various drivers
 - minor improvements in various drivers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYqmJwAAoJEMsfJm/On5mBeGoP/0eUxc3crX3vcJrbPwLnvnZ0
 n90QIoe0Dk/699lHUu8K098Ihsj3mxOXqDgx7YTPHi3MdekoL0KkYZn/yyvE+wX/
 dcB+gz02/WLUBoUoA6rhbztqLFC59Iv4TwxGFMSU//ySGRzmy/0AZ/sG5h8C+Fli
 05+b4BdOZGSqff3EBHKJSzLrzYmbMq4+f0JlpUCNIve8gfgomenwfbrghEJw6VAj
 xp9EKM5KBLLj4e76Muk42FEvD7TxdbLeXoj/g+Tz6w8seWmQAyRinu6Udn7FqPOQ
 an/2QrtQfGgWEuZ/QbsZN9mneou4EJq4SvvUUtHLgDj6zF5mnHla/nSc62l//uac
 QVeTKCxh5/A7y+QzeQFZ/zI/5/oVQICrx5K+VCPnkH33c2DcsElBtsQaA+Jk8RNy
 S9C3UN+bAfR/SWpOiKjSu/VE3OgHzQm+TZKXyfMOGSmX+hJZcuROTNuvAso6fvVQ
 mmKtfbA+POG9DNvrHpu2ohzc42HXfAExrnclF3AxuIMHb6Qt5cwpQMgGt4Yk/CFa
 aOWX2oQPnSbx2qzhlAZdo34fflGYMf4DvsMBYc6e/6vY0WHLnL3IyfWOlw3Yrdpu
 /rjgheQb5vjoRvPadBJphFSRF4xzZCIkP+ue9o0EEqPhsJjnWmwuHhr97CaO4ror
 dJDtXi+i67uuti/NsqYP
 =QLmt
 -----END PGP SIGNATURE-----

Merge tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging

Pull hwmon updates from Guenter Roeck:

 - new driver for stts751

 - it87: Added support for IT8622E and IT8792E; improved support for
   other chips

 - lm70: Added support for TMP122/124

 - use permission-specific DEVICE_ATTR variants where possible

 - fixed overflows in various drivers

 - minor improvements in various drivers

* tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (95 commits)
  hwmon: (sht15) Add device tree support
  devicetree: add lm90 thermal_zone sensor support
  hwmon: (it87) Add support for IT8792E
  hwmon: (it87) Do not overwrite bit 2..6 of pwm control registers
  hwmon: (it87) Fix pwm4 detection for IT8620 and IT8628
  hwmon: (it87) Ensure that pwm control cache is current before updating values
  hwmon: (it87) Improve IT8622 support
  hwmon: (it87) Add support for IT8622E
  hwmon: (it87) Add feature flag indicating that VIN3 is connected to 5V
  DT: add binding documentation for STTS751
  hwmon: new driver for ST stts751 thermal sensor
  hwmon: Register thermal zone only if 'dev' parameter was provided
  hwmon: Relax name attribute validation for new APIs
  hwmon: Update documentation to clarify rules for the 'name' attribute
  hwmon: Make name attribute mandatory for new APIs
  hwmon: (lm70) Add support for TI TMP122/124
  hwmon: (lm70) Utilize dev_warn instead of pr_warn
  hwmon: (ltc4151) Export OF device ID table as module aliases
  hwmon: (adc128d818) Preserve operation mode
  hwmon: (adc128d818) Support operation modes 1-3
  ...
2017-02-20 09:52:08 -08:00
Arnd Bergmann
3e011039a3 Amlogic DT updates for v4.11, round 2
- add SAR ADC driver
 - add ADC laddered keys to meson-gxbb-p200 board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJYlNIUAAoJEFk3GJrT+8Zl6+YP/1U3aOeboRpqQiKucyMEU8bi
 GWxVAfbeIO6n9s9NMqxhBIc9fpx1sVvt8748va8xIJfQun+qrYFPvGJlK45EXfmq
 3sJSf3mu6pMyjB5FZ7m7R69G60Y80TeQ9hDvbAbSvW5c7fM69lBNouXATXK7tyaT
 v00pRNPZZ8yDmcNnxLxKYJ5bMPS9uloHYihROTTjFF+Q2zwg6hn1Zo7j/O8Yn4sw
 DNoorRLBwvI/HpkDeIl4I4T3h7oNqSzBs2h4R9k6kDUP+MkguHSBkysF6QfRnCp8
 MA3W+j5Rxk0neKNkXJlDry3cApwsmOjm47H68PSa2ODGo1BQhw+RtcZkdMinH7UU
 Lq0j/12oft1UHW+WcB5+x4d+gaVLAtNbNFIQLa/lgo/uX/6nkyKlnit74h6OoSvR
 hiYaRWKQwHgR7t2JzMLLVXQoadebkv8rahR0sQBInRus/s+XGC/n78VAUHNJYUKC
 +lykvMOokxSwJA3RtethsGmf9PEclr9LSLqenZ7GsrvYyv6ZuaLQjChN+EtMyQgt
 C5vRw0octczi51OBDrmiHPVOKs9ZPM9BC3bQLpKLUyiW+LDQmKZ6rVAV21Ofbm+X
 rPAyq6q3GXJWDty9QJzYpLZfSyWsqDwwjzzYw8RcLjyOMrnA/DU8oRa0uxzl03ZZ
 h2UTspCfUSPaRuAZ7vo0
 =SARm
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic DT updates for v4.11, round 2" from Kevin Hilman:

- add SAR ADC driver
- add ADC laddered keys to meson-gxbb-p200 board

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ARM64: dts: meson-gxbb-vega-s95: Add LED
  ARM64: dts: meson-gx: add the serial CTS and RTS pin groups
  ARM64: dts: meson-gx: add the missing uart_AO_B
  clk: meson-gxbb: Export HDMI clocks
  ARM64: dts: meson-gxm: add SCPI configuration for GXM
  ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
2017-02-16 17:50:04 +01:00
Arnd Bergmann
d0f7de9258 Samsung DeviceTree ARM64 update for v4.11, third round:
1. Add necessary initial configuration for clocks of display subsystem.
    Till now it worked mostly thanks to bootloader.
 2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
 3. Enable USB 3.0 (DWC3) on Exynos7.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYk3YaAAoJEME3ZuaGi4PXYwAP/2d7SiLymurXwmctrxm9Q5kI
 ZD7xdTr5JWq/sbuGfDHLKUz4iPMBsdQqRwczZ+DSls+Iet1fNw4enmoU/p1SpZ/5
 31EFB3uN28DSL4ZA3SzOrzPgcdMRxXOYhUMq9DTY5N8h0LlI2TwB3WBDgWTpGB6R
 NXX3wKulH2hXJyOizOZh2yel5KvzLqug7j/V0u9K1OmUISmTy3XfDWaXIVk33MUw
 IZ6qpgTzShw6sZj5VmR9CFPFbDjwExTVenIA9gwewJlQNQnqrsg0BdEF3ZvasW+V
 eFeLV4ieZHKzEoVjwdxGgTLLwjjL/orsWQ5CYiQNeCKC85rgTVfijTe8s+QKOYAq
 SiV1GghHACExpCULhtQiqioFsUAUPJ+iq/EZ9NfNh7QzE5Y05RJ7bRgRd2UdBlN8
 BXhekgN5RepLwKWHK8oYivMMpIKzDve1ICRpQYBVxmmwg9nzRz6Nij2YUi4oEb5j
 77FOuyKe5M+QCIoKVn2v/CDQMemGkI8OEsKubjDKcOZ2V2COw7Sr1L/GCGVCslLM
 FyOjaTKeoIzkrx62qgqGFuNwEaZwW0dDacHrZrccEAn9P9G7O/cU8EE9F5nJqGG0
 IeDaPH7BqQ0gOHbvrEkljSbJuuOMQmZJl6qh8MMJYB9P8u9Ft3OXUXJ1qBNZB4si
 E5nFWGj0CMm0UfBWgkD/
 =02Sx
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late

Pull "Samsung DeviceTree ARM64 update for v4.11, third round" from Krzysztof Kozłowski:

1. Add necessary initial configuration for clocks of display subsystem.
   Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.

* tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits)
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
  arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
  arm64: dts: exynos: set LDO7 regulator as always on
  arm64: dts: exynos: configure TV path clocks for Ultra HD modes
  arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
  arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
  arm64: dts: exynos: Add TM2 touchkey node
  arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
  arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
  arm64: dts: exynos: Add HDMI node to Exynos5433
  arm64: dts: exynos: Add DECON_TV node to Exynos5433
  arm64: dts: exynos: Fix addresses in node names on Exynos5433
  arm64: dts: exynos: Make TM2 and TM2E independent from each other
  arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
  ...
2017-02-16 17:46:52 +01:00
Christian Lamparter
87d08b11b1 devicetree: add lm90 thermal_zone sensor support
This patch updates the LM90's devicetree definition to
include the #thermal-sensor-cells property as well as
the sensor constants in include/dt-bindings/thermal/lm90.h.

Cc: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2017-02-10 21:35:08 -08:00
Raju Lakkaraju
04d8a0a5f3 net: phy: Add LED mode driver for Microsemi PHYs.
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.

LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.

Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-02-08 13:29:04 -05:00
Arnd Bergmann
4b5f4835d1 STM32 DT updates for v4.11, round 2.
Highlights:
 ----------
 
  - ADD Timers support on STM32F429 MCU
  - Enable PWM1 & PWM3 on STM32F469 Disco board
  - Fix STM32F4_X_CLOCK macro
  - Use STM32F4_X_CLOCK macro in STM32 device tree
  - Add I2C1 support for STM32F429 MCU
  - Enable I2C1 on STM32F429 eval board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYkhq5AAoJEH+ayWryHnCFQ8oQALI6/JlNe/MouLxT+bb1xyUz
 l7nYidN5FpvkVrNgsw4iAs4fBm7QkM99/Em4KHjQJJzWDIJJ3XFr+ofyKh47vxrB
 DrmUkauFs/Zl0oo2QoLjkIa6mqCVTJG3HQuwYIpvLgsbr57sNUqlzOJTzz72TCD9
 xwiOxgZdRVthFrUzy/5RKWls1zs7acQ+1B2y8XnlTJLNw5PY3v1FVXW0n+VtUwBf
 /VskY70E76SZTRWMRSzl5AtVyNoCqmdxE/Xk2ZQlD6dBnZ04sUGUXbwe3JFkF5Ow
 tSuTU6DSdka4Ep0o35bGdcmErXK2CNoBpgNuNeCtVnWKLieb9l7ucHH9s6Q7V9c1
 76690DqyRA3JjCH86HULZ3AvfOA6T0Uea8fEJ5bSnwJPXnAcqG0J4NzOA+YWuVLP
 Sk9UPq2zCRVlcmQb/5eYe8t+fGVQQCrYwrDCGbaGyWxfKvRYZ5+YSrHvd4quOyS3
 OK3Ia8sIBVf4gduylvwqfDRNGxzNcqECBpGflbDpS7eLRehEGWxPi9jgFuNmr5C4
 8R41zL22xksIs7fu5N/duyGW10SQLeRNDstcnWcGeCqKwDwNvsf3FCqwuyY7blaa
 NFlgLwSN5qtqhBI6e5hkNusKuZWY84QjXtQda4Y/veEtOWsEgrSNsAYbJ63lw2jH
 tVW6g/+UZo1iTzwKDIbt
 =1AIE
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

Pull "STM32 DT updates for v4.11, round 2" from Alexandre Torgue:

Highlights:
----------

 - ADD Timers support on STM32F429 MCU
 - Enable PWM1 & PWM3 on STM32F469 Disco board
 - Fix STM32F4_X_CLOCK macro
 - Use STM32F4_X_CLOCK macro in STM32 device tree
 - Add I2C1 support for STM32F429 MCU
 - Enable I2C1 on STM32F429 eval board

* tag 'stm32-dt-for-v4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: Add I2C1 support for STM32429 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
  ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
  dt-bindings: mfd: stm32f4: Add missing binding definition
  dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
2017-02-07 15:25:19 +01:00
Alexandre TORGUE
63b8482781 include: dt-bindings: Add STM32H7 pinctrl DT defines
Adds common pinctrl device tree defines for STM32H743 and
STM32H753 MCU.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-02-06 09:37:44 +01:00
Stephen Boyd
5775a4c76f Non-critical fix for the pclk_edp divider on rk3399, one new clock-id
and making niu (interconnect) clocks critical on rk3288, as
 CLK_IGNORE_UNUSED is not enough to keep them running all the time
 when more users access particular clock subtrees.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliRFEMQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgWHMB/0ZQ1p88CmxkN8kiaJBkO8UpmLuRrPivXoH
 HiZBN9fvxdR7DcrhQvH8kSt2Ir9h3Rc22TzPWChcwq1io66Bd8BuXkPP/vP9am8J
 It0VeERQzyHTLY++DYTsBmQmuaxPRm9cFsxLY5i4vowipjinFj/gDDX6DIg97j2p
 r0ytQQhOM47sRhfJSrGFsfXZIa5z5Ty0Qg04ESGmvIllrMUlm9N7+U667qknkYLW
 j2T7jWAK2l3RVe9AC7Bf10l7sldzHPHY5MuQ5WiFUWW3OgJyIUKJbD8jythg9i8V
 +54LsmX3HkIjS1OiIwECtU1Nv2t8w9RqDRCubzp/Yf+ff+oDL0h3
 =VeAF
 -----END PGP SIGNATURE-----

Merge tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

  "Non-critical fix for the pclk_edp divider on rk3399, one new
  clock-id and making niu (interconnect) clocks critical on
  rk3288, as CLK_IGNORE_UNUSED is not enough to keep them running
  all the time when more users access particular clock subtrees."

* tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3288: make all niu clocks critical
  clk: rockchip: use rk3288 vip_out clock ids
  clk: rockchip: add rk3288 vip_out clock id
  clk: rockchip: fix the incorrect pclk_edp div width for RK3399
2017-02-03 12:07:35 -08:00
Stephen Boyd
2fbae64aad Allwinner clock changes for 4.11
- Support for one new SoC, the V3s
   - Convertion of two old SoCs to the new framework, the old sun5i family
     and the A80
   - A bunch of fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYkEtDAAoJEBx+YmzsjxAgLl0QAIt0GnG4tXyTsRqrregO8Qbt
 UPK/Qs0hOW5VbpPzKDsWPwNGnTbvYy9I/RDnFiMJtEVU7Cj6ttEO4XvEKnaFF0N+
 0ux0ATUIrz6p1pbSUTxV0dCfkqcI78+ECLV4Nsvs7pj5RoJVt4Z5gBMAdErrsB+6
 q1VYLXIhs5atK1dTgjEWe4VTwaCpNCwoPMgbedOuZMLB0zFRVxtB/JSxlwGHpdoy
 vYZqSUgqmDG1WNLKXAiqsa3k9BnSsX/surAfd6mVlk1MauyKzgHKzxkBrvbNjAMR
 juaQcSXwkTOm8bRXj7E7NSFFBWiPUJt6dvXCxRJau79k+bYyPduv0UNu7T0a1IjM
 lN0PyJcY22m9O9nsoXVSMvU9YJJd91R94UQRpRSQxN1sOLMGVwnCDhQnB5RJhV3p
 gRZNZETTT/rP8E3plJJdce5xCsI6FXUT0jYTQW9cWVTcZbhKsntgNoEE4w/tqWIw
 dgE/2UzReyBkWzi9OgjKyca+q8zEd6i1w9DqAg3MwwR8K03oS/aKkBaHjgwk/i8x
 uiRXxhT5gLFhYOCwz3DmWw3OjwU7uCifyybGKCoxUE7U/3d2AalsTISCm3PX3dxl
 RTDPJWKOSfCyzTJNZpHM5MtIKGh/jM4/yUQ3ARXTGyIa9Uxb4DXlEH6gXvrZ4BUA
 UsyJ8d19owDqLIBYaE42
 =Jkg2
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock updates from Maxime Ripard:

  - Support for one new SoC, the V3s
  - Conversion of two old SoCs to the new framework, the old sun5i family
    and the A80
  - A bunch of fixes

* tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
  clk: sunxi-ng: Call divider_round_rate if we only have a single parent
  ARM: gr8: Convert to CCU
  ARM: sun5i: Convert to CCU
  clk: sunxi-ng: Add sun5i CCU driver
  clk: sunxi-ng: Implement global pre-divider
  clk: sunxi-ng: Implement multiplier maximum
  clk: sunxi-ng: mult: Fix minimum in round rate
  clk: sunxi-ng: Implement factors offsets
  clk: sunxi-ng: multiplier: Add fractional support
  clk: sunxi-ng: add support for V3s CCU
  dt-bindings: add device binding for the CCU of Allwinner V3s
  ...
2017-02-03 11:47:47 -08:00
Krzysztof Kozlowski
7633a727b0 Defines for GPIO drive strengths on Exynos5433 and Exynos7, used in Device Tree
sources.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYk2ZkAAoJEME3ZuaGi4PXKmQP/1bDh3At40ScH4m5xCP7PfRL
 aMEjpGwZQyZ0x07h7G7XYbCZIxJXX2xEQJ8rZiqrANjAPg3SV/t/YrpjYGQuKQHD
 USjP11HiaDVTdCSPQM4/kEm8+eS/E97ROA3ZcgLdXu7DkkN1BI2biNSiF7qb1hMR
 4Jdn/EJrV+Sg+BiQHemzECX67cKBKpYD/nrcVxoqSKIK6gXK8ikjICmLUHLAfhvZ
 4Pwlrh+ATkT8YEEVvibmeIQHgUqI4My0uDkRKlb6C2hr1ZrQw3fkz6W3l7wPtJCg
 mhdFGSyBAG/tW4vOFMojKnguRCflXOPOHOpmRpf5VAnMn3VE9widC61amKcQ/YRO
 PR3bikZi5uV1AmGtyZYiTAyaFEy47b53l/6sDPwyB0OGruuZfi1dRrkE93BPzoqb
 NgLR4mY4VwqGddXv1uFX+aaxzewmt9jf+8pHcAvSLVT1eoK9a7jGezFDGDaYy8Lg
 /4UfC4nW8mTfHdrIBq0gcdx0B61t4NyCxaWTDEo8YW8JQCyFOf0kKYEQuTsZA0ni
 BDRoa857h6aByLg0e+SqtN/Bg4WKSj3vHHBsbBwIK/HMLLamN/t2AJ3+X2Ufxe/J
 yQtisc+0Zpxvt/EH+aO67dSKzELrI5kuW9LuTFjNVvNBvEe4xE7xwUpBUUJZ9w8Y
 BaShXDagcuNnlmaAIGoj
 =g19s
 -----END PGP SIGNATURE-----

Merge tag 'samsung-pinctrl-4.11' into next/dt64

Merge the pinctrl header before its usage.

Defines for GPIO drive strengths on Exynos5433 and Exynos7, used in Device Tree
sources.
2017-02-02 19:07:56 +02:00
Pankaj Dubey
860ac88abe pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
Exynos7 SoC pinctrl configurations are similar to existing Exynos4/5 except
for FSYS1 pinctrl drive strengths. So adding Exynos7 specific FSYS1 blocks
pinctrl driver strength related macros which will be used in Exynos7
DTSi files.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-02-02 18:59:49 +02:00
Gabriel Fernandez
2cfb397b15 dt-bindings: mfd: stm32f4: Add missing binding definition
This patch adds missing binding definition (backupram, ethernet, otg,
qspi, adc & dsi)

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-02-01 17:01:36 +01:00
Gabriel Fernandez
982b159297 dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
Macro to select a clock was not correct.

Offset of enable register starts at 0x30, then calculation to select a bit is:
(@enable_reg - 0x30) / 4 * 32 + bit_to_select

Tested-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-02-01 17:01:33 +01:00
Krzysztof Kozlowski
67707c78f5 Exporting clocks for MIPI DSI DPHY and the display PLL
frequency list update for Exynos5433 SoC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJYiydyAAoJEE1bIKeAnHqLxkoP/2qfduAcS+pBwXjOFXgJgPnt
 l/2EHO6CAGsCDh2fW1CfpfB4DvHNoHLvtt5YrtIznzuYL3pIcZTGKoPICsVZnMG8
 7q+0/ijU98VRj0g5zXL1UglHvQRiiHVHNhzGNmPJPT6mqayaoxRVYyUkDKd04Kkk
 doUR08Zxk4vqU6dr1F699DR3LVNMmc2XDVyHIJX23l3rQF2vB5yLTbMgSmxhNc2O
 p7GWN3Vm307V+L6KYpSafNPGxdbzRAdqL6aHciOk9rPBRzE0pVU3rrQpSXfZnUVm
 9FkjoeI0VwQYaEgZmXn5QbarqBKlBHfFpKtgg4Yf9HcygecZFf1nhW0yIbEaev20
 TrmktOXNe5kchjTWJK0MlYc0Elj/r2/Kq0WHJhlukWWcZ+RAfGvrXz8C2jTjmAoB
 UzCY3PciXUmgrdEiBpIuu64lmQGW+zOHlaTb9WLW4xAU9wum5rN2P2G9PJytetYU
 ToZJXrYNKD36MzioiLPngUmqYJJj+208SjaIbCEHB38clP4TROp7iNzvBLKrS/2E
 kvlBzCjxLP799Tn0Rzbc4KY24+L+2sbCmpfJ0gcyzU0eqw8ib42Zwb6wAHnOb3hz
 ffT5q4wZEvVG/RydzYoqJYRvxabZN2PmYlGtvyRozTYAL5irhHYGx1ZK6m0SZJUM
 uB8i9oXIaJ8rDIKUO2RL
 =F8PS
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.11-samsung-dphy' of git://linuxtv.org/snawrocki/samsung into next/dt64

Exporting clocks for MIPI DSI DPHY and the display PLL
frequency list update for Exynos5433 SoC.
2017-01-31 21:36:52 +02:00
Chen-Yu Tsai
783ab76ae5 clk: sunxi-ng: Add A80 Display Engine CCU
With the A80 SoC, Allwinner grouped and moved some subsystem specific
clock controls to a separate address space, and possibly separate
hardware block.

One such subsystem is the display engine. The main clock control unit
now only has 1 set of bus gate, dram gate, module clock, and reset
control for the entire display subsystem. These feed into a secondary
clock control unit, which has controls for each individual module
of the display pipeline. This block is not documented in the user
manual. Allwinner's kernel was used as the reference.

Add support for the display engine clock controls found on the A80.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:38:30 +01:00
Chen-Yu Tsai
439b65c4bb clk: sunxi-ng: Add A80 USB CCU
Add support for the USB clock controls found on the A80.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:37:51 +01:00
Chen-Yu Tsai
b8eb71dcdd clk: sunxi-ng: Add A80 CCU
Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel from Allwinner. These include controls for the I2S,
SPDIF, SATA, and eDP blocks.

Note that on the A80, some subsystems have separate clock controllers
downstream of the main clock unit. These include the MMC, USB, and
display engine subsystems.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:37:30 +01:00
Olof Johansson
2a742e1b18 ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
    PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJYjW7hAAoJEFBXWFqHsHzOCN8H/jVJo7Rnx4zwL8sx+2pjuceN
 ecTTu2l9U5Nh2Y1uRqDf914rquJteDNYoe0oWz71W7UxpJMl20X3zjfso7SWDqx8
 uSEgad6V/qHkgQQnLL9S9WdFQEGhfjVYvnMoVjBQEb1jpwdIm+nr8PIZ+Fqhh8u0
 3OLOjXk40PvzKcYwkxqeJQajP0pE6UFUOXQesolcCr+ilTvoqqQ9chPY4Jvsc7Qf
 ffC+ueSUymAhIqof2kEfy3PS5NA/ltQjokDpKjvU2+e3uJtM3qwstzt1kPCgX/d7
 azOuNNdif4hT2J26qIBG5H/wS/dFEvxnA0P4J/XUwkQ4FPRpa2Er1+F+03n5sPc=
 =XwPV
 -----END PGP SIGNATURE-----

Merge tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

ZTE PM domain driver support for 4.11:
 - It includes a series which adds DT bindings and PM domain driver for
   PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.

* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: zte: pm_domains: Add support for zx296718
  soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
  soc: zte: Add header for PM domains specifiers
  MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
  dt-bindings: zte: add bindings document for zx2967 power domain controller

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 21:17:24 -08:00
Olof Johansson
18e738d767 Second Round of Renesas ARM Based SoC DT Updates for v4.11
Enhancements:
 * Add power-domains to mmcif on r7s72100 SoC
 * Add OSTM to rskrza1/r7s72100
 * Link ARM GIC to clock and clock domain on r8a774[35] SoCs
 
 Clean-up:
 * Correct SATA device status on r8a7779/marzen
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYicoiAAoJENfPZGlqN0+++P8P/REww60pI3KHlxzdU/WeMfMi
 VEyQCKXJ4x9HVNubJ1f9w8aJBYqSFLCJulYqk4yu1LZJNmTqqD/Z1xtk382z6vmr
 uDW3JUj5Vn8kX5FmobN8boU/al4ozildB6Z2r6blnhwC1w3/fZnY88U4PHnKZ9Y2
 dJDaYUsjPawf81vJu68MzyEkOXQBfrWrxGr0wdngdOY1BE0ahL7tMvPy3uAtXVC3
 YWSJXf25cxiDzDRbmnpMe1dz5nziOq9juaPnDiJCIi8L0Cuf1ZYpvLV2nzrA0MC2
 hX+aF94CH8niZW74FMWa8ijjuq7BbgDla9G0R37St29D7/C4c+1mI2cy3qUeJBAn
 PKNj+Cmjvrdg/4dFU2X5NaufDXE+wbjsZ8I07iftqhkH6c0EZle6adhAVSlLAQHo
 Kk7PRKvTLQV3YsItlW41w0Q13jfkBhtnW3SQtTYQDY88omHytcrM5/EqLdfQxNzQ
 6IEUjPuBLLufHfXL0OADAVFitOB6djT5qZDJcGFOcZ1Bh8Fx4+zY2kCpcIi/tAl1
 s66kkG8QUiekl0hYcIfviFhkksYmIGVLIrQ17cSB31FCf9jR6b3zUkpPWZChXHDc
 jReosGFSfvbxiTdllDyKrDW8CuMaFsc9K/HVMcsRDUwUcCvTdTDF2MruQ5svChyL
 axMDOW4cOiSqMko0i4lQ
 =5/D6
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.11

Enhancements:
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs

Clean-up:
- Correct SATA device status on r8a7779/marzen

* tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r7s72100: add power-domains to mmcif
  ARM: dts: rskrza1: add ostm DT support
  ARM: dts: r7s72100: add ostm to device tree
  ARM: dts: r7s72100: add ostm clock to device tree
  ARM: dts: r8a7745: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7743: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7779, marzen: Fix sata device status

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 20:54:31 -08:00
Olof Johansson
61c5e4927b Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
 for the rk3328 soc.
 
 Secondly a "driver" that attaches to the already existing grf nodes
 and is able to set static defaults for settings that cannot really
 be attached to any specific subsystem.
 Most GRF settings can already be set from drivers using them, but there
 are some behavioural settings like the mmc/jtag switch that cannot.
 
 As the commit message states this is really meant as a last line
 of defence for things that neither belong to a subsystem nor to the
 
 Having this here allows arm64 socs to have this as well and also
 moves another bit of code out of the arm32 mach-rockchip.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBTccQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgdMAB/42pPY0pKqOWlAfqzTSlIh98vi9jp0nZUu+
 6RMlaqewhHq/zbH0qqJdcBrYRZF+EmJpTDGG2nltNi8FLNMyr+y7a0FVyjk/u43L
 FnYELcDm7yeCZ0012ZP/4hlhWI9YizojbIKH4p2o8nIj64CS132ZMVVgojyzvVc1
 0WLWUf8FBiMqsBpa6Kl117pvKayagk79PM570Ee2kRBxanN8yQaKmXTqG670eKzo
 7nar1VGAubAVpCZfbv4opugGfrjYPJFX4gcu3yJvtRRN+hTt6idRP40YoCMZSVds
 +okL0XW4G70ioXqZBS59Wq5FJS7frr8HRJbYD8lZg2vF948ZQnbC
 =4aXM
 -----END PGP SIGNATURE-----

Merge tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.

Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.

As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the

Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.

* tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: drop rk3288 jtag/mmc switch handling
  soc: rockchip: add driver handling grf setup
  dt-bindings: add used but undocumented rockchip grf compatible values
  soc: rockchip: power-domain: add power domain support for rk3328
  dt-bindings: add binding for rk3328 power domains
  dt-bindings: power: add RK3328 SoCs header for idle-request
  soc: rockchip: power-domain: Support domain control in hiword-registers

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 14:32:07 -08:00
Jeremy McNicoll
6eeaf8ff2f dt-bindings: qcom: clk: Add missing binding for SDCHI enablement on Nexus 5X/6P
AHB clock branch is needed in order to enable SDHCI
on msm899(2/4).

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-27 13:33:03 -08:00
Stephen Boyd
1955595069 Exporting clock IDs for Exynos5433 SoC MIPI DSI DPHY,
Exynos PLL code updates and overall minor clean-ups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJYiz9+AAoJEE1bIKeAnHqLQZQP/RbrWxuvEcUiMJPkzVRCJW/v
 YRSC43ZGLQ2xDypO29pyzPKbxtZPLqA+Rlg5R2M8VcP6kUVgcHkQU4xLJTMBjKVR
 2daBdSR+vUdkrTJ1Dgm37x2TaSZZ8dmCUkQn5H8HSRKXuf+Z+TTOm2p0Ysl2fX93
 840CkRxBhe6a4rVS/PMopMLeJrIcBJJcqt8vNtzK31KJDqsPZy2j5txRA1NqT0Dp
 1E7Gb4bb+xdFb+g3f1Qpyznn34dO9sUUhVYUyTsibz/IReEGshcSz11bbrupgTp1
 OBr6x5j8MYcbj41qC7kkIN6Vz+KLBGyBPnd7SE5j3yE8y2wykZALdutFFDvrd+nb
 hBTKRErmfXQIPk74magrd6AvfVhHS6d6UbM6pISE9pit9tqUAcHGBJ3GDe+afnNi
 DZPem8S1DmRp6WjYfXSOJQrSACqx/jjV8uo0erDjYYr7oAEBaWo7e0bqyazzQL2/
 HNzp2LjM9QT+KFFJW/TP/cJju+l59ugp/xHOGJkBWTOBU8j9rKu3cVipEfcndZ52
 sxnemcMPmZ3IPQjIaW8GYyshFH0hsxU0AIkc+Hko2Qyvkc/4DFvJTHbZOC+fU8ix
 jBQEIoGT+kugFPloBrwdnMBOOx/5lSMcF/WqwZgIhLrm+ll5npf02bCYTt6tGUZd
 z76TgLRCLn8mopfjCAp6
 =QhYQ
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Exporting clock IDs for Exynos5433 SoC MIPI DSI DPHY
 - Exynos PLL code updates and overall minor clean-ups

* tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: mark s3c...._clk_sleep_init() as __init
  clk: samsung: Add enable/disable support for PLL35XX clocks
  clk: samsung: exynos5433: Correct typos in SoC name
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
2017-01-27 11:53:06 -08:00
Marek Szyprowski
5ccb58968b clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and
phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed
to setup initial clock configuration for display subsystem in device tree
in order to avoid dependency on the configuration left by the bootloader.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-01-27 11:33:59 +01:00
Stephen Boyd
de9b5a2404 Merge branch 'clk-ux500' into clk-next
* clk-ux500:
  clk: ux500: Convert ABx500 clocks to use OF probing
  clk: ux500: Add device tree bindings for ABx500 clocks
  clk: ux500: move AB8500 sysclk over to PRCMU clk driver
2017-01-26 16:10:57 -08:00
Linus Walleij
55921ce276 clk: ux500: Convert ABx500 clocks to use OF probing
These clocks have been broken for a long time unfortunately, a
hurdle of misc problems made them stop working at some point
breaking USB and audio on Ux500.

The platform as such and all "regular" clocks are migrated to
OF/device tree, so let's migrate also this driver.

With this patch and the corresponding DTS fixes, and a bunch
of probe deferral fixes, audio starts working again on Ux500.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-26 16:10:02 -08:00
Stephen Boyd
0875dd5938 Merge branch 'clk-stm32f4' into clk-next
* clk-stm32f4:
  clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
2017-01-26 15:52:55 -08:00
Stephen Boyd
645ebb1daa Merge branch 'clk-imx7', 'clk-bcm2835' into clk-next
* clk-imx7:
  clk: imx7d: Add the OCOTP clock

* clk-bcm2835:
  clk: bcm2835: Add leaf clock measurement support, disabled by default
  clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
  clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.
2017-01-26 15:52:37 -08:00
Chris Brandt
cfddd3db08 ARM: dts: r7s72100: add ostm clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-24 13:25:04 +01:00
Martin Blumenstingl
33d0fcdfe0 clk: gxbb: add the SAR ADC clocks and expose them
The HHI_SAR_CLK_CNTL contains three SAR ADC specific clocks:
- a mux clock to choose between different ADC reference clocks (this is
  2-bit wide, but the datasheet only lists the parents for the first
  bit)
- a divider for the input/reference clock
- a gate which enables the ADC clock

Additionally this exposes the ADC core clock (CLKID_SAR_ADC) and
CLKID_SANA (which seems to enable the analog inputs, but unfortunately
there is no documentation for this - we just mimic what the vendor
driver does).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-23 10:18:21 -08:00
Maxime Ripard
5e73761786 clk: sunxi-ng: Add sun5i CCU driver
The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.

However, they're not packaged in the same way, and therefore not all the
controllers are actually available on all these SoCs.

Introduce a clock controller driver for all these SoCs with different
compatibles to take that into account.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-23 11:45:29 +01:00
Jacob Chen
db86dadf18 clk: rockchip: add rk3288 vip_out clock id
Add clock-ids for the vip block of the rk3288

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-22 17:07:03 +01:00
Gabriel Fernandez
52af8557bb clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
This patch introduces the stm32f7 clock DT bindings.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:37:43 -08:00
Fabio Estevam
6847c4c296 clk: imx7d: Add the OCOTP clock
Add the OCOTP so that this hardware block can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:27:19 -08:00
Eric Anholt
8a39e9fa57 clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver.  In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:22:55 -08:00
Stephen Boyd
060982670b A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
 clock-controller (including a new pll-type) and the usual clock ids and
 some fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlh+vFMQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgf7TCACncJmYlvYp+aZEgBlEcyCTulHNSyRZHVPd
 c4zBsgZmgxqmgrxe8YsW6DcfPP96MtL/C/fIupxTphxxfAS5HQx2KCeVpOrfffk7
 lJ1CPyCP5GdjaZ98hKVuMpKVkQu1u26DTNWSy62hbSQQndbpP0NbGsIJJUFia1vm
 JX0POVYt0xSo6GnbVRcKN/5b9k0HJNG9aejL8u/uA3+yr8diiKzYrtnaFzai5kvE
 3LgXIDGPUZVfwZ2vrJfDCYqNlij/tF2yLIhEDDoMSl00WolJfmnMKOg1Lt0DzuMz
 OQY6ZIexTV1CCV+9BjXMVCLth7DH7K3EztQsvyJtr90wrfYs+4Vd
 =4WOJ
 -----END PGP SIGNATURE-----

Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.

* tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: clk: add rockchip,grf property for RK3399
  clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188
  clk: rockchip: use rk3288 isp_in clock ids
  clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
  clk: rockchip: add rk3288 isp_in clock ids
  clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
  clk: rockchip: add clock controller for rk3328
  dt-bindings: add bindings for rk3328 clock controller
  clk: rockchip: add dt-binding header for rk3328
  clk: rockchip: add new pll-type for rk3328
  clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288
  clk: rockchip: add a clock-type for muxes based in the grf
2017-01-20 15:51:55 -08:00
Stephen Boyd
d07ed23f4c clk/samsung updates for v4.11:
- addition of the CPU clock configuration data for Exynos4412
    Prime SoC variant,
  - removal of driver for deprecated Exynos4415 SoC,
  - switching from the syscore to regular system sleep PM ops
    in the audio subsystem clocks controller driver,
  - updates of the definitions of some "Network On Chip" related
    clocks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJYgPcFAAoJEE1bIKeAnHqLt9EP/0e5ljfUQRiczFvPVfUZeZb0
 cn3HZrLBk+aDxDIBKpWSSUY0RraK6hjZYpwizRQyYBH7XFQY4aWxk2mtg+B5mPBT
 OH02tjrFeQ+BG13BzYbMKg86jFrDqQEjlpMU6PHrILrQoRqoNBomlJXpC8Jw5Oqb
 c79QxCsX8f94cbTgE3FHlF2ZHr8Wo4FKP2eWkdVBty1XvRvvZ1qE9IX6/wsqn1o7
 WCoJpKq7UjX1U9gBeHZzFRgzpKjsSoSha7yW/CkxP6b0TksQUmGi81asFxdslqi3
 xiK0PlsXB2R7TKNLNhU4hGcV7lvQFJaPOdWshvnQ7nFz9dlFjZkSGUTvLGYLH2+j
 43nHnHqEP6avNYo5cBR27Wc2ZaARMXq7AMJvZHC2/DuhtaO70wKfFVib1nFe40pX
 UBP5dxOy7C2taRxSr3QSmviuBwZYBmDWioE3SQE/IdM6z3WpN37kNrNw1OrMctji
 MFCyIfeKlUpLJVZRcdKKxvem0QTPN5/cWote5ibNO+x0O9RWkXSrdBtnoioc5oL7
 30TtZlGbKG9VsRRjxYhuul/lpTZvyewg5PP9T5xGmeXOF69SlPuZwOu26D3E2Lej
 AiTMellqH7vjX2uNSQ4lQExzOj8psJ0Mq7hj5lRavsPn8m50PAHMfq+YHncii32I
 E1HZF4sh7MYozX/2Els3
 =mSQz
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk updates from Sylwester Nawrocki:

 - addition of the CPU clock configuration data for Exynos4412
   Prime SoC variant,
 - removal of driver for deprecated Exynos4415 SoC,
 - switching from the syscore to regular system sleep PM ops
   in the audio subsystem clocks controller driver,
 - updates of the definitions of some "Network On Chip" related
   clocks.

* tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
  clk: samsung: exynos-audss: Replace syscore PM with platform device PM
  clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
  clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
2017-01-20 15:49:47 -08:00
Icenowy Zheng
d0f11d14b0 clk: sunxi-ng: add support for V3s CCU
V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.

Add such a new driver for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-20 21:39:03 +01:00
Alexandre TORGUE
232aa35e1b Merge commit 'f8b5036361412a27c07a4ac9c3a4b80678cbd1e1' into stm32-dt-for-v4.11 2017-01-20 14:48:23 +01:00
Neil Armstrong
5a582cff47 clk: meson-gxbb: Export HDMI clocks
Export HDMI clock from internal to dt-bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-18 10:17:53 -08:00
Olof Johansson
c2b360449e STM32 DT updates for v4.11, round 1.
Highlights:
 ----------
 
  - ADD RTC support on STM32F429 MCU
  - Enable RTC on STM32F469and STM32F429 boards
  - ADD ADC support on STM32F429 MCU
  - Enable ADC on STM32F429 Eval board
  - Add I2S external clock
  - Fix memory size for STM32F429 Disco
 
 Note:
 -----
 First patch "clk: stm32f4: Update DT bindings documentation")
 has already been merged in clock tree.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYfOhfAAoJEH+ayWryHnCFyy0P/2b8H+73DHY/Cbo1c3N5zGYT
 oMYyOX1pwDbMqdOvJBcaP4+H3Ho/3uCPZDv/jhfXU4nVUQT2U3xnYOx89mRowRRd
 n+HOVFm5wIJUGFtvwLgl8uGf7eFn/gI3UM63iGkH2dmV2EB+GDt8RyxFKV0jZdEJ
 qKLPUbBkIqMOcWoHYb9XYEqOiqBSd3cR1MJuUkDGOTz5rVmKUdcRJjJtgAETXqXH
 /sDAhXfQ1bOqAmGWVwiZ/+2spsImTM8orBzTo6feqBr7lKXfgtD4tBzI7GCJXNad
 nUvUFwuQ65arwzC+2rVVpReaIgn5O+k2lO1+dWCx3ffBbDS33yYlzDv6bcuVgvP9
 SYa7CyOm9W6ki6PO5omxcEuNNQkAZvji+RN6T8KeRZCiu12qa9JI2bcZ1FO063On
 zsvJUjbP0IFjqaTJPlnSyzSvJyNRcToi358pPTtlunAkXvDGRU8/dxyTULcOLJ/z
 6sHb6dD2VthT7BaWSh8pRH6p4O7JYPk6UhBUE+NHR8A4wJQwy828I9WqStHGK35R
 Qxsbd2KwfsGCqt2ZdMa/nMm/Rba60gTLd/XGAbqHQFl/pNYenxdMcY+4kPT+CFxK
 10Uih+1H5KYG6meB8Eg2rcjAsJzJJjGOHPFVW/eiJcaS0olE8to5IhAEJyUCgzbI
 t8s/93C1KjYpsJ8iwy2x
 =Xll3
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.11, round 1.

Highlights:
----------

 - ADD RTC support on STM32F429 MCU
 - Enable RTC on STM32F469and STM32F429 boards
 - ADD ADC support on STM32F429 MCU
 - Enable ADC on STM32F429 Eval board
 - Add I2S external clock
 - Fix memory size for STM32F429 Disco

Note:
-----
First patch "clk: stm32f4: Update DT bindings documentation")
has already been merged in clock tree.

* tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: enable RTC on stm32429i-eval
  ARM: dts: stm32: enable RTC on stm32f469-disco
  ARM: dts: stm32: enable RTC on stm32f429-disco
  ARM: dts: stm32: Add RTC support for STM32F429 MCU
  ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
  ARM: dts: stm32: Include auxiliary stm32fx clock definition
  ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
  ARM: dts: stm32: enable ADC on stm32f429i-eval board
  ARM: dts: stm32: Add ADC support to stm32f429
  ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
  ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
  clk: stm32f4: Update DT bindings documentation

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-16 22:47:51 -08:00