3 Commits

Author	SHA1	Message	Date
Axel Lin	743a46b89a	spi: sun6i: Set bits_per_word_mask to only support 8 bits word length ... This controller only supports 8 bits word length. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>	2014-03-04 11:08:06 +08:00
Axel Lin	d31ad46f58	spi: sun6i: Fix define for SUN6I_TFR_CTL_CS_MASK ... Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>	2014-02-16 09:11:05 +08:00
Maxime Ripard	3558fe900e	spi: sunxi: Add Allwinner A31 SPI controller driver ... The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>	2014-02-05 14:58:36 +00:00