Commit Graph

2125 Commits

Author SHA1 Message Date
Tero Kristo
5a68c87afd soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
Add genpd support for mpu, dsp, ipu, coreaon, core, iva, cam, dss, gpu,
l3init, l4per, custefuse, wkupaon, emu, eve, rtc and vpe instances.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19 15:09:00 +02:00
Joel Stanley
4da595ddc0 soc: aspeed: Enable drivers with ARCH_ASPEED
Default the drivers to on as most configurations will use them.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19 23:01:36 +10:30
Dan Carpenter
0f0c9c7022 soc: aspeed: Fix a reference leak in aspeed_socinfo_init()
This needs to call of_node_put(np) before returning if of_iomap() fails.

Fixes: e0218dca57 ("soc: aspeed: Add soc info driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20201113100850.GA168908@mwanda
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19 23:01:15 +10:30
Tom Rix
959b981dc7 soc: aspeed: remove unneeded semicolon
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20201101150622.2288203-1-trix@redhat.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19 23:01:14 +10:30
Tero Kristo
773f0d89ac soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
Add genpd support for mpu, tesla, always_on_core, core, ivahd, cam, dss,
gfx, l3init, l4per, cefuse, wkup and emu instances.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19 14:26:47 +02:00
Nicolin Chen
b9ce9b0f83 soc/tegra: fuse: Fix index bug in get_process_id
This patch simply fixes a bug of referencing speedos[num] in every
for-loop iteration in get_process_id function.

Fixes: 0dc5a0d836 ("soc/tegra: fuse: Add Tegra210 support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-19 11:43:49 +01:00
Maxime Ripard
b4bdc4fbf8 soc: sunxi: Deal with the MBUS DMA offsets in a central place
So far most of the drivers with the MBUS quirks had to duplicate the
code to deal with DT compatibility and enforcing the DMA offsets.

Let's move for a more maintainable solution by putting everything in a
notifier that would take care of setting up the DMA offsets for all the
MBUS devices.

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-11-18 09:01:30 +01:00
Tero Kristo
f32f0cbd52 soc: ti: omap-prm: am4: add genpd support for remaining PRM instances
Add genpd support for mpu, rtc, tamper, cefuse, per and wkup instances.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 13:01:12 +02:00
Tony Lindgren
74033131d2 soc: ti: pm33xx: Enable basic PM runtime support for genpd
To prepare for moving to use genpd, let's enable basic PM
runtime support.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:38 +02:00
Tero Kristo
f29ef9807f soc: ti: omap-prm: am3: add genpd support for remaining PRM instances
Add genpd support for per, wkup, mpu, rtc and cefuse instances.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:35 +02:00
Tony Lindgren
176958dd8e soc: ti: omap-prm: Add pm_clk for genpd
In order to probe l3 and l4 interconnects with simple-pm-bus, we want
genpd to manage the clocks for the interconnects. For interconnect target
modules, we already have ti-sysc manage the clocks so let's skipe managing
clocks for ti-sysc modules.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:32 +02:00
Tony Lindgren
c1995e5afa soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
If a rstctrl reset bit is already deasserted, we can just bail out early
not wait for rstst to clear. Otherwise we can have deassert fail for
already deasserted resets.

Fixes: c5117a78dd ("soc: ti: omap-prm: poll for reset complete during de-assert")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-13 09:59:01 +02:00
Lee Jones
a6a3a24c12 soc: rockchip: io-domain: Remove incorrect and incomplete comment header
Fixes the following W=1 kernel build warning(s):

 drivers/soc/rockchip/io-domain.c:57: warning: Cannot understand  * @supplies: voltage settings matching the register bits.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: linux-rockchip@lists.infradead.org
Link: https://lore.kernel.org/r/20201103152838.1290217-6-lee.jones@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-11-12 12:15:06 +01:00
Lee Jones
1894b78ee6 soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/rpmh.c:266: warning: Function parameter or member 'dev' not described in 'rpmh_write'
 drivers/soc/qcom/rpmh.c:266: warning: Excess function parameter 'rc' description in 'rpmh_write'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-16-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:23:58 -06:00
Lee Jones
9401f8dcf1 soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Function parameter or member 'val' not described in 'kryo_l2_set_indirect_reg'
 drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Excess function parameter 'value' description in 'kryo_l2_set_indirect_reg'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-23-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:23:02 -06:00
Lee Jones
5d16af6a92 soc: qcom: rpmhpd: Provide some missing struct member descriptions
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'parent' not described in 'rpmhpd'
 drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'corner' not described in 'rpmhpd'
 drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'active_corner' not described in 'rpmhpd'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-22-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:22:35 -06:00
Lee Jones
171c03171a soc: qcom: llcc-qcom: Fix expected kernel-doc formatting
Kernel-doc expects struct documentation to start with 'struct <name>'.

Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/llcc-qcom.c:77: warning: cannot understand function prototype: 'struct llcc_slice_config '

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-21-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:21:52 -06:00
Lee Jones
1f8933c25f soc: qcom: smp2p: Remove unused struct attribute provide another
Fixes the following W=1 kernel build warning:

 drivers/soc/qcom/smp2p.c:149: warning: Function parameter or member 'out' not described in 'qcom_smp2p'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-20-lee.jones@linaro.org
[bjorn: Dropped hunk that fixed the same warning in smp2p_smem_item]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:20:44 -06:00
Lee Jones
f5c805b1f1 soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'major' not described in 'wcnss_version_resp'
 drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'minor' not described in 'wcnss_version_resp'
 drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'version' not described in 'wcnss_version_resp'
 drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'revision' not described in 'wcnss_version_resp'
 drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'rpdev' not described in 'wcnss_ctrl_smd_callback'
 drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'priv' not described in 'wcnss_ctrl_smd_callback'
 drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'addr' not described in 'wcnss_ctrl_smd_callback'
 drivers/soc/qcom/wcnss_ctrl.c:122: warning: Excess function parameter 'channel' description in 'wcnss_ctrl_smd_callback'
 drivers/soc/qcom/wcnss_ctrl.c:272: warning: Function parameter or member 'priv' not described in 'qcom_wcnss_open_channel'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-19-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:14:59 -06:00
Lee Jones
fac312df31 soc: qcom: smsm: Fix some kernel-doc formatting and naming problems
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/smsm.c:140: warning: Function parameter or member 'mask' not described in 'smsm_update_bits'
 drivers/soc/qcom/smsm.c:140: warning: Excess function parameter 'offset' description in 'smsm_update_bits'
 drivers/soc/qcom/smsm.c:257: warning: bad line:
 drivers/soc/qcom/smsm.c:260: warning: bad line:

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-18-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:13:30 -06:00
Lee Jones
fc3699c698 soc: qcom: smem: Fix formatting and missing documentation issues
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/smem.c:135: warning: Function parameter or member 'toc' not described in 'smem_header'
 drivers/soc/qcom/smem.c:275: warning: Function parameter or member 'socinfo' not described in 'qcom_smem'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-17-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:12:49 -06:00
Lee Jones
08ad7061e4 soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/qcom-geni-se.c:85: warning: Cannot understand  * @struct geni_wrapper - Data structure to represent the QUP Wrapper Core
 drivers/soc/qcom/qcom-geni-se.c:246: warning: Function parameter or member 'rx_rfr' not described in 'geni_se_init'
 drivers/soc/qcom/qcom-geni-se.c:246: warning: Excess function parameter 'rx_rfr_wm' description in 'geni_se_init'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-13-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:11:26 -06:00
Lee Jones
96ec310d5d soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/qcom_aoss.c:86: warning: Function parameter or member 'cooling_devs' not described in 'qmp'

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-4-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:11:26 -06:00
Lee Jones
54f8ebda0d soc: qcom: qcom_aoss: Remove set but unused variable 'tlen'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/qcom/qcom_aoss.c: In function ‘qmp_send’:
 drivers/soc/qcom/qcom_aoss.c:228:9: warning: variable ‘tlen’ set but not used [-Wunused-but-set-variable]

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20201103152838.1290217-3-lee.jones@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10 23:11:17 -06:00
Lee Jones
6c37cb9fa6 soc: tegra: fuse: speedo-tegra210: Remove a group of set but unused variables
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra210.c: In function ‘tegra210_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:56: warning: variable ‘soc_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:46: warning: variable ‘gpu_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:36: warning: variable ‘cpu_iddq’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-10 20:40:53 +01:00
Lee Jones
ce034072f9 soc: tegra: fuse: speedo-tegra124: Remove some set but unused variables
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra124.c: In function ‘tegra124_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:38: warning: variable ‘soc_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:22: warning: variable ‘gpu_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:6: warning: variable ‘cpu_iddq_value’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-10 20:40:49 +01:00
Pawel Czarnecki
22447a99c9 drivers/soc/litex: add LiteX SoC Controller driver
This commit adds driver for the FPGA-based LiteX SoC
Controller from LiteX SoC builder.

Co-developed-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2020-11-09 21:07:00 +09:00
Jakub Kicinski
ae0d0bb29b Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-06 17:33:38 -08:00
Dmitry Osipenko
fc4fbf88ec soc/tegra: fuse: Export tegra_read_ram_code()
The tegra_read_ram_code() is used by EMC drivers and we're going to make
these driver modular, hence this function needs to be exported.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201104164923.21238-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-06 19:24:24 +01:00
Lee Jones
b96c0546b5 soc: bcm: brcmstb: pm: pm-arm: Provide prototype for brcmstb_pm_s3_finish()
brcmstb_pm_s3_finish() cannot be made static because it is referenced
from brcmstb_pm_s3(), so let's provide a prototype for it instead.

Fixes the following W=1 kernel build warning(s):

 drivers/soc/bcm/brcmstb/pm/pm-arm.c:395:14: warning: no previous prototype for ‘brcmstb_pm_s3_finish’ [-Wmissing-prototypes]

Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-03 19:25:04 -08:00
Sebastian Andrzej Siewior
f84754dbc5 soc/fsl/qbman: Add an argument to signal if NAPI processing is required.
dpaa_eth_napi_schedule() and caam_qi_napi_schedule() schedule NAPI if
invoked from:

 - Hard interrupt context
 - Any context which is not serving soft interrupts

Any context which is not serving soft interrupts includes hard interrupts
so the in_irq() check is redundant. caam_qi_napi_schedule() has a comment
about this:

        /*
         * In case of threaded ISR, for RT kernels in_irq() does not return
         * appropriate value, so use in_serving_softirq to distinguish between
         * softirq and irq contexts.
         */
         if (in_irq() || !in_serving_softirq())

This has nothing to do with RT. Even on a non RT kernel force threaded
interrupts run obviously in thread context and therefore in_irq() returns
false when invoked from the handler.

The extension of the in_irq() check with !in_serving_softirq() was there
when the drivers were added, but in the out of tree FSL BSP the original
condition was in_irq() which got extended due to failures on RT.

The usage of in_xxx() in drivers is phased out and Linus clearly requested
that code which changes behaviour depending on context should either be
separated or the context be conveyed in an argument passed by the caller,
which usually knows the context. Right he is, the above construct is
clearly showing why.

The following callchains have been analyzed to end up in
dpaa_eth_napi_schedule():

qman_p_poll_dqrr()
  __poll_portal_fast()
    fq->cb.dqrr()
       dpaa_eth_napi_schedule()

portal_isr()
  __poll_portal_fast()
    fq->cb.dqrr()
       dpaa_eth_napi_schedule()

Both need to schedule NAPI.
The crypto part has another code path leading up to this:
  kill_fq()
     empty_retired_fq()
       qman_p_poll_dqrr()
         __poll_portal_fast()
            fq->cb.dqrr()
               dpaa_eth_napi_schedule()

kill_fq() is called from task context and ends up scheduling NAPI, but
that's pointless and an unintended side effect of the !in_serving_softirq()
check.

The code path:
  caam_qi_poll() -> qman_p_poll_dqrr()

is invoked from NAPI and I *assume* from crypto's NAPI device and not
from qbman's NAPI device. I *guess* it is okay to skip scheduling NAPI
(because this is what happens now) but could be changed if it is wrong
due to `budget' handling.

Add an argument to __poll_portal_fast() which is true if NAPI needs to be
scheduled. This requires propagating the value to the caller including
`qman_cb_dqrr' typedef which is used by the dpaa and the crypto driver.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Aymen Sghaier <aymen.sghaier@nxp.com>
Cc: Herbert XS <herbert@gondor.apana.org.au>
Cc: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Tested-by: Camelia Groza <camelia.groza@nxp.com>
2020-11-03 17:41:03 -08:00
Lee Jones
4d05446ab0 soc: samsung: s3c-pm-check: Fix incorrectly named variable 'val'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/samsung/s3c-pm-check.c:162: warning: Function parameter or member 'val' not described in 's3c_pm_runcheck'
 drivers/soc/samsung/s3c-pm-check.c:162: warning: Excess function parameter 'vak' description in 's3c_pm_runcheck'

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Ben Dooks <ben@simtec.co.uk>
Link: https://lore.kernel.org/r/20201103152838.1290217-15-lee.jones@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-03 21:37:45 +01:00
Wolfram Sang
74bb4eb686 v5.10-rc1 + 20201013212531.428538-1-dianders@chromium.org
-----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl+W7VkbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FhAkP/jRs8yGGpsRGvcv0Xwij
 ld6qJUI4c+vp8rgTUkTrj4JhTTdf69i34eHugz39DFuxJ5PHMdPlMiQquJd1rhbK
 Hv6LVhFoD04SlYa8shFuqb1zzttNSkgBkeLr23PbjDPD0Rvl8ZNlTPaU1IJklrpB
 evtxs/1uwvYkkl/dLaflqDkaHVCJTdW1HaptgHNC2rxfn3znflZVeP7zudkWLzJZ
 jeS/ppMSXAr9pzqe1ZsaQ7BLMh4vYrn+pEHTIUtiOqyB6fcChIu5MCY86mn4dkNr
 FXH6Ppb92I6ea6Gc6utzta3ds3nv+ER+rSoacwI9g29EwIlILq21PFwUpJTsU2/Q
 0FDogc7EdhfESxC07GDbb6kS4krkLKyXAv0xurAvGXAUYyJfRKLBc6aIsS5Dki1E
 cs2xqCcI+a5k1ak0HhZC4czJmXNvVU08lxBBgblsNc8+lE80uLfq+qiaCL+FUIh/
 dyoz4X4hcjF+pRPG7/Vz9x0MCSytuzI6dfw7voFMsXFFv4LNHNCjs/goNNXYtrIY
 7kIAAQXO3s5V7u09UZGMHNCyQjYGTcTc56en3SjR8IvASV96HuuJho+TOzLwHh6G
 Ywk5x9hAsI/a69KGWX/VSUiATAV7n/uJ+igSC8qcas9AdRh3hA5/jsvT3ED1HBU7
 Lbqwvv92Ts1ZK2FryekIk1Cb
 =Whjr
 -----END PGP SIGNATURE-----

Merge tag '20201013212531.428538-1-dianders@chromium.org' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into i2c/for-5.11

v5.10-rc1 + 20201013212531.428538-1-dianders@chromium.org
2020-11-03 21:32:11 +01:00
Tom Rix
74b01dc395 soc: samsung: exynos5422-asv: remove unneeded semicolon
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20201101152844.2290728-1-trix@redhat.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-02 19:46:46 +01:00
Peter Ujfalusi
e643bd3809 soc: ti: k3-socinfo: Add entry for AM64X SoC family
It's JTAG PARTNO is 0xBB38.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:05 -08:00
Peter Ujfalusi
8c42379e40 soc: ti: k3-ringacc: Use correct device for allocation in RING mode
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.

If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Extend the ring configuration parameters with a device pointer to be used
for DMA API when the ring is configured in RING mode.

Extending the ring configuration struct will allow per ring selection of
device to be used for allocation, thus allowing per ring coherency.

To avoid regression, fall back to use the ringacc dev in case the alloc_dev
is not provided.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:05 -08:00
Peter Ujfalusi
bb49ca00bd soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
Switch to the new set_cfg to configure the ring.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:03 -08:00
Peter Ujfalusi
f5087f68e7 soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
Allocate MSI entries for both first and second range if they are valid

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:00 -08:00
Tero Kristo
3d696f42c7 soc: ti: ti_sci_pm_domains: check for proper args count in xlate
K2G devices still only use single parameter for power-domains property,
so check for this properly in the driver. Without this, every peripheral
fails to probe resulting in boot failure.

Link: https://lore.kernel.org/r/20201029093337.21170-1-t-kristo@ti.com
Fixes: efa5c01cd7 ("soc: ti: ti_sci_pm_domains: switch to use multiple genpds instead of one")
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-10-29 22:13:38 +01:00
Krzysztof Kozlowski
93618e344a soc: samsung: exynos-pmu: instantiate clkout driver as MFD
The Exynos clock output (clkout) driver uses same register address space
(Power Management Unit address space) as Exynos PMU driver and same set
of compatibles.  It was modeled as clock provider instantiated with
CLK_OF_DECLARE_DRIVER().

This however brings ordering problems and lack of probe deferral,
therefore clkout driver should be converted to a regular module and
instantiated as a child of PMU driver to be able to use existing
compatibles and address space.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201001165646.32279-2-krzk@kernel.org
2020-10-28 23:02:02 +01:00
Kai Stuhlemmer
786c395dbe ARM: at91: sam9x60 SiP types added to soc description
Adding SAM9X60 SIP variants to the soc description list.

Signed-off-by: Kai Stuhlemmer <kai.stuhlemmer@ebee.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201008125028.21071-1-nicolas.ferre@microchip.com
2020-10-28 21:27:39 +01:00
Lina Iyer
827b5e6ec1 soc: qcom: Kconfig: make RPMH match Command DB setting
RPMH and drivers that use RPMH APIs need Command DB API to find the
dynamic resource information. Let's match the RPMH to match the Command
DB configuration.

This should fix undefined symbol references reported by CI :

   aarch64-linux-ld: drivers/clk/qcom/clk-rpmh.o: in function `clk_rpmh_probe':
>> clk-rpmh.c:(.text+0xac): undefined reference to `cmd_db_read_addr'
>> aarch64-linux-ld: clk-rpmh.c:(.text+0xc0): undefined reference to `cmd_db_read_aux_data'
   aarch64-linux-ld: drivers/soc/qcom/rpmh-rsc.o: in function `rpmh_rsc_probe':
>> rpmh-rsc.c:(.text+0x42c): undefined reference to `cmd_db_ready'
   aarch64-linux-ld: drivers/regulator/qcom-rpmh-regulator.o: in function `rpmh_regulator_probe':
>> qcom-rpmh-regulator.c:(.text+0x3e0): undefined reference to `cmd_db_read_addr'

Cc: Todd Kjos <tkjos@google.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Link: https://lore.kernel.org/r/20201008040907.7036-1-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-27 16:44:58 -05:00
Bjorn Andersson
bb4b1e3f0c v5.10-rc1 + 20201013212531.428538-1-dianders@chromium.org
-----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl+W7VkbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FhAkP/jRs8yGGpsRGvcv0Xwij
 ld6qJUI4c+vp8rgTUkTrj4JhTTdf69i34eHugz39DFuxJ5PHMdPlMiQquJd1rhbK
 Hv6LVhFoD04SlYa8shFuqb1zzttNSkgBkeLr23PbjDPD0Rvl8ZNlTPaU1IJklrpB
 evtxs/1uwvYkkl/dLaflqDkaHVCJTdW1HaptgHNC2rxfn3znflZVeP7zudkWLzJZ
 jeS/ppMSXAr9pzqe1ZsaQ7BLMh4vYrn+pEHTIUtiOqyB6fcChIu5MCY86mn4dkNr
 FXH6Ppb92I6ea6Gc6utzta3ds3nv+ER+rSoacwI9g29EwIlILq21PFwUpJTsU2/Q
 0FDogc7EdhfESxC07GDbb6kS4krkLKyXAv0xurAvGXAUYyJfRKLBc6aIsS5Dki1E
 cs2xqCcI+a5k1ak0HhZC4czJmXNvVU08lxBBgblsNc8+lE80uLfq+qiaCL+FUIh/
 dyoz4X4hcjF+pRPG7/Vz9x0MCSytuzI6dfw7voFMsXFFv4LNHNCjs/goNNXYtrIY
 7kIAAQXO3s5V7u09UZGMHNCyQjYGTcTc56en3SjR8IvASV96HuuJho+TOzLwHh6G
 Ywk5x9hAsI/a69KGWX/VSUiATAV7n/uJ+igSC8qcas9AdRh3hA5/jsvT3ED1HBU7
 Lbqwvv92Ts1ZK2FryekIk1Cb
 =Whjr
 -----END PGP SIGNATURE-----

Merge tag '20201013212531.428538-1-dianders@chromium.org' into drivers-for-5.11
2020-10-26 16:13:30 -05:00
Lina Iyer
778279f4f5 soc: qcom: cmd-db: allow loading as a module
This patch enables Command DB driver to be loaded as a module. Command
DB is inherent to RPMH interaction and as such would never be unloaded.
Add supress_bind_attrs to make it a permanently loaded module.

Reviewed-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Link: https://lore.kernel.org/r/20201001154144.5226-1-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 16:02:29 -05:00
Kevin Hilman
d9da1785ec soc: meson: enable building drivers as modules
Enable SoC drivers for 64-bit Amlogic SoCs to be built as modules.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-26 11:33:43 -07:00
Kevin Hilman
5d2fc13ba0 soc: amlogic: socinfo: build for specific arch
The MX driver only supports 32-bit ARM SoCs and the GX driver only
supports 64-bit SoCs.  Only build for the right architecture.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-26 11:33:27 -07:00
Douglas Anderson
80e8eaab5e soc: qcom: geni: Optimize/comment select fifo/dma mode
The functions geni_se_select_fifo_mode() and
geni_se_select_fifo_mode() are a little funny.  They read/write a
bunch of memory mapped registers even if they don't change or aren't
relevant for the current protocol.  Let's make them a little more
sane.  We'll also add a comment explaining why we don't do some of the
operations for UART.

NOTE: there is no evidence at all that this makes any performance
difference and it fixes no bugs.  However, it seems (to me) like it
makes the functions a little easier to understand.  Decreasing the
amount of times we read/write memory mapped registers is also nice,
even if we are using "relaxed" variants.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201013142448.v2.3.I646736d3969dc47de8daceb379c6ba85993de9f4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:29:19 -05:00
Douglas Anderson
4b6ea87be4 soc: qcom: geni: More properly switch to DMA mode
On geni-i2c transfers using DMA, it was seen that if you program the
command (I2C_READ) before calling geni_se_rx_dma_prep() that it could
cause interrupts to fire.  If we get unlucky, these interrupts can
just keep firing (and not be handled) blocking further progress and
hanging the system.

In commit 02b9aec592 ("i2c: i2c-qcom-geni: Fix DMA transfer race")
we avoided that by making sure we didn't program the command until
after geni_se_rx_dma_prep() was called.  While that avoided the
problems, it also turns out to be invalid.  At least in the TX case we
started seeing sporadic corrupted transfers.  This is easily seen by
adding an msleep() between the DMA prep and the writing of the
command, which makes the problem worse.  That means we need to revert
that commit and find another way to fix the bogus IRQs.

Specifically, after reverting commit 02b9aec592 ("i2c:
i2c-qcom-geni: Fix DMA transfer race"), I put some traces in.  I found
that the when the interrupts were firing like crazy:
- "m_stat" had bits for M_RX_IRQ_EN, M_RX_FIFO_WATERMARK_EN set.
- "dma" was set.

Further debugging showed that I could make the problem happen more
reliably by adding an "msleep(1)" any time after geni_se_setup_m_cmd()
ran up until geni_se_rx_dma_prep() programmed the length.

A rather simple fix is to change geni_se_select_dma_mode() so it's a
true inverse of geni_se_select_fifo_mode() and disables all the FIFO
related interrupts.  Now the problematic interrupts can't fire and we
can program things in the correct order without worrying.

As part of this, let's also change the writel_relaxed() in the prepare
function to a writel() so that our DMA is guaranteed to be prepared
now that we can't rely on geni_se_setup_m_cmd()'s writel().

NOTE: the only current user of GENI_SE_DMA in mainline is i2c.

Fixes: 37692de5d5 ("i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller")
Fixes: 02b9aec592 ("i2c: i2c-qcom-geni: Fix DMA transfer race")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Akash Asthana <akashast@codeaurora.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201013142448.v2.1.Ifdb1b69fa3367b81118e16e9e4e63299980ca798@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:29:12 -05:00
Stephan Gerhold
84314cf7d0 soc: qcom: rpmpd: Add MSM8916 power domains
MSM8916 has two RPM power domains: VDDCX and VDDMX.
Add the necessary definitions to manage them with rpmpd.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200916104135.25085-4-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:15:37 -05:00
Jun Nie
b5a3bf66d7 soc: qcom: rpmpd: Add MSM8939 power-domains
Add the shared modemcx/cx/mx power-domains found on MSM8939.

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Link: https://lore.kernel.org/r/20200930100145.9457-3-jun.nie@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:13:56 -05:00
Stephan Gerhold
043323da22 soc: qcom: rpmpd: Rename MAX_8996_RPMPD_STATE to MAX_CORNER_RPMPD_STATE
Older SoCs like MSM8916, MSM8939, MSM8974, MSM8996, ...
use "voltage corners" instead of "voltage levels".
It seems like they all use exactly the same set of corner values,
a value from 0-6 where 6 is the maximum corner (super turbo).

In preparation to add the power domains for MSM8916, rename
MAX_8996_RPMPD_STATE to MAX_CORNER_RPMPD_STATE to make it clear
that this is the max_state to be used for all SoCs using corners.  -

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200916104135.25085-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:13:47 -05:00
Konrad Dybcio
5fd7fb438b soc: qcom: rpmpd: Add SDM660 power-domains
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on SDM660.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Link: https://lore.kernel.org/r/20201018122620.9735-1-kholk11@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 10:11:58 -05:00
John Stultz
cb3659268a soc: qcom: rpmh: Allow RPMH driver to be loaded as a module
This patch allow the rpmh driver to be loaded as a permenent
module. Meaning it can be loaded from a module, but then cannot
be unloaded.

Ideally, it would include a remove hook and related logic, but
the rpmh driver is fairly core to the system, so once its loaded
with almost anything else to get the system to go, the dependencies
are not likely to ever also be removed.

So making it a permanent module at least improves things slightly
over requiring it to be a built in driver.

Cc: Todd Kjos <tkjos@google.com>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[mkshah: Fix typos in commit message, send after removing _rcuidle trace]
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1601877596-32676-3-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 09:55:06 -05:00
Maulik Shah
7bb7a83f4d Revert "drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh"
Commit efde2659b0 ("drivers: qcom: rpmh-rsc: Use rcuidle tracepoints
for rpmh") was written to fix a bug seen in an unmerged series that
implemented a struct generic_pm_domain::power_off() callback calling
rpmh_flush(). See stack trace below.

     Call trace:
      dump_backtrace+0x0/0x174
      show_stack+0x20/0x2c
      dump_stack+0xc8/0x124
      lockdep_rcu_suspicious+0xe4/0x104
      __tcs_buffer_write+0x230/0x2d0
      rpmh_rsc_write_ctrl_data+0x210/0x270
      rpmh_flush+0x84/0x24c
      rpmh_domain_power_off+0x78/0x98
      _genpd_power_off+0x40/0xc0
      genpd_power_off+0x168/0x208

Later the final merged solution is to use CPU PM notification to invoke
rpmh_flush() and power_off() callback of genpd is not implemented in the
driver.

CPU PM notifiers are run with RCU enabled/watching (see cpu_pm_notify()
and how it calls rcu_irq_enter_irqson() before calling the notifiers).

Remove this change since RCU will not be idle during CPU PM notifications
hence not required to use _rcuidle tracepoint. Using _rcuidle tracepoint
prevented rpmh driver to be loadable module as these are not exported
symbols.

This reverts commit efde2659b0.

Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1601877596-32676-2-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 09:55:01 -05:00
Isaac J. Manjarres
c14e64b469 soc: qcom: llcc: Support chipsets that can write to llcc
Older chipsets may not be allowed to configure certain LLCC registers
as that is handled by the secure side software. However, this is not
the case for newer chipsets and they must configure these registers
according to the contents of the SCT table, while keeping in mind that
older targets may not have these capabilities. So add support to allow
such configuration of registers to enable capacity based allocation
and power collapse retention for capable chipsets.

Reason for choosing capacity based allocation rather than the default
way based allocation is because capacity based allocation allows more
finer grain partition and provides more flexibility in configuration.
As for the retention through power collapse, it has an advantage where
the cache hits are more when we wake up from power collapse although
it does burn more power but the exact power numbers are not known at
the moment.

Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
[saiprakash.ranjan@codeaurora.org: use existing config and reword commit msg]
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/dac7e11cf654fc6d75a6b5ca062ab87b01547810.1600151951.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 09:53:53 -05:00
Sai Prakash Ranjan
af7244c076 soc: qcom: llcc: Move llcc configuration to its own function
Cleanup qcom_llcc_cfg_program() by moving llcc configuration
to a separate function of its own. Also correct misspelled
'instance' caught by checkpatch.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/51f9ad67333eedf326212dd1b040aade6978e5b1.1600151951.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 09:53:48 -05:00
Evan Green
fc3e62e25c soc: qcom: smp2p: Safely acquire spinlock without IRQs
smp2p_update_bits() should disable interrupts when it acquires its
spinlock. This is important because without the _irqsave, a priority
inversion can occur.

This function is called both with interrupts enabled in
qcom_q6v5_request_stop(), and with interrupts disabled in
ipa_smp2p_panic_notifier(). IRQ handling of spinlocks should be
consistent to avoid the panic notifier deadlocking because it's
sitting on the thread that's already got the lock via _request_stop().

Found via lockdep.

Cc: stable@vger.kernel.org
Fixes: 50e9964141 ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200929133040.RESEND.1.Ideabf6dcdfc577cf39ce3d95b0e4aa1ac8b38f0c@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26 09:52:11 -05:00
Nicolas Boichat
4007844b05 soc: mediatek: Check if power domains can be powered on at boot time
In the error case, where a power domain cannot be powered on
successfully at boot time (in mtk_register_power_domains),
pm_genpd_init would still be called with is_off=false, and the
system would later try to disable the power domain again, triggering
warnings as disabled clocks are disabled again (and other potential
issues).

Also print a warning splat in that case, as this should never
happen.

Fixes: c84e358718 ("soc: Mediatek: Add SCPSYS power domain driver")
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/20200928113107.v2.1.I5e6f8c262031d0451fe7241b744f4f3111c1ce71@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-10-26 10:45:04 +01:00
Dan Carpenter
cf25d802e0 soc: renesas: rmobile-sysc: Fix some leaks in rmobile_init_pm_domains()
This code needs to call iounmap() on one error path.

Fixes: 2173fc7cb6 ("ARM: shmobile: R-Mobile: Add DT support for PM domains")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20200923113142.GC1473821@mwanda
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-10-26 10:00:14 +01:00
Linus Torvalds
e533cda12d ARM: Devicetree updates
As usual, most of the changes are to devicetrees. Besides smaller fixes,
 some refactorings and cleanups, some of the new platforms and chips
 (or significant features) supported are below:
 
 Broadcom boards:
  - Cisco Meraki MR32 (BCM53016-based)
  - BCM2711 (RPi4) display pipeline support
 
 Actions Semi boards:
  - Caninos Loucos Labrador SBC (S500-based)
  - RoseapplePi SBC (S500-based)
 
 Allwinner SoCs/boards:
  - A100 SoC with Perf1 board
  - Mali, DMA, Cetrus and IR support for R40 SoC
 
 Amlogic boards:
  - Libretch S905x CC V2 board
  - Hardkernel ODROID-N2+ board
 
 Aspeed boards/platforms:
  - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
  - Facebook Wedge400 (AST2500-based, ToR switch)
 
 Hisilicon SoC:
  - SD5203 SoC
 
 Nvidia boards:
  - Tegra234 VDK, for pre-silicon Orin SoC
 
 NXP i.MX boards:
  - Librem 5 phone
  - i.MX8MM DDR4 EVK
  - Variscite VAR-SOM-MX8MN SoM
  - Symphony board
  - Tolino Shine 2 HD
  - TQMa6 SoM
  - Y Soft IOTA Orion
 
 Rockchip boards:
  - NanoPi R2S board
  - A95X-Z2 board
  - more Rock-Pi4 variants
 
 STM32 boards:
  - Odyssey SOM board (STM32MP157CAC-based)
  - DH DRC02 board
 
 Toshiba SoCs/boards:
  - Visconti SoC and TPMV7708 board
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TVacPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx37MMP/imMO5e0QY1/7xxXWm4Kgc/Uffqw2Dvhj74a
 4Nrudwz6oUFGpZzIFYxqeCeWwotjA0nXmvM4Nl/SbxtlbV6nY/JrOL1OJToaGY0z
 Oc1jdA0MdXITdi6Xl5PTRqDeIHTSUmTclZWi5gvT7LFEvHog3mquJ7PiNTrjyuV0
 9BmHipwfmH6V5gDJZvN2dDlkhy0cpQKJFw7ylKCL89UNiEAd2QtNG0d0RLdz7yPX
 IGdecFelOhG9MSZyuFYYB2HOI33ukjZ9dA+yFy7BWOqegf/Z5hI02mxpke7Sys/5
 4XEN7ksSSYr6sm3h9XNW++IYkapZ9y/ZW+sQdiBZ3GMOwMXj02TdRkpC7f+FgAPo
 Hl7yXodGmXynL6ULu7/lIbBvqfWkLcwfVCYZx6PoWRE2q5g5ifoYp9b8kI5cLXrb
 BJn85XIuIaoO0cgrq7EzZnksaiwY1CNL84mYgkKRCGbBoJKHRiU+8Ilm5SKzk3kq
 KJ0gmbwFMjvTYxs3g6LPCo0jUNLjmLQMr0tL7iHDWkk5uqA+gfjKSLQfPby3jrMr
 6RDZBzMB+tPz1e++RWo41XD/Mm2kw8MGstsCOLzk2TdLh7e3fPfU4g7m0aqs/Q1y
 +LCqshffF/XVzV2uTFHDUGWufIM9nY6rdzuBc+JACJ5E+QyDg1tGKtMB3TYqgdN2
 aRY3NLSv
 =xjfB
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...
2020-10-24 10:44:18 -07:00
Linus Torvalds
2e368dd2bb ARM: SoC-related driver updates
Various driver updates for platforms. A bulk of this is smaller fixes or
 cleanups, but some of the new material this time around is:
 
  - Support for Nvidia Tegra234 SoC
  - Ring accelerator support for TI AM65x
  - PRUSS driver for TI platforms
  - Renesas support for R-Car V3U SoC
  - Reset support for Cortex-M4 processor on i.MX8MQ
 
 There are also new socinfo entries for a handful of different SoCs
 and platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TUboPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3T4YP/R5pjF2C1gt8FrCaG4IfhIY1VHWelfPcB5qB
 RC7Pn4MCRCEY+10YPXA70oS6KBaC+gtZ4bPeInzfLXh1ynFJJb+XtAIxoRhnkEw+
 /R979wNcIls9JqkvnHWFx29Y008W2ZNcXVNKH7O2Gxy+eKzDcTMsoH/zj8xWrV5b
 +eBllTzGU4RArYRJdcwOBQwMO6L2pzADHZ7hGMAY//8fo+qrxg8b9EINsH1UHCa8
 gQdWdVlmv6GeLB6RYLRBCWxpW4jOLDqEAvyDV84QQmYHvzD9tqJExNR0hfGTs4TU
 TZWK7LWSNqF0ujQUbFh9Ikcx6DypU1gvE7LKhCDrf4D7HLRX5v4BjGH+xtVtjsyD
 xzh4WEoa3qCNu1mxQjKG8Y6U7bB9cRI2TPVxbbmI4ZuF0njvybecwwOZUBQl4aD4
 5x+Df3pO/E5ECLOBeTnLgvw20fcjHv4HP8l63B6ADb31FUiZrJXItvayY5qXWe+P
 HSgUykmVA4nd4PnLsSj9seyWqOTIqUZ3U3TsmfxIQh2Otie01okwuHb1J7ErO/u0
 W148SgSwVbnkPxjbBHKGgC2r+Q/AjSDGRBYL0ThIVFUztxTBBwhj3FIvMnyyxTIj
 yFBY14KQ8FcNUs8DrbPCaAx/RDCB02IHdvvIlyTmU3RBq7UhJVIglpLzzo2ed9F2
 5u/aVH3y
 =tfPb
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms. A bulk of this is smaller fixes
  or cleanups, but some of the new material this time around is:

   - Support for Nvidia Tegra234 SoC

   - Ring accelerator support for TI AM65x

   - PRUSS driver for TI platforms

   - Renesas support for R-Car V3U SoC

   - Reset support for Cortex-M4 processor on i.MX8MQ

  There are also new socinfo entries for a handful of different SoCs and
  platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc
  soc: amlogic: pm-domains: use always-on flag
  reset: sti: reset-syscfg: fix struct description warnings
  reset: imx7: add the cm4 reset for i.MX8MQ
  dt-bindings: reset: imx8mq: add m4 reset
  reset: Fix and extend kerneldoc
  reset: reset-zynqmp: Added support for Versal platform
  dt-bindings: reset: Updated binding for Versal reset driver
  reset: imx7: Support module build
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  ...
2020-10-24 10:39:22 -07:00
Linus Torvalds
e731f3146f ARM: SoC platform updates
SoC changes, a substantial part of this is cleanup of some of the older
 platforms that used to have a bunch of board files. In particular:
 
  - Removal of non-DT i.MX platforms that haven't seen activity in years,
    it's time to remove them.
  - A bunch of cleanup and removal of platform data for TI/OMAP platforms,
    moving over to genpd for power/reset control (yay!)
  - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
    closer to multiplatform support (not quite there yet, but getting
    close).
 
 THere are a few other changes too, smaller fixlets, etc. For new
 platform support, the primary ones re:
 
  - New SoC: Hisilicon SD5203, ARM926EJ-S platform.
  - Cpufreq support for i.MX7ULP
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TT4gPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx322MP/1mI56SyOFx30AqtWBPSjHJp+DzhOObyb4vD
 ndYuicBIn9tJwvVRBBZkfsbIU8EENVwrN3hOpesaj9L7xiqOqKakcnyC1REYmpIs
 8XBDfdZzy5PrMHIu3fF1ZDCQyO7KndGf5DfLVxJtcf1tSPQyQCuIA3FtS6d8Bxnz
 r491+om67ucnlFD5X0Spm3RdZH+ECmXx2iXwoS0Zi7P+X+S+ovG8wBV/X0ggeoBc
 Zgi4W01SiRupmSVZ6PA7FvWaLGQErQAALQOcFtMcFgjeWzc1v2QzcURELH8JW7ro
 72AH9st1Kvi3hoN2HNNzUnNUdQvZ+AdH8skMIpN/e1cBYqYStAF3gm/R9h+iVHbG
 GMmgzXHAFErfAW2UcF8tq1CzvQ5ChcTLNXdeoa8CeQbcDfocF3EyuKSPuDH+ve0H
 kk4tPesTAc6XCEVwLaGnoC75sdum5mSi8h9vqhln2KCdeTY7jxzH9YGHjm71Supb
 kV9vqo5Q5U/c5l2nU4r5q/DZdIahKsk3HIQZ0iG7BifAzamaTh4uyLVjtM6HSwNz
 tdHZaxoHd/PLI5IoeggFelx6qgvK5qVRLP0evgOdTLRFLj/ZbrOf0Q7DjdTy2BjZ
 Lgq461QqNapOzxq43G2IDT2+P62Q1+d+YLCKBgaGQaJicyU5m9STCNo3UBb1qH1h
 W6UwGF5z
 =0+Ee
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC changes, a substantial part of this is cleanup of some of the
  older platforms that used to have a bunch of board files.

  In particular:

   - Remove non-DT i.MX platforms that haven't seen activity in years,
     it's time to remove them.

   - A bunch of cleanup and removal of platform data for TI/OMAP
     platforms, moving over to genpd for power/reset control (yay!)

   - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
     closer to multiplatform support (not quite there yet, but getting
     close).

  There are a few other changes too, smaller fixlets, etc. For new
  platform support, the primary ones are:

   - New SoC: Hisilicon SD5203, ARM926EJ-S platform.

   - Cpufreq support for i.MX7ULP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
  ARM: mstar: Select MStar intc
  ARM: stm32: Replace HTTP links with HTTPS ones
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC
  ARM: omap3: enable off mode automatically
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: imx: Remove remnant board file support pieces
  ...
2020-10-24 10:33:08 -07:00
Linus Torvalds
1f70935f63 ARM: SoC fixes
I had queued up a batch of fixes that got a bit close to the release for
 sending in before the merge window opened, so I'm including them in the
 batch of pull requests instead. They're mostly smaller DT tweaks and
 fixes, the usual mix that we tend to have through the releases.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TTg8PHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3kQUP/j1HTcEOghLsUPAiV+kz1qEWjS1tcm4/OV+b
 +Tp4pQh5Fy++iXS9yWmCgr/kMxJ4EQkCZERO+8a1VNBms/+0j3KiFuiGsZo0rKZU
 QdJvY3q8JYoLYdbyYJ8B7WAT6oS0giBoskGT6FRiwPC7uqM7va1KZOtNeESblt+6
 Ty4w5ognXbAvSLz+2VaTZTLbO7fbvd3oSwmbnN7n/qhoRPwaNExJHXTI057ekh4Y
 XqjGbYYTwY+Cdm8DkI1Dz2EPKegmSaVxS7+xzacNosx0559qe3pqrZ5OqrTui00Y
 /2T5caepAAjdEQsX6es2+mKRRXXWPRJMzHegv/mWvqJ68DPJZLgoHFcY2xy4cclr
 ALyc96rEbJTQw5jgoJO1waD6vMZOA7EqE3IXREtxcK8xYRvnK6Od8BJt7lCvB7jN
 Ws6U8udqPmeC+PUV9yhBhS8eR/S8MjeQfPK9h0xqqLEhHXqFTeqLHk3EompUaIsy
 BwPmPuZI7MBrtwXvrpbdd6I2iw/7XetIrtvSO6Z/d7iZYlf49WJhh6gBtPRnOKGX
 zOc90ohFjw/oMFoMpCHsXzyzrwtd/AUqEu/ZRV/yr4yvkpjfpwIRN/cTsN32nRYy
 Oi3BTSxow88U7CxZTwkWtwoB+alJ0ZKh3QeyLa/dwiMgj+eUc900kZLqroEMNXO1
 1JWG9qL4
 =tvbv
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "I had queued up a batch of fixes that got a bit close to the release
  for sending in before the merge window opened, so I'm including them
  in the merge window batch instead.

  Mostly smaller DT tweaks and fixes, the usual mix that we tend to have
  through the releases"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: iwg20d-q7-common: Fix touch controller probe failure
  ARM: OMAP2+: Restore MPU power domain if cpu_cluster_pm_enter() fails
  ARM: dts: am33xx: modify AM33XX_IOPAD for #pinctrl-cells = 2
  soc: actions: include header to fix missing prototype
  arm64: dts: ti: k3-j721e: Rename mux header and update macro names
  soc: qcom: pdr: Fixup array type of get_domain_list_resp message
  arm64: dts: qcom: pm660: Fix missing pound sign in interrupt-cells
  arm64: dts: qcom: kitakami: Temporarily disable SDHCI1
  arm64: dts: sdm630: Temporarily disable SMMUs by default
  arm64: dts: sdm845: Fixup OPP table for all qup devices
  arm64: dts: allwinner: h5: remove Mali GPU PMU module
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix dcdc1 regulator
  soc: xilinx: Fix error code in zynqmp_pm_probe()
2020-10-24 10:26:06 -07:00
Ulf Hansson
a7305e684f PM: AVS: qcom-cpr: Move the driver to the qcom specific drivers
The avs drivers are all SoC specific drivers that doesn't share any code.
Instead they are located in a directory, mostly to keep similar
functionality together. From a maintenance point of view, it makes better
sense to collect SoC specific drivers like these, into the SoC specific
directories.

Therefore, let's move the qcom-cpr driver to the qcom directory.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Niklas Cassel <nks@flawful.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-10-22 18:38:21 +02:00
Ulf Hansson
bca815d620 PM: AVS: smartreflex Move driver to soc specific drivers
The avs drivers are all SoC specific drivers that doesn't share any code.
Instead they are located in a directory, mostly to keep similar
functionality together. From a maintenance point of view, it makes better
sense to collect SoC specific drivers like these, into the SoC specific
directories.

Therefore, let's move the smartreflex driver for OMAP to the ti directory.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-10-16 18:28:43 +02:00
Ulf Hansson
e943c43b32 PM: AVS: rockchip-io: Move the driver to the rockchip specific drivers
The avs drivers are all SoC specific drivers that doesn't share any code.
Instead they are located in a directory, mostly to keep similar
functionality together. From a maintenance point of view, it makes better
sense to collect SoC specific drivers like these, into the SoC specific
directories.

Therefore, let's move the rockchip-io driver to the rockchip directory.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-10-16 18:23:15 +02:00
Linus Torvalds
0b8417c141 Power management updates for 5.10-rc1
- Rework cpufreq statistics collection to allow it to take place
    when fast frequency switching is enabled in the governor (Viresh
    Kumar).
 
  - Make the cpufreq core set the frequency scale on behalf of the
    driver and update several cpufreq drivers accordingly (Ionela
    Voinescu, Valentin Schneider).
 
  - Add new hardware support to the STI and qcom cpufreq drivers and
    improve them (Alain Volmat, Manivannan Sadhasivam).
 
  - Fix multiple assorted issues in cpufreq drivers (Jon Hunter,
    Krzysztof Kozlowski, Matthias Kaehlcke, Pali Rohár, Stephan
    Gerhold, Viresh Kumar).
 
  - Fix several assorted issues in the operating performance points
    (OPP) framework (Stephan Gerhold, Viresh Kumar).
 
  - Allow devfreq drivers to fetch devfreq instances by DT enumeration
    instead of using explicit phandles and modify the devfreq core
    code to support driver-specific devfreq DT bindings (Leonard
    Crestez, Chanwoo Choi).
 
  - Improve initial hardware resetting in the tegra30 devfreq driver
    and clean up the tegra cpuidle driver (Dmitry Osipenko).
 
  - Update the cpuidle core to collect state entry rejection
    statistics and expose them via sysfs (Lina Iyer).
 
  - Improve the ACPI _CST code handling diagnostics (Chen Yu).
 
  - Update the PSCI cpuidle driver to allow the PM domain
    initialization to occur in the OSI mode as well as in the PC
    mode (Ulf Hansson).
 
  - Rework the generic power domains (genpd) core code to allow
    domain power off transition to be aborted in the absence of the
    "power off" domain callback (Ulf Hansson).
 
  - Fix two suspend-to-idle issues in the ACPI EC driver (Rafael
    Wysocki).
 
  - Fix the handling of timer_expires in the PM-runtime framework on
    32-bit systems and the handling of device links in it (Grygorii
    Strashko, Xiang Chen).
 
  - Add IO requests batching support to the hibernate image saving and
    reading code and drop a bogus get_gendisk() from there (Xiaoyi
    Chen, Christoph Hellwig).
 
  - Allow PCIe ports to be put into the D3cold power state if they
    are power-manageable via ACPI (Lukas Wunner).
 
  - Add missing header file include to a power capping driver (Pujin
    Shi).
 
  - Clean up the qcom-cpr AVS driver a bit (Liu Shixin).
 
  - Kevin Hilman steps down as designated reviwer of adaptive voltage
    scaling (AVS) driverrs (Kevin Hilman).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl+F4A4SHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxX6QP/iELq9/OsH0aJdDQlY9tnh2Oa13+HB/Y
 w1e6W+ZR/YjPgUpMVARwRLKf/gn7dUEwRDHVpGvDOyun+HACCPHB2hg8iktbxdVl
 NFAVGZCCRezXqz3opL1hl8C3Dh0CqUPUjWXGMr+Lw2TZQKT+hx9K1dm9Epe3ivyT
 RlVH/wifei80cFRcUUj7DI5KLCAyk+uKkZIFnZHAGKK6qOHMqRL5sDZsMUwWpd2i
 AdghABjePbaiLTAoZuUsJINAGY4DnIt6ASRdMJ4iksiD6pFITwFs0HSOPe7hZLlv
 zbwDPI5+TIkrOy9/aWoMaEIH1OQiFN/O++Slvdjn7gMsRgoW4d300ru4Jo1pOHxb
 5twxagCCqlOf4YAaSrMCH4HT+c6fOWoGj2AKzX3DMJyO3/WN+8XNvUxKtC5Px1u+
 pWRASjfQMO2j6nNjTCTwDJdYzggiKa54rYH2k7svX7XnTIAf+2E1gv8b4rMTgQrZ
 0rq9kULYlhgk3EYjd/DndkvxunRlmiqhzrYB4jc9eDSPNzB8FZEbw1ZMRQTFfjK0
 kp0vaEpTJ7JfKSCfluB4UmTuQoGogLl0xbzc+2NNIpwdNmrH2Srvq6wbj35jEDTU
 tqsTsBP+XZFOWyFOw/L2J47LTOp0TJnz8z4aycLfrmdNUVnXJoU1sXgFlDzETMgT
 0E6cTVwLF7Zi
 =rGhy
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "These rework the collection of cpufreq statistics to allow it to take
  place if fast frequency switching is enabled in the governor, rework
  the frequency invariance handling in the cpufreq core and drivers, add
  new hardware support to a couple of cpufreq drivers, fix a number of
  assorted issues and clean up the code all over.

  Specifics:

   - Rework cpufreq statistics collection to allow it to take place when
     fast frequency switching is enabled in the governor (Viresh Kumar).

   - Make the cpufreq core set the frequency scale on behalf of the
     driver and update several cpufreq drivers accordingly (Ionela
     Voinescu, Valentin Schneider).

   - Add new hardware support to the STI and qcom cpufreq drivers and
     improve them (Alain Volmat, Manivannan Sadhasivam).

   - Fix multiple assorted issues in cpufreq drivers (Jon Hunter,
     Krzysztof Kozlowski, Matthias Kaehlcke, Pali Rohár, Stephan
     Gerhold, Viresh Kumar).

   - Fix several assorted issues in the operating performance points
     (OPP) framework (Stephan Gerhold, Viresh Kumar).

   - Allow devfreq drivers to fetch devfreq instances by DT enumeration
     instead of using explicit phandles and modify the devfreq core code
     to support driver-specific devfreq DT bindings (Leonard Crestez,
     Chanwoo Choi).

   - Improve initial hardware resetting in the tegra30 devfreq driver
     and clean up the tegra cpuidle driver (Dmitry Osipenko).

   - Update the cpuidle core to collect state entry rejection statistics
     and expose them via sysfs (Lina Iyer).

   - Improve the ACPI _CST code handling diagnostics (Chen Yu).

   - Update the PSCI cpuidle driver to allow the PM domain
     initialization to occur in the OSI mode as well as in the PC mode
     (Ulf Hansson).

   - Rework the generic power domains (genpd) core code to allow domain
     power off transition to be aborted in the absence of the "power
     off" domain callback (Ulf Hansson).

   - Fix two suspend-to-idle issues in the ACPI EC driver (Rafael
     Wysocki).

   - Fix the handling of timer_expires in the PM-runtime framework on
     32-bit systems and the handling of device links in it (Grygorii
     Strashko, Xiang Chen).

   - Add IO requests batching support to the hibernate image saving and
     reading code and drop a bogus get_gendisk() from there (Xiaoyi
     Chen, Christoph Hellwig).

   - Allow PCIe ports to be put into the D3cold power state if they are
     power-manageable via ACPI (Lukas Wunner).

   - Add missing header file include to a power capping driver (Pujin
     Shi).

   - Clean up the qcom-cpr AVS driver a bit (Liu Shixin).

   - Kevin Hilman steps down as designated reviwer of adaptive voltage
     scaling (AVS) drivers (Kevin Hilman)"

* tag 'pm-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (65 commits)
  cpufreq: stats: Fix string format specifier mismatch
  arm: disable frequency invariance for CONFIG_BL_SWITCHER
  cpufreq,arm,arm64: restructure definitions of arch_set_freq_scale()
  cpufreq: stats: Add memory barrier to store_reset()
  cpufreq: schedutil: Simplify sugov_fast_switch()
  ACPI: EC: PM: Drop ec_no_wakeup check from acpi_ec_dispatch_gpe()
  ACPI: EC: PM: Flush EC work unconditionally after wakeup
  PCI/ACPI: Whitelist hotplug ports for D3 if power managed by ACPI
  PM: hibernate: remove the bogus call to get_gendisk() in software_resume()
  cpufreq: Move traces and update to policy->cur to cpufreq core
  cpufreq: stats: Enable stats for fast-switch as well
  cpufreq: stats: Mark few conditionals with unlikely()
  cpufreq: stats: Remove locking
  cpufreq: stats: Defer stats update to cpufreq_stats_record_transition()
  PM: domains: Allow to abort power off when no ->power_off() callback
  PM: domains: Rename power state enums for genpd
  PM / devfreq: tegra30: Improve initial hardware resetting
  PM / devfreq: event: Change prototype of devfreq_event_get_edev_by_phandle function
  PM / devfreq: Change prototype of devfreq_get_devfreq_by_phandle function
  PM / devfreq: Add devfreq_get_devfreq_by_node function
  ...
2020-10-14 10:45:41 -07:00
Marc Zyngier
c351ab7bf2 soc/tegra: pmc: Don't create fake interrupt hierarchy levels
The Tegra PMC driver does ungodly things with the interrupt hierarchy,
repeatedly corrupting it by pulling hwirq numbers out of thin air,
overriding existing IRQ mappings and changing the handling flow
of unsuspecting users.

All of this is done in the name of preserving the interrupt hierarchy
even when these levels do not exist in the HW. Together with the use
of proper IRQs for IPIs, this leads to an unbootable system as the
rescheduling IPI gets repeatedly repurposed for random drivers...

Instead, let's simply mark the level from which the hierarchy does
not make sense for the HW, and let the core code trim the usused
levels from the hierarchy.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-10-10 12:12:11 +01:00
Marc Zyngier
8681cc33f8 soc/tegra: pmc: Allow optional irq parent callbacks
Make the PMC driver resistent to variable depth interrupt hierarchy,
which we are about to introduce.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-10-10 12:12:11 +01:00
Rafael J. Wysocki
757e282188 Merge branch 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull opertaing performance points (OPP) framework fixes for 5.10-rc1
from Viresh Kumar:

"- Return -EPROBE_DEFER properly from dev_pm_opp_get_opp_table()
   (Stephan Gerhold).

 - Minor cleanups around required-opps (Stephan Gerhold).

 - Extends opp-supported-hw property to contain multiple versions
   (Viresh Kumar).

 - Multiple cleanups around dev_pm_opp_attach_genpd() (Viresh Kumar).

 - Multiple fixes, cleanups in the OPP core for overall better design
   (Viresh Kumar)."

* 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  opp: Allow opp-level to be set to 0
  opp: Prevent memory leak in dev_pm_opp_attach_genpd()
  ARM: tegra: Pass multiple versions in opp-supported-hw property
  opp: Allow opp-supported-hw to contain multiple versions
  dt-bindings: opp: Allow opp-supported-hw to contain multiple versions
  opp: Set required OPPs in reverse order when scaling down
  opp: Reduce code duplication in _set_required_opps()
  opp: Drop unnecessary check from dev_pm_opp_attach_genpd()
  opp: Handle multiple calls for same OPP table in _of_add_opp_table_v1()
  opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER
  opp: Remove _dev_pm_opp_find_and_remove_table() wrapper
  opp: Split out _opp_set_rate_zero()
  opp: Reuse the enabled flag in !target_freq path
  opp: Rename regulator_enabled and use it as status of all resources
2020-10-05 13:31:32 +02:00
Olof Johansson
9f7f269300 cmdq helper:
- add new functionality for writing and reading values to and from addresses
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl9uDNIXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH777A/5ASiedzS8mRv0zlgx4h+QI/qG
 gouDhG6P/1hrDZxIaCrujXn30t5pGBKYJq4FwMdlDLTNCVZp926ibJu+/prvsTFw
 KqD9jD3pCa47BBEqURwu6o7Wn4WU5t1vT9A7Dh1v/lIvt9Fg9g77na9E4FIWLwfg
 1DOKtrcPUsoStW0oYxDjA9yWIxPYoMiRCV3tu9x2RFn+akL2TsWzvfD+VM2aqAMb
 rl0tO5soxbTv1Mx94ZZM58Ls17OqP77WAcsdf+ATBb6lmnrKfNSdXi1zKqn0e8+f
 BU8vDuU/KwKkdi2Ql5uzXKAe1dKKHM2rDCxMwMcdx85Rql2MaFtCIkhUx71HMqXW
 zxIh4XmCEi3CBk6NK+OgRgJgnue8d3F/N5JEJVUKHKYAq8c/U9MU0ClhrMoEfaK/
 Q/lYUH0t4wS8Ts6OfnQLVS+wX4bHLboAr07xGKaU5cgHN1CtuD6YvB2V74JeAGLS
 9V91V4pXEvHMpJNeBnHMgJapFXVOQJvDGUFgE+PbAJaBjqgC0QyQpmBXfy+6A1Cl
 KRA8vnliFsWXSt1/V5vM2pXQKmI50NrXsFz21VdQ5YhspK9UAMX8V1uQtew1To2k
 G1AL20v5rVSVD7HWyj8FZx/ol14xZ5UvGbQCBNhOblDshXjQtOFV4yBk055VhfWp
 cOk3axUVVx6+BO7egDE=
 =VQGK
 -----END PGP SIGNATURE-----

Merge tag 'v5.9-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

cmdq helper:
- add new functionality for writing and reading values to and from addresses

* tag 'v5.9-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc

Link: https://lore.kernel.org/r/ac672cc9-059c-b768-3a67-1f674d4a2b7a@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:07:43 -07:00
Olof Johansson
e863e45ef9 soc: amlogic: driver updates for v5.10
- misc. pm-domain updates
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl9t/SQACgkQWTcYmtP7
 xmWodQ/+JXt8MojIkCB5+/RmDGpM44cyviNfzG99giyVhtQFtC/N4P3ClOBvjOeC
 L8dBUjmNccVLgslqzJ8Ok7Vvhwcl5CCcp5MF6TU+RWyod6U5LZkS2dQPhqmBpmSX
 0FEPz/S7rscwO4klyXzyYDheqSzNSElDaOSdXd16Qol798LxqzM4Uxe6v9Ur7O4H
 ikLVxvzFlzm6P1/gc6n0C+vphrH8SHME0uOg+AQlqKdV28Oi2kWqYgkDMa0UPUUU
 m2sVaaPH3hGkY88IOb0xUm3LFGfqIOrIvvn+QbRxQFT8Pk3p4H73P4FvAk9Bm4xp
 xQ5eBAkVtTV/eUp7jODXC1yl5PJRoRvWCbssQWepKmLqWW8h4dlyWN5LvF4XTkTe
 SG9pAN7KCZZLSR9N9t9IseqCMa5K+p7cmn12oe43mmbgrXYfXTqYrTl75DYOoEaW
 8czM3RpQhp4Qx3AHpHR4pCxPIeCYazP84y3B/dBGVbRJUouECLwSGNzKh/zwk9nB
 v+sYSjtIGcqC13BPBWWwNHWOdYF3uGHPKWXiSrzpc7jKeAdKAC/l82Nf3hlLlnYz
 X3AVCTfP/fFgMjpgXQo+Edl6s5G1Us7Wel5kZ/2Ku9+8uknga2DrGvOjORjbsx9d
 Q37dqA39zYv5GFh3aaw8siLHz71/JlMd+a5ZmrWZQAEj2YBxas8=
 =8Lm1
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: amlogic: driver updates for v5.10
- misc. pm-domain updates

* tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: pm-domains: use always-on flag
  soc: amlogic: meson-ee-pwrc: add support for the Meson AXG SoCs
  dt-bindings: power: amlogic, meson-ee-pwrc: add Amlogic AXG power controller bindings

Link: https://lore.kernel.org/r/7hblhukjzx.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:00:56 -07:00
Olof Johansson
f8e87554b1 Qualcomm driver updates for v5.10
Replace the busy wait for free tcs slots in the RPMh driver with a
 sleeping wait and use memory barriers when writing the command registers.
 
 Add a bunch of SoC ids to the socinfo driver, fix an erro printin the
 apr driver and migrate llcc to devm_platform_ioremap_resource_byname().
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl9sEdIbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F4x8P/3EW9en9/ZGeNMAi6c9X
 3/OcCtLBQlq6e9xvxyEEV5j0809u0/gTxOr09oupFw8cjKH76hU0Yc6Ag0tYN1tZ
 xoDDonCKvxpCuGlMzzG27G9EljbLpia4Nth+U0YaEAswNgYUwarqmFTjTdB4bd7d
 bOMrrjU34/uNas8PLKo5MOI3iywtE79XdjYsOLoDOPLib8r7MH2zK/Ux/UJN4I+v
 mQheg08LFOvsucFSy+r+haEwikUMvVgVCIGOApKK2+kIFsK31kqUc8udTrvuEi67
 SD8hyJaeWR+HfVj/kkudLR+FzX49AauaFaCVxZ9ODO0iWpntSnWRP6q211oOWgwd
 eMKmZ7WH6RyaTN8PTKs78yuJ9+MYQUletnGbKt3npOUjfan9WsEnQrsh0JWT9rDb
 +d2IZ6USYdnzxOG0qsP5sbbpnVsGFYl+eABQ8/cvRr/W1lmHo+sdArcjAXcI65yc
 i6IHBnXmZJh6c5d/fUGyazBHpsmGIcL568PzmQ0EQCnHJcaH4SEgE8CPUnYFQtKG
 5qzi/cLonXefQNZgbmb4fc60tqjUAQTjtS7IqsYFHV2rmueCPWFjj5fyuaB6CWQj
 e7lmTcHRHJl9EQYzZfEShMMwF5B6CnfNEkCBTZLE72ypodCyU8UNO6aF5FybtVhn
 9hVWlAqnJCJfhIutuuKs6WYI
 =GI6C
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.10

Replace the busy wait for free tcs slots in the RPMh driver with a
sleeping wait and use memory barriers when writing the command registers.

Add a bunch of SoC ids to the socinfo driver, fix an erro printin the
apr driver and migrate llcc to devm_platform_ioremap_resource_byname().

* tag 'qcom-drivers-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: llcc: use devm_platform_ioremap_resource_byname()
  soc: qcom: apr: Fixup the error displayed on lookup failure
  soc: qcom: socinfo: Add msm8992/4 and apq8094 SoC IDs
  soc: qcom: rpmh-rsc: Sleep waiting for tcs slots to be free
  soc: qcom-geni-se: Don't use relaxed writes when writing commands
  soc: qcom: socinfo: add SC7180 entry to soc_id array
  soc: qcom: socinfo: add soc id for IPQ6018

Link: https://lore.kernel.org/r/20200924040504.179708-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:59:49 -07:00
Olof Johansson
c78c6e18ab NXP/FSL SoC driver updates for v5.10
Fix various compile warnings and static analysis warnings for:
 - QBMan driver
 - DPIO driver
 - QE driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAl9rzkAACgkQhtxQDvus
 FVTScw//aSBoWqDqADbph5fR/aEIrycXW38sVqXFuMgnMiSV33rBHVw5LKsTjO10
 olL+sGf+yqPx6lRVHEAVlhcHCsR9szBj7B1aUd9XdT7Dbec8guerNrlfIsoi5t8X
 7i3AKzp5B1WqVa5mXqUhbXx0077MuRnZG4xDAPgRIA7NFCIQma/cJ1QUScZVKRNV
 7vJf9mvkw3xw6aLzIo1zmAJgcEcRFudZFoRfWqW+f4t5SVYepmdBMXOrLeLEf4Lt
 Kv1+RucY8pHrnDM+MdxWObLKJpudPZTNeWJogyDPPnBEaEr/IkjvedjhT06jIumx
 sFLfyP5zlULiYMY+dKw43MDz7sxGxvi4ZDybRW5iU0mVwjFaMVLdN2QyzhJoWppt
 PjcIvn9mmhMC4Hk5e4WzDuHPwFkKRktRtqvTyx3pXPWuZmmsBNNqM96DeOrxt6yN
 IO8sWoH/WKDkP5rU+nGmie0KgGaIp5oDN7ZYjGqUHlQ/6g4xJhd28MwtiUSo8tqW
 2RkgAjuzKlB335AxsWFD3zW4+Qup3yie3Nzl2ysndkXTQZQizjD4yVQCwJUd6udt
 1REPrdKYDs9dokfTNUP7rLUwgE4xgNFgpLCnYuek6IhyBrtUgnh9kPmg2BcGYS9h
 d2BGiGHotxO9i4YqmlDkz4XIweI6h1s8hIHWNj+lV1orLQAiwIk=
 =4+F2
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.10

Fix various compile warnings and static analysis warnings for:
- QBMan driver
- DPIO driver
- QE driver

* tag 'soc-fsl-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  soc: fsl: dpio: remove set but not used 'addr_cena'
  soc: fsl: qbman: Fix return value on success
  soc: fsl: qman: fix -Wpacked-not-aligned warnings

Link: https://lore.kernel.org/r/20200923224416.25788-1-leoyang.li@nxp.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:59:14 -07:00
Olof Johansson
a39c258cc4 i.MX drivers update for 5.10:
- Use dev_err_probe() to simplify error handling for i.MX GPCv2 driver.
 - Add a check in i.MX SCU power domain driver to ignore the power
   domains that are not owned by the current partition.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl9qjugUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7xwgf+K/yRr+pk2kbfYal+mAVozVPP2vXH
 fx4e+voMfHW4g25BrFQM4pV882w58Hh69duB+qoVtPjUZtpTes812gmDJf8N1H7r
 fk/ZQQdrq3pDDe2XEKP/RperIBvzhbRPIu1per4gsLzoBx5Jm71Q0i0bEt/7mPSM
 rZuS1qAZWPFBKtVRR3+iKrkM8HWLERacpjuXTIEFyav988BjxY27GPwwpG7WFv1v
 aaO+nVno7xKo24hCVmY+GUrbTxNkYIKH9415iCf38EQx5gKOvKwvp/Jn061p9Vqb
 8+0UNMyA+5YWs8fyOIUhWD0qOkWcGUlJCun7vB/3NDFzvgTnAGyyJCEK7g==
 =tfwW
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.10:

- Use dev_err_probe() to simplify error handling for i.MX GPCv2 driver.
- Add a check in i.MX SCU power domain driver to ignore the power
  domains that are not owned by the current partition.

* tag 'imx-drivers-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  firmware: imx: scu-pd: ignore power domain not owned
  soc: imx: gpcv2: Use dev_err_probe() to simplify error handling

Link: https://lore.kernel.org/r/20200923073009.23678-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:58:32 -07:00
Olof Johansson
8fc6726d90 One small style fix for the Allwinner SRAM driver
-----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX2jMAQAKCRDj7w1vZxhR
 xUr+AQCz4I+ZX6+nCoqn5cSOvm2gHUkGawnMYczHjTAp10qR6gEA5yxzwXveoOW3
 LCAA5dj5xW3EBhbaHPX3iLTuN+jX7w8=
 =VMXw
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-drivers-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers

One small style fix for the Allwinner SRAM driver

* tag 'sunxi-drivers-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  soc: sunxi: sram: remove unneeded semicolon

Link: https://lore.kernel.org/r/175d36ad-bc98-4d5d-b035-ce467e932248.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:58:16 -07:00
Olof Johansson
6b9c8c8bb7 arm64: soc: ZynqMP SoC changes for v5.9-v2
- Fix error code in zynqmp_power driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXyP2/gAKCRDKSWXLKUoM
 ITwnAJwMCkfCTLHuDVFlxTyJVpirtDMVygCeNZoqshWHFUUbImPxNAC1vjSrVXE=
 =cNPq
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-v5.9-v2' of https://github.com/Xilinx/linux-xlnx into arm/fixes

arm64: soc: ZynqMP SoC changes for v5.9-v2

- Fix error code in zynqmp_power driver

* tag 'zynqmp-soc-for-v5.9-v2' of https://github.com/Xilinx/linux-xlnx:
  soc: xilinx: Fix error code in zynqmp_pm_probe()

Link: https://lore.kernel.org/r/9b23dd60-45f4-cd7d-e81a-e8ab8e20af7c@xilinx.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:13:59 -07:00
Olof Johansson
aa78dd167e ARM: soc: TI driver updates for v5.10
Consist of:
  - Add Ring accelerator support for AM65x
  - Add TI PRUSS platform driver and enable it on available platforms
  - Extend PRUSS driver for CORECLK_MUX/IEPCLK_MUX support
  - UDMA rx ring pair fix
  - Add socinfo entry for J7200
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIbBAABAgAGBQJfaBQeAAoJEHJsHOdBp5c/K1oP+Or/n3/TMOGoAKQL+2m2hhH+
 c6fVzGOWEI4AkToGiE9n/EyDvh7BAvPG+j0f7SxTPUEmgbweJ2Lc6NNx+c+dssRA
 g6zQVzHphtGLla3u5NDOI8vQ66vw6hMY48zSRwbUuE+ee4VbUjmwTYgDN42rawQs
 N1Iq+KN2FzzYmT3lnJp0jDqZjKicCJ6GjYWZVlEJ6i6Yn7Rq2F1m4ilLoGejN15x
 bEr5IItF3kmLAuCbjgDzanSYv5ni20iGfVniNynQcTqsjzRQnJqpY2+XgWhV/nZo
 tT45m6AU/D7l/fbDNXecQ9X4AxLuL+JUb1nM0DcIWWPUDJauAMLzC5+IX5gg/f79
 FUoUWpyxNVUuis3ZLAhzhe8uVZEcpD5Pwp7LCKr7QbBu84eCol3cUGCIvdvaAaQM
 9eDBORUhkd8XdMtHDhPqpvYxUeKmlqSLHabWmEtdGVRvzJElrxF6AyUDD7ToDHiv
 x9wuC+bZi63gL1xukinGtTUic9vaytGrUeElslhTUGo8upZKc2XahTE0ce8e8ij5
 9Vtnr7a8vQR0AanRa0yDx40IBC9w8wlnfFSNnVbQ2SOhE8YiuT0H8p2unWA6Oz4K
 tB+vUk+rGAZ5fnhbpSQRKWoTUbiKqU7S+lQ8gUFVzOsDy9DzoD9L+jmw1xEFUIjd
 4cqaaQ9WbnBytGFmxgw=
 =s8sI
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

ARM: soc: TI driver updates for v5.10

Consist of:
 - Add Ring accelerator support for AM65x
 - Add TI PRUSS platform driver and enable it on available platforms
 - Extend PRUSS driver for CORECLK_MUX/IEPCLK_MUX support
 - UDMA rx ring pair fix
 - Add socinfo entry for J7200

* tag 'drivers_soc_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  Add missing '#' to fix schema errors:
  soc: ti: Convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: ti: k3-udma-glue: Fix parameters for rx ring pair request
  soc: ti: k3-socinfo: Add entry for J7200
  soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX
  dt-bindings: soc: ti: Update TI PRUSS bindings regarding clock-muxes
  firmware: ti_sci: allow frequency change for disabled clocks by default
  soc: ti: ti_sci_pm_domains: switch to use multiple genpds instead of one
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 J721E SoCs
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM65x SoCs
  soc: ti: pruss: Add support for PRU-ICSS subsystems on 66AK2G SoC
  soc: ti: pruss: Add support for PRU-ICSS subsystems on AM57xx SoCs
  soc: ti: pruss: Add support for PRU-ICSSs on AM437x SoCs
  soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
  dt-bindings: soc: ti: Add TI PRUSS bindings
  bindings: soc: ti: soc: ringacc: remove ti,dma-ring-reset-quirk
  soc: ti: k3: ringacc: add am65x sr2.0 support

Link: https://lore.kernel.org/r/1600656828-29267-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 12:56:51 -07:00
Olof Johansson
76940c8d5a Samsung mach/soc changes for v5.10
1. Clear unneeded L2C-310 flag which presenc was triggering warning
    message.
 2. Fix build of SAMSUNG_PM_DEBUG without MMU.
 3. Minor cleanups and update of linux-samsung-soc mailing list in
    Maintainers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9ner0QHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1xRiEACRlwd8oXmvTjSvFAlw8Z8/WTDpwxbfX4ra
 XZXjkVzoNw9IO3c5dfCvV4np0bJM6hepNKUoHHE8FsP0aNB81Geg/FhmQeIOtz4v
 BAfrGIbJp+2gRTQU9BhMLw3BhzWxp0TAe+0mXNTLER2BrTrF3/M5K2Rm7/W9k4wo
 fT8epub4X4CB927Mp/mkovqXKk5h+KfsMxFZNBHYUW/fsyDmScL6MOYXBxsalKx6
 fC+XMqI6VBiEgpO42FZ6YuEMK1o9eAkpHGSFCIjFyTkqm/O7/Z536Ho/D9CHeCuT
 WDdtK04b0r7vSCToTpiHr+qgZtbnJl/pgJ673/zlxik9UvLLGw7DqtnSEtPJep1l
 Z8aEuhRlWuUrvcAkslJvMMqHRx495DThs+axbxYCxfG+u+ivFjHGAxSLLlM9f3Fy
 ftZ70sBMCu+EtniaXGzcFLxyKQA1S99uJH7SYVj2G9e3Lq+Eo64FK3KKSN6bBy6R
 wuIySiwlgMgfrhHgs5khe6VZcwrjVssLjBtWF+EWEs1KpYiwcDGl1mifJG9vWIXm
 ngrJBLiloqKPBApKcbR+4lLxRkMsYJC1r9svRKNElb/AqaWlz75TAkNADVaf0W6d
 ZmKAWYBd6J7Ll5wXD8nqSc5XN3TZl33gkGmBi8pJV81iB+S2FE/I29afcMQVtEgO
 7zl4VQbG+Q==
 =Bkfy
 -----END PGP SIGNATURE-----

Merge tag 'samsung-soc-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung mach/soc changes for v5.10

1. Clear unneeded L2C-310 flag which presenc was triggering warning
   message.
2. Fix build of SAMSUNG_PM_DEBUG without MMU.
3. Minor cleanups and update of linux-samsung-soc mailing list in
   Maintainers.

* tag 'samsung-soc-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: exynos: clear L310_AUX_CTRL_NS_LOCKDOWN in default l2c_aux_val

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 12:55:43 -07:00
Olof Johansson
e8c9d35ea6 soc/tegra: Changes for v5.10-rc1
These changes contain a bit of cleanup and chip support for the upcoming
 Tegra234 SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl9kyl4THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zodJuEACaUpL6ZvdkihpnWzPtC3IXXcCSRAXZ
 m6pmI2+JnT9DBHVA/YaHvRiH4xR1VzzDRvKWB4svqt5jRaSm3MjS/vaJRZ+MebeD
 1KmTkiqKLNfsrF/Ckk4Y2UaMjSYr1lPx+3+E/Ad2m8YbDrZgAnHCxwkxU2KEnyTo
 6sqXMJh1XbGoE+3EYJfOrWJx4/0PDjFpcOHLDtSBHSbXQkdCsheEna2rwfYgWjD6
 TD+aKk6oUcZW+IQfIJQeAQF0jxhIfoglKby6n8P7zPBfFju5ZCcLX0JhL0QXtW3g
 6MVysEBnh0jRGKGKqQzrw7GTpc0v6vyDQm6ZwHLfTzPQbh7yEGD2t6olQQcxOO+p
 ZpEMTsbBw84z3BgaHvT4itkx37HO7ZbHEC7Jp0NH/ayjRbw4aAiNktMOBfA+JDGa
 ScJoQ0sTdquMh1eMtybCkfXeoefgSUuPUIJBi01i45JmLNlopI0pKotiMP5oxMYQ
 YyCqscSKYXNKp5plH20y6eupnHNO55ayHkjxq4iEo6+EpxiQQRqVrxnLPvuSRLZM
 eTLSIuW051YzeFNb0t/JdVGZYYJDO4rXzIJHNkr25FQP9HzvGxf6++ZfssZJoY8b
 6oxO65m/fnB5SVsA3r4g6JhaC5eKVjiRv8AcLjvJc1QUpe2QRuePXfkgSfAQViNH
 kKGzSY4QY4d79A==
 =kg9i
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.10-rc1

These changes contain a bit of cleanup and chip support for the upcoming
Tegra234 SoC.

* tag 'tegra-for-5.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Add Tegra234 support
  soc/tegra: pmc: Reorder reset sources/levels definitions
  soc/tegra: misc: Add Tegra234 support
  soc/tegra: fuse: Add Tegra234 support
  soc/tegra: fuse: Implement tegra_is_silicon()
  soc/tegra: fuse: Extract tegra_get_platform()

Link: https://lore.kernel.org/r/20200918150303.3938852-2-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 12:39:36 -07:00
Olof Johansson
802b26b3c2 Renesas driver updates for v5.10 (take two)
- Add core support for the R-Car V3U (R8A779A0) SoC, including System
     Controller (SYSC) and Reset (RST) support,
   - Various Kconfig cleanups.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX2ShfwAKCRCKwlD9ZEnx
 cO6bAP4kuetjBmf+BxLGRxZTEin+8YQRd7p051UZKBMa4qp2lwD+JKhnasH1qv64
 CWS3LV8FNumj2Gr1e3YdJcgwb+9p3gc=
 =K/tj
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.10 (take two)

  - Add core support for the R-Car V3U (R8A779A0) SoC, including System
    Controller (SYSC) and Reset (RST) support,
  - Various Kconfig cleanups.

* tag 'renesas-drivers-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: r8a779a0-sysc: Add r8a779a0 support
  soc: renesas: rcar-rst: Add support for R-Car V3U
  soc: renesas: Identify R-Car V3U
  soc: renesas: Sort driver description title
  soc: renesas: Use ARM32/ARM64 for menu description
  dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779a0 SYSC power domain definitions

Link: https://lore.kernel.org/r/20200918124800.15555-4-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 12:38:34 -07:00
Olof Johansson
f1466cdd82 Actions Semi drivers fixes for v5.9
- Fix the missing prototype warning in owl-sps-helper driver by
   including owl-sps header
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEZ6VDKoFIy9ikWCeXVZ8R5v6RzvUFAl9p3t4ACgkQVZ8R5v6R
 zvWX3wf9GXCOpjT9duwdBqS1dqf69bYXlG+Hzxpc8Zd5Sc5gkhuKQyoK9bXIAs1j
 fbxpRNyJd2+5RtcOvJfA5LOqEE1jrBhHqOQcir28qyR8ZUGrlCzd1933RM+1jJPV
 9OFLxs6xENz4uSq4WkJpSIFDiiNfYdyuiDnQrhe1+0VGf8CcXLu1YAA1JZVFKOJF
 gandXfwglPK18Ta0uMBJhstFkM7SGUN9n5vbMmOcnl/AzEt2CeBRtj22et+UlppH
 YdbmugkXNM3GxTi5Imnoli7IY6dcJ8fJDfqOtaxQLusGnsi9J4/XLlpRuv3j7S/3
 +k+FOsZyghsi+i5j34/wzEWCloq3mw==
 =YB0/
 -----END PGP SIGNATURE-----

Merge tag 'actions-drivers-fixes-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/fixes

Actions Semi drivers fixes for v5.9

- Fix the missing prototype warning in owl-sps-helper driver by
  including owl-sps header

* tag 'actions-drivers-fixes-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
  soc: actions: include header to fix missing prototype

Link: https://lore.kernel.org/r/20200922114559.GD11251@Mani-XPS-13-9360
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 10:11:17 -07:00
Olof Johansson
32fe0116aa Qualcomm driver fixes for v5.9
Fix the array type of the domain_list QMI response in PDR.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl9pOLsbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F3DwP/iiHTvcSVTmpCz4Kk87e
 VgvhsIp/c9tGW5Spgdb9dTI469fznkbR/MhV8VHyz2boJRAZSqXzi5wCUP0Y1nwt
 4aoUk0eL9aecH88trkHcsKQYbgLcoKUkqftFMGe4DNX6ja34BKbg52SZ/xupVFp/
 aFk1iFk0Wm0cbh7r4X27vT3yIHcf2ic6VxuTEsDWnbohP3AmXamUq2iRduZwhVNB
 JEhju3hb+LqrZiSdYLu85/LSH/Obo1310dNo8TjNn29GE7DZTqtsm9hBl+79IxuW
 B9CCCbmo+jVQ/w+6s+b/T9J6aqcw+fEHD5KmOt3/QqGE3BgytuIq9I3u1rEdu139
 akK8xGzOQDT3Bkau3rgYDWUzY+BhnF8akvIQEhtkoBMW75yoTxuxFFQykDTtxQhO
 1XBD8hAIvfure8I6MmlvIehtuN19eS93gXsf15k+17umhr6lSYvogpFLHDSdhMx2
 jx7o9+xQxFST/f/HAxCQqIB0WW57HEMCL5rvMJXbJnkOzWcppUExbHRlaMOmG1fp
 N8llrXoChfYHSM0ijh4DhWA3Pq14ZKUM/7efRxUjPJ5iSq4mYTVfZ4TsozyIpect
 R0+zNZU27l9tzAJ7cfp87ajzEFj7IC8aeHZqt4yeSgLAMugUxiB8w/XguYBLWjiX
 sJ3AFwoKWBiKTGHk08xeufsK
 =RBzc
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-fixes-for-5.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm driver fixes for v5.9

Fix the array type of the domain_list QMI response in PDR.

* tag 'qcom-drivers-fixes-for-5.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: pdr: Fixup array type of get_domain_list_resp message

Link: https://lore.kernel.org/r/20200921235241.36463-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 10:10:28 -07:00
Olof Johansson
dd59aed76d arm64: tegra: Changes for v5.10-rc1
This set of changes fixes some minor issues in existing device trees and
 adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled
 to allow them to be detected by software.
 
 It also adds support for the Tegra234 VDK board, which is a pre-silicon
 platform for the upcoming Orin SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl9ky48THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoVVtEACJcW6ztbQiqrksFdVW+8wlT/EZwNwr
 qwwjGvy0ovJIYAPTB+XhGllUp17QR2EVzdGJW9Q8mr92QRpoQxSg3yB3BaJWsMoz
 AH+9qkQoRE5F+aFwO2l8kTBDswyiOQCLxsiDSCcCWTHtvAQOl/K2HjG+4kxtko+C
 0in+p67PG0t4qanjeTApWEWXjfiXBpM0bcv89TKK0SO+k+zsjupEZeOnVIbEpGTa
 SMjKm/0l0jZIEMoweqX3H0jpTBvqE6IjLm4EAbCfLJrhDEIQe50WkNpw2CVaCZy6
 2Mjnv7Gr/XO3MKmM4stLYTZ9eu5qDa7wGrQT/mXZt7kEc3L85rGZGyWQm5bCmspa
 mSKZ+swtegkEBBofOabxcCDi0V9KxDiba3hwv4mr17qMjj7VBK5le3JhUS19qnZ8
 Osu81JqKrDjfkmxtqSnJEeTTVwxBG09WQ5lME9FRBqH9P5Y1L7yCAuqPLzYhXxtj
 KAcqveVzoMMi2YIp4Rt07seWsHhuNqkY9XWtPWrgubGtU1AKYXWHYDojefyo1VUq
 1bOkzSa+ZVBwZuRmdgn2vxbeJnexeTAPolJp4WCpJpSGJbiFKNqhh5scjjfSviGS
 PfOITtuJgaxoqEZRhCdF/VM2+YSjjVljRkiE6b8W0+eKkeQKzzDvJIDnOqeb7PGX
 1gJniuIR25eShg==
 =zeT7
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Changes for v5.10-rc1

This set of changes fixes some minor issues in existing device trees and
adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled
to allow them to be detected by software.

It also adds support for the Tegra234 VDK board, which is a pre-silicon
platform for the upcoming Orin SoC.

* tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Initial Tegra234 VDK support
  arm64: tegra: Populate EEPROMs for Jetson Xavier NX
  arm64: tegra: Add label properties for EEPROMs
  arm64: tegra: Add DT binding for AHUB components
  arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano
  arm64: tegra: Properly size register regions for GPU on Tegra194
  arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
  arm64: tegra: Describe display controller outputs for Tegra210
  arm64: tegra: Disable SD card write-protection on Jetson Nano
  arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano
  arm64: tegra: Wire up pinctrl states for all DPAUX controllers
  arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier

Link: https://lore.kernel.org/r/20200918150303.3938852-5-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26 10:01:52 -07:00
Dennis YC Hsieh
23c22299cd soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
Add clear parameter to let client decide if
event should be clear to 0 after GCE receive it.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/1594136714-11650-9-git-send-email-dennis-yc.hsieh@mediatek.com
[mb: fix commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:39 +02:00
Dennis YC Hsieh
946f1792d3 soc: mediatek: cmdq: add jump function
Add jump function so that client can jump to any address which
contains instruction.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-8-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:38 +02:00
Dennis YC Hsieh
88a2ffc48d soc: mediatek: cmdq: add write_s_mask value function
add write_s_mask_value function in cmdq helper functions which
writes a constant value to address with mask and large dma
access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-7-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:36 +02:00
Dennis YC Hsieh
1af43fce81 soc: mediatek: cmdq: add write_s value function
add write_s function in cmdq helper functions which
writes a constant value to address with large dma
access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-6-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:35 +02:00
Dennis YC Hsieh
d3b04aab06 soc: mediatek: cmdq: add read_s function
Add read_s function in cmdq helper functions which support read value from
register or dma physical address into gce internal register.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-5-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:34 +02:00
Dennis YC Hsieh
11c7842d41 soc: mediatek: cmdq: add write_s_mask function
add write_s_mask function in cmdq helper functions which
writes value contains in internal register to address
with mask and large dma access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-4-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:32 +02:00
Dennis YC Hsieh
5f6e560c2d soc: mediatek: cmdq: add write_s function
add write_s function in cmdq helper functions which
writes value contains in internal register to address
with large dma access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-3-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:31 +02:00
Dennis YC Hsieh
2b8cf38343 soc: mediatek: cmdq: add address shift in jump
Add address shift when compose jump instruction
to compatible with 35bit format.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-2-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:26 +02:00
Krzysztof Kozlowski
11b490c6ae soc: mediatek: mtk-infracfg: Fix kerneldoc
Fix W=1 compile warnings (invalid kerneldoc):

    drivers/soc/mediatek/mtk-infracfg.c:34: warning: Function parameter or member 'infracfg' not described in 'mtk_infracfg_set_bus_protection'
    drivers/soc/mediatek/mtk-infracfg.c:34: warning: Excess function parameter 'regmap' description in 'mtk_infracfg_set_bus_protection'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200729074415.28393-1-krzk@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:24 +02:00
Joel Stanley
cd460be046 soc: aspeed-lpc-ctrl: Fix driver name
Clarify the string now that it supports the AST2600 too.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 14:54:42 +09:30
Joel Stanley
4d1d81dbc9 soc: aspeed-lpc-ctrl: Fix whitespace
Some misaligned indentation I noticed when applying another patch.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 14:54:42 +09:30
Joel Stanley
5042d3f278 soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600
The ast2600 disables the mapping of AHB memory regions by default,
only allowing the LPC window to point to SPI NOR. In order to point the
window to any AHB address, an ast2600 specific bit must be toggled.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200312121413.294384-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 14:54:42 +09:30
Andrew Jeffery
6bf4ddbe2b soc: aspeed-lpc-ctrl: Fail probe of lpc-ctrl if reserved memory is not aligned
Alignment is a hardware constraint of the LPC2AHB bridge, and misaligned
reserved memory will present as corrupted data.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20191016233950.10100-1-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 14:08:14 +09:30
Brad Bishop
44ddc4de87 soc: aspeed: lpc: Add AST2600 compatible strings
The AST2600 has the same lpc-ctrl and lpc-snoop devices as the
AST2500.

Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190925125610.12096-4-bradleyb@fuzziesquirrel.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 14:02:43 +09:30
Joel Stanley
e0218dca57 soc: aspeed: Add soc info driver
This adds a SOC_BUS info driver for the ASPEED platform.

The full ID table is preserved in this commit message in case someone
finds a need to change the implemntation in the future.

	{ "AST1100-A0", 0x00000200 },
	{ "AST1100-A1", 0x00000201 },
	{ "AST1100-A2", 0x00000202 },
	{ "AST1100-A3", 0x00000202 },

	{ "AST2050-A0", 0x00000200 },
	{ "AST2050-A1", 0x00000201 },
	{ "AST2050-A2", 0x00000202 },
	{ "AST2050-A3", 0x00000202 },

	{ "AST2100-A0", 0x00000300 },
	{ "AST2100-A1", 0x00000301 },
	{ "AST2100-A2", 0x00000302 },
	{ "AST2100-A3", 0x00000302 },

	{ "AST2150-A0", 0x00000202 },
	{ "AST2150-A1", 0x00000202 },

	{ "AST2200-A0", 0x00000102 },
	{ "AST2200-A1", 0x00000102 },

	{ "AST2300-A0", 0x01000003 },
	{ "AST2300-A1", 0x01010303 },

	{ "AST1300-A1", 0x01010003 },
	{ "AST1050-A1", 0x01010203 },

	{ "AST2400-A0", 0x02000303 },
	{ "AST2400-A1", 0x02010303 },
	{ "AST1400-A1", 0x02010103 },
	{ "AST1250-A1", 0x02010303 },

	{ "AST2500-A0", 0x04000303 },
	{ "AST2510-A0", 0x04000103 },
	{ "AST2520-A0", 0x04000203 },
	{ "AST2530-A0", 0x04000403 },
	{ "AST2500-A1", 0x04010303 },
	{ "AST2510-A1", 0x04010103 },
	{ "AST2520-A1", 0x04010203 },
	{ "AST2530-A1", 0x04010403 },
	{ "AST2500-A2", 0x04030303 },
	{ "AST2510-A2", 0x04030103 },
	{ "AST2520-A2", 0x04030203 },
	{ "AST2530-A2", 0x04030403 },

	{ "AST2600-A0", 0x05000303 },
	{ "AST2600-A1", 0x05010303 },
	{ "AST2600-A2", 0x05020303 },
	{ "AST2620-A1", 0x05010203 },
	{ "AST2620-A2", 0x05020203 },

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-3-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-25 10:14:06 +09:30
Kevin Hilman
5aabf1180f soc: amlogic: pm-domains: use always-on flag
Rather than use a governor to keep these domains always-on, instead
use the flag GENPD_FLAG_ALWAYS_ON.  This has the same effect, but with
much lower overhead since the governor path is not used at all.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200921222135.7145-1-khilman@baylibre.com
2020-09-24 09:50:01 -07:00
Wang Hai
d97b957e32 soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
Fix smatch warning:

drivers/soc/fsl/qe/ucc.c:526
 ucc_set_tdm_rxtx_clk() warn: unsigned 'tdm_num' is never less than zero.

'tdm_num' is u32 type, never less than zero.

Signed-off-by: Wang Hai <wanghai38@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-09-22 18:25:29 -05:00
Liu Shixin
5ed2da99e3 soc: fsl: qman: convert to use be32_add_cpu()
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-09-22 18:16:15 -05:00
Jason Yan
72f7fe2d6a soc: fsl: dpio: remove set but not used 'addr_cena'
This addresses the following gcc warning with "make W=1":

drivers/soc/fsl/dpio/qbman-portal.c: In function
‘qbman_swp_enqueue_multiple_direct’:
drivers/soc/fsl/dpio/qbman-portal.c:650:11: warning: variable
‘addr_cena’ set but not used [-Wunused-but-set-variable]
  650 |  uint64_t addr_cena;
      |           ^~~~~~~~~

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-09-22 17:43:54 -05:00
Krzysztof Kozlowski
750cf40c0f soc: fsl: qbman: Fix return value on success
On error the function was meant to return -ERRNO.  This also fixes
compile warning:

  drivers/soc/fsl/qbman/bman.c:640:6: warning: variable 'err' set but not used [-Wunused-but-set-variable]

Fixes: 0505d00c8d ("soc/fsl/qbman: Cleanup buffer pools if BMan was initialized prior to bootup")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-09-22 17:42:22 -05:00
Krzysztof Kozlowski
bc38325703 soc: actions: include header to fix missing prototype
Include the header with prototype of owl_sps_set_pg to fix:

  drivers/soc/actions/owl-sps-helper.c:16:5: warning: no previous prototype for 'owl_sps_set_pg' [-Wmissing-prototypes]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:16 +05:30
Joel Stanley
592693a1f8 soc: aspeed: Improve kconfig
Reword the kconfig text to be consistent and reflect that most drivers
are available for all supported ASPEED chips (2400, 2500 and 2600).

Rearrange the symbols the SoC drivers depend on so the menu doesn't
appear unless you are building for ASPEED for compile testing.

The SYSCON_MFD and REGMAP options are usually selected by drivers that
need them, so do this.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200916125731.784527-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-21 18:50:27 +09:30
Qinglang Miao
74e0e43a09 soc: ti: Convert to DEFINE_SHOW_ATTRIBUTE
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-20 19:30:30 -07:00
Neil Armstrong
525054782a soc: amlogic: meson-ee-pwrc: add support for the Meson AXG SoCs
The Power Controller in the Amlogic AXG SoCs is similar to the GXL one
but with less VPU memory domains to enable and a supplementary Audio
memory power domain.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200917064702.1459-3-narmstrong@baylibre.com
2020-09-18 13:22:14 -07:00
Thierry Reding
639448912b arm64: tegra: Initial Tegra234 VDK support
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:58:07 +02:00
Thierry Reding
34e214a996 soc/tegra: pmc: Add Tegra234 support
The PMC block is largely similar to that found on earlier chips, but
not completely compatible. Allow binding to the instantiation found on
Tegra234.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:37 +02:00
Thierry Reding
f98485e4ed soc/tegra: pmc: Reorder reset sources/levels definitions
Move the definitions of reset sources and levels into a more natural
location.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:33 +02:00
Thierry Reding
03d2852307 soc/tegra: misc: Add Tegra234 support
The MISC block is largely similar to that found on earlier chips, but
not completely compatible. Allow binding to the instantiation found on
Tegra234.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:31 +02:00
Thierry Reding
1f44febf71 soc/tegra: fuse: Add Tegra234 support
Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:29 +02:00
Thierry Reding
52e6d399a4 soc/tegra: fuse: Implement tegra_is_silicon()
This function can be used by drivers to determine whether code is
running on silicon or on a simulation platform.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:26 +02:00
Thierry Reding
775edf7856 soc/tegra: fuse: Extract tegra_get_platform()
This function extracts the PRE_SI_PLATFORM field from the HIDREV
register and can be used to determine which platform the kernel runs on
(silicon, simulation, ...). Note that while only Tegra194 and later
define this field, it should be safe to call this on prior generations
as well since this field should read as 0, indicating silicon.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18 15:55:22 +02:00
Qilong Zhang
2899347249 soc: qcom: llcc: use devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately.

Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com>
Link: https://lore.kernel.org/r/20200916111517.99670-1-zhangqilong3@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-17 04:24:49 +00:00
Yoshihiro Shimoda
1b4298f000 soc: renesas: r8a779a0-sysc: Add r8a779a0 support
Add support for R-Car V3U (R8A779A0) SoC power areas and register
access, because register specification differs from R-Car Gen2/3.

Inspired by patches in the BSP by Tho Vu.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599810232-29035-5-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-16 08:57:31 +02:00
Sibi Sankar
ba34f977c3 soc: qcom: apr: Fixup the error displayed on lookup failure
APR client incorrectly prints out "ret" variable on pdr_add_lookup failure,
it should be printing the error value returned by the lookup instead.

Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200915154232.27523-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-15 16:12:59 +00:00
Sibi Sankar
7a366707bb soc: qcom: pdr: Fixup array type of get_domain_list_resp message
The array type of get_domain_list_resp is incorrectly marked as NO_ARRAY.
Due to which the following error was observed when using pdr helpers with
the downstream proprietary pd-mapper. Fix this up by marking it as
VAR_LEN_ARRAY instead.

Err logs:
qmi_decode_struct_elem: Fault in decoding: dl(2), db(27), tl(160), i(1), el(1)
failed to decode incoming message
PDR: tms/servreg get domain list txn wait failed: -14
PDR: service lookup for tms/servreg failed: -14

Tested-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200914145807.1224-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-14 23:53:29 +00:00
Konrad Dybcio
a32a43e00e soc: qcom: socinfo: Add msm8992/4 and apq8094 SoC IDs
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200602201229.322578-1-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-14 23:27:24 +00:00
Olof Johansson
bd2fad8cd3 This pull request contains Broadcom SoCs drivers changes for 5.10,
please pull the following:
 
 - Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
   and adds support for the 6318, 6328, 6362, 63268.
 
 - Florian adds support for tuning the Bus Interface Unit on 72164 and
   72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
   64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
   driver to support breakpoint notifications.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9ZkK4ACgkQh9CWnEQH
 BwS8bQ//dn66KKeK2Fcw6pofTypsE7y69P2Jz7vA8IkYigNaNwIWABXXE+/FXrPE
 ZVk9se/ZAI/kvWQXKj5T2JyjXWU8jphidwX0aK1xUymab60W6EdZUJcTiKdsdamA
 KGSAQ0jjWaNuZHnNR2nsqa4OLDrnQz2ujdWCnz9SSBNtPFcAknbj+nkicbpWmHb7
 1fjBXg7e+RkUuaHGNETIkKnjdEA/e2frlTCzwendsLTgJkhbr9j9y6jAOtJiXjE4
 +UQd84cEPsuvSrx6dx6pnCVoL19m2aPFE9JTDVCXVYCOinjm+gQDXQTl8w+HvoZn
 /w0deVOJSOF+YHoRbC7xLghaY2jjRmM86jjmopSB7/OF5KUbkuMj1Nz5xQxUI7gA
 BuvRQvry+TedEiY1vfsDnrJZpv3vZTS2BRkTfiZXvhtfDM/unMr9L6vScxzQU7gA
 Gj2hPEai3bB+pfTB+e1H4IAWFmQXgS+3Q+JpCtgHjZFZtmYy89MaJK5TY88pYceR
 ZfnK6aHhHXNF3L594CYCNxZBovC2Jt/Mp6+MIPgFpvwTFKhqoLIjUP5bnuZRqHZ6
 yVz0WJgU6R7FPtp8uTwES5moreeAWMdVdzHdZvTkOrPzRvBpT1tMWpk00eFaAn7E
 PlTdM5OMuxDi2tZKcLNCW92To1Un0YRnMLZh8Q5sSS9MekY++hk=
 =njcZ
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom SoCs drivers changes for 5.10,
please pull the following:

- Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
  and adds support for the 6318, 6328, 6362, 63268.

- Florian adds support for tuning the Bus Interface Unit on 72164 and
  72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
  64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
  driver to support breakpoint notifications.

* tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux:
  bus: brcmstb_gisb: Add support for breakpoint interrupts
  dt-bindings: bus: Document breakpoint interrupt for gisb-arb
  soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
  soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
  MIPS: BMIPS: dts: add BCM63268 power domain support
  MIPS: BMIPS: dts: add BCM6362 power domain support
  MIPS: BMIPS: dts: add BCM6328 power domain support
  soc: bcm: add BCM63xx power domain driver
  MIPS: BMIPS: add BCM6318 power domain definitions
  MIPS: BMIPS: add BCM63268 power domain definitions
  MIPS: BMIPS: add BCM6362 power domain definitions
  MIPS: BMIPS: add BCM6328 power domain definitions
  dt-bindings: soc: brcm: add BCM63xx power domain binding
  soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache
  bus: brcmstb_gisb: Shorten prints

Link: https://lore.kernel.org/r/20200912032153.1216354-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:40:18 -07:00
Olof Johansson
989286ffe8 Add initial genpd support for omaps to drop more platform data
We now drop legacy platform data for RTC on am3, am4 and dra7.
 And we add initial genpd support for PRM (Power and Reset Manager)
 and use it to drop legacy platform data for am3 sgx and omap4/5
 l4_abe interconnect instance.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl9Qsw8RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNnORAAwV+49gsZdnGLQxqzLThegu5auzfQuRdZ
 E82KGonAjoHONaBdk+pgVrEePpcJTUbUNQm8HeQRjusp/5CR8C+S6A9/RD+R1crc
 F+9gDsbTuBSkUkOAVkMT6oGPom8zN8bISJ4gFymLoGsT7MTD3K1nK6wVXpRhCJs6
 R2z/KpFIPMfz0psuYEgl5Uwu9RA+yi7P8ePulEBoOfOfMU/70nTRNhFoAAQK2vyO
 fvQCRY+4gf6Y76iY+WBXlf/2Iq4Kd4Rbs/Jr3MBC9ov8owqZKlnZ4u3HXrCQPin5
 ULS256Een4g8lnVZr48Dc0v6PWvu3AoHH6+gGsxFozKvmh+x5UXW+gUYozsvd/cW
 y61RARwo0F1ZJRil95Qgp/0jk0uAjTPdU5q5/owMIaFEoHK+1oHruj7dajdoJ22y
 9URXuCMwMKJIcefGvu8BWwuCZQx0zF16NffYmqkm3DPIobzNzCcMIbKNq6LPpgD4
 AnDtaw9Bhoq3O4/pVI3AMqEpBtHRJdWBoObFG3Lg3TpYDIrWSPzjaDo+HNwgD5u4
 7a1AqVrl1ZkTZIuJSfS7zZdeL5l8K02qYM1yjX13PderGTCzGmFVR4qRmItT9oVS
 zIl0mnoFngUxw9qiTRHgkcQ90Z65KwWcJDBoX5bVxanEnOQXdToaJ3TG5Fh1L4lv
 MWJhSe46Pdw=
 =w5Zl
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

Add initial genpd support for omaps to drop more platform data

We now drop legacy platform data for RTC on am3, am4 and dra7.
And we add initial genpd support for PRM (Power and Reset Manager)
and use it to drop legacy platform data for am3 sgx and omap4/5
l4_abe interconnect instance.

* tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Drop legacy platform data for dra7 rtcss
  ARM: OMAP2+: Drop legacy platform data for am3 and am4 rtc
  soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data
  ARM: dts: Configure omap4 and 5 l4_abe for genpd and drop platform data
  ARM: dts: Configure am3 and am4 sgx for genpd and drop platform data
  soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain
  soc: ti: omap-prm: Configure sgx power domain for am3 and am4
  soc: ti: omap-prm: Add basic power domain support
  dt-bindings: omap: Update PRM binding for genpd

Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:17:42 -07:00
Olof Johansson
c9c7ddd0d7 Versatile SoC updates for the v5.10 kernel cycle:
- Drop a static qualifier in integrator_soc_init()
 - Remove Integrator and Versatile from PHYS_OFFSET
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl9OEHkACgkQQRCzN7AZ
 XXPFcQ/+JV/W2nI5QQ0tE0OpUwDdfmkU93dEgF38tNB97LnG/mhS5T7u78u8/d8H
 CBurShFXq3I/75Gfxno741K1h3qtf0XlYsuQ9vN0aDP3lqcgaQtfAlYDA/cg7z6a
 ppanIC/Akxu6zEETPCbG+j0n/TIQqWuT+0y+65jbeKm+eAEVDy/sPIXuVd5YTDd2
 8f1EjLywMzSDfmn3YP6AOzoQWg0HPC52bzea0MAFv0L9vOa2X4/SkJnFGPyJu46h
 jgrobaaqOKNq/7lxUfXBsfEEE5QbEQ26G67rIVAjYGk8CjdfWg0qJUBsDpKgnfVt
 79VnKqk13YJ2ywlD2+IG+rbWraE+ZI9aShITx3JFR3JM9Nsjbae/myYN+9Hqh75v
 Sxs7V0mEqtt4sf0+Dxvw97FmOGIB827V1q4kzglk9jiP1flf+orVhFYjtbNzEQld
 RTceCK9W4thPkJJnCx6id0GkYG0EnIaCrfY3pMuZDvO45M15E9zdPD+0FzwtYtFE
 jcGtINCfKOUJujLu3QfwbheInHTY+MnEo6crI0q7MRElg8YDtSWiSjyBJ2A/Fcs1
 iGIrrthBNoBfNBCODBuYE8WbjTpZ8SX8OQLdjcFqjmzrTlgdcIJQZVqNGn2fGaEi
 t5Ga2+gU3YFcqm9XsK7tWNMbwi+IvxzkjWRdPDplNoYClcK/i5w=
 =xtzo
 -----END PGP SIGNATURE-----

Merge tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc

Versatile SoC updates for the v5.10 kernel cycle:

- Drop a static qualifier in integrator_soc_init()
- Remove Integrator and Versatile from PHYS_OFFSET

* tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: Remove Integrator and Realview from PHYS_OFFSET
  soc: integrator: Drop pointless static qualifier in integrator_soc_init()

Link: https://lore.kernel.org/r/CACRpkdYYDSg8FAjJAqew5yEu7H1Y3E1rPN9TL25K31T=QWATuA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:16:09 -07:00
Olof Johansson
465c335bb5 Samsung S3C24xx and S3C64xx machine code cleanup for v5.10
Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
 also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
 Bergmann work which Krzysztof Kozlowski took over, rebased and polished.
 
 The goal is to cleanup, merge and finally make the Samsung S3C24xx and
 S3C64xx architectures multiplatform.  The multiplatform did not happen
 yet here - just cleaning up and merging into one arch/arm/mach-s3c
 directory.  However this is step forward for multiplatform or at least
 to keep this code still maintainable.
 
 This pulls also branch with changes for Samsung SoC sound drivers from
 broonie/sound because the cleanups there were part of this series and
 all further patches depend on them.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9NGucQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1zzWD/0T5JdPls++8JUK04hxkunMJO3Ye2ir/a2C
 YAI2M6fbOludcPeGCRnPBZ3uTbeSOXFrV6UuSVi8EVKoAb0EV3G50XGQecmy/TVx
 nq/c90gtnsODL0Kxjm0767WZl9clKaIE3+VNSyQXAhqJqXK8A1L8ovsUpQEj6fr4
 vaNQi6lW7o0r98OEB14M0z59lSWjanUZ33/R22L3AsRihlJTH0Sye2+zVG85LfMD
 5okekSHndt2/NCUxgLTZIkp/cD/pzmhMRZTl1zWvZPPFsbzpuB9wZt46b7vkEzuN
 NgPElEB9AJgyh/28D064lER6TFhz3TcATZjmEIXX+3tYIaoA2lj60QiSejM2FyBk
 U5a0DYAyzwNs4R1GSQxrKnQS1AXQ+yoDniPcyNaSmuZbxaodAs9Hjxg9KfJ2bfs5
 DFfSUJhf1Uam8UYolMbXqSkhd2KQjXpkF0eLK7sGk3wanO+YEqVs777fHpwIPLmd
 767PD0YN+EfDUwmXAJ5Jgv2kvOJIGul7BTgpWtbRHEaDvLHRQl5OhjsWsj9kWCFX
 fx0Jz1sAUqi+gNq3XUFM88/VPEkTgejmVRULnBxqVsar5b/0BeRJEgA6Ljycv0Jv
 2ux5zdMuX/+Xc4zdaJOWaL8NqRuT8nSynKXbWHTzJk4cF3p12/g3q3LOHBBLcLL6
 AzTEA6iZ0w==
 =bjMI
 -----END PGP SIGNATURE-----

Merge tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung S3C24xx and S3C64xx machine code cleanup for v5.10

Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
Bergmann work which Krzysztof Kozlowski took over, rebased and polished.

The goal is to cleanup, merge and finally make the Samsung S3C24xx and
S3C64xx architectures multiplatform.  The multiplatform did not happen
yet here - just cleaning up and merging into one arch/arm/mach-s3c
directory.  However this is step forward for multiplatform or at least
to keep this code still maintainable.

This pulls also branch with changes for Samsung SoC sound drivers from
broonie/sound because the cleanups there were part of this series and
all further patches depend on them.

* tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (62 commits)
  ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setup
  ARM: s3c: Cleanup from old plat-samsung include
  ARM: s3c: make headers local if possible
  ARM: s3c: move into a common directory
  ARM: s3c24xx: stop including mach/hardware.h from mach/io.h
  cpufreq: s3c24xx: move low-level clk reg access into platform code
  cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
  ARM: s3c: remove cpufreq header dependencies
  cpufreq: s3c24xx: split out registers
  fbdev: s3c2410fb: remove mach header dependency
  ARM: s3c24xx: bast: avoid irq_desc array usage
  ARM: s3c24xx: spi: avoid hardcoding fiq number in driver
  ARM: s3c24xx: include mach/irqs.h where needed
  ARM: s3c24xx: move s3cmci pinctrl handling into board files
  ARM: s3c24xx: move iis pinctrl config into boards
  ARM: s3c24xx: move spi fiq handler into platform
  ARM: s3c: adc: move header to linux/soc/samsung
  ARM: s3c24xx: move irqchip driver back into platform
  ARM: s3c24xx: move regs-spi.h into spi driver
  ARM: s3c64xx: remove mach/hardware.h
  ...

Link: https://lore.kernel.org/r/20200831154751.7551-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:15:01 -07:00
Peter Ujfalusi
4f02044123 soc: ti: k3-socinfo: Add entry for J7200
Update K3 chipinfo driver to support new TI J7200 SoC.
It's JTAG PARTNO is 0xBB6D.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:47:39 -07:00
Grzegorz Jaszczyk
ba59c9b43c soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX
The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present
only on AM65x SoCs and J721E. Add support for both these CLK muxes.

This allows the clock rates and clock parents for these to be controlled
through DT leveraging the clk infrastructure for configuring the default
parents and rates.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:47:10 -07:00
Tero Kristo
efa5c01cd7 soc: ti: ti_sci_pm_domains: switch to use multiple genpds instead of one
Current implementation of the genpd support over TI SCI uses a single
genpd across the whole SoC, and attaches multiple devices to this. This
solution has its drawbacks, like it is currently impossible to attach
more than one power domain to a device; the core genpd implementation
requires one genpd per power-domain entry in DT for a single device.
Also, some devices like USB apparently require their own genpd during
probe time, the current shared approach in use does not work at all.

Switch the implementation over to use a single genpd per power domain
entry in DT. The domains are registered with the onecell approach, but
we also add our own xlate service due to recent introduction of the
extended flag for TI SCI PM domains; genpd core xlate service requires
a single cell per powerdomain, but we are using two cells.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:47:08 -07:00
Suman Anna
557003a98f soc: ti: pruss: Enable support for ICSSG subsystems on K3 J721E SoCs
The K3 J721E family of SoCs have a revised version of the PRU-ICSS (ICSSG)
processor subsystem present on K3 AM65x SoCs. These SoCs contain typically
two ICSSG instances named ICSSG0 and ICSSG1. The two ICSSGs are identical
to each other for the most part with minor SoC integration differences and
capabilities. The ICSSG1 supports slightly enhanced features like SGMII
mode Ethernet, while the ICSSG0 instance is limited to MII mode only.

There is no change in the Interrupt Controller w.r.t AM65x. All other
integration aspects are very similar to the ICSSGs on AM65x SoCs.

The existing pruss platform driver has been updated to support these new
ICSSG instances through new J721E specific compatibles.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:37 -07:00
Suman Anna
6530cd9b20 soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM65x SoCs
The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem capable of supporting Gigabit Ethernet, and is
commonly referred to as ICSSG. These SoCs contain typically three
ICSSG instances named ICSSG0, ICSSG1 and ICSSG2. The three ICSSGs are
identical to each other for the most part with minor SoC integration
differences and capabilities. The ICSSG2 supports slightly enhanced
features like SGMII mode Ethernet, while the ICSS0 and ICSSG1 instances
are limited to MII mode only.

The ICSSGs on K3 AM65x SoCs are in general super-sets of the PRUSS on the
AM57xx/66AK2G SoCs. They include two additional auxiliary PRU cores called
RTUs and few other additional sub-modules. The interrupt integration is
also different on the K3 AM65x SoCs and are propagated through various
SoC-level Interrupt Router and Interrupt Aggregator blocks. Other IP level
differences include different constant tables, differences in system event
interrupt input sources etc. They also do not have a programmable module
reset line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.

The existing pruss platform driver has been updated to support these new
ICSSG instances through new AM65x specific compatibles. A build dependency
with ARCH_K3 is added to enable building all the existing PRUSS platform
drivers for this ARMv8 platform.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:36 -07:00
Suman Anna
3227c8daac soc: ti: pruss: Add support for PRU-ICSS subsystems on 66AK2G SoC
The 66AK2G SoC supports two PRU-ICSS instances, named PRUSS0 and PRUSS1,
each of which has two PRU processor cores. The two PRU-ICSS instances
are identical to each other with few minor SoC integration differences,
and are very similar to the PRU-ICSS1 of AM57xx/AM43xx. The Shared Data
RAM size is larger and the number of interrupts coming into MPU INTC
is like the instances on AM437x. There are also few other differences
attributing to integration in Keystone architecture (like no SYSCFG
register or PRCM handshake protocols). Other IP level differences
include different constant table, differences in system event interrupt
input sources etc. They also do not have a programmable module reset
line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.

The existing PRUSS platform driver has been enhanced to support these
66AK2G PRU-ICSS instances through new 66AK2G specific compatible for
properly probing and booting all the different PRU cores in each
PRU-ICSS processor subsystem. A build dependency with ARCH_KEYSTONE
is added to enable the driver to be built in K2G-only configuration.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:36 -07:00
Suman Anna
ae19b8a145 soc: ti: pruss: Add support for PRU-ICSS subsystems on AM57xx SoCs
The AM57xx family of SoCs supports two PRU-ICSS instances, each of
which has two PRU processor cores. The two PRU-ICSS instances are
identical to each other, and are very similar to the PRU-ICSS1 of
AM33xx/AM43xx except for a few minor differences like the RAM sizes
and the number of interrupts coming into the MPU INTC. They do
not have a programmable module reset line unlike those present on
AM33xx/AM43xx SoCs. The modules are reset just like any other IP
with the SoC's global cold/warm resets. Each PRU-ICSS's INTC is also
preceded by a Crossbar that enables multiple external events to be
routed to a specific number of input interrupt events. Any interrupt
event directed towards PRUSS needs this crossbar to be setup properly
on the firmware side.

The existing PRUSS platform driver has been enhanced to support
these AM57xx PRU-ICSS instances through new AM57xx specific
compatible for properly probing and booting all the different PRU
cores in each PRU-ICSS processor subsystem. A build dependency with
SOC_DRA7XX is also added to enable the driver to be built in
AM57xx-only configuration (there is no separate Kconfig option
for AM57xx vs DRA7xx).

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:35 -07:00
Suman Anna
78251639d3 soc: ti: pruss: Add support for PRU-ICSSs on AM437x SoCs
The AM437x SoCs have two different PRU-ICSS subsystems: PRU-ICSS1
and a smaller PRU-ICSS0. Enhance the PRUSS platform driver to support
both the PRU-ICSS sub-systems on these SoCs.

The PRU-ICSS1 on AM437x is very similar to the PRU-ICSS on AM33xx
except for few minor differences - increased Instruction RAM, increased
Shared Data RAM2, and 1 less interrupt (PRUSS host interrupt 7 which is
redirected to the other PRUSS) towards the MPU INTC. The PRU-ICSS0 is
a cut-down version of the IP, with less DRAM per PRU, no Shared DRAM etc.
It also does not have direct access to L3 bus regions, there is a single
interface to L3 for both PRUSS0 and PRUSS1, and it would have to go
through the PRUSS1's interface. The PRUSS_SYSCFG register is reserved on
PRUSS0, so any external access requires the programming the corresponding
PRUSS_SYSCFG register in PRUSS1. It does have its own dedicated I/O lines
though. Note that this instance does not support any PRU Ethernet related
use cases.

The adaptation uses SoC-specific compatibles in the driver and uses
a newly introduced pruss_match_private_data structure and the
pruss_get_private_data() function to retrieve a PRUSS instance specific
data using a device-name based lookup logic. The reset and the L3 external
access are managed by the parent interconnect ti-sysc bus driver so that
PRUSS1 and PRUSS0 can be independently supported.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:35 -07:00
Suman Anna
dc1129564a soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present on various TI SoCs such as
AM335x or AM437x or the Keystone 66AK2G. Each SoC can have
one or more PRUSS instances that may or may not be identical.
For example, AM335x SoCs have a single PRUSS, while AM437x has
two PRUSS instances PRUSS1 and PRUSS0, with the PRUSS0 being
a cut-down version of the PRUSS1.

The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.

The PRU-ICSS functionality is achieved through three different
platform drivers addressing a specific portion of the PRUSS.
Some sub-modules of the PRU-ICSS IP reuse some of the existing
drivers (like davinci mdio driver or the generic syscon driver).
This design provides flexibility in representing the different
modules of PRUSS accordingly, and at the same time allowing the
PRUSS driver to add some instance specific configuration within
an SoC.

The PRUSS platform driver deals with the overall PRUSS and is
used for managing the subsystem level resources like various
memories and the CFG module. It is responsible for the creation
and deletion of the platform devices for the child PRU devices
and other child devices (like Interrupt Controller, MDIO node
and some syscon nodes) so that they can be managed by specific
platform drivers. The PRUSS interrupt controller is managed by
an irqchip driver, while the individual PRU RISC cores are
managed by a PRU remoteproc driver.

The driver currently supports the AM335x SoC, and support for
other TI SoCs will be added in subsequent patches.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:43:34 -07:00
Grygorii Strashko
95e7be062a soc: ti: k3: ringacc: add am65x sr2.0 support
The AM65x SR2.0 Ringacc has fixed errata i2023 "RINGACC, UDMA: RINGACC and
UDMA Ring State Interoperability Issue after Channel Teardown". This errata
also fixed for J271E SoC.

Use SOC bus data for K3 SoC identification and enable i2023 errate w/a only
for the AM65x SR1.0. This also makes obsolete "ti,dma-ring-reset-quirk" DT
property.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:34:17 -07:00
Jason Yan
1893a2d526
soc: sunxi: sram: remove unneeded semicolon
Eliminate the following coccicheck warning:

drivers/soc/sunxi/sunxi_sram.c:197:2-3: Unneeded semicolon

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200910140546.1191280-1-yanaijie@huawei.com
2020-09-11 17:02:39 +02:00
Stephen Boyd
2bc20f3c84 soc: qcom: rpmh-rsc: Sleep waiting for tcs slots to be free
The busy loop in rpmh_rsc_send_data() is written with the assumption
that the udelay will be preempted by the tcs_tx_done() irq handler when
the TCS slots are all full. This doesn't hold true when the calling
thread is an irqthread and the tcs_tx_done() irq is also an irqthread.
That's because kernel irqthreads are SCHED_FIFO and thus need to
voluntarily give up priority by calling into the scheduler so that other
threads can run.

I see RCU stalls when I boot with irqthreads on the kernel commandline
because the modem remoteproc driver is trying to send an rpmh async
message from an irqthread that needs to give up the CPU for the rpmh
irqthread to run and clear out tcs slots.

 rcu: INFO: rcu_preempt self-detected stall on CPU
 rcu:     0-....: (1 GPs behind) idle=402/1/0x4000000000000002 softirq=2108/2109 fqs=4920
  (t=21016 jiffies g=2933 q=590)
 Task dump for CPU 0:
 irq/11-smp2p    R  running task        0   148      2 0x00000028
 Call trace:
  dump_backtrace+0x0/0x154
  show_stack+0x20/0x2c
  sched_show_task+0xfc/0x108
  dump_cpu_task+0x44/0x50
  rcu_dump_cpu_stacks+0xa4/0xf8
  rcu_sched_clock_irq+0x7dc/0xaa8
  update_process_times+0x30/0x54
  tick_sched_handle+0x50/0x64
  tick_sched_timer+0x4c/0x8c
  __hrtimer_run_queues+0x21c/0x36c
  hrtimer_interrupt+0xf0/0x22c
  arch_timer_handler_phys+0x40/0x50
  handle_percpu_devid_irq+0x114/0x25c
  __handle_domain_irq+0x84/0xc4
  gic_handle_irq+0xd0/0x178
  el1_irq+0xbc/0x180
  save_return_addr+0x18/0x28
  return_address+0x54/0x88
  preempt_count_sub+0x40/0x88
  _raw_spin_unlock_irqrestore+0x4c/0x6c
  ___ratelimit+0xd0/0x128
  rpmh_rsc_send_data+0x24c/0x378
  __rpmh_write+0x1b0/0x208
  rpmh_write_async+0x90/0xbc
  rpmhpd_send_corner+0x60/0x8c
  rpmhpd_aggregate_corner+0x8c/0x124
  rpmhpd_set_performance_state+0x8c/0xbc
  _genpd_set_performance_state+0xdc/0x1b8
  dev_pm_genpd_set_performance_state+0xb8/0xf8
  q6v5_pds_disable+0x34/0x60 [qcom_q6v5_mss]
  qcom_msa_handover+0x38/0x44 [qcom_q6v5_mss]
  q6v5_handover_interrupt+0x24/0x3c [qcom_q6v5]
  handle_nested_irq+0xd0/0x138
  qcom_smp2p_intr+0x188/0x200
  irq_thread_fn+0x2c/0x70
  irq_thread+0xfc/0x14c
  kthread+0x11c/0x12c
  ret_from_fork+0x10/0x18

This busy loop naturally lends itself to using a wait queue so that each
thread that tries to send a message will sleep waiting on the waitqueue
and only be woken up when a free slot is available. This should make
things more predictable too because the scheduler will be able to sleep
tasks that are waiting on a free tcs instead of the busy loop we
currently have today.

Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200724211711.810009-1-sboyd@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10 16:56:12 +00:00
Douglas Anderson
cb8aed7b92 soc: qcom: socinfo: add SC7180 entry to soc_id array
Add an entry for SC7180 SoC.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200813080345.1.I85bb28f9ea3fa3bf797ecaf0a5218ced4cfaa6e2@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10 16:53:48 +00:00
Kathiravan T
7303fbd2f0 soc: qcom: socinfo: add soc id for IPQ6018
Add the SoC ID for IPQ6018 variant.

Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/1597645830-30409-1-git-send-email-kathirav@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10 16:52:45 +00:00
Yoshihiro Shimoda
8e9529f5cd soc: renesas: rcar-rst: Add support for R-Car V3U
Add support for R-Car V3U (R8A779A0) to the R-Car RST driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599470390-29719-12-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 17:01:38 +02:00
Yoshihiro Shimoda
090e87e7fb soc: renesas: Identify R-Car V3U
Add support for identifying the R-Car V3U (R8A779A0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599470390-29719-10-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 17:01:38 +02:00
Kuninori Morimoto
6d5aded8d5 soc: renesas: Sort driver description title
This patch sorts each driver by description title in alphabetical order.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87a6y2v54o.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 17:01:38 +02:00
Kuninori Morimoto
8fae675850 soc: renesas: Use ARM32/ARM64 for menu description
For easy understanding of architecture and alphabetical merging, this
patch uses ARM32/ARM64 for description.
This prepares for sorting the menu.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87bliiv54u.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 17:01:38 +02:00
Florian Fainelli
10e7dd54cd soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
Change the RACPREFDATA(x) setting to prefetch the next 256-byte line
after 4 consecutive lines have been used, instead of after 2 consecutive
lines. This does improve the synthetic memcpy benchmark by an additional
+0.5% on top of the previous change for Cortex-A72 CPUs.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-06 12:43:02 -07:00
Florian Fainelli
091353c88b soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
Change the RAC prefetch distance from +/- 1 to +/- 2 for Cortex-A72 CPUs
since this provides an average of a 3.8% performance increase for
synthetic memcpy benchmarks.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-04 13:48:49 -07:00
Florian Fainelli
4029f3b419 soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
72165 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it
according to the existing values we have.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-04 13:48:42 -07:00
Florian Fainelli
5dfd145aad soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
72164 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it
according to the existing values we have.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-04 13:44:32 -07:00
Tony Lindgren
0d7ce5c5c4 Merge branch 'omap-for-v5.10/prm-genpd' into omap-for-v5.10/ti-sysc-drop-pdata 2020-09-03 12:06:18 +03:00
Kuninori Morimoto
464d9b349b soc: renesas: Align driver description titles
Now, Renesas SoC drivers are under menu, but current descriptions are
not aligned.
This patch aligns them.

    - Emma Mobile EV2
    - RZ/A1H (R7S72100)
      ...
    - R-Car H2 (R8A77900)
      ...
    - Renesas R-Car H3 ES1.x SoC Platform
      ...
    - R-Car H2 System Controller support
    - R-Car M2-W/N System Controller support
    - R-Car V2H System Controller support
    - R-Car E2 System Controller support
    - R-Car H3 System Controller support
    - R-Car M3-W System Controller support
    - R-Car M3-W+ System Controller support
    - R-Car M3-N System Controller support

    + SoC Platform support for Emma Mobile EV2
    + SoC Platform support for RZ/A1H+
      ...
    + SoC Platform support for R-Car H2
      ...
    + SoC Platform support for R-Car H3 ES1.x
      ...
    + System Controller support for R-Car H2
    + System Controller support for R-Car M2-W/N
    + System Controller support for R-Car V2H
    + System Controller support for R-Car E2
    + System Controller support for R-Car H3
    + System Controller support for R-Car M3-W
    + System Controller support for R-Car M3-W+
    + System Controller support for R-Car M3-N

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zh6kyedc.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-01 10:22:16 +02:00
Kuninori Morimoto
928bfbc6c7 soc: renesas: Use menu for Renesas SoC
Renesas related SoC settings are located on TOP level menu,
thus it is very verbose.
This patch groups Renesas related settings into
"Renesas SoC driver support" menu.

And it aligns config menu names.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k0xxho7t.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-08-25 11:21:55 +02:00
Stephan Gerhold
dd461cd918 opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER
The OPP core manages various resources, e.g. clocks or interconnect paths.
These resources are looked up when the OPP table is allocated once
dev_pm_opp_get_opp_table() is called the first time (either directly
or indirectly through one of the many helper functions).

At this point, the resources may not be available yet, i.e. looking them
up will result in -EPROBE_DEFER. Unfortunately, dev_pm_opp_get_opp_table()
is currently unable to propagate this error code since it only returns
the allocated OPP table or NULL.

This means that all consumers of the OPP core are required to make sure
that all necessary resources are available. Usually this happens by
requesting them, checking the result and releasing them immediately after.

For example, we have added "dev_pm_opp_of_find_icc_paths(dev, NULL)" to
several drivers now just to make sure the interconnect providers are
ready before the OPP table is allocated. If this call is missing,
the OPP core will only warn about this and then attempt to continue
without interconnect. This will eventually fail horribly, e.g.:

    cpu cpu0: _allocate_opp_table: Error finding interconnect paths: -517
    ... later ...
    of: _read_bw: Mismatch between opp-peak-kBps and paths (1 0)
    cpu cpu0: _opp_add_static_v2: opp key field not found
    cpu cpu0: _of_add_opp_table_v2: Failed to add OPP, -22

This example happens when trying to use interconnects for a CPU OPP
table together with qcom-cpufreq-nvmem.c. qcom-cpufreq-nvmem calls
dev_pm_opp_set_supported_hw(), which ends up allocating the OPP table
early. To fix the problem with the current approach we would need to add
yet another call to dev_pm_opp_of_find_icc_paths(dev, NULL).
But actually qcom-cpufreq-nvmem.c has nothing to do with interconnects...

This commit attempts to make this more robust by allowing
dev_pm_opp_get_opp_table() to return an error pointer. Fixing all
the usages is trivial because the function is usually used indirectly
through another helper (e.g. dev_pm_opp_set_supported_hw() above).
These other helpers already return an error pointer.

The example above then works correctly because set_supported_hw() will
return -EPROBE_DEFER, and qcom-cpufreq-nvmem.c already propagates that
error. It should also be possible to remove the remaining usages of
"dev_pm_opp_of_find_icc_paths(dev, NULL)" from other drivers as well.

Note that this commit currently only handles -EPROBE_DEFER for the
clock/interconnects within _allocate_opp_table(). Other errors are just
ignored as before. Eventually those should be propagated as well.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[ Viresh: skip checking return value of dev_pm_opp_get_opp_table() for
	  EPROBE_DEFER in domain.c, fix NULL return value and reorder
	  code a bit in core.c, and update exynos-asv.c ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-08-25 11:08:54 +05:30
Tony Lindgren
2152fbbd47 soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data
We must re-enable the RTC module clock enabled in RTC+DDR suspend, and
pm33xx has been using platform data callbacks for that. Looks like for
retention suspend the RTC module clock must not be re-enabled.

To remove the legacy platform data callbacks, and eventually be able to
drop the RTC legacy platform data, let's manage the RTC module clock
and register range directly in pm33xx.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-08-24 08:38:32 +03:00
Gustavo A. R. Silva
df561f6688 treewide: Use fallthrough pseudo-keyword
Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.

[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-08-23 17:36:59 -05:00
Anson Huang
b663b798d0 soc: imx: gpcv2: Use dev_err_probe() to simplify error handling
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-22 20:57:57 +08:00
YueHaibing
9f467393e2 soc: integrator: Drop pointless static qualifier in integrator_soc_init()
There is no need to have the 'struct regmap *syscon_regmap' variable
static since new value always be assigned before use it.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200715024701.28356-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-20 08:57:05 +02:00
Arnd Bergmann
17132da70e ARM: samsung: move pm check code to drivers/soc
This is the only part of plat-samsung that is really
shared between the s3c and s5p ports. Moving it to
drivers/soc/ lets us make them completely independent.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200806182059.2431-16-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19 21:23:46 +02:00
Tony Lindgren
2bbcd6590a soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain
Let's add omap4 and 5 l4_abe interconnect instance for the power
domain.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-08-18 10:40:03 +03:00
Tony Lindgren
f8f91486e8 soc: ti: omap-prm: Configure sgx power domain for am3 and am4
Let's configure only sgx power domain for am3 and am4 to start with.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-08-18 10:40:03 +03:00
Tony Lindgren
58cbff023b soc: ti: omap-prm: Add basic power domain support
The PRM controller has currently only support for resets while the power
domains are still handled in the platform code.

Let's add basic power domain support to enable and disable a PRM
controlled power domain if configured in the devicetree. This can be
used for various hardware accelerators, and interconnect instances.

Further support can be added later on as needed for runtime configuration
based on domain-idle-states.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-08-18 10:40:02 +03:00
Álvaro Fernández Rojas
6c41106f17 soc: bcm: add BCM63xx power domain driver
BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller
to enable/disable certain components in order to save power.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <F.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-17 09:14:04 -07:00
Florian Fainelli
9eda7c1f6f soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache
Brahma-B53 and Cortex-A72 CPUs integrated on Broadcom STB SoCs feature a
read-ahead cache that performs cache line size adaptation between the
bus interface unit and the memory controller.

On 32-bit ARM kernels we have to resort to a full featured read-ahead
cache driver under arch/arm/mm/cache-b15-rac.c (CONFIG_CACHE_B15_RAC)
because there are still cache maintenance operations by set/ways/index
that cannot be transparently handled by the ARM Coherency Extension that
the read-ahead cache interfaces to.

The 64-bit ARM kernel however has long deprecated all of those, so this
is simply a one time configuration.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-17 09:14:04 -07:00
Linus Torvalds
b79675e15a Merge branch 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull misc vfs updates from Al Viro:
 "No common topic whatsoever in those, sorry"

* 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  fs: define inode flags using bit numbers
  iov_iter: Move unnecessary inclusion of crypto/hash.h
  dlmfs: clean up dlmfs_file_{read,write}() a bit
2020-08-07 21:14:30 -07:00
Linus Torvalds
30185b69a2 It looks like a smaller batch of clk updates this time around. In the core
framework we just have some minor tweaks and a debugfs feature, so not much to
 see there. The driver updates are fairly well split between AT91 and Qualcomm
 clk support. Adding those two drivers together equals about 50% of the
 diffstat. Otherwise, the big amount of work this time was on supporting
 Broadcom's Raspberry Pi firmware clks. See below for some more highlights.
 
 Core:
  - Document clk_hw_round_rate() so it gets some more use
  - Remove unused __clk_get_flags()
  - Add a prepare/enable debugfs feature similar to rate setting
 
 New Drivers:
  - Add support for SAMA7G5 SoC clks
  - Enable CPU clks on Qualcomm IPQ6018 SoCs
  - Enable CPU clks on Qualcomm MSM8996 SoCs
  - GPU clk support for Qualcomm SM8150 and SM8250 SoCs
  - Audio clks on Qualcomm SC7180 SoCs
  - Microchip Sparx5 DPLL clk
  - Add support for the new Renesas RZ/G2H (R8A774E1) SoC
 
 Updates:
  - Make defines for bcm63xx-gate clks to use in DT
  - Support BCM2711 SoC firmware clks
  - Add HDMI clks for BCM2711 SoCs
  - Add RTC related clks on Ingenic SoCs
  - Support USB PHY clks on Ingenic SoCs
  - Support gate clks on BCM6318 SoCs
  - RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
  - Use poll_timeout functions in Rockchip clk driver
  - Support Rockchip rk3288w SoC variant
  - Mark mac_lbtest critical on Rockchip rk3188
  - Add CAAM clock support for i.MX vf610 driver
  - Add MU root clock support for i.MX imx8mp driver
  - Amlogic g12: add neural network accelerator clock sources
  - Amlogic meson8: remove critical flag for main PLL divider
  - Amlogic meson8: add video decoder clock gates
  - Convert one more Renesas DT binding to json-schema
  - Enhance critical clock handling on Renesas platforms to only consider
    clocks that were enabled at boot time
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl8tspERHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSX0og//TXp134IBXVZ2Z5Wca4J41itv7tPGJFsX
 EslQ/eMm6xhGEqqrA6BVsQ228JF9rUmg1fbvdl82UPK7Zyp9P2fo6CMC65ngDTky
 B1rLZOaKitER9JdL9DmmnIR772pI//rAMdIeVC/Jn5RR7OpP4lgY6+qvK0pJjVFl
 8aK3uHY+UWVFtqZxuJEAAyZBq1+bREqmVwNC1my6kmMIf0j0KwcGhrZgASWWtjQK
 4TRmroehLC4FBqnJ78Y3E6UAOBlz6C7XnP38qJge2672Ef7QhXZU7AGrGiTtxc4h
 5fB6MNMF+5QGel54qR1eH+JxaEoKsAjLaX1VBr7hAHrGIQ26dBFHFPsPvWDA+VVR
 4bwXJKz2objAWyqlMVM/cVV3q6uDixuScdrw2aAiojmV7ZvdZXflacdmZuS5v7e4
 sh86llN+lF0YrViYz33z+up0risCAi089xVo7Z99VgyLe2DR8TE+4/d6DQTFRNxl
 m66m6mlB9pPPgIV028SAf/zmzyoVWEarwdEAQPjJC6KVRbnR9mFlhSiTQMmCsSvU
 zHRxVcInc+8qIJY6VJ552UFu/JAan/AFl5knb+kW21a7hM8p81H9HuSnS4aHDDq4
 yETPU3XSMYz8ARHX4lKo1UIB6+k9iF2CWdCP+gXHNP+QYSAsRBIJsonjul9lLUCi
 8i6mUGkS0OU=
 =QLRg
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "It looks like a smaller batch of clk updates this time around.

  In the core framework we just have some minor tweaks and a debugfs
  feature, so not much to see there. The driver updates are fairly well
  split between AT91 and Qualcomm clk support. Adding those two drivers
  together equals about 50% of the diffstat.

  Otherwise, the big amount of work this time was on supporting
  Broadcom's Raspberry Pi firmware clks.

  Highlights:

  Core:
   - Document clk_hw_round_rate() so it gets some more use
   - Remove unused __clk_get_flags()
   - Add a prepare/enable debugfs feature similar to rate setting

  New Drivers:
   - Add support for SAMA7G5 SoC clks
   - Enable CPU clks on Qualcomm IPQ6018 SoCs
   - Enable CPU clks on Qualcomm MSM8996 SoCs
   - GPU clk support for Qualcomm SM8150 and SM8250 SoCs
   - Audio clks on Qualcomm SC7180 SoCs
   - Microchip Sparx5 DPLL clk
   - Add support for the new Renesas RZ/G2H (R8A774E1) SoC

  Updates:
   - Make defines for bcm63xx-gate clks to use in DT
   - Support BCM2711 SoC firmware clks
   - Add HDMI clks for BCM2711 SoCs
   - Add RTC related clks on Ingenic SoCs
   - Support USB PHY clks on Ingenic SoCs
   - Support gate clks on BCM6318 SoCs
   - RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
   - Use poll_timeout functions in Rockchip clk driver
   - Support Rockchip rk3288w SoC variant
   - Mark mac_lbtest critical on Rockchip rk3188
   - Add CAAM clock support for i.MX vf610 driver
   - Add MU root clock support for i.MX imx8mp driver
   - Amlogic g12: add neural network accelerator clock sources
   - Amlogic meson8: remove critical flag for main PLL divider
   - Amlogic meson8: add video decoder clock gates
   - Convert one more Renesas DT binding to json-schema
   - Enhance critical clock handling on Renesas platforms to only
     consider clocks that were enabled at boot time"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (79 commits)
  clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845
  ipq806x: gcc: add support for child probe
  clk: qcom: msm8996: Make symbol 'cpu_msm8996_clks' static
  clk: qcom: ipq8074: Add correct index for PCIe clocks
  clk: <linux/clk-provider.h>: drop a duplicated word
  clk: renesas: cpg-mssr: Add r8a774e1 support
  dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
  clk: Drop duplicate selection in Kconfig
  clk: qcom: smd: Add support for MSM8992/4 rpm clocks
  clk: qcom: ipq8074: Add missing clocks for pcie
  dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe
  Replace HTTP links with HTTPS ones: Common CLK framework
  clk: qcom: Add CPU clock driver for msm8996
  dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996
  soc: qcom: Separate kryo l2 accessors from PMU driver
  clk: meson: meson8b: add the vclk2_en gate clock
  clk: meson: meson8b: add the vclk_en gate clock
  clk: qcom: Fix return value check in apss_ipq6018_probe()
  clk: bcm: dvp: Add missing module informations
  clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
  ...
2020-08-07 13:35:51 -07:00
Linus Torvalds
822ef14e9d ARM: SoC driver updates for v5.9
A couple of subsystems have their own subsystem maintainers but choose
 to have the code merged through the soc tree as upstream, as the code
 tends to be used across multiple SoCs or has SoC specific drivers itself:
 
  - memory controllers:
      Krzysztof Kozlowski takes ownership of the drivers/memory
      subsystem and its drivers, starting out with a set of cleanup
      patches.
      A larger driver for the Tegra memory controller that was accidentally
      missed for v5.8 is now added.
 
  - reset controllers:
      Only minor updates to drivers/reset this time
 
  - firmware:
      The "turris mox" firmware driver gains support for signed firmware blobs
      The tegra firmware driver gets extended to export some debug information
      Various updates to i.MX firmware drivers, mostly cosmetic
 
  - ARM SCMI/SCPI:
      A new mechanism for platform notifications is added, among a number
      of minor changes.
 
  - optee:
      Probing of the TEE bus is rewritten to better support detection of
      devices that depend on the tee-supplicant user space.
      A new firmware based trusted platform module (fTPM) driver is added
      based on OP-TEE
 
  - SoC attributes:
      A new driver is added to provide a generic soc_device for identifying
      a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
      by probing SoC family specific registers.
      The series also contains some cleanups to the common soc_device code.
 
 There are also a number of updates to SoC specific drivers,
 the main ones are:
 
  - Mediatek cmdq driver gains a few in-kernel interfaces
 
  - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
    support for additional SoC variants
 
  - The Qualcomm GENI core code gains interconnect path voting and
    performance level support, and integrating this into a number of
    device drivers.
 
  - A new driver for Samsung Exynos5800 voltage coupler for
 
  - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
    specific device drivers
 
  - Updates to the TI K3 Ring Accelerator driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j3y4ACgkQmmx57+YA
 GNm8Iw//euEC37KaiBDhlK3mcAL7NOdITqZpq4m+ZJZBsF02NDMWktJR8bYuOgmp
 kjR4LjCxa2i+UOq1Ln+zYSlS27AngZLHFM+YSG3jqDho12GYIe4OBZB/q/hkDu71
 L5jCPNrZV9+GIcean2u8LOWDNlQ4SZQyZ1/gcCK7y7I8W1pVulmJRhtJ0MNkezni
 gDQ+OH+6+6XY8AethWK9ubsYH7SeJX/U6I8t5KJGhPr6FlaJFZOO5RTdUkBFMHpS
 i4UaT4meuqZUjwz4BhjvoYul5AT6Zc8OOTQwk1FM7dIe47aI8VkWrWci/IekxoLh
 UXtKbAJxerCIdehfiygX4pKtOmRKSisS2ocWsKg46Htu11ltv0XMRgyLyGv4Vm84
 g+fKfKUL0SUueDqr+jKEq2aZdyLxwV5ZUoFt3IVsXdHRkZtxpN8jmOHOjV6erLVY
 m7S85U5eclNdK5Ap7RSVvQa4NP3NTUvJd1IDNIneUVyACRkxzWEKmE3ZuEO4qttS
 WSDW74m5ja80pltv1umFbGAsOUTZWA+WGULeXPv4CIooaD8RL6Jzs+7tkZEEhleU
 WlGBFE4eJi/ChMeyTKXPvEqsQncLSf0mGzM4/DVY6XRSTIrW+cuj1/Gsso1BJdod
 aZZ76uMNHJdAt0PcxL47lDUDxhJDkTwBsfGNJseZ3sYlAQ7Wmqo=
 =nezz
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A couple of subsystems have their own subsystem maintainers but choose
  to have the code merged through the soc tree as upstream, as the code
  tends to be used across multiple SoCs or has SoC specific drivers
  itself:

   - memory controllers:

     Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
     and its drivers, starting out with a set of cleanup patches.

     A larger driver for the Tegra memory controller that was
     accidentally missed for v5.8 is now added.

   - reset controllers:

     Only minor updates to drivers/reset this time

   - firmware:

     The "turris mox" firmware driver gains support for signed firmware
     blobs The tegra firmware driver gets extended to export some debug
     information Various updates to i.MX firmware drivers, mostly
     cosmetic

   - ARM SCMI/SCPI:

     A new mechanism for platform notifications is added, among a number
     of minor changes.

   - optee:

     Probing of the TEE bus is rewritten to better support detection of
     devices that depend on the tee-supplicant user space. A new
     firmware based trusted platform module (fTPM) driver is added based
     on OP-TEE

   - SoC attributes:

     A new driver is added to provide a generic soc_device for
     identifying a machine through the SMCCC ARCH_SOC_ID firmware
     interface rather than by probing SoC family specific registers.

     The series also contains some cleanups to the common soc_device
     code.

  There are also a number of updates to SoC specific drivers, the main
  ones are:

   - Mediatek cmdq driver gains a few in-kernel interfaces

   - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
     support for additional SoC variants

   - The Qualcomm GENI core code gains interconnect path voting and
     performance level support, and integrating this into a number of
     device drivers.

   - A new driver for Samsung Exynos5800 voltage coupler for

   - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
     specific device drivers

   - Updates to the TI K3 Ring Accelerator driver"

* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  memory: jz4780_nemc: Only request IO memory the driver will use
  soc: qcom: pdr: Reorder the PD state indication ack
  MAINTAINERS: Add Git repository for memory controller drivers
  memory: brcmstb_dpfe: Fix language typo
  memory: samsung: exynos5422-dmc: Correct white space issues
  memory: samsung: exynos-srom: Correct alignment
  memory: pl172: Enclose macro argument usage in parenthesis
  memory: of: Correct kerneldoc
  memory: omap-gpmc: Fix language typo
  memory: omap-gpmc: Correct white space issues
  memory: omap-gpmc: Use 'unsigned int' for consistency
  memory: omap-gpmc: Enclose macro argument usage in parenthesis
  memory: omap-gpmc: Correct kerneldoc
  memory: mvebu-devbus: Align with open parenthesis
  memory: mvebu-devbus: Add missing braces to all arms of if statement
  memory: bt1-l2-ctl: Add blank lines after declarations
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  ...
2020-08-03 19:30:59 -07:00
Arnd Bergmann
d76cfc7c3a Qualcomm driver additional updates for 5.9
This fixes a potential race condition with remoteprocs by not sending
 acknowledgements until after registered drivers has processed the event.
 It adds IPQ6018 support to the SMD RPM driver, fixes kerneldoc in the
 same and converts the related DT binding to YAML.
 Finally it fixes a compilation warning in the geni serial engine driver
 when compiled without CONFIG_SERIAL_EARLYCON.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8iVskbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FxngQAKYteK6610TV6jqcfg7B
 qIMh46AVPviq9MkCpty7/rFF9ukBuA9wlPV5QLIS62b+1qKGzy2d9foNnqvZRSN2
 GjDl/QTdbEhteSOHhkVtB3hFqgRV5N2X/6ep8sa/UuFxjuHUtkonHQ24Rvj4c9o2
 Pjzc/e67xCTTcQeFeaDKlE66f1tF2ycyEYqXY59TjgJgv3mQqT68XPCpRcXaqG9g
 kTF3LsWcqyunQXHvahgUJYgrBz/PhPKmpZI2HB/hKzFNqYAk9K0oj3VqZ/vqGFW5
 a2mYoQuw189uNa+yeOjhfoipyVlMBdgw3ON54vVsdUnHP5ekisDc2pxmb03hMpA8
 X8unAOFJeBEeP2t6j7ulRvRxfb/DwInvYfQpVjG2YvOhI2kbuT0zm5xHUnaqo6PR
 h6lp+qnVSQHOGBbVItNLiAQljNFHzMDCQ0G7UJTtFrfvNN0BuLqibqmKwXxtPIsW
 Nsic5VfJK6n4e5YpJpLbROm3vOqgA16Vk4wUAP4Cd95jphgFvZuMmo4a6FWJUc+e
 tmtRKwcoq0bYBquiXtFEvdxqqFFm5RpbIOIU4d25whIaq9xth02MGycAKRHoVWfv
 fGoN/7/KTmfCPZUimSKlCrNkdlLhmGOhyNG/LV4KSjXAEaRUEX+3F6vrzgq3FpAL
 VrnmQsC4VpMxeOsrAb1M+xNP
 =7TeI
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver additional updates for 5.9

This fixes a potential race condition with remoteprocs by not sending
acknowledgements until after registered drivers has processed the event.
It adds IPQ6018 support to the SMD RPM driver, fixes kerneldoc in the
same and converts the related DT binding to YAML.
Finally it fixes a compilation warning in the geni serial engine driver
when compiled without CONFIG_SERIAL_EARLYCON.

* tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  soc: qcom: pdr: Reorder the PD state indication ack
  dt-bindings: soc: qcom: smd-rpm: Convert binding to YAML schema
  soc: qcom: smd-rpm: Add IPQ6018 compatible
  dt-bindings: soc: qcom: smd-rpm: Add IPQ6018 compatible

Link: https://lore.kernel.org/r/20200730051852.649761-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-31 10:38:36 +02:00
YueHaibing
0fec8617a1 soc: qcom: geni: Fix unused label warning
If CONFIG_SERIAL_EARLYCON is not set, gcc warns this:

drivers/soc/qcom/qcom-geni-se.c: In function 'geni_se_probe'
drivers/soc/qcom/qcom-geni-se.c:914:1: warning: label 'exit' defined but not used [-Wunused-label]
 exit:
 ^~~~

Fixes: 048eb908a1 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200722020619.25988-1-yuehaibing@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-29 22:10:30 -07:00
Krzysztof Kozlowski
e434e0c41f soc: qcom: smd-rpm: Fix kerneldoc
Fix W=1 compile warnings (invalid kerneldoc):

    drivers/soc/qcom/smd-rpm.c:35: warning: Function parameter or member 'dev' not described in 'qcom_smd_rpm'
    drivers/soc/qcom/smd-rpm.c:99: warning: Function parameter or member 'state' not described in 'qcom_rpm_smd_write'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200729074415.28393-2-krzk@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-29 13:39:43 -07:00
Sibi Sankar
72fe996f96 soc: qcom: pdr: Reorder the PD state indication ack
The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:09:25 -07:00
Arnd Bergmann
9c52a2647a SOC: TI Keystone driver update for v5.9
- TI K3 Ring Accelerator updates
  - Few non critical warining fixes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJfHJ+3AAoJEHJsHOdBp5c/qgAP/RxwxIgRI2iXG+tqgotdvTfm
 wgXZOW18nAyNAkGeuoWmFV1eaEx7mYtn58wCVU+lX+7Hn3JlecGCCwLJlwQzxt88
 i0sCFHFYlDYecaPojEwB3/HFh/ADNIsos52laWgBA5P9wtxBDCK9/kJCn1GBIfTm
 ExXU/VLZffS3u66WYkSgSM+bDRgkB0ZB1h8oNebZ7/iDPSPUGw31/4Gzs0iQbghc
 Wf1ooOqyLBG+yVA1wzePmyCkmGaACJ049+AdNJHQ9rOoYVJ8RDOgY94+AWfogJfd
 SsuKbuchxAieSdaL8EcU8wZZYEuyKKqRZKxgLifMfcsYizrP93nKHTktgAcyvjp+
 JPBfQVvB85MrEDI8nxbuCU1Pu7L0v76ujsfIoC5RHFX+x/8W5IOKBwmpHcFPxWoe
 RLGzOyzytCJ29sQLH7o/15A0jnWUIiquro+4ZavWckXXUNhsPJAPzhfFSH/kpB2K
 47EMK9GX8wPk/HuDCZSjRGI7OYz0JvXL9FHwUgvERcWhpUOS3VyI1+Wj6jRdrTML
 qbd+J0Bg5GzzxgQmUbvyqIv2eqOJUx/PEe3QriO2t5MDOXtwl/UsN3zuxPsRItJw
 FFA2wb5l55Z717FxjdhCFUdCIPUTKauRbNaGrV5dJyAQiWCeZdtc0KbA/e6e2Lpm
 gSUghw3Gu5JdO6T3ghbn
 =Y8Sq
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI Keystone driver update for v5.9

 - TI K3 Ring Accelerator updates
 - Few non critical warining fixes

* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
  soc: ti: k3: fix semicolon.cocci warnings
  soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
  dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
  soc: ti: k3-ringacc: separate soc specific initialization
  soc: ti: k3-ringacc: add request pair of rings api.
  soc: ti: k3-ringacc: add ring's flags to dump
  soc: ti: k3-ringacc: Move state tracking variables under a struct
  dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema

Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27 14:24:51 +02:00
Wei Yongjun
09241e6110 soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
The sparse tool complains as follows:

drivers/soc/ti/knav_qmss_acc.c:453:23: warning:
 symbol 'knav_acc_range_ops' was not declared. Should it be static?

'knav_acc_range_ops' is not used outside of knav_qmss_acc.c,
so marks it static.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:47:10 -07:00
kernel test robot
1d0360161c soc: ti: k3: fix semicolon.cocci warnings
drivers/soc/ti/k3-ringacc.c:616:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: 3277e8aa25 ("soc: ti: k3: add navss ringacc driver")
CC: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:39:47 -07:00
Grygorii Strashko
80ff73f758 soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
Fix build warning in k3_ringacc_ring_cfg():

smatch warnings:
drivers/soc/ti/k3-ringacc.c:562 k3_ringacc_ring_cfg() warn: variable dereferenced before check 'ring' (see line 559)

  557  int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg)
  558  {
 @559           struct k3_ringacc *ringacc = ring->parent;
                                             ^^^^^^^^^^^^
Dereference.

  560           int ret = 0;
  561
 @562           if (!ring || !cfg)
                    ^^^^

Check too late.  Delete it?

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:39:40 -07:00
Grygorii Strashko
40a2a7c395 soc: ti: k3-ringacc: separate soc specific initialization
Separate SoC specific initialization and and OF mach data in preparation of
adding support for more K3 SoCs

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:19:43 -07:00
Grygorii Strashko
43148b1cab soc: ti: k3-ringacc: add request pair of rings api.
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most cases Rings are used with DMA channels, which need to
request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:19:12 -07:00
Grygorii Strashko
175e663f70 soc: ti: k3-ringacc: add ring's flags to dump
Add struct k3_ring *ring->flags to the ring dump.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:18:34 -07:00
Peter Ujfalusi
6b3da0b475 soc: ti: k3-ringacc: Move state tracking variables under a struct
Move the free, occ, windex and rindex under a struct. We can use memset to
zero them and it will allow a cleaner way to extend driver functionality in
the future,

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:17:55 -07:00
Arnd Bergmann
18517746d7 Qualcomm driver updates for v5.9
For RPMh this fixes an issue where ktime was used during suspend, allows
 the driver to be used on ARM targets and some minor cleanups.
 
 It adds support for the latest format version in the socinfo driver and
 adds identifiers for SM8250 and SDM630.
 
 SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
 gains compatibles MSM8994 and IPQ8074.
 
 The GENI core code gains interconnect path voting and performance level
 support, with subsequent patches integrating this with the SPI, I2C,
 UART and QSPI drivers.
 
 Following this the KGDB support for the GENI serial driver is improved,
 the performance related to chip-select is improved for SPI and QSPI.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8WWfsbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNB4QAJlOgboPQpxReZ8iJUr7
 C5nyBQEa6jG2HNXKyHA/OKcpuU6kchSqzoU0N7RfsuISrA6RAeBdSc8duQkWFF2u
 pqhbx5KCT5hqeU0rTNtSkKLaJUg+8s3hbnKzvQmBi+GbFUM9Davs1TdT+XpeNRX+
 F9Oly7Wr4LiMA1QHy+hDPLFvQzGtrIkkgvOGXxCiIeC+p3WwlNPltKkaEo/HUirL
 iIhibNwWwHLhBA5pXSew5fnzU7dOU1vsOR4F7Y1mfFP2C4vvDRzEeitcutr/dLYw
 r8ptzvJUwsF2gaSaSE51Ki3ToyNrVhBw9YF00/wLcidBuvXell/VO37J7WWzMpEA
 Iu1Qok+KBo03TmDOpj8nreljCewQv3H3zb0PD/RIRWU5XN7UFckvc+iA0n1m5rXE
 fb0FSYfIZXHRlZCi0xr1cUD/IYXynCYFQ3p+rme8dvlaaxf3wt9jclNXnqXRBb1l
 LUpC33ogD4a6lJypbnz9UjNU+3Ek7nJPoi0OfwOHmVuiOBlMOu7F6kdz5t8tM25m
 K6RHWsMM2M3EsI/YGL3lGQU9EBu0r8tvkDs+JfLodrG6yoISXfUCz52XpvC3UX86
 HBs0NsN47nPmbRk7WrOee/NQn0t1bW8mC7hk6SkoZ6jp4i8SKyuHeCiVXQWbKHaw
 Os2m2MWfrrdnRE4O42BzEeX7
 =Os4F
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.9

For RPMh this fixes an issue where ktime was used during suspend, allows
the driver to be used on ARM targets and some minor cleanups.

It adds support for the latest format version in the socinfo driver and
adds identifiers for SM8250 and SDM630.

SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
gains compatibles MSM8994 and IPQ8074.

The GENI core code gains interconnect path voting and performance level
support, with subsequent patches integrating this with the SPI, I2C,
UART and QSPI drivers.

Following this the KGDB support for the GENI serial driver is improved,
the performance related to chip-select is improved for SPI and QSPI.

* tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (35 commits)
  soc: qcom: geni: Fix NULL pointer dereference
  tty: serial: qcom-geni-serial: Drop the icc bw votes in suspend for console
  serial: qcom_geni_serial: Always use 4 bytes per TX FIFO word
  serial: qcom_geni_serial: Make kgdb work even if UART isn't console
  spi: spi-geni-qcom: Get rid of most overhead in prepare_message()
  spi: spi-geni-qcom: Set the clock properly at runtime resume
  spi: spi-geni-qcom: Avoid clock setting if not needed
  spi: spi-qcom-qspi: Set an autosuspend delay of 250 ms
  spi: spi-qcom-qspi: Avoid clock setting if not needed
  spi: spi-qcom-qspi: Use OPP API to set clk/perf state
  firmware: qcom_scm: Add msm8994 compatible
  firmware: qcom_scm: Fix legacy convention SCM accessors
  <linux/of.h>: add stub for of_get_next_parent() to fix qcom build error
  dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoC
  spi: spi-geni-qcom: Use OPP API to set clk/perf state
  tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
  spi: spi-qcom-qspi: Add interconnect support
  spi: spi-geni-qcom: Add interconnect support
  spi: spi-geni-qcom: Combine the clock setting code
  tty: serial: qcom_geni_serial: Add interconnect support
  ...

Link: https://lore.kernel.org/r/20200721044812.3429652-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:36:18 +02:00
Arnd Bergmann
e2837df668 i.MX drivers change for 5.9:
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
   handler, so that system can be waked up when MU IRQ arrives.
 - Move i.MX SCU soc driver into imx firmware folder to get it
   initialized from i.MX SCU firmware driver.
 - Clean up soc-imx-scu driver a bit by using devm_kasprintf().
 - Correct postfix setting for cm40 power domain in scu-pd driver.
 - Add resource management support for IMX_SCU firmware driver.
 - Add more cm4 resources to i.MX SCU power domain driver.
 - Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
   in AARCH32 mode Linux on AARCH64 hardware.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VPiUUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5L9wf/VY0Q2oZ+gaJRNhSfVSf7O7QpscHV
 mtQZPHg81jv3D2NkOpycJ1vaJEo118Ho6vb5IfeheChyZ2eWEJKkaPpVuhyKjPhK
 B+nUmFnsTm8MTL+GKA1W7g6Gg+lJN3wT/mOITNmGMW0NID4/rse/XeM18+28nNb/
 2svVyc1+4uTM5m+4i+scBCdnxgBK2H71/DQYLfDvNtZesWzas1PNN1nJh10D/PMM
 X6d7AZ92c//pf5eR3wpm/JKZ+hubefBNWkrpw50pNlAASbgOogXWL1GU9q3r/VAV
 9dS0dW9mIlpqlONEO+2zv9v1/RnoUypkCe/FFTUsA1bJ7ZGqhxWmrYwyfg==
 =7Pd6
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.9:

- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
  handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
  initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
  in AARCH32 mode Linux on AARCH64 hardware.

* tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: select ARM_GIC_V3 for i.MX8M
  firmware: imx: Move i.MX SCU soc driver into imx firmware folder
  firmware: imx: scu-pd: add more cm4 resources
  firmware: imx: add resource management api
  firmware: imx: scu-pd: fix cm40 power domain
  soc: imx: scu: use devm_kasprintf
  firmware: imx: make sure MU irq can wake up system from suspend mode

Link: https://lore.kernel.org/r/20200720085536.24138-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:35:21 +02:00
Marek Szyprowski
00067ca533 soc: samsung: exynos-regulator-coupler: Add simple voltage coupler for Exynos5800
Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which
require coupling between "vdd_arm" and "vdd_int" regulators. This coupler
ensures that the voltage values don't go below the bootloader-selected
operation point during the boot process until the clients set their
constraints. It is achieved by assuming minimal voltage value equal to
the current value if no constraints are set. This also ensures proper
voltage balancing if any of the client driver is missing.

The balancing code comes from the regulator/core.c with the additional
logic for handling regulators without client constraints applied added.

Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:33:57 +02:00
Kathiravan T
84da0cf99b soc: qcom: smd-rpm: Add IPQ6018 compatible
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.

Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/1595225543-12127-3-git-send-email-kathirav@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-21 22:23:00 -07:00
Akash Asthana
03c900b3be soc: qcom: geni: Fix NULL pointer dereference
pdev struct doesn't exits for the devices whose status are disabled
from DT node, in such cases NULL is returned from 'of_find_device_by_node'
Later when we try to get drvdata from pdev struct NULL pointer dereference
is triggered.

Add a NULL check for return values to fix the issue.

We were hitting this issue when one of QUP is disabled.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 048eb908a1 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash")
Reported-by: Sai Prakash Ranjan <saipraka@codeaurora.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Link: https://lore.kernel.org/r/1594996342-26964-1-git-send-email-akashast@codeaurora.org
[bjorn: s/wrapper_pdev/pdev/]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-20 13:11:15 -07:00
Arnd Bergmann
1481fd7139 soc/tegra: Changes for v5.9-rc1
This adds missing SoC IDs for Tegra186 and Tegra194 and fixes a typo in
 a warning message.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl8RzC8THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUDDEACgT5pyhIPt8zMSc9F6s8ITBqvyjeE6
 nYMiZUFhPl65eBpDCrTjGKFD1oomY4noMnikOmL374CKd4/jmeQK7FpB9AlshMH6
 55jidZ25li1N/n9DgA17Dcyn7nBiuaKl4NLPveWf6zgmsWBdEItz1KtSTc7eC9ET
 USmL+xwYwfdR70kYc/mX9Bgym+Jf9vmAEKTYzsbin0KpYezYZf+tXi6QdWiUze/s
 klqoWayFYEeP7IPzi6hX3o306qbkLJsl0m7izNYwpOom/2BEw0mhQM13Ax9vg++C
 mUtwtTzXN3pwQEZzy1XkNBU4l5ODWl9NbFF4NJD2wSzZRNRoCiesRLxPEMrK3XIp
 wKki6DIniUyPU8fnKSwUIEgZHPydc/ZdVEXQHz2LTrSvAP3kyDs6QrhNjzQoO2Ij
 oyihUF7fT/WP6Cg8ZueCxCSr2JYCNOrU7R3njwi/x0J416317MTgxP4YyVJnf0ld
 rK3g0Ldb14WmsOar4gw2bdHuQs44Hgh12TZ1esK92TZx88Fm9x4tHTJrMHx7BW7k
 eAMr81DvFE+cVe7cdvTELdq+2se6wel/kHxPy8zCMFZzaBnj0zrHhbdHV6aS//TP
 dYEAaOe2VEvLzHdZ8fUrohPZf+/9AclOaNkXF0iE3tnlZBnzYnyuki6cb3EqPFZY
 rtrKYNQC/eGc8A==
 =B2af
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.9-rc1

This adds missing SoC IDs for Tegra186 and Tegra194 and fixes a typo in
a warning message.

* tag 'tegra-for-5.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix typo in APB MISC warning
  soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs

Link: https://lore.kernel.org/r/20200717161300.1661002-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 21:17:20 +02:00
Arnd Bergmann
a3cff3e6ed Renesas driver updates for v5.9
- Add core support for the new RZ/G2H (R8A774E1) SoC, including System
     Controller (SYSC) and Reset (RST) support.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXxFlJQAKCRCKwlD9ZEnx
 cBc5AQDuPW0JS4eKE+oARQ3EMxw3ZrEA1zzleiML19YnvEy5YgEA0UsdDlPGnRs1
 dZruiWUH9xu4n7zWVZshKf2BBSSTWw0=
 =+Zex
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.9

  - Add core support for the new RZ/G2H (R8A774E1) SoC, including System
    Controller (SYSC) and Reset (RST) support.

* tag 'renesas-drivers-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-rst: Add support for RZ/G2H
  soc: renesas: Identify RZ/G2H
  soc: renesas: Add Renesas R8A774E1 config option
  soc: renesas: rcar-sysc: Add r8a774e1 support
  clk: renesas: Add r8a774e1 CPG Core Clock Definitions
  dt-bindings: power: Add r8a774e1 SYSC power domain definitions

Link: https://lore.kernel.org/r/20200717112427.26032-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17 16:06:26 +02:00
Thierry Reding
eb8bb7abbb soc/tegra: fuse: Fix typo in APB MISC warning
The hardware block is called APB MISC, not ABP MISC, so fix the warning
to use the correct name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-17 15:47:35 +02:00
Arnd Bergmann
7247e1f1b0 add new functions to cmdq helper functions
- assign value to register
 - export finalize function and don't call explicitely from flush async
 - set specific event
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl8PgMQXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7p3A//WD2UHkTXkhk6n241oYNfEQ2Q
 1vARipsooLwcBFvzAwwiq2HcnZbStG9Zp5+mvLQoJ7B2k1/NlGfR3O6BHvtnfkrs
 yppP73vDuLgnj4KYfvidzqO5L/8HePQM5/b/wI9wfTOU0N3mCGnLBJXaF+udZ3YK
 cAB1KmhSoIg2TBI5sMJDLfF0oo1xeBeCeX1DVzopJHKnMNn9QODYCAaNfNfbFmFB
 I/udIMOljWmwW/FALFQkfEQ/lCDXngbXR+rMyZLpvELpeaiJDNRENUr579GP1+EJ
 UreBp4BEYtyS68Vt0D5cFw0YL/rThZWGm20dUtOO3DZdxMga1pRw9qBM/1/wv0B9
 39zO6C66IezjozwQnDmn6jSCrV/qgaamkD0hf88xSTN1F5UyPn/JdmYLOccK+fpk
 r69LyVhtRyKWygl+EEAy/ai+/PfUf0z0FbheWzG+iOg+FXl+YvYeuh8MZqlrVwcm
 2IJS9Dp8fAGZFi67oqT/PXRO8rwVrrOryjtYk029h/hjG855Bh7cVE2RohyPI4Lk
 X4/3hzRFZC26cQH9YGbWFuV7ZgfHJLbQ8tCegQsQvjGPp4OPcV5DfHrxtLpxINCP
 jk4W2rUik7EKUMjXYYp92JJWHMHWmVYx88TWVqKSS/saHkinRpMXbS1mL9qwSs0W
 H1gotYKPbuKjhCT3x8c=
 =+rna
 -----END PGP SIGNATURE-----

Merge tag 'v5.8-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

add new functions to cmdq helper functions
- assign value to register
- export finalize function and don't call explicitely from flush async
- set specific event

* tag 'v5.8-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: cmdq: add set event function
  soc: mediatek: cmdq: export finalize function
  soc: mediatek: cmdq: add assign function

Link: https://lore.kernel.org/r/01399fb4-b2d0-e41b-dfd9-f2deba0ef651@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:12:50 +02:00
Arnd Bergmann
d943a9c83e i.MX fixes for 5.8, round 2:
- A couple of fixes on i.MX platform device registration code to stop
   the use of invalid IRQ 0.
 - Fix a regression seen on ls1021a platform, caused by commit
   52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
 - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8Nxv4UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM4fIAf/SKUzFbQ/INaU98yW8zONnZVzD/jI
 3oTnBP87YJRNiyrLF1lWLs55vfnhum7yXJZXdMbwP55fdJKVaV4StePGz9Sh4Gba
 4COHOF3XvF73b4kpcCQEr1U+Y0KHEfMbkwONmerk9ZkRThY2uqcRsdj4br+XA9eU
 19ppWdOYZHMjegPu0KuxJlevZJDO6s9I4MCKFWmGgWhanLeGXXd2xtJEgqTWtTnS
 EFjOFdBQF+5yd0VY/j6WHBDHWa/fXhDFoAO8Wc5LMCP3VybZdciIi4mN8y0UZoNG
 Q5UnBvpYMCqrBwVlyqgeDtJUvYd+33dHqsRbU3KN8yBpRnyHupR9UvcFLA==
 =+Gmy
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8, round 2:

- A couple of fixes on i.MX platform device registration code to stop
  the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
  52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.

* tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: check ls1021a
  ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
  ARM: imx: Provide correct number of resources when registering gpio devices
  ARM: dts: imx6qdl-gw551x: fix audio SSI

Link: https://lore.kernel.org/r/20200714145649.GP15718@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:08:07 +02:00
Arnd Bergmann
c07e902a51 Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl8GTsAACgkQWTcYmtP7
 xmXp8g//TIM1a9jgm+RwsKJlkK4C1WM3NuRdv7CMc8KDHKPANYdZjZoRLY/OL8Sx
 tw3WxDTUIHrw5jVOG69TvbzKpusZjq4pQGVzC6IoZxuxC48xkMutnO1CIhn2QNSc
 uweLQ2Xv80oF7vIkjtTIMp1q0PuX5ley6q7V2ZUO7pH3tHRwB3YAvdu54Yzt1pfO
 vPvoA6etPOYvYrG7dz7NSYCCAiv7enS2Tn5y9vWi59Nt75cwY17+JRrHd23GQS7L
 ogTlXrCrozLVBB/wKS+kJCnJ4XUpDsIb06ze8TW2yKSqB1DWO2P41IZrhdisfB8S
 DJCoQOX5OVNc2VBeIlxbtsbLy4kNy9YXRJ1gjrzisHoeIoVhNErMNfm34pVCeI+C
 b/qWO31mtPkb3gcXzcgBkrL/G/+Qp4wQUfVCKWoBPnZuyAzIke+nCXFQom8zIIqo
 ir31UAVf8KTn26EUYlhk09EkyxkOYERf6j4LRfG1L2Ou0S/2cehUK3yHIXRKTFR0
 diwxaf09clKpTzeAq677BHG/aZJ00R9rNDs1PxviTvdxUzS9AMngyA2HENUhsg5s
 Bra+6hamBObjP22juxeoq1WHsU79HiStw8d03QgANEDSZMQvxc6gpdMjcEOmbx4m
 t6efhVOA6Nu8BZ0nPiplK6+y20x4qCXP6ljFBmcIxjsrN659jqk=
 =JBUn
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes

Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes

* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's

Link: https://lore.kernel.org/r/7hk0zc1ujc.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-16 22:07:48 +02:00
Rajendra Nayak
4a3107f61f tty: serial: qcom-geni-serial: Drop the icc bw votes in suspend for console
When using the geni-serial as console, its important to be
able to hit the lowest possible power state in suspend,
even with no_console_suspend.
The only thing that prevents it today on platforms like the sc7180
is the interconnect BW votes, which we certainly don't need when
the system is in suspend. So in the suspend handler mark them as
ACTIVE_ONLY (0x3) and on resume switch them back to the ALWAYS tag (0x7)

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Akash Asthana <akashast@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/1594704709-26072-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13 22:43:43 -07:00
Peng Fan
d82bcef515 soc: imx: select ARM_GIC_V3 for i.MX8M
Select ARM_GIC_V3, then it is able to use gic v3 driver in aarch32
mode linux on aarch64 hardware. For aarch64 mode, it not hurts
to select ARM_GIC_V3.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 16:42:32 +08:00
Marian-Cristian Rotariu
7f8fa833dc soc: renesas: rcar-rst: Add support for RZ/G2H
Add support for RZ/G2H (R8A774E1) to the R-Car RST driver.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13 10:34:41 +02:00
Marian-Cristian Rotariu
5b83cc42cf soc: renesas: Identify RZ/G2H
This patch adds support for identifying the RZ/G2H (r8a774e1) SoC.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13 10:34:41 +02:00
Marian-Cristian Rotariu
b88fc411e0 soc: renesas: Add Renesas R8A774E1 config option
Add configuration option for the RZ/G2H (R8A774E1) SoC.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13 10:34:41 +02:00
Marian-Cristian Rotariu
f446ade095 soc: renesas: rcar-sysc: Add r8a774e1 support
Add support for RZ/G2H (R8A774E1) SoC power areas to the R-Car SYSC
driver.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13 10:34:41 +02:00
Peng Fan
7f6e8dffc3 soc: imx: check ls1021a
fsl,ls1021a is a mach under arch/arm/mach-imx/, however it could
not use the soc driver which will break caam on ls1021a platform.

So directly return if it is compatible with fsl,ls1021a.

Fixes: 52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 16:28:02 +08:00
Anson Huang
a24015fa8b firmware: imx: Move i.MX SCU soc driver into imx firmware folder
The i.MX SCU soc driver depends on SCU firmware driver, so it has to
use platform driver model for proper defer probe operation, since
it has no device binding in DT file, a simple platform device is
created together inside the platform driver. To make it more clean,
we can just move the entire SCU soc driver into imx firmware folder
and initialized by i.MX SCU firmware driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 10:02:00 +08:00
Ilia Lin
6d0efeb14b soc: qcom: Separate kryo l2 accessors from PMU driver
The driver provides kernel level API for other drivers
to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and
making it public to allow other drivers use it.
The accesses must be separated with a single spinlock,
maintained in this driver.

Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1593766185-16346-2-git-send-email-loic.poulain@linaro.org
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-10 17:08:55 -07:00
Arnd Bergmann
86aa160820 SoC attributes update for v5.9
1. Addition of ARM SMCCC ARCH_SOC_ID support
 2. Usage of the custom soc attribute groups already supported in the
    infrastucture instead of device_create_file which eliminates the need
    for any cleanup when soc is unregistered
 3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
    direct __ATTR
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl8DT9UACgkQAEG6vDF+
 4pjgmRAA1QoAG83PSis0r3w+mNnR23Qi4CsE1mQlJsQkhK+kfaimegAAOyaVKJc+
 +rI8Q0NdaJBxuXeMh4p9S9gVSr8wjXrAWDGWV9vHKmRUlkhGzSUdpxJ+jsqBEnW5
 FvgEkDyHLYkl82Gtq5sT8gvN8G/RTkNVj3by8W7Zuret6N6mGmpUTvCwwf6MQqQi
 IvoeCVWpkxHx9dST+C6e0hePuhdIeF6db55nZ1kJUTl8uCv+GU6neDJxpjjBPhzj
 U2FSrSbfi66LF1ZkdJ+1AkL3+yHQ6aAHmL9EO3rUyT+BucZWQ1tFV2KYZ/zLQJmw
 IilkSImu6e8HqthmAyGCalYs/MQ9LMuolVsOQCRl+ljVyui/jtjn8260klv7wv/Y
 R8PCkrf3rLI23WVLCm+CM1S4tjO+pNHT/DPqRT0Dbo3wnPE00L3mPBGlSK1eOs71
 2HZJO3dkzL3OH6rY31ItrZYq5Qh4cugvfAG8D62jG+UNAfs1yn60zWuyskaW8UrD
 c2r239Ba4rqdNUy6DZ7Zb/KzTg9nXeTciMTD9OFu/1im2gAxisGPl74+OhBlPTBP
 hdCcDAtfvjkr1PTvSgdn//EWADbWq1frvSKEdiS1nwoGzq9MACoq6iSQnPyAU0d9
 jQYa8rMZSse9dvEfIplVl0E2gX/3/Fut9L7/RoYkmtFAjsIVxpI=
 =JTXs
 -----END PGP SIGNATURE-----

Merge tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers

SoC attributes update for v5.9

1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
   infrastucture instead of device_create_file which eliminates the need
   for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
   direct __ATTR

* tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: smccc: Add ARCH_SOC_ID support
  ARM: OMAP2: Use custom soc attribute group instead of device_create_file
  ARM: OMAP2: Switch to use DEVICE_ATTR_RO()
  soc: ux500: Use custom soc attribute group instead of device_create_file
  soc: ux500: Switch to use DEVICE_ATTR_RO()
  soc: integrator: Use custom soc attribute group instead of device_create_file
  soc: integrator: Switch to use DEVICE_ATTR_RO()
  soc: realview: Use custom soc attribute group instead of device_create_file
  soc: realview: Switch to use DEVICE_ATTR_RO()

Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-06 21:05:20 +02:00
Sudeep Holla
d7a1a4f47d soc: ux500: Use custom soc attribute group instead of device_create_file
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.

Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.

Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.

Link: https://lore.kernel.org/r/20200523170859.50003-7-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:06 +01:00
Sudeep Holla
208b5899a0 soc: ux500: Switch to use DEVICE_ATTR_RO()
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.

Link: https://lore.kernel.org/r/20200523170859.50003-6-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:06 +01:00
Sudeep Holla
be0db32f13 soc: integrator: Use custom soc attribute group instead of device_create_file
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.

Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.

Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.

Link: https://lore.kernel.org/r/20200523170859.50003-5-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:05 +01:00
Sudeep Holla
734776eb16 soc: integrator: Switch to use DEVICE_ATTR_RO()
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.

Link: https://lore.kernel.org/r/20200523170859.50003-4-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:05 +01:00
Sudeep Holla
99d50b9b8c soc: realview: Use custom soc attribute group instead of device_create_file
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.

Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.

Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.

Link: https://lore.kernel.org/r/20200523170859.50003-3-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:05 +01:00
Sudeep Holla
5feebc6564 soc: realview: Switch to use DEVICE_ATTR_RO()
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.

Link: https://lore.kernel.org/r/20200523170859.50003-2-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06 09:48:05 +01:00
Herbert Xu
7999096fa9 iov_iter: Move unnecessary inclusion of crypto/hash.h
The header file linux/uio.h includes crypto/hash.h which pulls in
most of the Crypto API.  Since linux/uio.h is used throughout the
kernel this means that every tiny bit of change to the Crypto API
causes the entire kernel to get rebuilt.

This patch fixes this by moving it into lib/iov_iter.c instead
where it is actually used.

This patch also fixes the ifdef to use CRYPTO_HASH instead of just
CRYPTO which does not guarantee the existence of ahash.

Unfortunately a number of drivers were relying on linux/uio.h to
provide access to linux/slab.h.  This patch adds inclusions of
linux/slab.h as detected by build failures.

Also skbuff.h was relying on this to provide a declaration for
ahash_request.  This patch adds a forward declaration instead.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-06-30 09:34:23 -04:00
Christian Hewitt
d16d0481e6 soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
Correct the SoC revision and package bits/mask values for S905D3/X3 to detect
a wider range of observed SoC IDs, and tweak sort order for A311D/S922X.

S905X3 05 0000 0101  (SEI610 initial devices)
S905X3 10 0001 0000  (ODROID-C4 and recent Android boxes)
S905X3 50 0101 0000  (SEI610 later revisions)
S905D3 04 0000 0100  (VIM3L devices in kernelci)
S905D3 b0 1011 0000  (VIM3L initial production)

Fixes commit c9cc9bec36 ("soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs")

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200609081318.28023-1-christianshewitt@gmail.com
2020-06-29 16:00:53 -07:00
Linus Torvalds
f7db192b2d ARM: OMAP fixes for v5.8
The OMAP developers are particularly active at hunting down regressions,
 so this is a separate branch with OMAP specific fixes for the v5.8:
 
 As Tony explains
  "The recent display subsystem (DSS) related platform data changes
   caused display related regressions for suspend and resume. Looks like
   I only tested suspend and resume before dropping the legacy platform
   data, and forgot to test it after dropping it. Turns out the main issue
   was that we no longer have platform code calling pm_runtime_suspend
   for DSS like we did for the legacy platform data case, and that fix
   is still being discussed on the dri-devel list and will get merged
   separately. The DSS related testing exposed a pile other other display
   related issues that also need fixing though":
 
  - Fix ti-sysc optional clock handling and reset status checks
    for devices that reset automatically in idle like DSS
 
  - Ignore ti-sysc clockactivity bit unless separately requested
    to avoid unexpected performance issues
 
  - Init ti-sysc framedonetv_irq to true and disable for am4
 
  - Avoid duplicate DSS reset for legacy mode with dts data
 
  - Remove LCD timings for am4 as they cause warnings now that we're
    using generic panels
 
 Other OMAP changes from Tony include:
 
  - Fix omap_prm reset deassert as we still have drivers setting the
    pm_runtime_irq_safe() flag
 
  - Flush posted write for ti-sysc enable and disable
 
  - Fix droid4 spi related errors with spi flags
 
  - Fix am335x USB range and a typo for softreset
 
  - Fix dra7 timer nodes for clocks for IPU and DSP
 
  - Drop duplicate mailboxes after mismerge for dra7
 
  - Prevent pocketgeagle header line signal from accidentally setting
    micro-SD write protection signal by removing the default mux
 
  - Fix NFSroot flakeyness after resume for duover by switching the
    smsc911x gpio interrupt to back to level sensitive
 
  - Fix regression for omap4 clockevent source after recent system
    timer changes
 
  - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
    phy-mode
 
  - One patch to convert am3/am4 DT files to use the regular sdhci-omap
    driver instead of the old hsmmc driver, this was meant for the
    merge window but got lost in the process.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl74u60ACgkQmmx57+YA
 GNmxdQ/+IOpnASgGXCurT9E6fqst5mLTxlZiPDc+lxyIwMVW2naTf0ByzJgjekVV
 tn7qXbKn+WUpzcuxuAg14FF88WsSgzV64aLjbUfTde4vqtYpTpd3SArM6EQ26JMH
 1LBSjmwMnF7OjTYYZF6ImHe9qGlPHPR+Dyg6n3bGC04r6gmV9OJsE9X30RUeqAGg
 arC6bJqn/4zDak1015WpnxXjEXVD+APOkZgJpu1ll15aiSFmICTiLvBTqXf1r91P
 jSDs6Z46E/gPtz1EvJ0GNXnRw+PBLyUMiAa/CzdELfqIOjQ2aHvZLY4ht4EtWY0P
 zd/FHibO+KrFklySpjUbgHfGpoANSkFIjtGyBKqEH05P44H3DpCIyGF+6lcE1O44
 7R1ztRcUa49Z1druc4n3KFQ2G9Ts8px4hcUQZLjPAR9wgCxBs2gi43joQdW+AnTr
 xqbHo4aePook/vu1r96KQbw6PSrMmd4Poy7gmrQeBZlAI2cLeRvvgJMukpDEsGXA
 1Vw7RhM0lzGHegZ58zvBwCwcYQO6c/q722SFGBD6fJ4SG+9yRim/hsu+QFy629a/
 pphGUsTDTkgasxY/aQ/k7NLpxMHITliRBGUx5KC8fnVPkRGVCxsOYt4HFBrk2GtO
 WoO5d9qRbnWzXQAUzk8bdjlE6NXJACGyJ5Swgzzm7tCZ1tbufjI=
 =FFTv
 -----END PGP SIGNATURE-----

Merge tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM OMAP fixes from Arnd Bergmann:
 "The OMAP developers are particularly active at hunting down
  regressions, so this is a separate branch with OMAP specific
  fixes for v5.8:

  As Tony explains
    "The recent display subsystem (DSS) related platform data changes
     caused display related regressions for suspend and resume. Looks
     like I only tested suspend and resume before dropping the legacy
     platform data, and forgot to test it after dropping it. Turns out
     the main issue was that we no longer have platform code calling
     pm_runtime_suspend for DSS like we did for the legacy platform data
     case, and that fix is still being discussed on the dri-devel list
     and will get merged separately. The DSS related testing exposed a
     pile other other display related issues that also need fixing
     though":

   - Fix ti-sysc optional clock handling and reset status checks for
     devices that reset automatically in idle like DSS

   - Ignore ti-sysc clockactivity bit unless separately requested to
     avoid unexpected performance issues

   - Init ti-sysc framedonetv_irq to true and disable for am4

   - Avoid duplicate DSS reset for legacy mode with dts data

   - Remove LCD timings for am4 as they cause warnings now that we're
     using generic panels

  Other OMAP changes from Tony include:

   - Fix omap_prm reset deassert as we still have drivers setting the
     pm_runtime_irq_safe() flag

   - Flush posted write for ti-sysc enable and disable

   - Fix droid4 spi related errors with spi flags

   - Fix am335x USB range and a typo for softreset

   - Fix dra7 timer nodes for clocks for IPU and DSP

   - Drop duplicate mailboxes after mismerge for dra7

   - Prevent pocketgeagle header line signal from accidentally setting
     micro-SD write protection signal by removing the default mux

   - Fix NFSroot flakeyness after resume for duover by switching the
     smsc911x gpio interrupt to back to level sensitive

   - Fix regression for omap4 clockevent source after recent system
     timer changes

   - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
     phy-mode

   - One patch to convert am3/am4 DT files to use the regular sdhci-omap
     driver instead of the old hsmmc driver, this was meant for the
     merge window but got lost in the process"

* tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
  ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
  ARM: dts: Fix omap4 system timer source clocks
  ARM: dts: Fix duovero smsc interrupt for suspend
  ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect
  Revert "bus: ti-sysc: Increase max softreset wait"
  ARM: dts: am437x-epos-evm: remove lcd timings
  ARM: dts: am437x-gp-evm: remove lcd timings
  ARM: dts: am437x-sk-evm: remove lcd timings
  ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
  ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
  ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
  ARM: dts: Fix am33xx.dtsi USB ranges length
  bus: ti-sysc: Increase max softreset wait
  ARM: OMAP2+: Fix legacy mode dss_reset
  bus: ti-sysc: Fix uninitialized framedonetv_irq
  bus: ti-sysc: Ignore clockactivity unless specified as a quirk
  bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
  ARM: dts: omap4-droid4: Fix spi configuration and increase rate
  bus: ti-sysc: Flush posted write on enable and disable
  soc: ti: omap-prm: use atomic iopoll instead of sleeping one
  ...
2020-06-28 14:57:14 -07:00
Arnd Bergmann
42d3f7e8da i.MX fixes for 5.8:
- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
   trees.
 - Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
 - Fix watchdog configuration in imx6ul-kontron device tree.
 - Fix one build warning seen on building soc-imx8m driver with
   x86_64-randconfig.
 - Add missing put_device() call for a couple of mach-imx PM functions.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7zM08UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5HNAf+Kw6EPNxYom/MJ4P92gxLAtPA6AO4
 +WuLYmSphhgmGAQLFU4UiTH/2sYXmT7fSDwLhfZI5XJp6j8J89Hxe2kyMomvIT92
 Xbbzp7fr+2FPGgyI6ImiKTFeSZiT0LPq5fs1uF2lTP6+/SklF9yy5ynUvNULrD4b
 iSAXOZkMz6Ft8dn1zYrTKPIYfsTe1zXsDgw8a9sc+0LfgiR5cBTq359jHrN5Q0Tq
 NYoOHT+8V5C8BVmzp5I1zoghZEayPT2Ui1JIwBiyVij8KqZvYY3wckjPqgdfQ1vK
 IzGksPWRojKAw2RKA59kpUR/pgoZH3GYnfjmCAIOkMnMSgAqz1inZZq2oA==
 =iERQ
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8:

- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
  trees.
- Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
- Fix watchdog configuration in imx6ul-kontron device tree.
- Fix one build warning seen on building soc-imx8m driver with
  x86_64-randconfig.
- Add missing put_device() call for a couple of mach-imx PM functions.

* tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx8m: fix build warning
  ARM: imx6: add missing put_device() call in imx6q_suspend_init()
  ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()
  soc: imx8m: Correct i.MX8MP UID fuse offset
  ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
  ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
  arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2
  arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
  arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range

Link: https://lore.kernel.org/r/20200624111725.GA24312@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:48:19 +02:00
Arnd Bergmann
5b75f16f13 Fixes for omaps for v5.8
The recent display subsystem (DSS) related platform data changes caused
 display related regressions for suspend and resume. Looks like I only
 tested suspend and resume before dropping the legacy platform data, and
 forgot to test it after dropping it. Turns out the main issue was that
 we no longer have platform code calling pm_runtime_suspend for DSS like
 we did for the legacy platform data case, and that fix is still being
 discussed on the dri-devel list and will get merged separately. The DSS
 related testing exposed a pile other other display related issues that
 also need fixing though:
 
 - Fix ti-sysc optional clock handling and reset status checks
   for devices that reset automatically in idle like DSS
 
 - Ignore ti-sysc clockactivity bit unless separately requested
   to avoid unexpected performance issues
 
 - Init ti-sysc framedonetv_irq to true and disable for am4
 
 - Avoid duplicate DSS reset for legacy mode with dts data
 
 - Remove LCD timings for am4 as they cause warnings now that we're
   using generic panels
 
 Then there is a pile of other fixes not related to the DSS:
 
 - Fix omap_prm reset deassert as we still have drivers setting the
   pm_runtime_irq_safe() flag
 
 - Flush posted write for ti-sysc enable and disable
 
 - Fix droid4 spi related errors with spi flags
 
 - Fix am335x USB range and a typo for softreset
 
 - Fix dra7 timer nodes for clocks for IPU and DSP
 
 - Drop duplicate mailboxes after mismerge for dra7
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl7iS6oRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPLLBAAzcABBnwfnk+vjSHJ9QnQ/9LfJTLUIrkH
 ZpB/CR6VC86STjpePaNpVN/fm5sODN4zvtpsuAvJgyF+9Hp3GRPxglC4g9cAmU8x
 VFQepzgOLOQ/ubPesVWa14RgAoK29GNvfzihCKGmhOq7kz7I/PDIQr8txjw8KHqV
 M8oVefWL6l95z1MwVEKvsebyloBwYx9q/+Q5bipoV/GvrQnMjaCFzEaO6n8nH0Xc
 T6XsKA+4hCr94tHM3jgfSdIQYFrq38H84t986ExMVfIhh3LfNkNu7CrSIWcjTgEY
 jAs/hnPQ/JzMuBivweCrfkpQYy4D/GOjueQJy2Mf3deMJUWEsgZzMOML743W307j
 HvGB5c3i1HgXir6PtjQFP4RqQQpQN1b4xjYEgvd8SB6xnrbdP43YsNrm9gnqbWd8
 yNqiY2+uEh7OFyOJe0Ikrr1DNh3K0dSmtqrdhtWor165W0sAqlgjFjrjH1/xcQrN
 XWhjBCl/NAODNZqbxU4l6rjiSU8J0cGr8wJrZNLe4itZy9R2jPInTv8FSpfcNI32
 cVdDfPc4SVl8zsfZq4vhDrS/JVG7Sp/DXXQIG04wMlA6vyK4YAHh0U40121aAE8E
 AwzOh++cCeZPQB+i3qCkRMLDohC7IJVvZZ/KN1mp43dDEW+epx5tct0ZmfElr4uX
 Vg84CHL/I28=
 =fT9A
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.8

The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:

- Fix ti-sysc optional clock handling and reset status checks
  for devices that reset automatically in idle like DSS

- Ignore ti-sysc clockactivity bit unless separately requested
  to avoid unexpected performance issues

- Init ti-sysc framedonetv_irq to true and disable for am4

- Avoid duplicate DSS reset for legacy mode with dts data

- Remove LCD timings for am4 as they cause warnings now that we're
  using generic panels

Then there is a pile of other fixes not related to the DSS:

- Fix omap_prm reset deassert as we still have drivers setting the
  pm_runtime_irq_safe() flag

- Flush posted write for ti-sysc enable and disable

- Fix droid4 spi related errors with spi flags

- Fix am335x USB range and a typo for softreset

- Fix dra7 timer nodes for clocks for IPU and DSP

- Drop duplicate mailboxes after mismerge for dra7

* tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  Revert "bus: ti-sysc: Increase max softreset wait"
  ARM: dts: am437x-epos-evm: remove lcd timings
  ARM: dts: am437x-gp-evm: remove lcd timings
  ARM: dts: am437x-sk-evm: remove lcd timings
  ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
  ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
  ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
  ARM: dts: Fix am33xx.dtsi USB ranges length
  bus: ti-sysc: Increase max softreset wait
  ARM: OMAP2+: Fix legacy mode dss_reset
  bus: ti-sysc: Fix uninitialized framedonetv_irq
  bus: ti-sysc: Ignore clockactivity unless specified as a quirk
  bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
  ARM: dts: omap4-droid4: Fix spi configuration and increase rate
  bus: ti-sysc: Flush posted write on enable and disable
  soc: ti: omap-prm: use atomic iopoll instead of sleeping one

Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:41:55 +02:00
Akash Asthana
048eb908a1 soc: qcom-geni-se: Add interconnect support to fix earlycon crash
QUP core clock is shared among all the SE drivers present on particular
QUP wrapper, the system will reset(unclocked access) if earlycon used after
QUP core clock is put to 0 from other SE drivers before real console comes
up.

As earlycon can't vote for it's QUP core need, to fix this add ICC
support to common/QUP wrapper driver and put vote for QUP core from
probe on behalf of earlycon and remove vote during earlycon exit call.

Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reported-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1592908737-7068-3-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 21:49:52 -07:00
Akash Asthana
58ffbba6a3 soc: qcom: geni: Support for ICC voting
Add necessary macros and structure variables to support ICC BW
voting from individual SE drivers.

Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1592908737-7068-2-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 21:49:00 -07:00
Douglas Anderson
be24c6a71e soc: qcom: rpmh-rsc: Don't use ktime for timeout in write_tcs_reg_sync()
The write_tcs_reg_sync() may be called after timekeeping is suspended
so it's not OK to use ktime.  The readl_poll_timeout_atomic() macro
implicitly uses ktime.  This was causing a warning at suspend time.

Change to just loop 1000000 times with a delay of 1 us between loops.
This may give a timeout of more than 1 second but never less and is
safe even if timekeeping is suspended.

NOTE: I don't have any actual evidence that we need to loop here.
It's possibly that all we really need to do is just read the value
back to ensure that the pipes are cleaned and the looping/comparing is
totally not needed.  I never saw the loop being needed in my tests.
However, the loop shouldn't hurt.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Fixes: 91160150ab ("soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()")
Reported-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200528074530.1.Ib86e5b406fe7d16575ae1bb276d650faa144b63c@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 15:41:32 -07:00
Peng Fan
a721321446 soc: imx8m: fix build warning
Fix the build warning with x86_64-randconfig
>> drivers/soc/imx/soc-imx8m.c:150:34: warning: unused variable
>> 'imx8_soc_match' [-Wunused-const-variable]
static const struct of_device_id imx8_soc_match[] = { ^

Fixes: fc40200ebf ("soc: imx: increase build coverage for imx8m soc driver")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-24 14:33:28 +08:00
Konrad Dybcio
a9541d2e8a soc: qcom: smd-rpm: Add msm8994 compatible
Add the compatible for the RPM in msm8994.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200602200407.320908-1-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 15:58:33 -07:00
Dmitry Baryshkov
6f7b224954 soc: qcom: socinfo: add SM8250 entry to soc_id array
Add an entry for SM8250 SoC.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200525164817.2938638-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 12:44:13 -07:00
Dmitry Baryshkov
50f85d1620 soc: qcom: socinfo: add file with SoC info format version
To ease debugging socinfo driver for newer chips add debugfs file
returning SoC info format version.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200525164817.2938638-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 12:43:51 -07:00
Dmitry Baryshkov
e9247e2ce5 soc: qcom: socinfo: fix printing of pmic_model
Print sensible string instead of just "(null)" for unknown PMIC models.
Also as we are at it, do not let debugfs handler access past pmic_models
array.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200525164817.2938638-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 12:43:47 -07:00
Dmitry Baryshkov
0f12fe7f1e soc: qcom: socinfo: add support for newer socinfo data
Add support for newer Qualcomm SoC info structures (up to version 0.15).

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200525164817.2938638-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 12:43:43 -07:00
Anson Huang
c95c9693b1 soc: imx8m: Correct i.MX8MP UID fuse offset
Correct i.MX8MP UID fuse offset according to fuse map:

UID_LOW: 0x420
UID_HIGH: 0x430

Fixes: fc40200ebf ("soc: imx: increase build coverage for imx8m soc driver")
Fixes: 18f662a738 ("soc: imx: Add i.MX8MP SoC driver support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23 19:45:21 +08:00
Peng Fan
f42f3e7f4d soc: imx: scu: use devm_kasprintf
Use devm_kasprintf to simplify code

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23 15:12:41 +08:00
Konrad Dybcio
d6e52482f5 drivers: soc: Add MSM8936 SMD RPM compatible
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20200613072745.1249003-4-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23 00:07:26 -07:00
Maulik Shah
73edcd38d7 soc: qcom: rpmh: Update rpmh_invalidate function to return void
Currently rpmh_invalidate() always returns success. Update its
return type to void.

Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592485553-29163-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-22 14:23:46 -07:00
Lina Iyer
681b091238 soc: qcom: rpmh: Allow RPMH on ARM SoC
Remove config restriction for RPMH on ARM64 platforms only.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Link: https://lore.kernel.org/r/1590750158-20661-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-22 14:23:20 -07:00
Maulik Shah
1a53ce9ab4 soc: qcom: rpmh-rsc: Set suppress_bind_attrs flag
rpmh-rsc driver is fairly core to system and should not be removable
once its probed. However it allows to unbind driver from sysfs using
below command which results into a crash on sc7180.

echo 18200000.rsc > /sys/bus/platform/drivers/rpmh/unbind

Lets prevent unbind at runtime by setting suppress_bind_attrs flag.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592808805-2437-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-22 12:23:05 -07:00
Dennis YC Hsieh
7de796cac4 soc: mediatek: cmdq: add set event function
Add set event function in cmdq helper functions to set specific event.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1592749115-24158-12-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:21:00 +02:00
Dennis YC Hsieh
995818588b soc: mediatek: cmdq: export finalize function
Export finalize function to client which helps append eoc and jump
command to pkt. Let client decide call finalize or not.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/1592749115-24158-9-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:12:46 +02:00
Dennis YC Hsieh
613c2e2c7e soc: mediatek: cmdq: add assign function
Add assign function in cmdq helper which assign constant value into
internal register by index.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1592749115-24158-3-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:03:05 +02:00
Konrad Dybcio
30dee220c8 soc: qcom: socinfo: Add socinfo entry for SDM630
This patch adds missing soc ID for SDM630.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200622075749.21925-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-22 01:04:47 -07:00
Dan Carpenter
a6f2f0fdc7 soc: xilinx: Fix error code in zynqmp_pm_probe()
This should be returning PTR_ERR() but it returns IS_ERR() instead.

Fixes: ffdbae28d9 ("drivers: soc: xilinx: Use mailbox IPI callback")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20200605110020.GA978434@mwanda
2020-06-18 10:07:17 +02:00
Gustavo A. R. Silva
9f162d9d72 soc: ti: Replace zero-length array with flexible-array
There is a regular need in the kernel to provide a way to declare having a
dynamically sized set of trailing elements in a structure. Kernel code should
always use “flexible array members”[1] for these cases. The older style of
one-element or zero-length arrays should no longer be used[2].

[1] https://en.wikipedia.org/wiki/Flexible_array_member
[2] https://github.com/KSPP/linux/issues/21

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-06-15 23:08:32 -05:00
Masahiro Yamada
a7f7f6248d treewide: replace '---help---' in Kconfig files with 'help'
Since commit 84af7a6194 ("checkpatch: kconfig: prefer 'help' over
'---help---'"), the number of '---help---' has been gradually
decreasing, but there are still more than 2400 instances.

This commit finishes the conversion. While I touched the lines,
I also fixed the indentation.

There are a variety of indentation styles found.

  a) 4 spaces + '---help---'
  b) 7 spaces + '---help---'
  c) 8 spaces + '---help---'
  d) 1 space + 1 tab + '---help---'
  e) 1 tab + '---help---'    (correct indentation)
  f) 1 tab + 1 space + '---help---'
  g) 1 tab + 2 spaces + '---help---'

In order to convert all of them to 1 tab + 'help', I ran the
following commend:

  $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-06-14 01:57:21 +09:00
Linus Torvalds
abfbb29297 remoteproc updates for v5.8
This introduces device managed versions of functions used to register
 remoteproc devices, add support for remoteproc driver specific resource
 control, enables remoteproc drivers to specify ELF class and machine for
 coredumps. It integrates pm_runtime in the core for keeping resources
 active while the remote is booted and holds a wake source while
 recoverying a remote processor after a firmware crash.
 
 It refactors the remoteproc device's allocation path to simplify the
 logic, fix a few cleanup bugs and to not clone const strings onto the
 heap. Debugfs code is simplifies using the DEFINE_SHOW_ATTRIBUTE and a
 zero-length array is replaced with flexible-array.
 
 A new remoteproc driver for the JZ47xx VPU is introduced, the Qualcomm
 SM8250 gains support for audio, compute and sensor remoteprocs and the
 Qualcomm SC7180 modem support is cleaned up and improved.
 
 The Qualcomm glink subsystem-restart driver is merged into the main
 glink driver, the Qualcomm sysmon driver is extended to properly notify
 remote processors about all other remote processors' state transitions.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7egk0bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FQnwQAM781m7BqSKdtbH0OzGB
 K4jGX/IkWCEluXx/RuDbPFV0mx/yLOfsrSzBBYnnTl+CXTgSLFtImRvwx5BFbnAl
 bRNbSlw1GLiV/w+HceIx1iKTELnkHKp4TT3zUmR+dZ+7pT1dhWXzHIjyjJPC1c7R
 L8qg3qlOrM620y3OJNUo57/20Tg9WN6kBKdaeyJKjmBsENrw6wggY30ijqhMgCYr
 9LgStPjtuSGgf4j55+BeTskVSnOvuun5NlVpRUVTo+ZDKTZAyO/8TKM+yWffAHc5
 7WkK0z9E3lhwdNPLif+dSIvhLjiyKR2yJf5KP7n9mFhA1tRVqNXnJqMCnAnwVvzT
 IpL1INYbirRwPfayhCsUSwKDTKkckKP9I/vZ7WKWJD9SWcc4eGWIifNDNGkMQ6qV
 7S0+6AyCANBltRPKTl6zwXSrrHuBUNkH3r9gddT5tPJu7Klh+fjKEywpsXkUd+IY
 Xo1nuT+mYrUgif0KTh656EK6YM5dFuVnZqOszzgiVUrdKeHKYBsUjWD7vS7DBeLe
 pLiDfo0qMb/J0sPptMt+0Rg/b/Nt1YiddW3ZlnVmWRCRjIQRJt9LQZcQoVhVv1Sa
 OQkhlvFTqIEFJfLtvp83zvL5WngxVM5Dq6mDiesAjZUhyode9ZtOGxr9zyhA4ApU
 njqp4n16OxcXaqjwp+k6eK8L
 =4k54
 -----END PGP SIGNATURE-----

Merge tag 'rproc-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This introduces device managed versions of functions used to register
  remoteproc devices, add support for remoteproc driver specific
  resource control, enables remoteproc drivers to specify ELF class and
  machine for coredumps. It integrates pm_runtime in the core for
  keeping resources active while the remote is booted and holds a wake
  source while recoverying a remote processor after a firmware crash.

  It refactors the remoteproc device's allocation path to simplify the
  logic, fix a few cleanup bugs and to not clone const strings onto the
  heap. Debugfs code is simplifies using the DEFINE_SHOW_ATTRIBUTE and a
  zero-length array is replaced with flexible-array.

  A new remoteproc driver for the JZ47xx VPU is introduced, the Qualcomm
  SM8250 gains support for audio, compute and sensor remoteprocs and the
  Qualcomm SC7180 modem support is cleaned up and improved.

  The Qualcomm glink subsystem-restart driver is merged into the main
  glink driver, the Qualcomm sysmon driver is extended to properly
  notify remote processors about all other remote processors' state
  transitions"

* tag 'rproc-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc: (43 commits)
  remoteproc: Fix an error code in devm_rproc_alloc()
  MAINTAINERS: Add myself as reviewer for Ingenic rproc driver
  remoteproc: ingenic: Added remoteproc driver
  remoteproc: Add support for runtime PM
  dt-bindings: Document JZ47xx VPU auxiliary processor
  remoteproc: wcss: Fix arguments passed to qcom_add_glink_subdev()
  remoteproc: Fix and restore the parenting hierarchy for vdev
  remoteproc: Fall back to using parent memory pool if no dedicated available
  remoteproc: Replace zero-length array with flexible-array
  remoteproc: wcss: add support for rpmsg communication
  remoteproc: core: Prevent system suspend during remoteproc recovery
  remoteproc: qcom_q6v5_mss: Remove unused q6v5_da_to_va function
  remoteproc: qcom_q6v5_mss: map/unmap mpss segments before/after use
  remoteproc: qcom_q6v5_mss: Drop accesses to MPSS PERPH register space
  dt-bindings: remoteproc: qcom: Replace halt-nav with spare-regs
  remoteproc: qcom: pas: Add SM8250 PAS remoteprocs
  dt-bindings: remoteproc: qcom: pas: Add SM8250 remoteprocs
  remoteproc: qcom_q6v5_mss: Extract mba/mpss from memory-region
  dt-bindings: remoteproc: qcom: Use memory-region to reference memory
  remoteproc: qcom: pas: Add SC7180 Modem support
  ...
2020-06-08 13:01:08 -07:00
Tony Lindgren
4263eb6880 Merge branch 'fixes-v5.7' into fixes 2020-06-08 10:14:49 -07:00
Linus Torvalds
9aa900c809 Char/Misc driver patches for 5.8-rc1
Here is the large set of char/misc driver patches for 5.8-rc1
 
 Included in here are:
 	- habanalabs driver updates, loads
 	- mhi bus driver updates
 	- extcon driver updates
 	- clk driver updates (approved by the clock maintainer)
 	- firmware driver updates
 	- fpga driver updates
 	- gnss driver updates
 	- coresight driver updates
 	- interconnect driver updates
 	- parport driver updates (it's still alive!)
 	- nvmem driver updates
 	- soundwire driver updates
 	- visorbus driver updates
 	- w1 driver updates
 	- various misc driver updates
 
 In short, loads of different driver subsystem updates along with the
 drivers as well.
 
 All have been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXtzkHw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yldOwCgus/DgpnI1UL4z+NdBxJrAXtkPmgAn2sgTUea
 i5RblCmcVMqvHaGtYkY+
 =tScN
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the large set of char/misc driver patches for 5.8-rc1

  Included in here are:

   - habanalabs driver updates, loads

   - mhi bus driver updates

   - extcon driver updates

   - clk driver updates (approved by the clock maintainer)

   - firmware driver updates

   - fpga driver updates

   - gnss driver updates

   - coresight driver updates

   - interconnect driver updates

   - parport driver updates (it's still alive!)

   - nvmem driver updates

   - soundwire driver updates

   - visorbus driver updates

   - w1 driver updates

   - various misc driver updates

  In short, loads of different driver subsystem updates along with the
  drivers as well.

  All have been in linux-next for a while with no reported issues"

* tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
  habanalabs: correctly cast u64 to void*
  habanalabs: initialize variable to default value
  extcon: arizona: Fix runtime PM imbalance on error
  extcon: max14577: Add proper dt-compatible strings
  extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
  extcon: remove redundant assignment to variable idx
  w1: omap-hdq: print dev_err if irq flags are not cleared
  w1: omap-hdq: fix interrupt handling which did show spurious timeouts
  w1: omap-hdq: fix return value to be -1 if there is a timeout
  w1: omap-hdq: cleanup to add missing newline for some dev_dbg
  /dev/mem: Revoke mappings when a driver claims the region
  misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
  misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
  misc: xilinx-sdfec: improve get_user_pages_fast() error handling
  nvmem: qfprom: remove incorrect write support
  habanalabs: handle MMU cache invalidation timeout
  habanalabs: don't allow hard reset with open processes
  habanalabs: GAUDI does not support soft-reset
  habanalabs: add print for soft reset due to event
  habanalabs: improve MMU cache invalidation code
  ...
2020-06-07 10:59:32 -07:00
Linus Torvalds
435faf5c21 RISC-V Patches for the 5.8 Merge Window, Part 1
* The remainder of the code necessary to support the Kendryte K210.
     * Support for building device trees into the kernel, as the K210 doesn't
       have a bootloader that provides one.
     * A K210 device tree and the associated defconfig update.
     * Support for skipping PMP initialization on systems that trap on PMP
       accesses rather than treating them as WARL.
 * Support for KGDB.
 * Improvements to text patching.
 * Some cleanups to the SiFive L2 cache driver.
 
 I may have a second part, but I wanted to get this out earlier rather than
 later as they've been ready to go for a while now.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAl7YRtMTHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYif+oD/4kaoQqmiw0VvyFjBlPT/TC7OPbaoXO
 5WBegSEAl+oOq+fUtjHomzn6HaTW2cPNexsqC/KuGP1/QL0OQ23T5O18LaCmrGMd
 CvELeAcvu6G4kbRuHwF0U16hBI2A1xIYVUJ8qmbuHPpEwVel3AsP2RIjQ+bOvm7g
 fVTIrlzl1s1eTsOXdOJb3sFZtISHb7o3lHZmcplDva3N13x8E0FrjuoJhHv0f2mj
 kcmZcy3sr8luAkwAJmbqmdPuwYTlteMnucXdCUv/kG2SaPkBwU5TS+MN7No2ylXH
 v4vxjkuSyJ1db72pla6uUB/cYD+mh2YI4tjjvH93s3k4I/GZMCrqivXZW2QtxBdt
 na++GxK8e4FrBG+VCCCQvx2mqugpMFMDnZDt36N2BqwjOtEzO3W8GqjrKCovXtQf
 farlgAiuFNVcoo7VFdpNZE+N5elQa0GWf57csCqqMNN4J8JLaOgyS7ByozJ9b9/A
 1x4g7kQANnMvYiYAeV+C2YfBcK6x8gHEPlWio1QZqirW5la34VUEWa18+rQeSRMz
 DArKPauCR1GuYZZVUkkDI8cXj0Gs5fTXsYmn+WsIpjFHnDYeYVe6Ocmczxyb3o3O
 lQwm7+drHlSmMvgrOlWJMrIUbdiomgelDU/iD4PiZzKozC52yKDS6A5gzoG6uZSM
 UleeAIeVG/TDCw==
 =keTq
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - The remainder of the code necessary to support the Kendryte K210:

     * Support for building device trees into the kernel, as the K210
       doesn't have a bootloader that provides one

     * A K210 device tree and the associated defconfig update

     * Support for skipping PMP initialization on systems that trap on
       PMP accesses rather than treating them as WARL

 - Support for KGDB

 - Improvements to text patching

 - Some cleanups to the SiFive L2 cache driver

* tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  soc: sifive: l2 cache: Mark l2_get_priv_group as static
  soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
  riscv: Add support to determine no. of L2 cache way enabled
  riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure
  riscv: Use text_mutex instead of patch_lock
  riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotation
  riscv: Remove the 'riscv_' prefix of function name
  riscv: Add SW single-step support for KDB
  riscv: Use the XML target descriptions to report 3 system registers
  riscv: Add KGDB support
  kgdb: Add kgdb_has_hit_break function
  RISC-V: Skip setting up PMPs on traps
  riscv: K210: Update defconfig
  riscv: K210: Add a built-in device tree
  riscv: Allow device trees to be built into the kernel
2020-06-04 20:14:18 -07:00
Linus Torvalds
828f3e18e1 ARM/SoC: drivers for v5.7
These are updates to SoC specific drivers that did not have
 another subsystem maintainer tree to go through for some
 reason:
 
 - Some bus and memory drivers for the MIPS P5600 based
   Baikal-T1 SoC that is getting added through the MIPS tree.
 
 - There are new soc_device identification drivers for TI K3,
   Qualcomm MSM8939
 
 - New reset controller drivers for NXP i.MX8MP, Renesas
   RZ/G1H, and Hisilicon hi6220
 
 - The SCMI firmware interface can now work across ARM SMC/HVC
   as a transport.
 
 - Mediatek platforms now use a new driver for their "MMSYS"
   hardware block that controls clocks and some other aspects
   in behalf of the media and gpu drivers.
 
 - Some Tegra processors have improved power management
   support, including getting woken up by the PMIC and cluster
   power down during idle.
 
 - A new v4l staging driver for Tegra is added.
 
 - Cleanups and minor bugfixes for TI, NXP, Hisilicon,
   Mediatek, and Tegra.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7XvgAACgkQmmx57+YA
 GNmj/hAAnAJ/hYehLfgCe711HUntgeRkaoTVpCt8BJNMdxsa23sn3V6k5+WYn1uG
 PtlgpefZEMHLUEEVDegR4nZXLG0Pzu1SR12KW34YPcQKkNo/+vlQ9zYUajnJ/KX6
 10zdLSIzHfk1VtXKvvQQ8xFyE+S/trGmjC57E6gfoCUT3rl1maD+ccVXUBaz9oob
 wuMxGXQAl57mio5yT1OfSk6Fev39xRE2dN1hzP7KUYhsemZajBwBBW5wVJZCsCB8
 LCGmxVkavM7BV4r2NokbBDs5rlfedBl/P/IPd9Is5a5tuGUkSsVRG9zqShxYLGM3
 S06az6POQFwXKFJoUKW0dK/Koy0D7BK+vhUBPzFv4HZ8iDCVf6Jju2MJ02GMqHPj
 OOrXaCbLYrvN/edVUWeeFywqwMbYTRwC4DxyTq5m7HxEB004xTOhs0rX5aR0u4n1
 bbsR97LguolwH9iEMzd3F3jCiKBcMecH3lAh5WcrtwlFIRrNhbWoGDoA/4TuORFS
 b11rgsTRIJ5Vc++D1HnSnx0ZZvUzyluMvygdALnSgVah6xYe6KVw9Kg/wioAJ04G
 uSTidqP3qRhsyET2HQo7CxdVfZbKfP25iKCKrdhQziztKvhF8qrUmZKloXOodRw+
 ewYSRmv8c324OYYit1X43oAdW8dntq1XbSIauaqxEb4JC7x/xRY=
 =44Jc
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM/SoC driver updates from Arnd Bergmann:
 "These are updates to SoC specific drivers that did not have another
  subsystem maintainer tree to go through for some reason:

   - Some bus and memory drivers for the MIPS P5600 based Baikal-T1 SoC
     that is getting added through the MIPS tree.

   - There are new soc_device identification drivers for TI K3, Qualcomm
     MSM8939

   - New reset controller drivers for NXP i.MX8MP, Renesas RZ/G1H, and
     Hisilicon hi6220

   - The SCMI firmware interface can now work across ARM SMC/HVC as a
     transport.

   - Mediatek platforms now use a new driver for their "MMSYS" hardware
     block that controls clocks and some other aspects in behalf of the
     media and gpu drivers.

   - Some Tegra processors have improved power management support,
     including getting woken up by the PMIC and cluster power down
     during idle.

   - A new v4l staging driver for Tegra is added.

   - Cleanups and minor bugfixes for TI, NXP, Hisilicon, Mediatek, and
     Tegra"

* tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (155 commits)
  clk: sprd: fix compile-testing
  bus: bt1-axi: Build the driver into the kernel
  bus: bt1-apb: Build the driver into the kernel
  bus: bt1-axi: Use sysfs_streq instead of strncmp
  bus: bt1-axi: Optimize the return points in the driver
  bus: bt1-apb: Use sysfs_streq instead of strncmp
  bus: bt1-apb: Use PTR_ERR_OR_ZERO to return from request-regs method
  bus: bt1-apb: Fix show/store callback identations
  bus: bt1-apb: Include linux/io.h
  dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding
  memory: Add Baikal-T1 L2-cache Control Block driver
  bus: Add Baikal-T1 APB-bus driver
  bus: Add Baikal-T1 AXI-bus driver
  dt-bindings: bus: Add Baikal-T1 APB-bus binding
  dt-bindings: bus: Add Baikal-T1 AXI-bus binding
  staging: tegra-video: fix V4L2 dependency
  tee: fix crypto select
  drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static
  soc: ti: add k3 platforms chipid module driver
  dt-bindings: soc: ti: add binding for k3 platforms chipid module
  ...
2020-06-04 19:56:20 -07:00
Linus Torvalds
694b5a5d31 ARM: SoC changes for v5.8
One new platform gets added, the Realtek RTD1195, which is an older
 Cortex-a7 based relative of the RTD12xx chips that are already supported
 in arch/arm64. The platform may also be extended to support running
 32-bit kernels on those 64-bit chips for memory-constrained machines.
 
 In the Renesas shmobile platform, we gain support for "RZ/G1H" or R8A7742,
 an eight-core chip based on Cortex-A15 and Cortex-A7 cores, originally
 released in 2016 as one of the last high-end 32-bit designs.
 
 There is ongoing cleanup for the integrator, tegra, imx, and omap2
 platforms, with integrator getting very close to the goal of having
 zero code in arch/arm/, and omap2 moving more of the chip specifics
 from old board code into device tree files.
 
 The Versatile Express platform is made more modular, with built-in
 drivers now becoming loadable modules. This is part of a greater effort
 for the Android OS to have a common kernel binary for all platforms and
 any platform specific code in loadable modules.
 
 The PXA platform drops support for Compulab's pxa2xx boards that had
 rather unusual flash and PCI drivers but no known users remaining.
 All device drivers specific to those boards can now get removed as
 well.
 
 Across platforms, there is ongoing cleanup, with Geert and Rob
 revisiting some a lot of Kconfig options.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7XvmAACgkQmmx57+YA
 GNk4vRAAs3TxlwLAUk5dknAi+UstlviNPG/ys6mViFuLqktPyhkA/v6nFOBI5Ldf
 8xAsaSk3+oAX3Dd7aTaudl5WMFWFtzT5xA4gEI7CBZrBaAL0BVns1JfnVxpPRIcF
 B09Sb3wv7++E/+AxYcoVLWd5wkc9tlMesrIV5FPHHasOp3rRjVI0cExXnXzqJU8M
 TbwrWEOczZNVAm2q4Eh1ttbuSIvPd3s4NMnI755MRSQ7u/rYFSPf6Ay8/eFTqx1e
 0SMWHRmrGeP6yhLy7+Li0x0jsK3ReZ9SkLXp3iEZ9huKbBTHIPBUeBB1RMnCYGe+
 M2OL+9ySSe9UI9sjvsLGPDAnJaZI/UDUOVhatZCTvYB7CZY5nYNrYp+heYFONWm6
 Up3e1t2iGPbgs8/1y78a9YPxAdsW0iavRtjVUYb+nwX+savYZgSBATA1pZqLc317
 5FAGmTh//OLKYBSjfAxu9H8aInJPZA595lUiPHEQujzZH5Xz0QNtv4dapeNL2I4g
 LO20PMvuEgmwlwj/Npnwdl0UQK3ztoeR2upCrk91VwtNWGiOWTzCMT/OkYAAjKuo
 QYMGu3UvbbTCHPsIdrUz8gZ2T3VnJoeE3ldny2QbNAtVdpH/F8htJcilrBbyv1vI
 IKB1oogf5zfUwXVwZRxCfI9s5hELUlAKMGTtNcybzdsKpN5xtTo=
 =gzCp
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "One new platform gets added, the Realtek RTD1195, which is an older
  Cortex-a7 based relative of the RTD12xx chips that are already
  supported in arch/arm64. The platform may also be extended to support
  running 32-bit kernels on those 64-bit chips for memory-constrained
  machines.

  In the Renesas shmobile platform, we gain support for "RZ/G1H" or
  R8A7742, an eight-core chip based on Cortex-A15 and Cortex-A7 cores,
  originally released in 2016 as one of the last high-end 32-bit
  designs.

  There is ongoing cleanup for the integrator, tegra, imx, and omap2
  platforms, with integrator getting very close to the goal of having
  zero code in arch/arm/, and omap2 moving more of the chip specifics
  from old board code into device tree files.

  The Versatile Express platform is made more modular, with built-in
  drivers now becoming loadable modules. This is part of a greater
  effort for the Android OS to have a common kernel binary for all
  platforms and any platform specific code in loadable modules.

  The PXA platform drops support for Compulab's pxa2xx boards that had
  rather unusual flash and PCI drivers but no known users remaining. All
  device drivers specific to those boards can now get removed as well.

  Across platforms, there is ongoing cleanup, with Geert and Rob
  revisiting some a lot of Kconfig options"

* tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
  ARM: omap2: fix omap5_realtime_timer_init definition
  ARM: zynq: Don't select CONFIG_ICST
  ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs
  clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILE
  ARM: davinci: fix build failure without I2C
  power: reset: vexpress: fix build issue
  power: vexpress: cleanup: use builtin_platform_driver
  power: vexpress: add suppress_bind_attrs to true
  Revert "ARM: vexpress: Don't select VEXPRESS_CONFIG"
  MAINTAINERS: pxa: remove Compulab arm/pxa support
  ARM: pxa: remove Compulab pxa2xx boards
  bus: arm-integrator-lm: Fix return value check in integrator_ap_lm_probe()
  soc: imx: move cpu code to drivers/soc/imx
  ARM: imx: move cpu definitions into a header
  ARM: imx: use device_initcall for imx_soc_device_init
  ARM: imx: pcm037: make pcm970_sja1000_platform_data static
  bus: ti-sysc: Timers no longer need legacy quirk handling
  ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter
  ARM: dts: Configure system timers for omap2
  ARM: dts: Configure system timers for ti81xx
  ...
2020-06-04 19:47:11 -07:00
Linus Torvalds
cb8e59cc87 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from David Miller:

 1) Allow setting bluetooth L2CAP modes via socket option, from Luiz
    Augusto von Dentz.

 2) Add GSO partial support to igc, from Sasha Neftin.

 3) Several cleanups and improvements to r8169 from Heiner Kallweit.

 4) Add IF_OPER_TESTING link state and use it when ethtool triggers a
    device self-test. From Andrew Lunn.

 5) Start moving away from custom driver versions, use the globally
    defined kernel version instead, from Leon Romanovsky.

 6) Support GRO vis gro_cells in DSA layer, from Alexander Lobakin.

 7) Allow hard IRQ deferral during NAPI, from Eric Dumazet.

 8) Add sriov and vf support to hinic, from Luo bin.

 9) Support Media Redundancy Protocol (MRP) in the bridging code, from
    Horatiu Vultur.

10) Support netmap in the nft_nat code, from Pablo Neira Ayuso.

11) Allow UDPv6 encapsulation of ESP in the ipsec code, from Sabrina
    Dubroca. Also add ipv6 support for espintcp.

12) Lots of ReST conversions of the networking documentation, from Mauro
    Carvalho Chehab.

13) Support configuration of ethtool rxnfc flows in bcmgenet driver,
    from Doug Berger.

14) Allow to dump cgroup id and filter by it in inet_diag code, from
    Dmitry Yakunin.

15) Add infrastructure to export netlink attribute policies to
    userspace, from Johannes Berg.

16) Several optimizations to sch_fq scheduler, from Eric Dumazet.

17) Fallback to the default qdisc if qdisc init fails because otherwise
    a packet scheduler init failure will make a device inoperative. From
    Jesper Dangaard Brouer.

18) Several RISCV bpf jit optimizations, from Luke Nelson.

19) Correct the return type of the ->ndo_start_xmit() method in several
    drivers, it's netdev_tx_t but many drivers were using
    'int'. From Yunjian Wang.

20) Add an ethtool interface for PHY master/slave config, from Oleksij
    Rempel.

21) Add BPF iterators, from Yonghang Song.

22) Add cable test infrastructure, including ethool interfaces, from
    Andrew Lunn. Marvell PHY driver is the first to support this
    facility.

23) Remove zero-length arrays all over, from Gustavo A. R. Silva.

24) Calculate and maintain an explicit frame size in XDP, from Jesper
    Dangaard Brouer.

25) Add CAP_BPF, from Alexei Starovoitov.

26) Support terse dumps in the packet scheduler, from Vlad Buslov.

27) Support XDP_TX bulking in dpaa2 driver, from Ioana Ciornei.

28) Add devm_register_netdev(), from Bartosz Golaszewski.

29) Minimize qdisc resets, from Cong Wang.

30) Get rid of kernel_getsockopt and kernel_setsockopt in order to
    eliminate set_fs/get_fs calls. From Christoph Hellwig.

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2517 commits)
  selftests: net: ip_defrag: ignore EPERM
  net_failover: fixed rollback in net_failover_open()
  Revert "tipc: Fix potential tipc_aead refcnt leak in tipc_crypto_rcv"
  Revert "tipc: Fix potential tipc_node refcnt leak in tipc_rcv"
  vmxnet3: allow rx flow hash ops only when rss is enabled
  hinic: add set_channels ethtool_ops support
  selftests/bpf: Add a default $(CXX) value
  tools/bpf: Don't use $(COMPILE.c)
  bpf, selftests: Use bpf_probe_read_kernel
  s390/bpf: Use bcr 0,%0 as tail call nop filler
  s390/bpf: Maintain 8-byte stack alignment
  selftests/bpf: Fix verifier test
  selftests/bpf: Fix sample_cnt shared between two threads
  bpf, selftests: Adapt cls_redirect to call csum_level helper
  bpf: Add csum_level helper for fixing up csum levels
  bpf: Fix up bpf_skb_adjust_room helper's skb csum setting
  sfc: add missing annotation for efx_ef10_try_update_nic_stats_vf()
  crypto/chtls: IPv6 support for inline TLS
  Crypto/chcr: Fixes a coccinile check error
  Crypto/chcr: Fixes compilations warnings
  ...
2020-06-03 16:27:18 -07:00
Linus Torvalds
355ba37d75 Power management updates for 5.8-rc1
- Rework the system-wide PM driver flags to make them easier to
    understand and use and update their documentation (Rafael Wysocki,
    Alan Stern).
 
  - Allow cpuidle governors to be switched at run time regardless of
    the kernel configuration and update the related documentation
    accordingly (Hanjun Guo).
 
  - Improve the resume device handling in the user space hibernarion
    interface code (Domenico Andreoli).
 
  - Document the intel-speed-select sysfs interface (Srinivas
    Pandruvada).
 
  - Make the ACPI code handing suspend to idle print more debug
    messages to help diagnose issues with it (Rafael Wysocki).
 
  - Fix a helper routine in the cpufreq core and correct a typo in
    the struct cpufreq_driver kerneldoc comment (Rafael Wysocki, Wang
    Wenhu).
 
  - Update cpufreq drivers:
 
    * Make the intel_pstate driver start in the passive mode by
      default on systems without HWP (Rafael Wysocki).
 
    * Add i.MX7ULP support to the imx-cpufreq-dt driver and add
      i.MX7ULP to the cpufreq-dt-platdev blacklist (Peng Fan).
 
    * Convert the qoriq cpufreq driver to a platform one, make the
      platform code create a suitable device object for it and add
      platform dependencies to it (Mian Yousaf Kaukab, Geert
      Uytterhoeven).
 
    * Fix wrong compatible binding in the qcom driver (Ansuel Smith).
 
    * Build the omap driver by default for ARCH_OMAP2PLUS (Anders
      Roxell).
 
    * Add r8a7742 SoC support to the dt cpufreq driver (Lad Prabhakar).
 
  - Update cpuidle core and drivers:
 
    * Fix three reference count leaks in error code paths in the
      cpuidle core (Qiushi Wu).
 
    * Convert Qualcomm SPM to a generic cpuidle driver (Stephan
      Gerhold).
 
    * Fix up the execution order when entering a domain idle state in
      the PSCI driver (Ulf Hansson).
 
  - Fix a reference counting issue related to clock management and
    clean up two oddities in the PM-runtime framework (Rafael Wysocki,
    Andy Shevchenko).
 
  - Add ElkhartLake support to the Intel RAPL power capping driver
    and remove an unused local MSR definition from it (Jacob Pan,
    Sumeet Pawnikar).
 
  - Update devfreq core and drivers:
 
    * Replace strncpy() with strscpy() in the devfreq core and use
      lockdep asserts instead of manual checks for a locked mutex in
      it (Dmitry Osipenko, Krzysztof Kozlowski).
 
    * Add a generic imx bus scaling driver and make it register an
      interconnect device (Leonard Crestez, Gustavo A. R. Silva).
 
    * Make the cpufreq notifier in the tegra30 driver take boosting
      into account and delete an unuseful error message from that
      driver (Dmitry Osipenko, Markus Elfring).
 
  - Remove unneeded semicolon from the cpupower code (Zou Wei).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl7VGjwSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRx46gP/jGAXlddFEQswi6qUT3Cff0A9mb8CdcX
 dyKrjX4xxo/wtBIAwSN4achxrgse//ayo2dYTzWRDd31W9Azbv+5F+46XsDRz4hL
 pH29u/E66NMtFWnHCmt78NEJn0FzSa0YBC43ZzwFwKktCK9skYIpGN2z6iuXUBSX
 Q5GHqop3zvDsdKQFBGL62xvUw/AmOTPG7ohIZvqWBN2mbOqEqMcoFHT+aUF/NbLj
 +i14dvTH767eDZGRVASmXWQyljjaRWm+SIw4+m8zT1D1Y3d5IFObuMN+9RQl1Tif
 BYjkgJ2oDDMhCJLW7TBuJB+g7exiyaSQds3nMr2ZR+eZbJipICjU4eehNEKIUopU
 DM17tHQfnwZfS/7YbCx3vYQwLkNq37AJyXS9uqCAIFM+0n4xN4/mIVmgWYISLDTs
 1v9olFxtwMRNpjGGQWPJAO7ebB8Zz9qhQv7pIkSQEfwp93/SzvlVf4vvruTeFN9J
 qqG60cDumXWAm+s43eQHJNn5nOd5ocWv0FBpo/cxqKbzxFVWwdB42Cm0SY+rK2ID
 uHdnc2DJcK2c78UVbz3Cmk4272foJt2zxchqjFXXAZPLrOsFfzmti4B28VxGxjmP
 LG3MhH5sdbF4yl/1aSC1Bnrt+PV9Lus6ut/VKhjwIpw8cqiXgpwSbMoDoaBd9UMQ
 ubGz2rplGAtB
 =APdj
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "These rework the system-wide PM driver flags, make runtime switching
  of cpuidle governors easier, improve the user space hibernation
  interface code, add intel-speed-select interface documentation, add
  more debug messages to the ACPI code handling suspend to idle, update
  the cpufreq core and drivers, fix a minor issue in the cpuidle core
  and update two cpuidle drivers, improve the PM-runtime framework,
  update the Intel RAPL power capping driver, update devfreq core and
  drivers, and clean up the cpupower utility.

  Specifics:

   - Rework the system-wide PM driver flags to make them easier to
     understand and use and update their documentation (Rafael Wysocki,
     Alan Stern).

   - Allow cpuidle governors to be switched at run time regardless of
     the kernel configuration and update the related documentation
     accordingly (Hanjun Guo).

   - Improve the resume device handling in the user space hibernarion
     interface code (Domenico Andreoli).

   - Document the intel-speed-select sysfs interface (Srinivas
     Pandruvada).

   - Make the ACPI code handing suspend to idle print more debug
     messages to help diagnose issues with it (Rafael Wysocki).

   - Fix a helper routine in the cpufreq core and correct a typo in the
     struct cpufreq_driver kerneldoc comment (Rafael Wysocki, Wang
     Wenhu).

   - Update cpufreq drivers:

      - Make the intel_pstate driver start in the passive mode by
        default on systems without HWP (Rafael Wysocki).

      - Add i.MX7ULP support to the imx-cpufreq-dt driver and add
        i.MX7ULP to the cpufreq-dt-platdev blacklist (Peng Fan).

      - Convert the qoriq cpufreq driver to a platform one, make the
        platform code create a suitable device object for it and add
        platform dependencies to it (Mian Yousaf Kaukab, Geert
        Uytterhoeven).

      - Fix wrong compatible binding in the qcom driver (Ansuel Smith).

      - Build the omap driver by default for ARCH_OMAP2PLUS (Anders
        Roxell).

      - Add r8a7742 SoC support to the dt cpufreq driver (Lad
        Prabhakar).

   - Update cpuidle core and drivers:

      - Fix three reference count leaks in error code paths in the
        cpuidle core (Qiushi Wu).

      - Convert Qualcomm SPM to a generic cpuidle driver (Stephan
        Gerhold).

      - Fix up the execution order when entering a domain idle state in
        the PSCI driver (Ulf Hansson).

   - Fix a reference counting issue related to clock management and
     clean up two oddities in the PM-runtime framework (Rafael Wysocki,
     Andy Shevchenko).

   - Add ElkhartLake support to the Intel RAPL power capping driver and
     remove an unused local MSR definition from it (Jacob Pan, Sumeet
     Pawnikar).

   - Update devfreq core and drivers:

      - Replace strncpy() with strscpy() in the devfreq core and use
        lockdep asserts instead of manual checks for a locked mutex in
        it (Dmitry Osipenko, Krzysztof Kozlowski).

      - Add a generic imx bus scaling driver and make it register an
        interconnect device (Leonard Crestez, Gustavo A. R. Silva).

      - Make the cpufreq notifier in the tegra30 driver take boosting
        into account and delete an unuseful error message from that
        driver (Dmitry Osipenko, Markus Elfring).

   - Remove unneeded semicolon from the cpupower code (Zou Wei)"

* tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (51 commits)
  cpuidle: Fix three reference count leaks
  PM: runtime: Replace pm_runtime_callbacks_present()
  PM / devfreq: Use lockdep asserts instead of manual checks for locked mutex
  PM / devfreq: imx-bus: Fix inconsistent IS_ERR and PTR_ERR
  PM / devfreq: Replace strncpy with strscpy
  PM / devfreq: imx: Register interconnect device
  PM / devfreq: Add generic imx bus scaling driver
  PM / devfreq: tegra30: Delete an error message in tegra_devfreq_probe()
  PM / devfreq: tegra30: Make CPUFreq notifier to take into account boosting
  PM: hibernate: Restrict writes to the resume device
  PM: runtime: clk: Fix clk_pm_runtime_get() error path
  cpuidle: Convert Qualcomm SPM driver to a generic CPUidle driver
  ACPI: EC: PM: s2idle: Extend GPE dispatching debug message
  ACPI: PM: s2idle: Print type of wakeup debug messages
  powercap: RAPL: remove unused local MSR define
  PM: runtime: Make clear what we do when conditions are wrong in rpm_suspend()
  Documentation: admin-guide: pm: Document intel-speed-select
  PM: hibernate: Split off snapshot dev option
  PM: hibernate: Incorporate concurrency handling
  Documentation: ABI: make current_governer_ro as a candidate for removal
  ...
2020-06-02 13:17:23 -07:00
David S. Miller
1806c13dc2 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
xdp_umem.c had overlapping changes between the 64-bit math fix
for the calculation of npgs and the removal of the zerocopy
memory type which got rid of the chunk_size_nohdr member.

The mlx5 Kconfig conflict is a case where we just take the
net-next copy of the Kconfig entry dependency as it takes on
the ESWITCH dependency by one level of indirection which is
what the 'net' conflicting change is trying to ensure.

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-31 17:48:46 -07:00
Palmer Dabbelt
09c0533d12
soc: sifive: l2 cache: Mark l2_get_priv_group as static
The kbuild test robot is firing a warning over a missing prototype.  The
function can just be static.

Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-28 15:57:49 -07:00
Palmer Dabbelt
b4a4f036e8
soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
GCC warns about this comparison, which is unnecessary.

Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-28 15:57:48 -07:00
Arnd Bergmann
9536a3155b soc: ARM TI update for v5.8
- Platform chipid driver support and associated dts doc update
  - Sparse warning fix in Navigator driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJezzQJAAoJEHJsHOdBp5c/JGoQAKQfIRYAEAseLnnQvCke7RDE
 Io+FTLdBaa3HxfLvAHwoHbAveKMU2Z1jcim3iVG++d1gpqgNOZHASESLNJBa5UCf
 LfKWWTVwmXxXcaNxYRqJ/bP6b7n5nabfUqGcvkt9GP2e5T4SF16aIcMYzPhjVNBm
 4PpuQG2fmP5OH2tkKD2YEdg0bW/AK9ZuzMTihdkRWn7buFgeN9MiEmQrkS3QwPrJ
 9stxIyd+OmiTtuPXJDTcVuteygw9W5jH951PsbUbfOiy6WZL8FjZuBC5StjB4GSC
 flwfV7BrLYXhsLdmnqIpXBIN+EyDzzIHsQ7fD8KfU2kgtUUL1UZsrcbTyyfXYokR
 8UlBV9PHwLv0VpVRSjSXLsY0vVosPrF2U1GGyr2stASyI5tNbJgYh8ASXvYjsRcm
 AuL2DSBGtr/WOK308kx/vL7ivD68z/IO83LZLR/2eDEoi3przCYA1/Cnrsjfo1Nj
 M8wB3UgNPOZ09ES0Bm2yl/MBVHJ0dg+O9PDP7NGan3Pdk7Ra4ykSa0UJDh+BlX5B
 v6poxLqTFeU06JwPUKGI/VrLhgqwGd5UFOQKKrazoz3+CSDjpDVpV1kwBYcZjnFw
 THgRKyF8GUmtHEj/2+pXVFWNcdWuC+Xs+JAmt1Qd162W/3mXk6/kABk+kmdW7H5B
 1tgba1By4qkm783l1iau
 =AP+I
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

soc: ARM TI update for v5.8

 - Platform chipid driver support and associated dts doc update
 - Sparse warning fix in Navigator driver

* tag 'drivers_soc_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static
  soc: ti: add k3 platforms chipid module driver
  dt-bindings: soc: ti: add binding for k3 platforms chipid module

Link: https://lore.kernel.org/r/1590638489-12023-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28 13:08:15 +02:00
Arnd Bergmann
fb6c05b08b NXP/FSL SoC driver updates for v5.8
DPAA2 DPIO driver
 - Prefer the CPU affined DPIO
 
 QUICC Engine drivers
 - Replace one-element array and use struct_size() helper
 
 Cleanups in various drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAl7IYJUACgkQhtxQDvus
 FVQS3Q//dkeRknH/s3oJT4X/RQjOLiWl+NjHb4Wmmn/y7qVOz0VsVnihg12546FH
 sU4fu9hv1md1KiL0I2K7booWNnnaoysqrylBGpU6K2UBj2V1WEU9luXWXrzcjLwM
 7nrgBQJ+b/eWoWXmIra5FqItpE1OfMZ84JF0IdXnfHxnCC3STozeXslfh6h70fdq
 OpJzC+GgO9J1I+n2TunbEdWWXo5yzJ4GaQl2+LrV/nMjfApYqVt9qnxEbpJPRntS
 nIAPxqXjc0VKXnA+2d52W2vwXwaWP4YoJ3DsxFLCf55Ux1JBi9XLfflJ9LaQZoJC
 LLTj4wf5XTOtKBn+K4ERAHHJoeXL8fo2ShoGlkNpmbTTyPXP4cDFabK4UBoyCPxf
 BcJlrUEac4O/n+2VvCD9Dj1qQzveNl837muXGNXoq/6M1Hvni6ki2Ij1RA7vh2Kp
 maRv+0dvZ8GLOXqh4veRzJ19cYkqPkrUaf11I7Mm1voFHC7jGYDuyJh6jQLyp1JG
 1TbiDBXSXA5frb6SNSmS7I9ROKdKcOfa2i4mpatrm22wdpcM8HobgDuTtVaOnNCt
 RjuBRiO9nYsHKirsDNGmXtPPrI1mp2qjls0n1ru5I9jI2WaJ7aZjRMwTsVRvjLpe
 TZtOmiXCD0rg+RDMldP/KFnj6TQtM9NdiXTNIZCE3L41ut6s97w=
 =Y7QG
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-next-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.8

DPAA2 DPIO driver
- Prefer the CPU affined DPIO

QUICC Engine drivers
- Replace one-element array and use struct_size() helper

Cleanups in various drivers

* tag 'soc-fsl-next-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: Remove unused inline function qbman_write_eqcr_am_rt_register
  soc: fsl: qe: clean up an indentation issue
  soc: fsl: dpio: Prefer the CPU affine DPIO
  soc: fsl: qbman: Remove unused inline function qm_eqcr_get_ci_stashing
  soc: fsl: qe: Replace one-element array and use struct_size() helper
  treewide: Replace zero-length array with flexible-array

Link: https://lore.kernel.org/r/20200527215740.9279-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28 12:45:26 +02:00
Samuel Zou
b8b38a8e3c drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static
Fix the following sparse warning:

drivers/soc/ti/knav_qmss_queue.c:412:23: warning: symbol 'knav_gp_range_ops' was not declared.

The knav_acc_firmwares has only call site within knav_qmss_queue.c
It should be static

Fixes: 41f93af900 ("soc: ti: add Keystone Navigator QMSS driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Samuel Zou <zou_wei@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27 20:39:14 -07:00
Grygorii Strashko
907a2b7e2f soc: ti: add k3 platforms chipid module driver
The Texas Instruments K3 Multicore SoC platforms have chipid module which
is represented by CTRLMMR_xxx_JTAGID register and contains information
about SoC id and revision.
 Bits:
  31-28 VARIANT Device variant
  27-12 PARTNO  Part number
  11-1  MFG     Indicates TI as manufacturer (0x17)
  1             Always 1

This patch adds corresponding driver to identify the TI K3 SoC family and
revision, and registers this information with the SoC bus. It is available
under /sys/devices/soc0/ for user space, and can be checked, where needed,
in Kernel using soc_device_match().

Identification is done by:
- checking MFG to be TI ID
 - retrieving Device variant (revision)
 - retrieving Part number and convert it to the family
 - retrieving machine from DT "/model"

Example J721E:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments K3 J721E SoC
  J721E
  SR1.0

Example AM65x:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments AM654 Base Board
  AM65X
  SR1.0

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27 20:39:14 -07:00
Stephan Gerhold
a871be6b8e cpuidle: Convert Qualcomm SPM driver to a generic CPUidle driver
The Qualcomm SPM cpuidle driver seems to be the last driver still
using the generic ARM CPUidle infrastructure.

Converting it actually allows us to simplify the driver,
and we end up being able to remove more lines than adding new ones:

  - We can parse the CPUidle states in the device tree directly
    with dt_idle_states (and don't need to duplicate that
    functionality into the spm driver).

  - Each "saw" device managed by the SPM driver now directly
    registers its own cpuidle driver, removing the need for
    any global (per cpu) state.

The device tree binding is the same, so the driver stays
compatible with all old device trees.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-05-26 10:46:01 +02:00
Arnd Bergmann
66ee9359b0 i.MX SoC changes for 5.8:
- Add soc device support for Vybrid/VF platform.
 - Move the i.MX soc device registration code from mach-imx to
   drivers/soc/imx for possible future consolidation with i.MX8 code.
 - A small fixup to make pcm970_sja1000_platform_data static.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7IflgUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5Tswf+Id6DM109IHuZxhPWNB5SKEkVa1cr
 v7u7GeT/REqnsVCoFgC0kYIVlOj6nm7F8wwrHziiocvryUV8KPiENG3zMCVzJfLz
 +xkZxIYEuMeLoJjWOz3HeR5bp8G5GeL8sGt2D5OrMh1EUHYTZdnf4/nESvCMJb41
 rOaBRHuhhR1/Dv8qwCkXU9zep/jwlVXf+r6pC5pQNGmUpUGC2VFc7rDYkODS8Jo4
 MfNx5S+HHk2Jabei+6fKEsVG1x7E3lv3ky/ZdVWhjtgy19I32E+o4Cr+UQqegIen
 N4V/Uya6KejSvhaHDf6Pz2TjqTkXxlWSQ0Lu2I7pDMWdU5Upf0iLqbV1rQ==
 =MC2F
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC changes for 5.8:

- Add soc device support for Vybrid/VF platform.
- Move the i.MX soc device registration code from mach-imx to
  drivers/soc/imx for possible future consolidation with i.MX8 code.
- A small fixup to make pcm970_sja1000_platform_data static.

* tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: move cpu code to drivers/soc/imx
  ARM: imx: move cpu definitions into a header
  ARM: imx: use device_initcall for imx_soc_device_init
  ARM: imx: pcm037: make pcm970_sja1000_platform_data static
  ARM: vf610: report soc info via soc device

Link: https://lore.kernel.org/r/20200523032516.11016-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-26 00:03:12 +02:00
Arnd Bergmann
7b972f3830 i.MX drivers update for 5.8:
- Optimize imx-scu driver to use one TX and one RX instead of four for
   talking to SCU.
 - Fix one possible message header corruption where the response is
   longer than the request.
 - Move System Control defines into dt-bindings header, so that DT can
   use them as well.
 - A couple of small fixups.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7IeuUUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5CpAf/VV2krqXlgTXA1Ppl+ivdGkx9ntwo
 dVtZYNr65Z1iqp6yujW7cH/qulXfkaFanwDptq9ulBkG6uiyV06GCtBxpp3VhNOB
 60uaS8RsieYmCz3e8j4kZkMCBthpD72wt0DxF1TlJu2d/cWfsM4/bMbrx0qYiT0V
 J5FqcGH0xbe+E5YITdoPQbNxEig49q2P6BhkNLQelVQtVgM0lwSpDX3WRpCizch4
 bbKSVYudV/rGGPM7ZYM53N+ngwKZurRbIf7br1QgA4ZlQxdCtADB6IRd2RsfrC8P
 4BizRONfh46ogrnb9/P951RZu9H7VFRkTurnXdU+NcFK8HPYDGQmm7P2SQ==
 =cJwM
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.8:

- Optimize imx-scu driver to use one TX and one RX instead of four for
  talking to SCU.
- Fix one possible message header corruption where the response is
  longer than the request.
- Move System Control defines into dt-bindings header, so that DT can
  use them as well.
- A couple of small fixups.

* tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  firmware: imx: scu: Fix possible memory leak in imx_scu_probe()
  dt-bindings: firmware: imx: Add more system controls and PM clock types
  dt-bindings: firmware: imx: Move system control into dt-binding headfile
  firmware: imx: scu: Fix corruption of header
  firmware: imx-scu: Support one TX and one RX
  soc: imx8m: No need to put node when of_find_compatible_node() failed

Link: https://lore.kernel.org/r/20200523032516.11016-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-26 00:00:47 +02:00
Arnd Bergmann
e26552c5e0 soc/tegra: Changes for v5.8-rc1
Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
 PMIC and exports a bit more information about SoCs via sysfs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl7HzTsTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXlpD/42/AZYEXVi97CW5oxgsZjtf6xIsDuW
 v64DtfKFNcgDVqAPpqZRv+Q4OmxJsq7PaUPFxR8KA2TCVmqh8RHKDvjpenrA/A/9
 QcJ1XlAsBvWLwNkskMSb4jvohEjZ1fh13KJeqHifF7FtRAGEnf8s4MDitPBcRGXz
 2NgnhoxSElwfjptmd1Z/7ZsK1Zmjgr8CEKAtr7bhrB4rOZRtRsYgF1Diw/qZKCh/
 u+KBijvS7XUXS34ZTzHYw95YsKKy/mfk5F3yea9cgK6/9SuxAFUV+cKlAFMlt1bE
 yadgJxcXxoapgMaOvtdKaiR6HZWU4mq0xyDKBQ/3AQL0ZWmbv1OUD9i7I6VtQBOi
 tmQb+2GAafROYymshLZDInjIQhdVUAKLaeNiOerYPI++n5INh2bx+ppxjvcO1zjo
 xkI7FxHAvQm2RBUEEIonlJObwyPya7fgp9mSEOFzqcWCryH6ggGiI4+q3wo67u9z
 7QuTrxSx0Ao1SCsdP01o+XdJraI1BKTKbxELiis8eTupd/BcikkMUhCXMBVvU5uY
 zDx+5hZk3cyhDEPaaJB+kexEqv0A5CDwo1Z0fvf5pYy+aQzawy57tDi5QMm3QvUn
 V6W1Sf90LQmwLFAB+MS1Yu7gw3U6Y86c5q7H5+3wAmz8iu334JDbDl4wJ7VGPMb3
 wCMu/50QlOy0sg==
 =EmGZ
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.8-rc1

Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
PMIC and exports a bit more information about SoCs via sysfs.

* tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Enable PMIC wake event on Tegra210
  soc: tegra: Fix tegra_pmc_get_suspend_mode definition
  soc/tegra: pmc: Enable PMIC wake event on Tegra194
  soc/tegra: pmc: Select GENERIC_PINCONF
  soc/tegra: fuse: Update the SoC revision attribute to display a name
  soc/tegra: fuse: Trivial clean-up of tegra_init_revision()
  soc/tegra: fuse: Add custom SoC attributes
  soc/tegra: pmc: Enable PMIC wake event on Tegra186

Link: https://lore.kernel.org/r/20200522142846.2376224-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25 23:57:14 +02:00
Arnd Bergmann
502afe7f04 Qualcomm driver updates for v5.8
This contains a large set of cleanups, bug fixes, general improvements
 and documentation fixes for the RPMH driver. It adds a debugfs mechanism
 for inspecting Command DB. Socinfo got the "soc_id" attribute defines
 and definitions for a various variants of MSM8939.
 
 RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
 had to be reverted due to a compilation issue when tracing is enabled.
 
 RPMHPD gained power-domains for the SM8250 voltage corners.
 
 The SCM driver gained fixes for two build warnings and the SMP2P had an
 unnecessary error print removed.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7DZcEbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FEwIQAK1TrENzsRjB23fY4pEW
 +hN/SkfMjNPsinmyNOHCo03MQzdFIKUl40aNvaHh3foQXaSG4TW12iot9Ul5nsxn
 /u6dCSzl15FK7pHYj/VQPWTz2WvpANVqsm6G5tf43hBg2TnStbK1AsxgJ6aq47fp
 QHehMbfeKpF/gltEowv1b+H7xwNFY7eqlQ9O9umYm3hUQh3Bl5mI6PdbkazDdO1j
 l/vHuQKkZXRdHtD1BxGBfvhPtM4NWDbOPeWWrw8HRFM5muDPgK9mXMRGDcv+fpHq
 4I3670xiTWK1Mfz9+FRBMoxLkIWT6zXILg9aNzuZMTOLoNRt3s6VNdne6uf3naND
 2Nrcu7t0b+4xWGbdwwpiAFZm8C6l+R1WTCiY4iOJXDychhVvyVwOLzPdZ4i8Pzx9
 a4UJDElu8xj2g++oCcjK816IdNwkA46bM7qVz4mkHRUBMkmK9AU7okBA9HQfbP64
 MrKPaUljyZuy7zonpJJBBDKLDEFa9a1pI8sehU8p+MUldxYB/4f/iGC3KzyDvv4Q
 Uzj6AqdP5pjgIxz98YgpOPPl8pwg1c5OgblNLWoHj4yTaqUzT0ZHIRyQO/O/+3Lg
 HwCrSy+f3+tgzts3DhyVRmOkOXFHfflSdf4rfKtbiq435yB2dz60dt77dJ0jQuBV
 M9MiF+SE9oASUupPhs47kNte
 =tkhb
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.8

This contains a large set of cleanups, bug fixes, general improvements
and documentation fixes for the RPMH driver. It adds a debugfs mechanism
for inspecting Command DB. Socinfo got the "soc_id" attribute defines
and definitions for a various variants of MSM8939.

RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
had to be reverted due to a compilation issue when tracing is enabled.

RPMHPD gained power-domains for the SM8250 voltage corners.

The SCM driver gained fixes for two build warnings and the SMP2P had an
unnecessary error print removed.

* tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (42 commits)
  Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module"
  soc: qcom: rpmh-rsc: Remove the pm_lock
  soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lock
  kernel/cpu_pm: Fix uninitted local in cpu_pm
  soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BAD
  soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notifications
  firmware: qcom_scm-legacy: Replace zero-length array with flexible-array
  soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()
  soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculation
  soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc ids
  soc: qcom: aoss: Add SM8250 compatible
  soc: qcom: pdr: Remove impossible error condition
  soc: qcom: rpmh: Dirt can only make you dirtier, not cleaner
  soc: qcom: rpmhpd: Add SM8250 power domains
  firmware: qcom_scm: fix bogous abuse of dma-direct internals
  dt-bindings: soc: qcom: apr: Use generic node names for APR services
  firmware: qcom_scm: Remove unneeded conversion to bool
  soc: qcom: cmd-db: Properly endian swap the slv_id for debugfs
  soc: qcom: cmd-db: Use 5 digits for printing address
  soc: qcom: cmd-db: Cast sizeof() to int to silence field width warning
  ...

Link: https://lore.kernel.org/r/20200519052533.1250024-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25 23:19:06 +02:00
Arnd Bergmann
372542d708 - make mmsys kconfig entry to depend on ARCH_MEDIATEK instead of a specific SoC
- move clock driver to bind against the new mmsys driver
   (mt2712, mt2701, mt8183, mt6797 and mt6779)
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7JhkYXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH5t8w//Y8nyvZYcj0r7yDAlRSRIuObm
 9SQxejwYZpHK4ag+TTil6QK0RvjBTQzMSzCiovopju8Goqd97mR3rVPd1gkj1gpa
 rzeJiLxUiD17arunORghcYkLAYiv6c9m9XBxqut0d7DTsgKSXWnUzYmvaIxdw7Xw
 zAIKCSWSxgajh+VcQjv8gFYFQFHSmdquNC8DLoDxutOpOFFdDSaeJy59+gVf2gj/
 S2Z22ljB8+GW++7Vw1yGVBQzvu4EBM8mYssxwaDNZfLnN/Mi+cWspK7+xcE16u6J
 +epoEQHTmNyYql8DJbWIkbuERiDEW5sLOgKOL/qFqY7TsbuAVasrWS6MLfT1f7/B
 q24920tQah2YbkBSb0TdNoRCBOcOGFThpDaole6FXDkD4HcjFz3kdvMmNI3DQDQb
 uMEAsvFN6Fl4py6CTs0ZwL1mX5AKwNhsrLlFFcucVkfXqW0+xHNynI6Y+/s4DgHG
 gFFeS/gFOc+DvfjlnycMmdFlBdbLgqe0HGSOvCEQvHKuzWAbn8lStR5E9w5ScpYv
 XkEoEkvW2G2ISvGkm7iu1A3Vw1UL5gS49mR4MMuyeI+3iEoutsYbpnSdGMO9nu+k
 UwhmEas4iYk6L57vuqx0XP9LrL4TwybMJ02tkIKZzZdvZPAYFcMyi0nmGwBvyLY1
 j5XumIxbfSEe23BFEMs=
 =NHav
 -----END PGP SIGNATURE-----

Merge tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- make mmsys kconfig entry to depend on ARCH_MEDIATEK instead of a specific SoC
- move clock driver to bind against the new mmsys driver
  (mt2712, mt2701, mt8183, mt6797 and mt6779)

* tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  clk/soc: mediatek: mt6779: Bind clock driver from platform device
  clk/soc: mediatek: mt6797: Bind clock driver from platform device
  clk/soc: mediatek: mt8183: Bind clock driver from platform device
  clk / soc: mediatek: Bind clock and gpu driver for mt2701
  clk / soc: mediatek: Bind clock and gpu driver for mt2712
  soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected

Link: https://lore.kernel.org/r/d2eb19f4-589a-89c1-02ad-9f19a6cfb09a@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25 23:17:07 +02:00