Add support for dynamical allocation of imx-keypad on mx5 platform.
After moving to dynamically registration of the keypad, the keypad clock
name needs to change accordingly.
The reason is that the original mx5 keypad platform_device id was 0,
now we use id=-1 as per arch/arm/plat-mxc/devices/platform-imx-keypad.c.
Tested keypad successfully on a MX51_3DS board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1. changes some register address to fit macro definition
2. add platform data and clock for sdhc
Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1. Adjust FEC base address name to fit macro definition
2. Add platform data and reset function for FEC
Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is fixing some issues :
- MXC_OTG_UCTRL_OPM_BIT is for USBCTRL register and not PHYCTRL register.
- the MXC_EHCI_WAKEUP_ENABLED check was only clearing the bits so never allows
to set them.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic function and uart device support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mx5 SoCs have different GPIO port count.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants. Switch over to using this new interface.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Conflicts:
MAINTAINERS
arch/arm/mach-omap2/pm24xx.c
drivers/scsi/bfa/bfa_fcpim.c
Needed to update to apply fixes for which the old branch was too
outdated.
This iomux file has been constructed from the Freescale pinmux tool.
It contains all pins from the tool, but the datasheet lists some
configurations not present in the tool, these are not yet added.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch actually replaces the 'struct pad_desc' with a u64 cookie
to facilitate adding platform specific pad_ctrl settings to an
existing pad definition.
So, instead of:
iomux_v3_cfg_t power_key = MX51_PAD_EIM_A27__GPIO_2_21;
power_key.pad_ctrl = MX51_GPIO_PAD_CTRL_2;
mxc_iomux_v3_setup_pad(&power_key);
one can write:
mxc_iomux_v3_setup_pad((MX51_PAD_EIM_A27__GPIO_2_21 & ~MUX_PAD_CTRL_MASK) | MX51_GPIO_PAD_CTRL_2);
Patch applies to branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/imx/linux-2.6
Signed-Off-By: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When building as module:
ERROR: "cpufreq_gov_performance" [arch/arm/plat-mxc/cpufreq.ko] undefined!
WARNING: modpost: Found 1 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
It's due to the driver using CPUFREQ_DEFAULT_GOVERNOR, even it should not
(see commit 8122c6cea0 in Linus tree), so
remove it.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for FIQ on mx51 TZIC
TZIC changes tested with FIQ audio on an mx51 board
AVIC changes build with mx3_defconfig, not tested
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use clk_get to acquire the watchdog clock and also avoid hardcoding the clock name.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MX51 has two watchdog modules.
Add support for both of them.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, to define a GPIO number, we're using something like :
#define EFIKAMX_PCBID0 (2*32 + 16)
to define GPIO 3 16.
This is not really readable and it's error prone imho (note the 3 vs 2).
So, I'm introducing a new macro to define this in a better way. Now, the
code sample become :
#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
v2:
- move to gpio.h
- add parens & spaces
- switch to IMX_GPIO_NR instead of MX51_GPIO_NR
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In commit 2c20b9f (ARM: mx25: dynamically allocate mxc-ehci devices) I
changed the offset to the value specified in the reference manual
intending to test this change on hardware. This slipped through and now
prooved to be wrong. So fix it and add a comment about the
documentation being wrong.
Reported-by: Jaume Ribot <jaume@fqingenieria.es>
Cc: Michael Trimarchi <trimarchi@gandalf.sssup.it>
Cc: Shawn Guo <shawn.gsc@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commits 2eb42d5c28 and
9e1dde3387 renamed some defines
but didn't fix all the places where these defines are used
leading to a compile failure for USB on i.MX31, 35 and 27.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The SDMA firmware consists of a ROM part and a RAM part.
The ROM part is always present in the SDMA engine and
is sufficient for many cases.
This patch allows to pass in platform data containing
the script addresses in ROM, so loading a firmware is
optional now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.
Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a Kconfig option for the avic irq controller
and lets the SoCs that need it select this option.
Also, as we have two irq controllers for i.MX, irq.c is not
appropriate anymore, so rename it to avic.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit "ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookie"
(b705cb4d42e95a4a43a8945571c8613e71526c3d) introduced a typo which was
preventing my efikamx to boot. This patch is fixing that.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The efikamx board is using a gpio to reset the board so add support
for it
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- add definition to configure pads as ESDHC{1,2} WP and CD
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- ALT0 is used to set GPIO mode of GPIO_1_{2,3,4,5,6,7,8,9} but it's ALT1
for GPIO_1_{0,1}.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The following patch is a first step to convert the 'struct pad_desc'
to a bitmapped cookie to facilitate adding platform specific pullup or
drive strength definitions to existing pad definitions without need to
rewrite the complete pad def.
The patch wraps 'struct pad_desc' in an opaque data type and
introduces macros to access the individual members.
This patch does not constitute any functional change!
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While adapting the #defines for this I noticed that the offset
used for USB HS on i.MX35 differs from the documented offset.
I kept the working offset and commented that the documentation
differs.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Compared to the static devices the dynamic have a DMA resource.
This should be save as it seems unused in the driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Some usages of ARCH_MX25 are assuming that if it is
defined the other SoCs are undefined. Use SOC_IMX25 for the save
places.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This way FB_IMX can just depend on HAVE_FB_IMX and machines
just need to select IMX_HAVE_PLATFORM_IMX_FB without bothering
about HAVE_FB_IMX.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The mxc-keypad device seems to be the result of an early and partial
merge of the keypad driver. It's unused and there is no corresponding
driver available, so just remove it.
Cc: Alberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
To use common macros to define the gpio ports for imx{1,21,25,27} the
existing ones had to made more general and a few more base address defines
were necessary.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
According to the reference manual of the i.MX25 the host controller uses an
offset of 0x200 not 0x400 as was specified in the resources for mxc_usbh2.
Needs-Testing: yes
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Group soc specific data in a global struct instead of repeating it for each
call to imxXX_add_flexcanX. The structs holding the actual data are placed
in .init.constdata and so don't do much harm. Compared to the previous
approach this reduces code size to call imx_add_flexcan.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes and for consistency NULL is passed unused to the soc specific
functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes NULL is passed unused to the soc specific functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for
static per-SoC mappings. The few mappings of whole chip selects are
moved accordingly.
The now wrong defines for virtual base addresses are removed.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This allows changing the mapping without the need to adapt all users.
While at it remove some unneeded casts to void __iomem *, this is already
taken care for in the IO_ADDRESS macros
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes less code rely on the virtual constants.
To further simplify code and reduce the needed boilerplate when
defining the static mappings a new helper macro is defined in
mach/hardware.h.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes it more assembler friendly and allows it to be used in situation
that need an unsigned long and not a pointer. Also the naming is
clearer. IOMEM is introduced without IMX_ prefix as it is used this way
in more than one ARM subarch and it might become globally available
soon.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
ARM: memblock: setup lowmem mappings using memblock
ARM: memblock: move meminfo into find_limits directly
ARM: memblock: convert free_highpages() to use memblock
ARM: move freeing of highmem pages out of mem_init()
ARM: memblock: convert memory detail printing to use memblock
ARM: memblock: use memblock to free memory into arm_bootmem_init()
ARM: memblock: use memblock when initializing memory allocators
ARM: ensure membank array is always sorted
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
ARM: 6464/2: fix spinlock recursion in adjust_pte()
ARM: fix memblock breakage
ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
ARM: 6449/1: Fix for compiler warning of uninitialized variable.
ARM: 6445/1: fixup TCM memory types
ARM: imx: Add wake functionality to GPIO
ARM: mx5: Add gpio-keys to mx51 babbage board
ARM: imx: Add gpio-keys to plat-mxc
mx31_3ds: Fix spi registration
mx31_3ds: Fix the logic for detecting the debug board
...
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)
DMAENGINE: move COH901318 to arch_initcall
dma: imx-dma: fix signedness bug
dma/timberdale: simplify conditional
ste_dma40: remove channel_type
ste_dma40: remove enum for endianess
ste_dma40: remove TIM_FOR_LINK option
ste_dma40: move mode_opt to separate config
ste_dma40: move channel mode to a separate field
ste_dma40: move priority to separate field
ste_dma40: add variable to indicate valid dma_cfg
async_tx: make async_tx channel switching opt-in
move async raid6 test to lib/Kconfig.debug
dmaengine: Add Freescale i.MX1/21/27 DMA driver
intel_mid_dma: change the slave interface
intel_mid_dma: fix the WARN_ONs
intel_mid_dma: Add sg list support to DMA driver
intel_mid_dma: Allow DMAC2 to share interrupt
intel_mid_dma: Allow IRQ sharing
intel_mid_dma: Add runtime PM support
DMAENGINE: define a dummy filter function for ste_dma40
...
Add function definition for irq_chip.set_wake to enable GPIO to
wake-up the system.
This patch has been tested on a MX51 Babbage system that had suspend
code implemented. The set_wake implementation is necessary for a
GPIO to wake up a system from suspend.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes a warning
warning: (IMX_HAVE_PLATFORM_FLEXCAN && ARCH_MXC) selects HAVE_CAN_FLEXCAN which has unmet direct dependencies (NET && CAN)
(The warning in general exists since
246cf9c (kbuild: Warn on selecting symbols with unmet direct dependencies)
which was reverted between 71ebc01 and b1f7d6e.)
Reported-and-introduced-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:
vfs: make no_llseek the default
vfs: don't use BKL in default_llseek
llseek: automatically add .llseek fop
libfs: use generic_file_llseek for simple_attr
mac80211: disallow seeks in minstrel debug code
lirc: make chardev nonseekable
viotape: use noop_llseek
raw: use explicit llseek file operations
ibmasmfs: use generic_file_llseek
spufs: use llseek in all file operations
arm/omap: use generic_file_llseek in iommu_debug
lkdtm: use generic_file_llseek in debugfs
net/wireless: use generic_file_llseek in debugfs
drm: use noop_llseek
Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit c074512 (imx-esdhc: update devices registration) renamed
MX35_INT_MMC_SDHC2 to MX35_INT_ESDHC2 which broke expansion of the
MXC_INT_MMC_SDHC2 macro.
As (the only user of MXC_INT_MMC_SDHC2) is only used on
mx31 use the MX31 prefixed symbol to define its resources. Moreover to
reduce further confusion mxcsdhc_device0 is fixed accordingly and the MXC
prefixed symbols are removed.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.
This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.
Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
This is only a partial revert of "ARM: mx3/mx31ads: fold board
header in its only user"
[commit ccfa7c2698)]
As some of the the board defines are also used in the cs89x0
ethernet driver by the i.MX31 ADS.
Signed-off-by: Ian Lartey <ian@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this exiting WFI can result in cache corruption.
Code taken from Freescale's 2.6.27 BSP and tested on i.MX35
Signed-off-by: Eric Bénard <eric@eukrea.com>
this patch fix the following errors :
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function)
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
error: ‘MX25_INT_SDMA’ undeclared here (not in a function)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
During the reorganisation of the imx-i2c devices
(in 64de5ec168) the 3rd imx-i2c device
for the mx35 got lost. This patch adds the missing device.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR.
The allocation size is 4KB multiples to guarantee alignment. The
idea for these functions is for i.MX platforms to use them
to dynamically allocate IRAM usage.
Applies on 2.6.36-rc7
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: Amit Kucheria <amit.kucheria@canonical.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All file_operations should get a .llseek operation so we can make
nonseekable_open the default for future file operations without a
.llseek pointer.
The three cases that we can automatically detect are no_llseek, seq_lseek
and default_llseek. For cases where we can we can automatically prove that
the file offset is always ignored, we use noop_llseek, which maintains
the current behavior of not returning an error from a seek.
New drivers should normally not use noop_llseek but instead use no_llseek
and call nonseekable_open at open time. Existing drivers can be converted
to do the same when the maintainer knows for certain that no user code
relies on calling seek on the device file.
The generated code is often incorrectly indented and right now contains
comments that clarify for each added line why a specific variant was
chosen. In the version that gets submitted upstream, the comments will
be gone and I will manually fix the indentation, because there does not
seem to be a way to do that using coccinelle.
Some amount of new code is currently sitting in linux-next that should get
the same modifications, which I will do at the end of the merge window.
Many thanks to Julia Lawall for helping me learn to write a semantic
patch that does all this.
===== begin semantic patch =====
// This adds an llseek= method to all file operations,
// as a preparation for making no_llseek the default.
//
// The rules are
// - use no_llseek explicitly if we do nonseekable_open
// - use seq_lseek for sequential files
// - use default_llseek if we know we access f_pos
// - use noop_llseek if we know we don't access f_pos,
// but we still want to allow users to call lseek
//
@ open1 exists @
identifier nested_open;
@@
nested_open(...)
{
<+...
nonseekable_open(...)
...+>
}
@ open exists@
identifier open_f;
identifier i, f;
identifier open1.nested_open;
@@
int open_f(struct inode *i, struct file *f)
{
<+...
(
nonseekable_open(...)
|
nested_open(...)
)
...+>
}
@ read disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
|
*off += E
|
func(..., off, ...)
|
E = *off
)
...+>
}
@ read_no_fpos disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
... when != off
}
@ write @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
|
*off += E
|
func(..., off, ...)
|
E = *off
)
...+>
}
@ write_no_fpos @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
... when != off
}
@ fops0 @
identifier fops;
@@
struct file_operations fops = {
...
};
@ has_llseek depends on fops0 @
identifier fops0.fops;
identifier llseek_f;
@@
struct file_operations fops = {
...
.llseek = llseek_f,
...
};
@ has_read depends on fops0 @
identifier fops0.fops;
identifier read_f;
@@
struct file_operations fops = {
...
.read = read_f,
...
};
@ has_write depends on fops0 @
identifier fops0.fops;
identifier write_f;
@@
struct file_operations fops = {
...
.write = write_f,
...
};
@ has_open depends on fops0 @
identifier fops0.fops;
identifier open_f;
@@
struct file_operations fops = {
...
.open = open_f,
...
};
// use no_llseek if we call nonseekable_open
////////////////////////////////////////////
@ nonseekable1 depends on !has_llseek && has_open @
identifier fops0.fops;
identifier nso ~= "nonseekable_open";
@@
struct file_operations fops = {
... .open = nso, ...
+.llseek = no_llseek, /* nonseekable */
};
@ nonseekable2 depends on !has_llseek @
identifier fops0.fops;
identifier open.open_f;
@@
struct file_operations fops = {
... .open = open_f, ...
+.llseek = no_llseek, /* open uses nonseekable */
};
// use seq_lseek for sequential files
/////////////////////////////////////
@ seq depends on !has_llseek @
identifier fops0.fops;
identifier sr ~= "seq_read";
@@
struct file_operations fops = {
... .read = sr, ...
+.llseek = seq_lseek, /* we have seq_read */
};
// use default_llseek if there is a readdir
///////////////////////////////////////////
@ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier readdir_e;
@@
// any other fop is used that changes pos
struct file_operations fops = {
... .readdir = readdir_e, ...
+.llseek = default_llseek, /* readdir is present */
};
// use default_llseek if at least one of read/write touches f_pos
/////////////////////////////////////////////////////////////////
@ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read.read_f;
@@
// read fops use offset
struct file_operations fops = {
... .read = read_f, ...
+.llseek = default_llseek, /* read accesses f_pos */
};
@ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write.write_f;
@@
// write fops use offset
struct file_operations fops = {
... .write = write_f, ...
+ .llseek = default_llseek, /* write accesses f_pos */
};
// Use noop_llseek if neither read nor write accesses f_pos
///////////////////////////////////////////////////////////
@ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
identifier write_no_fpos.write_f;
@@
// write fops use offset
struct file_operations fops = {
...
.write = write_f,
.read = read_f,
...
+.llseek = noop_llseek, /* read and write both use no f_pos */
};
@ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write_no_fpos.write_f;
@@
struct file_operations fops = {
... .write = write_f, ...
+.llseek = noop_llseek, /* write uses no f_pos */
};
@ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
@@
struct file_operations fops = {
... .read = read_f, ...
+.llseek = noop_llseek, /* read uses no f_pos */
};
@ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
@@
struct file_operations fops = {
...
+.llseek = noop_llseek, /* no read or write fn */
};
===== End semantic patch =====
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Julia Lawall <julia@diku.dk>
Cc: Christoph Hellwig <hch@infradead.org>
Documentation/gpio.txt specifies that the value argument to
gpio_set_value() should be handled as a boolean (E.G. != 0 is high),
so use the same logic as in _set_direction().
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on work done earlier by Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Eric Bénard <eric@eukrea.com>
[ukl: actually squash the two approaches together]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for the Freescale i.MX SDMA engine.
The SDMA engine is a scatter/gather DMA engine which is implemented
as a seperate coprocessor. SDMA needs its own firmware which is
requested using the standard request_firmware mechanism. The firmware
has different entry points for each peripheral type, so drivers
have to pass the peripheral type to the DMA engine which in turn
picks the correct firmware entry point from a table contained in
the firmware image itself.
The original Freescale code also supports support for transfering
data to the internal SRAM which needs different entry points to
the firmware. Support for this is currently not implemented. Also,
support for the ASRC (asymmetric sample rate converter) is skipped.
I took a very simple approach to implement dmaengine support. Only
a single descriptor is statically assigned to a each channel. This
means that transfers can't be queued up but only a single transfer
is in progress. This simplifies implementation a lot and is sufficient
for the usual device/memory transfers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Addiontionally make the interrupt #defines match the base address
defines MX.._NFC_BASE_ADDR.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash,
now add iomux definitions for those used pins.
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver recently learned to handle platform ids. Make use of this
new feature. The up side is that the driver needs less knowledge about
the spi interfaces used on different SoCs.
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Group soc specific data in a global struct instead of repeating it for
each call to imxXX_add_spi_imxX. The structs holding the actual data
are placed in .init.constdata and so don't do much harm. Compared to
the previous approach this reduces code size to call imx_add_spi_imx.
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The names used now match the processor's reference manual. Also remove
MXC from the interrupt defines to match the other imx platforms.
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes the header more look like the other ones, i.e.
- sort #defines by value
- use lowercase hex constants
- use a consistently named header guard
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This fixes:
arch/arm/plat-mxc/ehci.c: In function 'mxc_initialize_usb_hw':
arch/arm/plat-mxc/ehci.c:260: warning: assignment makes integer from pointer without a cast
arch/arm/plat-mxc/ehci.c:263: warning: assignment makes integer from pointer without a cast
arch/arm/plat-mxc/ehci.c:270: warning: assignment makes integer from pointer without a cast
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The flexcan driver was merged as e955cead.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested it by booting a rootfs via NFS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The Enhanced Periodic Interrupt Timer (EPIT) is found on newer
i.MX SoCs and can be used as an alternative system timer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes
instead of 32 bytes. Refer to the OMAP3's selection, we choose 64
bytes for i.MX5, this can increase a little bit performance when
perform cache operations.
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we call tzic_enable_wake function, the kernel will crash because
of access to an unmapped address. This is because two register
access operations forgot to add base address.
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Last change I did made a big mess in function names and CONFIG names,
this patch fixes this so that the baseboard support is really built
when selected.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a follow up to
14cb0de (arm/imx/gpio: add spinlock protection)
and fixes the following build failure:
CC arch/arm/mach-imx/pcm970-baseboard.o
In file included from arch/arm/include/asm/gpio.h:6,
from include/linux/gpio.h:8,
from arch/arm/mach-imx/pcm970-baseboard.c:20:
arch/arm/plat-mxc/include/mach/gpio.h:40: error: expected specifier-qualifier-list before 'spinlock_t'
Cc: stable@kernel.org
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
