Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
we can rely on device core for handling pinctrl.
So remove devm_pinctrl_get_select_default() from the driver.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
These are mostly new device tree bindings for existing drivers, as well
as changes to the device tree source files to add support for those
devices, and a couple of new boards, most notably Samsung's Exynos5
based Chromebook.
The changes depend on earlier platform specific updates and touch
the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUYgjh2CrR//JCVInAQJTvRAAmxaeoI+kQ/pbbRDa/Mnhf+bUmQjvJvx4
uFGYAAi23Txem2Bx6xrfvOo9//ATYSfRxenoSSOtXQucsnrqD0+837Sj2NbO6AB9
MSiFDK4usJtGwSUybkSHNLb2QPBr8XTgmyWVE/sHEw2UtrIToC1n3sxFofFm0guT
ReILKsgK0Wjyq5RntnjWOCHNNp6OGqDGvFXlSJqNA7Z6gR/VZy4o0oXS4Sv3TWgF
zG7ngSG7/u9FP1IQnMr/SxY1T4QS/bBbAC1YvD/7X30DPHrWKR3/3LfLcsc9TUN2
smTlZQjHdgBbGfVPL7JN0fQwA82HEjNSZKLJ0w9uFjxXgnoKT3znpUpQeuf3dsWm
BhEFqN1Rf446S4ft2btBSB2nhX4NTlJ7w6z2F65xgaylgYFsGFTYcpjiOurKe3wF
gGsw31DZdcuI4/LjiWbNGRKbMd7HFFLbFDMJ16TFbNcNr+pM3qpoQ6z3uMbfCBSe
xFnYr+ESN8F2HXMNLiz3CTqLY+Fi/bHd22n3KuI9qsWws/0KDUrTvFh9Sm3kYji5
QwwLl6PRoeFw8H29e3KrPsKoY/BGYAvrAetnC1o79cDFPLwUyii/1B6WwzC4ynfs
K1VhwdVOwnp0sS/a2Pv8sZBpDNI07gwT9P20aiholxgREq2RKNXXVxGGFfK5Qvm9
FG4Vp6EKEQ0=
=G60S
-----END PGP SIGNATURE-----
Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
"These are mostly new device tree bindings for existing drivers, as
well as changes to the device tree source files to add support for
those devices, and a couple of new boards, most notably Samsung's
Exynos5 based Chromebook.
The changes depend on earlier platform specific updates and touch the
usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."
* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: add mshc controller node for Exynos4x12 SoCs
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
ARM: dts: mvebu: introduce internal-regs node
ARM: dts: mvebu: Convert all the mvebu files to use the range property
ARM: dts: mvebu: move all peripherals inside soc
ARM: dts: mvebu: fix cpus section indentation
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
...
In PIO mode we can end up with the same errors as in DMA mode, but as IRQs
are disabled there we have to check for them manually after each command.
Also don't use the big controller reset hammer when receiving a NAK from a
slave. It's sufficient to tell the controller to continue at a clean state.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit fixes the three following races in PIO code:
- The CTRL0 register is racy in itself, when programming transfer state and
run bit in the same cycle the hardware sometimes ends up using the state
from the last transfer. Fix this by programming state in one cycle, make
sure the write is flushed down APBX bus by reading back the reg and only
then trigger the run bit.
- Only clear the DMAREQ bit in DEBUG0 after the read/write to the data reg
happened. Otherwise we are racing with the hardware about who touches
the data reg first.
- When checking for completion of a transfer it's not sufficient to check
if the data engine finished, but also a check for i2c bus idle is needed.
In PIO mode we are really fast to program the next transfer after a finished
one, so the controller possibly tries to start a new transfer while the
clkgen engine is still busy writing the NAK/STOP from the last transfer to
the bus.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
With the generic DMA device tree helper supported by mxs-dma driver,
client devices only need to call dma_request_slave_channel() for
requesting a DMA channel from dmaengine.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
i2c_del_adapter() always returns 0. So all checks testing whether it will be
non zero will always evaluate to false and the conditional code is dead code.
This patch updates all callers of i2c_del_mux_adapter() to ignore the return
value and assume that it will always succeed (which it will). In a subsequent
patch the return type of i2c_del_adapter() will be made void.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ben Hutchings <bhutchings@solarflare.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There is simply no reason to be manually setting the private driver
data to NULL in the remove/fail to probe cases. This is just extra
cruft code that can be removed.
A few notes:
* Nothing relies on drvdata being set to NULL.
* The __device_release_driver() function eventually calls
dev_set_drvdata(dev, NULL) anyway, so there's no need to do it
twice.
* I verified that there were no cases where xxx_get_drvdata() was
being called in these drivers and checking for / relying on the NULL
return value.
This could be cleaned up kernel-wide but for now just take the baby
step and remove from the i2c subsystem.
Reported-by: Wolfram Sang <wsa@the-dreams.de>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
This patch drops the i2c timing tables from this driver and instead
derives the timing based from the requested clock sleep. The timing
tables were completely wrong anyway when observed on a scope.
This new algorithm is also only derived by using a scope, but it seems
to produce much more accurate result.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
[wsa: changed messages from dev_err to dev_warn]
Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
Add support for the PIO mode and mixed PIO/DMA mode support. The mixed
PIO/DMA is the default mode of operation. This shall leverage overhead
that the driver creates due to setting up DMA descriptors even for very
short transfers.
The current boundary between PIO/DMA 8 bytes, transfers shorter than 8
bytes are transfered by PIO, longer transfers use DMA. The performance
of write transfers remains unchanged, while there is a minor improvement
of read performance. Reading 16KB EEPROM with DMA-only operations gives
a read speed of 39.5KB/s, while with then new mixed-mode the speed is
blazing 40.6KB/s.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
cmd_err is used to handle error code, so it should not be unsigned.
This fixes the following warning when building with W=1 option:
drivers/i2c/busses/i2c-mxs.c: In function 'mxs_i2c_xfer_msg':
drivers/i2c/busses/i2c-mxs.c:331:19: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: stable@kernel.org
The init_completion() call does reinit not only the variable carrying
the flag that the completion finished, but also initialized the
waitqueue associated with the completion. On the contrary, the
INIT_COMPLETION() call only reinits the flag.
In case there was anything still stuck in the waitqueue, subsequent call
to init_completion() would be able to create possible race condition. This
patch uses the proper function and moves init_completion() into .probe() call
of the driver, to be issued only once.
Note that such scenario is impossible, since two threads can never enter the
mxs_i2c_xfer_msg(), since whole this section is protected by mutex in I2C core.
This by no means allows this issue to exit though.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
CONFIG_HOTPLUG is going away as an option. As result the __dev*
markings will be going away.
Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst,
and __devexit.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Peter Korsgaard <peter.korsgaard@barco.com> (for ocores and mux-gpio)
Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com> (for i2c-gpio)
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> (for puf3)
Acked-by: Barry Song <baohua.song@csr.com> (for sirf)
Reviewed-by: Jean Delvare <khali@linux-fr.org>
[wsa: Fixed "foo* bar" flaws while we are here]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
There is no reason to disable the I2C SMBus quick mode on this
IP block. Enable it. This essentially fixes the problem with the
"i2c-detect" command for probing the bus.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Properly terminate the DMA transfer in case the DMA PIO transfer
or setup fails for any reason.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This I2C master can do DMA and PIOQUEUE (PIO with FIFO). Originally,
only PIOQUEUE was supported and it had issues, then DMA support was added
this cycle. The original intention was to keep PIOQUEUE since it has
less overhead what is nice for small transfers. However, runtime
switching between PIOQEUE and DMA depending on the transfer size never
worked despite a lot of trying. Since PIOQUEUE mode itself was flaky
(polling at places where interrupts failed to work) and the
implementation also imposed a size limit for transfers, it is best to
remove the support, so users don't fall over its limitations. It also
makes the driver a lot cleaner and more robust. If somebody really wants
less overhead, plain PIO mode could still be implemented with the
addidtional advantage that this mode is also available on MX23, too.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch implements DMA support into mxs-i2c. DMA transfers are now enabled
via DT. The DMA operation is enabled by default.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
[wsa: rebased to 3.6-rc7]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Commit cd4f2d4 (i2c: mxs: Set I2C timing registers for mxs-i2c) only
covered the case for devicetree and made platform_data based boards
bail out with -EINVAL. Correctly support the latter one, too.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This patch configures the I2C bus timing registers according
to information passed via DT. Currently, 100kHz and 400kHz
modes are supported.
The TIMING2 register value is wrong in the documentation for
i.MX28! This was found and fixed by:
Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This patch mutes the false positive compiler warning:
drivers/i2c/busses/i2c-mxs.c: In function 'mxs_i2c_xfer_msg':
drivers/i2c/busses/i2c-mxs.c:206:8: warning: 'data' may be used uninitialized in this function [-Wuninitialized]
drivers/i2c/busses/i2c-mxs.c:196:6: note: 'data' was declared here
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
These continue the device tree work from part 1, this set is for the
tegra, mxs and imx platforms, all of which have dependencies on clock
or pinctrl changes submitted earlier.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPuex7AAoJEIwa5zzehBx3xsQP/jkyt74MvuKUi8pi2zkeMIgn
4XieyqcA0KZjJzfB22q3GIZjNIf/mEIGE4E/3bneVMPh/E2zaiohaXFExBmjNjml
hhzWeZlFGPBjrZsfpIXJIIUhwSI7gX2rjYh4npJmdNhZmy8Y89XnpNJhN1kOwMuV
oN23hPWoSVGbyDMQ0fmHx9GyOL8m7yap+joG13aljDa2OKpQg+pYvdwft+k1K9di
8yPF+qA043UUR7dSsjmTbiCcjZy2eySdCmfOAkEG4inSgxNoM7GBs3MuwZo/veCD
v5WssJqWDbLXtqKn5Uo2bvGWiEcf0xtwOAqhSpbaup3dQFJSWMEenBTtA9UlxFhk
6gdY62O+7k6N0thkxXyLNGkgaGzexZAsK7dM6XSDB+PqD+OSNJS7dvmxZM8tuaRn
rvCM1XWcNeN/dpnLbgwCR12efkwWtJoqqUZUUp/tFFaTo8HriqeAIYk7obnR8s9n
S5x9LeueQGNgaxXJzVdh481YKG/1lqjG/a06HbVgYS4XQvtdA+4khalOefJv10tm
Nkg8+4/8pMthWJfhhlfPUgWFXOXFF2AGPG4su2XwKuFXypO8599lzi7gUQaEZu2U
7caqoWP69KsKvK5iAAmA4DQ2rcsgHd44NXx/8Jjes9ma8knlYjrf42dBH6AZMQBG
69I9sJ1cyqusBwx72NPN
=WeDQ
-----END PGP SIGNATURE-----
Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc device tree conversions (part 2) from Olof Johansson:
"These continue the device tree work from part 1, this set is for the
tegra, mxs and imx platforms, all of which have dependencies on clock
or pinctrl changes submitted earlier."
Fix up trivial conflicts due to nearby changes in
drivers/{gpio/gpio,i2c/busses/i2c}-mxs.c
* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
ARM: dt: tegra: invert status=disable vs status=okay
ARM: dt: tegra: consistent basic property ordering
ARM: dt: tegra: sort nodes based on bus order
ARM: dt: tegra: remove duplicate device_type property
ARM: dt: tegra: consistenly use lower-case for hex constants
ARM: dt: tegra: format regs properties consistently
ARM: dt: tegra: gpio comment cleanup
ARM: dt: tegra: remove unnecessary unit addresses
ARM: dt: tegra: whitespace cleanup
ARM: dt: tegra cardhu: fix typo in SDHCI node name
ARM: dt: tegra: cardhu: register core regulator tps62361
ARM: dt: tegra30.dtsi: Add SMMU node
ARM: dt: tegra20.dtsi: Add GART node
ARM: dt: tegra30.dtsi: Add Memory Controller(MC) nodes
ARM: dt: tegra20.dtsi: Add Memory Controller(MC) nodes
ARM: dt: tegra: Add device tree support for AHB
ARM: dts: enable audio support for imx28-evk
ARM: dts: enable i2c device for imx28-evk
i2c: mxs: add device tree probe support
ARM: dts: enable mmc for imx28-evk
...
A number of devices are using a common register layout, this adds support
code for it in lib/stmp_device.c so we do not need to duplicate it in
each driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPuexlAAoJEIwa5zzehBx31P0P/jK7GC5Ln2gr/bV+4Kt9fStS
VcGI/ARsyQtwaNTJQfPkg8Weg3DhbPRlUWeimVKMFo3uEle3VjnPBjdcMPUKtW3x
SPka/W591LGEdKQRmXZrISm2OiQXVvM2zkhSJV89n/tJBdHd+tDWDDq4Y784F8Cj
hWmcIi66G4RBPj5pplf80UhNAEg5HoZHQnlgrS1iLMpBTwXAesv7zyZpvnsMzdpg
qSJTfcifgLULtM0WFbooNGojBn8ftuA67psrw78vgV2bz7bVBioZHYFyqPWK9Gr0
vtiKuyXqiDA65mueXA+E5RXXLCLQSyGdV8y0xiSYjilRVkziPcMKnQT07keb8SJN
CCDpetjEULiQpgKvVWc7sDGlb5ePd/C5rs31S0fFOKjeRJNlfG5+OuqZPiobO7hk
F2Fx3gq4LPLel7gwjK3T4XTmmL9kNt/y1sIfXx5WybJL8N5n6TdZIfWm6yOZYwfX
jvG/CnvVvhgdWk/ebaTEOG1MaeNAY3uwGpSBuEEoXUDHatQdOYAsgLfJJv/H4zKp
2AY9qvXTDtFYys/hs2WhwmS7s1WFlIrA+voEPBDa3WT2qGup8HAL/C9kL3ms2zqk
8JL/yQ/IJpTHPb4bCGo9C08qdi1YtMbylHB0/ELvG1BNoHOnCDV3wZlVG3ZTQQb5
c/Lb2H8crk5HVbpCPLQU
=VHLM
-----END PGP SIGNATURE-----
Merge tag 'stmp-dev' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc stmp-dev library code from Olof Johansson:
"A number of devices are using a common register layout, this adds
support code for it in lib/stmp_device.c so we do not need to
duplicate it in each driver."
Fix up trivial conflicts in drivers/i2c/busses/i2c-mxs.c and
lib/Makefile
* tag 'stmp-dev' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
i2c: mxs: use global reset function
lib: add support for stmp-style devices
With this, five platforms are moving to the relatively new pinctrl
subsystem for their pin management, replacing the older soc specific
in-kernel interfaces with common code.
There is quite a bit of net addition of code for each platform being
added to the pinctrl subsystem. but the payback comes later when adding
new boards can be done by only providing new device trees instead.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPuw1/AAoJEIwa5zzehBx3wbsP/RFCYzMVyz85BNLQuRyY9eO2
GCRWd0Vvy3fIfypiPdHdhkq6nIU/JnxgsfBbKX9FvWqvxXi96Ojh13KSIhSI1rQ9
t14VyuwUXaS3leeCyKxhNF1vRscz2iyEGXJqp+XEN4ckf2nrQCpKBiY5Eg9sH6/J
fvYgSBY9Lf9nFAn+/wqSKIfdvw7H0NXwUdsLvNU0uCwvrSG929bTxx2AnHX00TdJ
qf4XLhmatMg1uwdUgL/99ZxxgHlj6o55u7S6aRhUWXNXCimV6uEZ1F35ET37b+x3
YUltBCIaXjFR7iwNHmkkl42d8uyfkBznB555sY5qS3G/uF5Ma1R5I7fv8EIEy+2w
bVHsva4lj1yFazic6m8yKTET4i8n6OPiKVNqGnDsp2yb6WzOGSliKdr0Jlo1oNG2
gS69LcDZxCkXrqEq0Ht8uUoCo9TWei+qhJ6ZOJ1Z3+9ZyFq1iRTKgPVxyA5VaHaB
wwBbqKrohAwuExY8/gkAj6SYqBOF3l/J8QSB2JjXyj4trLC5UMq+l3L4cIWyMRPc
fil83hV6460CiIBoKcsnV9hDUS0oh74mv52zHo0Xj73qABqZ4dcrpHVayWjtMtpl
Z+tUpvD1rMQ+E0gdXDrwMrwILVyCDsBvpFKF4avnujDJ4WmyywtKZ+xvnpMd73VZ
YrI/+XQsMT8ZfVkkj54D
=HIfz
-----END PGP SIGNATURE-----
Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm soc-specific pinctrl changes from Olof Johansson:
"With this, five platforms are moving to the relatively new pinctrl
subsystem for their pin management, replacing the older soc specific
in-kernel interfaces with common code.
There is quite a bit of net addition of code for each platform being
added to the pinctrl subsystem. But the payback comes later when
adding new boards can be done by only providing new device trees
instead."
Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}
* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
mtd: nand: gpmi: fix compile error caused by pinctrl call
ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
ARM: nomadik: enable PINCTRL_NOMADIK where needed
ARM: mxs: enable pinctrl support
video: mxsfb: adopt pinctrl support
ASoC: mxs-saif: adopt pinctrl support
i2c: mxs: adopt pinctrl support
mtd: nand: gpmi: adopt pinctrl support
mmc: mxs-mmc: adopt pinctrl support
serial: mxs-auart: adopt pinctrl support
serial: amba-pl011: adopt pinctrl support
spi/imx: adopt pinctrl support
i2c: imx: adopt pinctrl support
can: flexcan: adopt pinctrl support
net: fec: adopt pinctrl support
ARM: ux500: switch MSP to using pinctrl for pins
ARM: ux500: alter MSP registration to return a device pointer
ARM: ux500: switch to using pinctrl for uart0
ARM: ux500: delete custom pin control system
ARM: ux500: switch over to Nomadik pinctrl driver
...
Add device tree probe support for i2c-mxs driver. So far, it's only
been tested on imx28.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Since the last fixes to this driver ensure now the queue termination is
done correctly, we can finally disable the queue after a transfer
without problems. The gain is that it will only be reenabled after the
next transfer is fully set up. Before, the queue was running all the
time and if the setup of the next message was interrupted by another
thread, an incomplete buffer could have been sent, padded with zeroes.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
After an error interrupt setting cmd->err, I see another interrupt that
the data engine is empty which clears cmd->err before being processed.
So, clear cmd->err at the beginning of a transfer only to handle these
consecutive interrupts.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
The former mach specific reset_block function has been converted to a global
one. Use the new one to remove mach dependency from the driver.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
The hardware generates an interrupt for every completed command in the
queue while the code assumed that it will only generate one interrupt
when the queue is empty. So, explicitly check if the queue is really
empty. This patch fixed problems which occurred due to high traffic on
the bus. While we are here, move the completion-initialization after the
parameter error checking.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: stable@kernel.org
mxs_reset_block() clears the PIO_QUEUE_MODE bit. So we have
to set it again after a controller reset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Currently only supporting the PIOQUEUE-mode, because DMA-support for
this platform is not yet in mainline. When it becomes available and
support has been added to this driver, it will also be suitable for
i.MX23 and STMP3xxx.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
