Even though "we have enough padding that it should be ok", round up the
watermark entries to the next unit to be on the safe side...
v2: Use the DIV_ROUND_UP macro
v3: Spotted a few more missing round-ups.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Apparently i830 and i845 cannot handle any stride that is not a multiple
of 256, unlike their brethren which do support 64 byte aligned strides.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
When trying to set other display mode besides the fixed panel mode, the
panel fitting should be enabled. This is similar to LVDS.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
This makes them sort to the front in X, which makes them likely to be
the primary outputs if you haven't specified a preference in your DE,
which is likely to be what you want.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Do this for both real eDP and for PCH_DP_D when used as the eDP
connection.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Move the common routines into separate functions to not only increase
readability, but also throwaway surplus code.
In doing so, we review the calculation of the aspect preserving scaling
and avoid the use of fixed-point until we need to calculate the accurate
scale factor.
v2: Improve comments as suggested by Jesse.
1 files changed, 105 insertions(+), 194 deletions(-)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
We already checked just a couple of lines above that we have found a
fixed_panel_mode for the LVDS, so remove the surplus check.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141 though the
workaround itself is still a bit of a mystery.
Tested-by: Adam Hill <sidepipeuk@yahoo.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
When trying to keep track of features between the kernel, the 2D driver,
mesa and the specs, it helps to list any other name by which the device
is referred to.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
The original i965, including the revised G35 and Q35, requires an
alignment of 128K for the display surface with linear memory, so
increase the requirement from 64k for these chipsets. For the later
chipsets in the i965 family, only a 4k alignment is required. (So
long as we do not start performing asynchronous flips.)
Note the impact of this should be slight as on i965 we should be using a
tiled frontbuffer for anything up to a 4096x4096 display.
v2: compilation fixes and note that the docs do not exclude the G35 from
the extra alignment.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Unmask the bits for link training reporting before starting link
training. If stage 1 training finished before we unmask them, then we'd
spin around in a loop a few times until smashing on through. Which is
harmless, since training _did_ succeed, it just looks ugly in dmesg.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
NUM_TV_MODES is the same as ARRAY_SIZE(tv_modes). In the end, I
decided it was cleaner to remove NUM_TV_MODES and just use
ARRAY_SIZE(tv_modes) through out.
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
References:
Bug 26691 - Spurious hangcheck whilst executing a long shader over a
large vertex buffer
https://bugs.freedesktop.org/show_bug.cgi?id=26691
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
We generally issue an error message at the point of failure, and so this
warning with a fairly pointless stacktrace is superfluous and ugly.
Needless to say, the common trigger for this WARN happens to be EIO
where this is pure noise.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Since mode->clock is in kHz we should be checking against 2700000
instead of just 27000. This patch gets my x201s working again (well
working as well as it ever was anyway).
When looking for this I also noticed we set link_bw to 270000, but the
calculation is different. Does it also need to use kHz or we using
10kHz internally?
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_tv.c|479 col 16| warning: cast truncates bits
from constant value (8 becomes 0)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_drv.c|485 col 25| warning: symbol 'i915_pm_ops' was not declared. Should it be static?
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_drv.c|100 col 18| warning: Initializer entry defined twice
drivers/gpu/drm/i915/i915_drv.c|101 col 3| also defined here
drivers/gpu/drm/i915/i915_drv.c|117 col 18| warning: Initializer entry defined twice
drivers/gpu/drm/i915/i915_drv.c|118 col 3| also defined here
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_drv.h|676 col 19| warning: dubious bitfield without explicit `signed' or `unsigned'
drivers/gpu/drm/i915/i915_drv.h|712 col 19| warning: dubious bitfield without explicit `signed' or `unsigned'
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Simple fix for error propagation along the old UMS path.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
checkpatch complains about this define:
WARNING: space prohibited between function name and open parenthesis '('
+#define GEN6_RENDER TIMEOUT_COUNTER_EXPIRED (1 << 6)
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
About 0.2W power can be saved on one HP laptop.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
The hardware team suggest that the "large buffer" method should be
used to calculate the cursor watermark under non-SR state as well,
which is to avoid the flicker when FBC is enabled on Ironlake.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
In SR mode cursor plane watermark calculation uses same formula
like display plane. This one fixes the case for 965G and G45.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
The total self-refresh fifo entry size for display plane is 512
instead of 128 for 965G. Also fix WM value mask for 965G.
About 1.0W power can be saved on one T61 laptop after the self-refresh
watermark is configured correctly.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
For self-refresh mode WM calculation's "line time" should use
mode's htotal instead of hdisplay. "surface width" is the hdisplay
for display plane and 64 for cursor plane.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This one adds support for eDP that connected on PCH DP-D port
instead of CPU DP-A port, and only DP-D port could be used for eDP.
https://bugs.freedesktop.org/show_bug.cgi?id=27220
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Jan-Hendrik Zab <jan@jhz.name>
Tested-by: Templar <templar@rshc.de>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Having two sets has made me think I caught a bug more than once now.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
On some machines (currently only the Toshiba Tecra A11 is known), the GPU
locks up when modeset is forced on LID open. This patch adds a new DMI
blacklist and omits modesetting for all matches.
Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15550
Signed-off-by: Thomas Bächler <thomas@archlinux.org>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
* 'nouveau/for-airlied' of ../drm-nouveau-next: (77 commits)
drm/nouveau: set TASK_(UN)INTERRUPTIBLE before schedule_timeout()
drm/nv50: fix some not-error error messages
drm/nouveau: introduce gpio engine
drm/nv50: correct wait condition for instmem flush
drm/nouveau: Fix TV-out detection on unposted cards lacking a usable DCB table.
drm/nouveau: Get rid of the remaining VGA CRTC locking.
drm/nouveau: Move display init to a new nouveau_engine.
drm/nouveau: Put back the old 2-messages I2C slave test.
drm/nouveau: Reset AGP before running the init scripts.
drm/nv30: Init the PFB+0x3xx memory timing regs.
drm/nouveau: disable hotplug detect around DP link training
drm/nv50: add function to control GPIO IRQ reporting
drm/nouveau: add nv_mask register accessor
drm/nouveau: fix build without CONFIG_ACPI
drm/nouveau: Reset CRTC owner to 0 before BIOS init.
drm/nouveau: No need to lock/unlock the VGA CRTC regs all the time.
drm/nouveau: Remove useless CRTC_OWNER logging.
drm/nouveau: Add some generic I2C gadget detection code.
drm/i2c/ch7006: Don't assume that the specified config points to static memory.
drm/nv04-nv3x: Implement init-compute-mem.
...
Conflicts:
drivers/gpu/drm/nouveau/nouveau_bios.c
* 'drm-radeon-next' of ../drm-radeon-next: (333 commits)
drm/radeon/kms: trivial code style fixes for audio
drm/radeon: remove viewport transform from r6xx/r7xx blit emit
drm/radeon: group r6xx/r7xx newly sequential blit state
drm/radeon: reorder r6xx/r7xx blit state emit to make more regs sequential
drm/radeon: r6xx/r7xx move vport clipping to a single packet
drm/radeon: group r6xx/r7xx sequential blit state
drm/radeon: remove duplicate state emit in r6xx/r7xx blit
drm/radeon: add comments to r6xx/r7xx blit state
drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
drm/radeon/kms: remove rs4xx gart limit
drm: radeon: fix sign bug
drm/radeon/kms: check/restore sanity before doing anything else with GPU.
drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
drm/radeon/kms: add ioport register access
drm/radeon/kms: enable HDMI audio on RS600/RS690/RS740
drm/radeon/kms: track audio engine state, do not use not setup timer
drm/radeon/kms/r6xx+: add query for tile config (v2)
drm/radeon/kms: fix CS alignment checking for tiling (v2)
drm/radeon/kms: add tiling support to the cs checker for r6xx/r7xx
drm/radeon/kms: Add crtc tiling setup support for evergreen
...
sil164 transmitters are used for DVI outputs on Intel/nvidia and ATI setups.
So far only nouveau can use this driver.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Patrice Mandin <patmandin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
