Commit Graph

244 Commits

Author SHA1 Message Date
Geert Uytterhoeven
66d7a40beb mtd: nand: MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
The MediaTek Hardware ECC Engine is only present on MediaTek MT27xx and
MT76xx SoCs.  The driver for this engine is a dependency for the
MediaTek NAND controller (MTD_NAND_MTK) and the MediaTek SPI NAND Flash
Interface (SPI_MTK_SNFI) drivers, both of which already depend on
ARCH_MEDIATEK.

Hence add a dependency on ARCH_MEDIATEK to the Hardware ECC Engine
driver, too, to prevent asking the user about this driver when
configuring a kernel without MediaTek SoC support.

Fixes: 4fd62f15af ("mtd: nand: make mtk_ecc.c a separated module")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/bb9568e825d4bc7506870b03836baa91bcc4b725.1652104136.git.geert+renesas@glider.be
2022-05-12 16:43:04 +02:00
Chuanhong Guo
4fd62f15af mtd: nand: make mtk_ecc.c a separated module
this code will be used in mediatek snfi spi-mem controller with
pipelined ECC engine.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220424032527.673605-2-gch981213@gmail.com
2022-04-27 18:12:35 +02:00
Miquel Raynal
8f877b7eab mtd: nand: ecc: mxic: Fix compile test issue
Avoid random build errors with architectures which do not select
HAS_IOMEM by depending on it in Kconfig.

This fixes the following warning:

/home/mraynal/0day/gcc-11.2.0-nolibc/s390-linux/bin/s390-linux-ld:
drivers/mtd/nand/ecc-mxic.o: in function `mxic_ecc_probe':
ecc-mxic.c:(.text+0x2244): undefined reference to `devm_platform_ioremap_resource'

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220314152336.75447-1-miquel.raynal@bootlin.com
2022-03-14 17:05:35 +01:00
Miquel Raynal
48e6633a9f mtd: nand: mxic-ecc: Add Macronix external ECC engine support
Some SPI-NAND chips do not support on-die ECC. For these chips,
correction must apply on the SPI controller end. In order to avoid
doing all the calculations by software, Macronix provides a specific
engine that can offload the intensive work.

Add Macronix ECC engine support, this engine can work in conjunction
with a SPI controller and a raw NAND controller, it can be pipelined
or external and supports linear and syndrome layouts.

Right now the simplest configuration is supported: SPI controller
external and linear ECC engine.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-15-miquel.raynal@bootlin.com
2022-02-09 09:49:25 +01:00
Miquel Raynal
928f0736e9 mtd: nand: Change dependency between the NAND and ECC cores
The NAND ECC core is included in the generic NAND core when it is
compiled in.

Different software ECC engines drivers will select the NAND ECC core
and thus also have a dependency on the NAND core. Using a "depends on"
between the two leads to possible cases (not real cases, but created
by robots) where one is still unselected because of the "select does
not verifies depends on" game:

WARNING: unmet direct dependencies detected for MTD_NAND_ECC
  Depends on [n]: MTD [=m] && MTD_NAND_CORE [=n]
  Selected by [m]:
  - MTD_NAND_ECC_SW_HAMMING [=y] && MTD [=m]
  - MTD_NAND_ECC_SW_BCH [=y] && MTD [=m]

Fix this by using a select instead.

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/linux-mtd/20201113123945.32592-1-miquel.raynal@bootlin.com
2020-12-10 22:37:32 +01:00
Miquel Raynal
5180a62c12 mtd: nand: ecc-hamming: Let the software Hamming ECC engine be unselected
There is no reason to always embed the software Hamming ECC engine
implementation. By default it is (with raw NAND), but we can let the
user decide.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-19-miquel.raynal@bootlin.com
2020-12-10 22:37:30 +01:00
Miquel Raynal
e5acf9c862 mtd: nand: ecc-hamming: Move Hamming code to the generic NAND layer
Hamming ECC code might be later re-used by the SPI NAND layer.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-12-miquel.raynal@bootlin.com
2020-12-10 22:37:29 +01:00
Miquel Raynal
cdbe8df5e2 mtd: nand: ecc-bch: Move BCH code to the generic NAND layer
BCH ECC code might be later re-used by the SPI NAND layer.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-3-miquel.raynal@bootlin.com
2020-11-30 09:27:32 +01:00
Miquel Raynal
a8c7ffdb5f mtd: nand: Introduce the ECC engine framework
Create a generic ECC engine framework. This is a base to instantiate ECC
engine objects.

If we really want to be generic, bindings must evolve, so here is the
new logic. The following three properties are mutually exclusive:
- The nand-no-ecc-engine boolean property is set and there is no
  ECC engine to retrieve.
- The nand-use-soft-ecc-engine boolean property is set and the core
  will force using the use of software correction.
- There is a nand-ecc-engine property pointing at a node which will
  act as ECC engine.

It the later case, the property may reference:
- The NAND chip node itself (for the on-die ECC case).
- The parent node if the NAND controller embeds an ECC engine.
- Any other node being an external ECC controller as well.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-9-miquel.raynal@bootlin.com
2020-09-02 09:28:15 +02:00
Miquel Raynal
deedeb60e8 mtd: nand: Add an extra level in the Kconfig hierarchy
Use an extra level in Kconfig for all NAND related entries.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200529002517.3546-11-miquel.raynal@bootlin.com
2020-06-26 08:35:03 +02:00
Thomas Gleixner
ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Miquel Raynal
31bc36c455 mtd: nand: Remove useless line in Kconfig
Prepare changes that will lay in this file to better express what is
NAND related and what is not in menuconfig.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-04-18 08:54:01 +02:00
Peter Pan
7529df4652 mtd: nand: Add core infrastructure to support SPI NANDs
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.

In its current state, this framework supports the following features:

- single/dual/quad IO modes
- on-die ECC

Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18 09:24:10 +02:00
Boris Brezillon
26777d3721 mtd: Move onenand code base to drivers/mtd/nand/onenand
Move onenand code base to the drivers/mtd/nand directory in the hope
that someday someone will patch it to use the generic NAND helpers.
If it never happens, at least we'll have all NAND related support in a
single directory and not spread over the drivers/mtd/ directory.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-03-15 15:40:37 +01:00
Boris Brezillon
9c3736a3de mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-02-16 10:10:53 +01:00
Boris Brezillon
93db446a42 mtd: nand: move raw NAND related code to the raw/ subdir
As part of the process of sharing more code between different NAND
based devices, we need to move all raw NAND related code to the raw/
subdirectory.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-02-16 10:09:34 +01:00
Miquel Raynal
02f26ecf8c mtd: nand: add reworked Marvell NAND controller driver
Add marvell_nand driver which aims at replacing the existing pxa3xx_nand
driver.

The new driver intends to be easier to understand and follows the brand
new NAND framework rules by implementing hooks for every pattern the
controller might support and referencing them inside a parser object
that will be given to the core at each ->exec_op() call.

Raw accessors are implemented, useful to test/debug memory/filesystem
corruptions. Userspace binaries contained in the mtd-utils package may
now be used and their output trusted.

Most of the DT nodes using the old driver kept non-optimal timings from
the bootloader (even if there was some mechanisms to derive them if the
chip was ONFI compliant). The new default is to implement
->setup_data_interface() and follow the core's decision regarding the
chip.

Thanks to the improved timings, implementation of ONFI mode 5 support
(with EDO managed by adding a delay on data sampling), merging the
commands together and optimizing writes in the command registers, the
new driver may achieve faster throughputs in both directions.
Measurements show an improvement of about +23% read throughput and +24%
write throughput. These measurements have been done with an
Armada-385-DB-AP (4kiB NAND pages forced in 4-bit strength BCH ECC
correction) using the userspace tool 'flash_speed' from the MTD test
suite.

Besides these important topics, the new driver addresses several
unsolved known issues in the old driver which:
- did not work with ECC soft neither with ECC none ;
- relied on naked read/write (which is unchanged) while the NFCv1
  embedded in the pxa3xx platforms do not implement it, so several
  NAND commands did not actually ever work without any notice (like
  reading the ONFI PARAM_PAGE or SET/GET_FEATURES) ;
- wrote the OOB data correctly, but was not able to read it correctly
  past the first OOB data chunk ;
- did not retrieve ECC bytes ;
- used device tree bindings that did not allow more than one NAND chip,
  and did not allow to choose the correct chip select if not
  incrementing from 0. Plus, the Ready/Busy line used had to be 0.

Old device tree bindings are still supported but deprecated. A more
hierarchical view has to be used to keep the controller and the NAND
chip structures clearly separated both inside the device tree and also
in the driver code.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2018-01-12 15:17:06 +01:00
Sascha Hauer
34832dc44d mtd: nand: gpmi-nand: Remove wrong Kconfig help text
The GPMI nand Kconfig help texts mentions that the GPMI nand driver
might conflict with SD cards. The only conflict there might really
be is that both controllers use the same pins, but this is resolved
by the pincontroller setup in the device tree. In any way the GPMI
driver can safely be enabled, the text is just wrong. Remove it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-11-30 22:32:19 +01:00
Gregory CLEMENT
263c68afb5 mtd: nand: pxa3xx_nand: Update Kconfig information
More and more SoCs use the pxa3xx_nand driver for their controller but
the list of them was not updated. This patch add the last SoCs using the
driver.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-10-07 11:28:06 +02:00
Gregory CLEMENT
1498fbaf70 mtd: nand: pxa3xx_nand: enable building on mvebu 64-bit platforms
The controller supported by the pxa3xx_nand driver is also available on
the mvebu 64-bit SoCs, such as the Armada 7K and Armada 8K SoCs. This
patch updates the Kconfig dependency to allow building the kernel for
this SoC family too.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-08-23 16:49:18 +02:00
Boris Brezillon
f9ce2eddf1 mtd: nand: atmel: Add ->setup_data_interface() hooks
The NAND controller IP can adapt the NAND controller timings dynamically.
Implement the ->setup_data_interface() hook to support this feature.

Note that it's not supported on at91rm9200 because this SoC has a
completely different SMC block, which is not supported yet.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01 10:09:29 +02:00
Ezequiel Garcia
6f9ad5f360 mtd: nand: Add Mediatek machine dependency
The Mediatek NAND driver is only needed for a specific
platform, so avoid cluttering the configuration.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-15 12:00:29 +02:00
Ezequiel Garcia
7699f1e358 mtd: nand: Add Hisilicon machine dependency
The Hisilicon NAND driver is only needed for a specific
platform, so avoid cluttering the configuration.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-15 11:59:59 +02:00
Boris Brezillon
f88fc122cc mtd: nand: Cleanup/rework the atmel_nand driver
This is a complete rewrite of the driver whose main purpose is to
support the new DT representation where the NAND controller node is now
really visible in the DT and appears under the EBI bus. With this new
representation, we can add other devices under the EBI bus without
risking pinmuxing conflicts (the NAND controller is under the EBI
bus logic and as such, share some of its pins with other devices
connected on this bus).

Even though the goal of this rework was not necessarily to add new
features, the new driver has been designed with this in mind. With a
clearer separation between the different blocks and different IP
revisions, adding new functionalities should be easier (we already
have plans to support SMC timing configuration so that we no longer
have to rely on the configuration done by the bootloader/bootstrap).

Also note that we no longer have a custom ->cmdfunc() implementation,
which means we can now benefit from new features added in the core
implementation for free (support for new NAND operations for example).

The last thing that we gain with this rework is support for multi-chips
and multi-dies chips, thanks to the clean NAND controller <-> NAND
devices representation.

During this transition we also dropped support for AVR32 SoCs which
should soon disappear from mainline (removal of the AVR32 arch is
planned for 4.12).

This new driver has been tested on several platforms (at91sam9261,
at91sam9g45, at91sam9x5, sama5d3 and sama5d4) to make sure it did not
introduce regressions, and it's worth mentioning that old bindings are
still supported (which partly explain the positive diffstat).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2017-04-25 14:18:29 +02:00
Masahiro Yamada
357cc408a4 mtd: nand: denali: remove unused CONFIG option and macros
All of these macros are not used at all.
CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR is not used for anything but
defining SCRATCH_REG_ADDR.  The config option should go away as well.

I am removing some register macros.  They are not used, and do not
exist in recent IP versions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-24 09:51:28 +01:00
Alison Wang
01eb9ae1ae mtd: nand: Update dependency of IFC for LS1021A
As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.

LS1021A is an earlier product and is not compatible with later
LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-16 10:30:35 +01:00
Boris Brezillon
f16bd7ca04 mtd: nand: Kill the MTD_NAND_IDS Kconfig option
MTD_NAND_IDS is selected by MTD_NAND, which makes it useless. Remove
the Kconfig option and link nand_ids.o into the nand.o object file.
Doing that also prevents creating an extra nand_ids.ko module when
MTD_NAND is activated as a module.

Since nand_ids.c is no longer compiled as a standalone module and the
nand_manuf_ids/nand_flash_ids symbols are only used in nand_base.c, we
can get rid of the MODULE_XXX() and EXPORT_SYMBOL() definitions.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:18 +01:00
Jean Delvare
de0b34455a mtd: nand: Add OX820 NAND hardware dependency
The oxnas NAND driver is only needed for a specific platform, do
not propose it on other platforms unless build-testing.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Fixes: 6685924924 ("mtd: nand: Add OX820 NAND Support")
Cc: Rob Herring <robh@kernel.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:51:02 +01:00
Linus Walleij
4404d7d821 mtd: nand: fsmc: remove stale non-DT probe path
The FSMC driver has an execution path and a header file in
<linux/mtd/fsmc.h> that serves to support passing in platform
data through board files, albeit no upstream users of this
mechanism exist.

The header file also contains function headers for functions that
do not exist in the kernel.

Delete this and move the platform data struct, parsing and
handling into the driver, assume we are using OF and make the
driver depend on OF, remove the ifdefs making that optional.

Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:50:30 +01:00
Randy Dunlap
f0fcdc506b mtd: nand: oxnas_nand: fix build errors on arch/um, require HAS_IOMEM
Fix build errors on arch/um, which does not support HAS_IOMEM,
while the oxnas_nand.c driver uses interfaces that are
supplied by HAS_IOMEM.

(loadable module build:)
ERROR: "devm_ioremap_resource" [drivers/mtd/nand/oxnas_nand.ko] undefined!
or (built-in build:)
drivers/built-in.o: In function `oxnas_nand_probe':
drivers/mtd/nand/oxnas_nand.c:102: undefined reference to `devm_ioremap_resource'

Fixes: 6685924924 ("mtd: nand: Add OX820 NAND Support")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-02 09:56:57 +01:00
Hauke Mehrtens
73529c872a mtd: nand: xway: disable module support
The xway_nand driver accesses the ltq_ebu_membase symbol which is not
exported. This also should not get exported and we should handle the
EBU interface in a better way later. This quick fix just deactivated
support for building as module.

Fixes: 99f2b10792 ("mtd: lantiq: Add NAND support on Lantiq XWAY SoC.")
Cc: <stable@vger.kernel.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-02 09:43:57 +01:00
Marc Gonzalez
6956e2385a mtd: nand: add tango NAND flash controller support
This driver supports the NAND Flash controller embedded in recent
Tango chips, such as SMP8758 and SMP8759.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-11-07 14:48:39 +01:00
Sergio Prado
e9f66ae23c mtd: s3c2410: make ecc mode configurable via platform data
Removing CONFIG_MTD_NAND_S3C2410_HWECC option and adding a ecc_mode
field in the drivers's platform data structure so it can be selectable
via platform data.

Also setting this field to NAND_ECC_SOFT in all boards using this
driver since none of them had CONFIG_MTD_NAND_S3C2410_HWECC enabled.

Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-11-07 14:48:35 +01:00
Neil Armstrong
6685924924 mtd: nand: Add OX820 NAND Support
Add NAND driver to support the Oxford Semiconductor OX820 NAND Controller.
This is a simple memory mapped NAND controller with single chip select and
software ECC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-10-22 14:24:21 +02:00
Roger Quadros
e13f880b90 mtd: nand: Allow MTD_NAND_OMAP2 to be usable on Keystone devices
Some Keystone devices (e.g. K2G) include a OMAP NAND IP.
Allow the NAND driver to be usable for both
Keystone and OMAP devices.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Andrey Smirnov
75c19e58ab Kconfig: nand: Remove redundant dependency on MTD_NAND
Config MTD_NAND_FSL_IFC is already located inside 'if MTD_NAND'
statment, so there's no need to explicitly specify it as a dependency.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Andrey Smirnov
107896c588 Kconfig: nand: Make MTD_NAND_FSL_ELBC depend on FSL_SOC
MTD_NAND_FSL_ELBC selects FSL_LBC that in turn depends on FSL_SOC, so
depending on PPC instead of FSL_SOC leads to this message:

	  warning: (MPC836x_RDK && MTD_NAND_FSL_ELBC &&
	  MTD_NAND_FSL_UPM) selects FSL_LBC which has unmet direct
	  dependencies (FSL_SOC)

when doing

	  make ARCH=powerpc \
	       CROSS_COMPILE=powerpc-e500v2-linux-gnuspe- \
	       allmodconfig"

Changing dependency to FSL_SOC fixes that.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Brian Norris
1ed106914a This pull request contains only one notable change:
* Addition of the MTK NAND controller driver
 
 And a bunch of specific NAND driver improvements/fixes. Here are the
 changes that are worth mentioning:
 * A few fixes/improvements for the xway NAND controller driver
 * A few fixes for the sunxi NAND controller driver
 * Support for DMA in the sunxi NAND driver
 * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
 * Addition for bitflips detection in erased pages to the brcmnand driver
 * Support for new brcmnand IPs
 * Update of the OMAP-GPMC binding to support DMA channel description
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Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtd

Pull NAND changes from Boris Brezillon:
"""
This pull request contains only one notable change:
* Addition of the MTK NAND controller driver

And a bunch of specific NAND driver improvements/fixes. Here are the
changes that are worth mentioning:
* A few fixes/improvements for the xway NAND controller driver
* A few fixes for the sunxi NAND controller driver
* Support for DMA in the sunxi NAND driver
* Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
* Addition for bitflips detection in erased pages to the brcmnand driver
* Support for new brcmnand IPs
* Update of the OMAP-GPMC binding to support DMA channel description
"""
2016-07-15 17:06:26 -07:00
Raghav Dogra
8ea126bc1a memory: Update dependency of IFC for Layerscape
This patch enables IFC NAND support on ARM layerscape platform.
It fixes the dependency to enable NAND. The include files are being modified
to ensure complilation for both PowerPC and ARM architectures.

Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-07-13 17:31:10 -07:00
Hauke Mehrtens
024366750c mtd: nand: xway: convert to normal platform driver
Instead of hacking this into the plat_nand driver just make this a
normal nand driver.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-07-11 08:40:14 +02:00
Jorge Ramirez-Ortiz
1d6b1e4649 mtd: mediatek: driver for MTK Smart Device
Add support for mediatek's SDG1 NFC nand controller embedded in SoC
2701

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Xiaolei Li <xiaolei.li@mediatek.com>
2016-07-11 08:39:54 +02:00
Archit Taneja
c76b78d8ec mtd: nand: Qualcomm NAND controller driver
The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx,
MDM9x15 series.

It exists as a sub block inside the IPs EBI2 (External Bus Interface 2)
and QPIC (Qualcomm Parallel Interface Controller). These IPs provide a
broader interface for external slow peripheral devices such as LCD and
NAND/NOR flash memory or SRAM like interfaces.

We add support for the NAND controller found within EBI2. For the SoCs
of our interest, we only use the NAND controller within EBI2. Therefore,
it's safe for us to assume that the NAND controller is a standalone block
within the SoC.

The controller supports 512B, 2kB, 4kB and 8kB page 8-bit and 16-bit NAND
flash devices. It contains a HW ECC block that supports BCH ECC (4, 8 and
16 bit correction/step) and RS ECC(4 bit correction/step) that covers main
and spare data. The controller contains an internal 512 byte page buffer
to which we read/write via DMA. The EBI2 type NAND controller uses ADM DMA
for register read/write and data transfers. The controller performs page
reads and writes at a codeword/step level of 512 bytes. It can support up
to 2 external chips of different configurations.

The driver prepares register read and write configuration descriptors for
each codeword, followed by data descriptors to read or write data from the
controller's internal buffer. It uses a single ADM DMA channel that we get
via dmaengine API. The controller requires 2 ADM CRCIs for command and
data flow control. These are passed via DT.

The ecc layout used by the controller is syndrome like, but we can't use
the standard syndrome ecc ops because of several reasons. First, the amount
of data bytes covered by ecc isn't same in each step. Second, writing to
free oob space requires us writing to the entire step in which the oob
lies. This forces us to create our own ecc ops.

One more difference is how the controller accesses the bad block marker.
The controller ignores reading the marker when ECC is enabled. ECC needs
to be explicity disabled to read or write to the bad block marker. The
nand_bbt helpers library hence can't access BBMs for the controller.
For now, we skip the creation of BBT and populate chip->block_bad and
chip->block_markbad helpers instead.

Reviewed-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-10 11:02:17 -08:00
Richard Weinberger
02c3b0bd69 mtd: cs553x: Fix dependencies for !HAS_IOMEM archs
Not every arch has io memory nor can this driver ever work
on UML/i386.
So, unbreak the build by fixing the dependencies.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-01 09:37:03 -08:00
Richard Weinberger
15c0be7bec mtd: Fix dependencies for !HAS_IOMEM archs
Not every arch has io memory.
So, unbreak the build by fixing the dependencies.

Signed-off-by: Richard Weinberger <richard@nod.at>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26 11:30:31 -08:00
Alex Smith
ae02ab00aa mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
well as the hardware BCH controller. DMA is not currently implemented.

While older 47xx SoCs also have a BCH controller, they are incompatible
with the one in the 4780 due to differing register/bit positions, which
would make implementing a common driver for them quite messy.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Brian: fixed a few small mistakes]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-07 09:35:11 -08:00
Masahiro Yamada
0ed6ca3a22 mtd: denali: make MTD_NAND_DENALI_DT dependent on OF
The build passes even if CONFIG_OF is undefined, but it makes sense
to let it depend on OF.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18 18:20:41 -08:00
Geert Uytterhoeven
d5c5620167 mtd: nand: Confine MTD_NAND_SH_FLCTL to SUPERH
As of commit a521422ea4 ("ARM: shmobile: mackerel: Remove Legacy C
board code"), the Renesas SuperH FLCTL driver is no longer used on ARM
SH-Mobile SoCs. Restrict the dependencies, unless compile-testing.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-09 18:18:05 -08:00
Anup Patel
ebdee13ac2 mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64
The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence
this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND
for ARM64.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-12 14:17:40 -07:00
Stefan Agner
049f425099 mtd: nand: vf610_nfc: add hardware BCH-ECC support
This adds hardware ECC support using the BCH encoder in the NFC IP.
The ECC encoder supports up to 32-bit correction by using 60 error
correction bytes. There is no sub-page ECC step, ECC is calculated
always across the whole page (up to 2k pages).

Limitations:
- HW ECC: Only 2K page with 64+ OOB.
- HW ECC: Only 24 and 32-bit error correction implemented.

Raw writes have been tested using the generic nand_write_page_raw
implementation. However, raw reads are currently not possible
because the controller need to know whether we are going to use
the ECC mode already at NAND_CMD_READ0 command time. At this point
we do not have the information whether it is a raw read or a
regular read at driver level...

Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-29 13:47:58 -07:00
Stefan Agner
456930d80a mtd: nand: vf610_nfc: Freescale NFC for VF610, MPC5125 and others
This driver supports Freescale NFC (NAND flash controller) found on
Vybrid (VF610), MPC5125, MCF54418 and Kinetis K70. The driver has
been tested using 8-bit and 16-bit NAND interface on the ARM based
Vybrid SoC VF500 and VF610 platform.
parameter page reading.

Limitations:
- Untested on MPC5125 and M54418.
- DMA and pipelining not used.
- 2K pages or less.
- No chip select, one NAND chip per controller.
- No hardware ECC.

Some paths have been hand-optimized and evaluated by measurements
made using mtd_speedtest.ko on a 100MB MTD partition.

Colibri VF50
        eb write     %   eb read     %   page write      %   page read     %
rel/opt     5175           11537                4560             11039
opt         5164 -0.21     11420 -1.01          4737 +3.88       10918 -1.10
none        5113 -1.20     11352 -1.60          4490 -1.54       10865 -1.58

Colibri VF61
        eb write     %   eb read     %   page write      %   page read     %
rel/opt     5766           13096                5459             12846
opt         5883 +2.03     13064 -0.24          5561 +1.87       12802 -0.34
none        5701 -1.13     12980 -0.89          5488 +0.53       12735 -0.86

rel = using readl_relaxed/writel_relaxed in optimized paths
opt = hand-optimized by combining multiple accesses into one read/write

The measurements have not been statistically verfied, hence use them
with care. The author came to the conclusion that using the relaxed
variants of readl/writel are not worth the additional code.

Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Tested-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Alexey Klimov <klimov.linux@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-29 13:47:58 -07:00