Implement support for pinctrl on lantiq/xway socs. The IO core found on these
socs has the registers for pinctrl, pinconf and gpio mixed up in the same
register range. As the gpio_chip handling is only a few lines, the driver also
implements the gpio functionality. This obseletes the old gpio driver that was
located in the arch/ folder.
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
With pinctrl-single,bits it is possible to update just part of the register
within the pinctrl-single,function-mask area.
This is useful when one register configures mmore than one pin's mux.
pinctrl-single,bits takes three parameters:
<reg offset, value, sub-mask>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[Removed a misplaced comment]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Another possible pin configuration for the MC1 pin group.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the pcs->fmask to make sure that the value is not changing (setting)
bits in areas where it should not.
To avoid situations like this:
pmx_dummy: pinmux@4a100040 {
compatible = "pinctrl-single";
reg = <0x4a100040 0x0196>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x00ff>;
};
&pmx_dummy {
pinctrl-names = "default";
pinctrl-0 = <&board_pins>;
board_pins: pinmux_board_pins {
pinctrl-single,pins = <
0x6c 0xf0f
0x6e 0x10f
0x70 0x23f
0x72 0xa5f
>;
};
};
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add information about the Exynos4210 pin banks and driver data which is
used by the Samsung pinctrl driver. In addition to this, the support for
external gpio and wakeup interrupt support is included and hooked up with
the Samsung pinctrl driver.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add a new device tree enabled pinctrl and gpiolib driver for Samsung
SoC's. This driver provides a common and extensible framework for all
Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
driver supports only device tree based instantiation and hence can be
used only on those Samsung platforms that have device tree enabled.
This driver is split into two parts: the pinctrl interface and the gpiolib
interface. The pinctrl interface registers pinctrl devices with the pinctrl
subsystem and gpiolib interface registers gpio chips with the gpiolib
subsystem. The information about the pins, pin groups, pin functions and
gpio chips, which are SoC specific, are parsed from device tree node.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This makes us possible to define pinmux mapping in board-specific DTS.
prima2.dtsi provides all possible (groups,functions) configuration, and
device in .dts select configurations from dtsi files.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The io-pci series has gained a merge to resolve a nontrivial
conflict.
* cleanup/io-pci:
ARM: Fix ioremap() of address zero
Also includes an update to Linux 3.6-rc3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ux500 machines performs pins (GPIO) reconfiguration when entering
in the suspended mode. This reconfiguration aims at reaching an ultra
low power HW configuration.
Due to this HW reconfiguration, some HW devices can change of HW state
and have their output signals at level that could generate IRQs.
If the non-wakeup IRQs are disabled but not yet masked (delayed interrupt
disable feature from the generic irq layer), effective interrupts reach
the system only because the system attempt to enter the suspended mode.
To prevent such IRQs to trig, all irq chips embedded in ux500 platform
should enable their IRQCHIP_MASK_ON_SUSPEND flag.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Unlike imx6q pinctrl driver that starts nubmering pad from 0, imx5
pinctrl drivers number pad from 1. It causes problem/confusion when
driver accesses imx51_pinctrl_pads array using pin ID as the index.
Change imx51_pads and imx53_pads numbering start from 0.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is mostly cut'n'paste from the imx51 pinctrl driver.
The data was generated using sed and awk on
arch/arm/plat-mxc/include/mach/iomux-mx35.h.
Changes since (implicit) v1
- remove references to file names in binding documentation
- remove sed commands from comments in driver
- add explicit numbers for pins and functions
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the STN8815 ASIC for the Nomadik pin
controller.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This implements a subdriver for the DB8540 ASIC for the
Nomadik pin controller.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is yet another way to mux the keyboard, so fix up that
group.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSI should be 0x7bc rather
than NO_PAD. This error will cause SD2 probe failure.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In function pinctrl_get_locked, pointer p is returned on
error, and also return on no_error.
So, we just return it with no error test.
It's pretty the same in function pinctrl_lookup_state_locked:
state is returned in every case, so we drop the error test
and just return state.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
The irqdomain conversion failed to notice that we do not always
have a DT node to dereference, fix this up by using a simple
dev_err() that also tells the name of the device.
Cc: Loic Pallardy <loic.pallardy@st.com>
Cc: Patrice Chotard <patrice.chotard@stericsson.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move the platform-specific COH901 pin control header out of the
ARM tree and down into the proper platform data include
directory.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As the non-U335 U300 variants are retired from the ARM tree,
also delete the pinctrl driver codepaths for these variants.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
devm_kfree should not have to be explicitly used.
The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
expression x,d;
@@
x = devm_kzalloc(...)
...
?-devm_kfree(d,x);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
the pointers that are allocated with devm_kzalloc will be automatically freed,
at unload time.
Signed-off-by: Devendra Naga <develkernel412222@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tidy up a small typo in the HSI function group list.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
the allocated memory will be destroyed at the driver unload time,
automatically if driver uses the devm_ functions, so no need of
doing devm_kfree at the error path
Signed-off-by: Devendra Naga <develkernel412222@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It's not so usual, but there are still some cases which require pinctrl
driver function at arch_initcall time. So register imx23 and imx28
pinctrl driver at postcore_initcall time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Various cleanups to the U300 driver
- Refactor the pin control core to automatically remove
any GPIO ranges when the drivers are removed, instead of
having the drivers do this explicitly.
- Add a function for registering a batch of GPIO ranges.
- Fix a number of incorrect but non-regressive error checks.
- Incremental improvements to the COH901, i.MX and Nomadik drivers
- Add a one-register-per-pin entirely Device Tree-based pin
control driver from Tony Lindgren.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQDUCxAAoJEEEQszewGV1z4EIQAMUREEJG+usUzX/2y9yMvtjn
i3HQLV1UuPYiVyQfkrpwG7yEGYboZg4PoX4MjyTwiJt1Nq6QhHGjncYj8ngL7uSd
B7EvulqH2lhLXdvW6s/nqBf5GfAqAhusLOi3FmyMbt4rnJ5bhFnbIdQ4h5MC7eFf
jwQaDPJWcMPOisNJKAC+McVYpTO+VjivbfqMmQ/B9gmmtGSVoQf6YA3CvjJ0P8IT
Or3xUr1VS6AnkS139qg473pYMKiSDzk9tQaN1k9V37jQvTeDv9ALOrLcJV+Bi002
tfTtmOnPDQskgjz/NQvXuPMykZNT9E+XkjxAT1ClY6YVzrLogcYJxkFH5JQ80Lb5
YMhgciRH92KSzQRsGJrJsH8HkAp3FubbC3rEt1MmkVV9ZPBgcUETGIR5tqcdyh8s
5Hj4VASksTeExi7ajYEcDXDihYOB4l9ApDs+5XNhfPRGDY8sUjoxFLvpdzFXIfhn
UZ5KJt16DoDkq0KVVIx1FHRdCcga+TtpARdi0kl2pzxDRrEti9x3F4nHFgaT4Eqb
osnH17RlO+VGZYtg6635wcxEWr/wMzfzpVOi/0JO2wAm+R5A3VaIqsfvvm+ouRR0
0Q++6NAVHySKTuab8Rz6D0dvTRF8O8zgJowdMDMX52C5nc5fhlKOl/Pc3g0W1q5C
zmCaKOzT9RyPx2l+SrWz
=79Wu
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij:
"These are the accumulated pin control patches for v3.6:
- Various cleanups to the U300 driver
- Refactor the pin control core to automatically remove any GPIO
ranges when the drivers are removed, instead of having the drivers
do this explicitly.
- Add a function for registering a batch of GPIO ranges.
- Fix a number of incorrect but non-regressive error checks.
- Incremental improvements to the COH901, i.MX and Nomadik drivers
- Add a one-register-per-pin entirely Device Tree-based pin control
driver from Tony Lindgren."
* tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: Add one-register-per-pin type device tree based pinctrl driver
pinctrl/nomadik: add spi2_oc1_2 pin group
pinctrl/nomadik: kerneldoc fix
pinctrl/nomadik: use devm_* allocators for gpio probe
pinctrl/nomadik: add pin group to mco function
pinctrl/nomadik: add hsit_a_2 pin group
pinctrl/nomadik: add pin group smcs1 and smps0
pinctrl/nomadik: fix hsir_a_1_pins pin list
pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set
pinctrl/coh901: use clk_prepare_[en|dis]able()
pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl
pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl
pinctrl/u300: drop unused variable
pinctrl: select the proper symbol
pinctrl: add pinctrl_add_gpio_ranges function
pinctrl: remove pinctrl_remove_gpio_range
pinctrl/pinctrl-core: cleanup pinctrl_register
pinctrl/u300: delete pointless debug print
pinctrl/pinctrl-u300: remove devm_kfree at driver unload
We are converting platforms to use the pinctrl framework over time,
rather than using platform specific code for the same effect. This
adds the respective driver for the prima2 platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUAUA2dgmCrR//JCVInAQJTqA/7BYaJpsNCKxc2GOVFVtva6Nvq+QaTk9Af
ft2dgEExL5zjaH+HYwLLhdwOFf4Ilwqadw23jtNb2Mqq/FmmO5omenGEWVhTGr7x
RjqWtfgq9PMVh7mZKtTZoC9/vECiX0ZyU3+2Zw+Fn0Begchc1meJGPUbniHwprL6
hLSBC7h+92C5I6WiileE5QNHmkhClQ8Hv9GoLnwR59HSkkspmZNIqsV+vkpPHNaX
GJy3HhT6Xg7KiOLjvvbCjsmt/qgyIKIuJWBzXl1VlnNn0dNDt1Km14DZOdhhXEFv
70IbcZs7ykcJNCApNDH1Hgro69O95phQTJOo6w8FspeAt8UogNTb2uj+lS2GOQHM
rlRfm3XQlXd40Pr8RNCJdg2WWQKGiOhrN+zTuaPovjfTdkdnZkSyhMdrZVT9T7HC
unvsBQ7HXVEwQ0i24d4CqBUscYNRo3iAWjqEAqnXDpDSVrVaJmp9T1LRcX2vF5Lu
nvyLOYYITBkHjkpAjgAoaKdhOBoAq86be0Uo8NjFxVI2881wTSEwdfVOsufTB1HA
L4XGVrc70Bhrk+9Nu4wjXtEz+6tV+6KO+bZdYeCkvwzbCeUo+a0qPqxz7ynBdNbt
FPOToiA8qj6qzkTMl+EeC2bIoYjpbhkMP4V1BsgAjXScuVt2NQdTl8nDJUGtHga6
W590SViMI9U=
=YodD
-----END PGP SIGNATURE-----
Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc pincontrol drivers update from Arnd Bergmann:
"We are converting platforms to use the pinctrl framework over time,
rather than using platform specific code for the same effect. This
adds the respective driver for the prima2 platform."
* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: prima2: enable gpiolib unconditionally
PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
This branch contains two kinds of updates: Some platforms in the process
of getting converted to device tree based booting, and the platform
specific patches necessary for that are included here. Other platforms
are already converted, so we just need to update the actual device
tree source files and the binding documents to add support for new board
and new drivers.
In the future we will probably separate those into two branches, and
in the long run, the plan is to move the device tree source files out
of the kernel repository, but that has to wait until we have completed
a much larger portion of the binding documents.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUAUA2dbmCrR//JCVInAQJl0hAA3U3AnfBBXbKEJhUi47z6QU2kRPVfyjAj
ct+FsZMWFihEHC5/YkB/bQ/i7Hf/AKBZRG6eAUfsyevuhQ0Li+wsRM4eU3FaF6kw
HNqqB6GQWM+2rR8//Y6AAZymTLfe5nbuWFhRXiIggIlQne5jJ1kSidmSzG+OJEuN
sAKXX7Ud5goVsby9Uwp4Gc0fpDsjFmIarhHfMDizFozNZIFzZIhKKdl1VOf+Kv+o
PFRfCGB2KQrrDy0oB62y3iNUiK84LA0xWX4KkI9rD4OHWeiDQpbUITchf//Wa20X
vgZdI8T16sxbmAHi1zerIl8y/CLgLyerp1L3KSMGTwirC+92vZg+jOGYGgNqu973
NOl0IBQFpbAlNzmf52naNgcQ2OxxFQ3ogrlpvE2bItLL7J3vpmn1JwWMTtSrcs3Z
xgbovAq2ivNOiKpzXexvMsWDCU3PxzXaP+2hEUhglJcdXkx5Iwiwi6un2FuF2qWT
l5rSAWkg2kT/OkgYHLBI5JW7e7ugWhUAuCsrIH9eW7xstm4hIlN950vefs2FrZkP
FeE7pn6s6mr98+j9isJKusETXIoEXDLX61vxA8PQP7GYN+/O/g2qB0qztBwarMBL
wAdHCjavOYNwPkxYaGLjv9qKt3X575O/6aFa/NoKGhIECanjLl02Tqg02BdHecST
8HENXCvwQns=
=K3WL
-----END PGP SIGNATURE-----
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc device tree description updates from Arnd Bergmann:
"This branch contains two kinds of updates: Some platforms in the
process of getting converted to device tree based booting, and the
platform specific patches necessary for that are included here.
Other platforms are already converted, so we just need to update the
actual device tree source files and the binding documents to add
support for new board and new drivers.
In the future we will probably separate those into two branches, and
in the long run, the plan is to move the device tree source files out
of the kernel repository, but that has to wait until we have completed
a much larger portion of the binding documents."
Fix up trivial conflicts in arch/arm/mach-imx/clk-imx6q.c due to newly
added clkdev registers next to a few removed unnecessary ones.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: LPC32xx: Add PWM to base dts file
ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary
ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platforms
ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5
ARM: EXYNOS: Add spi clock support for EXYNOS5
ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms
ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4
ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock
ARM: ux500: Remove PMU platform registration when booting with DT
ARM: ux500: Remove temporary snowball_of_platform_devs enablement structure
ARM: ux500: Ensure vendor specific properties have the vendor's identifier
pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes
ARM: ux500: Move rtc-pl031 registration to Device Tree when enabled
ARM: ux500: Enable the AB8500 RTC for all DT:ed DB8500 based devices
ARM: ux500: Correctly reference IRQs supplied by the AB8500 from Device Tree
ARM: ux500: Apply ab8500-debug node do the db8500 DT structure
ARM: ux500: Add a ab8500-usb Device Tree node for db8500 based devices
ARM: ux500: Add db8500 Device Tree node for misc/ab8500-pwm
ARM: ux500: Add db8500 Device Tree node for ab8500-sysctrl
ARM: ux500: Enable LED heartbeat functionality on Snowbal via DT
...
Add one-register-per-pin type device tree based pinctrl driver.
This driver has been tested on omap2+ series of processors,
where there is either an 8 or 16-bit padconf register for each pin.
Support for other similar pinmux controllers can be added.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The original pin registers table is derived from u-boot mainline,
but somehow it was found missing some mux functions for USBOTG_ID.
We added it at the bottom by following the exist pin function ids,
then it will not break the exist using of pin function id in dts file.
Reported-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Fix regression for commit 3a86a5f8 (pinctrl: pinctrl-imx: free allocated
pinctrl_map structure only once and use kernel facilities for IMX_PMX_DUMP)
introduced in 3.5-rc3.
With above commit, the debug code will alway be excuted.
Change to excute it only when DEBUG is defined.
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Any non-standard property should contain the vendor's identifier which
should be perpended onto the property name followed by a comma. This
aids in name-space collision prevention. This patch ensures the
sleepmode property adheres to the rules.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
On 8500 and 9540, all SPI2 pins are driven by SPI block except SPI2_FRM
which is driven as GPIO due to specific constraints.
A new group spi2_oc1_2 is created which exclude SPI2_FRM pin.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIO portions of the Nomadik pinctrl driver was not using
the managed devm_* interfaces, lets' use them consequently and
cut down the error path and special case handling.
Acked-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
mc0_dat47_a_1 and mc0dat31dir_a_1 groups are missing for mco function
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On 8500 and 9540, all HSI pins are driven by HSI block except
HSIT_ACWAKE0_a which is driven as GPIO due to specific
constraints. A new group hsit_a_2 is created which exclude
HSIT_ACWAKE0_a pin.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add smcs1_b_1_pins as DB8500_PIN_B14 can be SM_CS1 in alt B
Add smps0_c_1_pins as DB8500_PIN_E8 can be SM_PS0 in alt C
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
new_map is allocated according to map_num instead of grp->npins,
if a pin or some pins of a group has NO_PAD_CTL property, the map_num
and the grp->npin are different definitely.
When we set mapping information to the new_map[], we should skip those
pins with NO_PAD_CTL from index, otherwise it is possible the driver
will aceesss to a unallocated region.
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The COH901 GPIO driver did not prepare or unprepare its
clock, so let us fix it to do so.
Acked-by: Pankaj Jangra <jangra.pankaj9@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl_register returns a pointer of struct type struct pinctrl_dev,
if successfully registered to pinctrl subsystem, otherwise returns
NULL, and there wont' be any pointers which are not dereferencible.
They are not type of pointer addresses but are kind of error
codes rather actual addresses, but are a kind of return
codes of functions returning integer types.
return -ENODEV if device registration fails.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl_register returns a pointer of struct type struct pinctrl_dev,
if successfully registered to pinctrl subsystem, otherwise returns
NULL, and there wont' be any pointers which are not dereferencible.
They are not type of pointer addresses but are kind of error
codes rather actual addresses, but are a kind of return
codes of functions returning integer types.
return -ENODEV if device registration fails.
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Kconfig entry for the COH901 pin controller depended on
PINMUX_U300 which is stale, use PINCTRL_U300 as it is called
these days.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Often GPIO ranges are added in batch, so create a special
function for that.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The gpio ranges will be automatically removed when the pinctrl
driver is unregistered.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
lots of places the ret is used just for non zero cases
with out that also we can check the status of the function
calls.
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
the memory allocated by devm_kzalloc is automatically
freed at the driver detach side, so no neeed of calling
devm_kfree
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In SiRFprimaII, Each GPIO pin can be configured as input or output
independently. If a GPIO is configured as input, it can also be
enabled as an interrupt source (either edge or level triggered).
These pins must be either MUXed as GPIO or other function pads.
Signed-off-by: Yuping Luo <yuping.luo@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
* emailed from Andrew Morton <akpm@linux-foundation.org>: (21 patches)
mm/memblock: fix overlapping allocation when doubling reserved array
c/r: prctl: Move PR_GET_TID_ADDRESS to a proper place
pidns: find_new_reaper() can no longer switch to init_pid_ns.child_reaper
pidns: guarantee that the pidns init will be the last pidns process reaped
fault-inject: avoid call to random32() if fault injection is disabled
Viresh has moved
get_maintainer: Fix --help warning
mm/memory.c: fix kernel-doc warnings
mm: fix kernel-doc warnings
mm: correctly synchronize rss-counters at exit/exec
mm, thp: print useful information when mmap_sem is unlocked in zap_pmd_range
h8300: use the declarations provided by <asm/sections.h>
h8300: fix use of extinct _sbss and _ebss
xtensa: use the declarations provided by <asm/sections.h>
xtensa: use "test -e" instead of bashism "test -a"
xtensa: replace xtensa-specific _f{data,text} by _s{data,text}
memcg: fix use_hierarchy css_is_ancestor oops regression
mm, oom: fix and cleanup oom score calculations
nilfs2: ensure proper cache clearing for gc-inodes
thp: avoid atomic64_read in pmd_read_atomic for 32bit PAE
...
viresh.kumar@st.com email-id doesn't exist anymore as I have left the
company. Replace ST's id with viresh.linux@gmail.com.
It also updates .mailmap file to fix address for 'git shortlog'
Signed-off-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This documentation comment existed in an earlier patch set for
GPIO consolidation, so I'm saving it for maintainability of the
code.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
commit 0bf7481 (pinctrl: pinctrl-mxs: Take care of frees if the kzalloc fails)
introduced the following build error:
drivers/pinctrl/pinctrl-mxs.c:140:3: error: implicit declaration of function 'free'
Use kfree function instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
clear the platform data pointer when mxs_pinctrl_probe_dt fails,
and also before the unregistering with pinctrl subsystem.
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
if there is no purecfg , the group pointer is allocated using kzalloc and if it
fails to allocate, we wont free the new_map,
if config is true, we call kmemdup and if it
fails to do so we wont free the allocated group if there is no purecfg.
fix this by doing the frees of new_map pointer and group pointers.
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
After create config map, the new_map pointer becomes point to
PIN_MAP_TYPE_CONFIGS_PIN map rather than PIN_MAP_TYPE_MUX_GROUP map any more.
Thus using new_map pointer to display the MUX_GROUP info is not correct.
Using map pointer instead to show the correct MUX_GROUP map info.
Original the debug message is:
imx6q-pinctrl 20e0000.iomuxc: maps: function Yp group MX6Q_PAD_SD3_CMD num 12
After fix it is:
imx6q-pinctrl 20e0000.iomuxc: maps: function usdhc3 group usdhc3grp-1 num 11
Reported-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
of_get_parent can return null if no parent node found, so the allocated new_map
should be freed.
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
a) as we allocate the pinctrl_map structure at imx_dt_node_to_map at line 167, anyway
if its an element, or a num_elements * (sizeof(type)) elements allocated to one single
pointer must be freed only once.
CASE. A)
as new_map is not moved and allocated like,
for (i = 0; i < MAX_ELEMS; i++) {
new_map[i] = kmalloc(numelems * size, GFP_KERNEL);
}
its freed as
for (i = 0; i < MAX_ELEMS; i++) {
kfree(new_map[i]);
}
CASE. B)
and its allocated like
new_map = kmalloc(numelems * size, GFP_KERNEL);
it just needs kfree not as case A's.
b) use KERN_DEBUG facility for the IMX_PMX_DUMP macro.
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit a60b57edda
"drivers/gpio: gpio-nomadik: Add support for irqdomains"
changed GPIO offset calculations to have this form:
(gpio % NMK_GPIO_PER_CHIP) except in this one place for
setting sleep mode, where the conversion was all wrong, and
instead mod:ing the GPIO with the IRQ base which does not
make any sense.
So fix this up so we can use sleepmode.
Reviewed-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
The way the for_each_maps() macro is currently used, using "i" instead of
"_i_" works and is harmless. Still, this is a bug, that can trigger any
time, if the code around that macro changes. Better fix it now.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Nomadik GPIO controller now relies on Nomadik pinctrl, however
the pinctrl driver is not currently started by any ux500 platform.
This is requred or GPIOs do not work at all.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds support for the spear13xx platform, which has first been under
review a long time ago and finally been completed after generic spear
work has gone into the clock, dt and pinctrl branches.
Also a number of updates for the samsung socs are part of this branch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPuezDAAoJEIwa5zzehBx3mooP/iTHd1wRjr2MzKNx4+LpLWgl
aAXH002xe9Lvu7m75BRvEYWWdRLkyEy9ARM4s2wJCnxU41KmbF65ED1erxK8xaSe
Ako34vzH+HiUCM2DLzIP6FXyJMM7OcfrdGaY/GxOv+U+MzGUHeu3Q+8b0B/yfBnm
M3HdDrpyZHKZP9UM3wVQ4/ilDck6vEjYSV2jC11IaHiDMRD2nSpfRKh8H3+gv65S
gtj9EZpWM8CZg/fCe5lsm3PZnBnqHHW3WVafVnDQfGWeJYqZxMB5QKLU6qf/ntpx
LU2WjXoGaMmGBVZWynrwNEY6GVp3fZrDV30/q8Htf0/fBpEjUncrLHXtw0DxkpnK
UuyoRgn7zxOc3kDzohFNIexp1K3q+PNzXklR9hg7OSVji+9bPd2LIOEnpBeghBGj
WzZIebz5dIdddHlnOl4fRdmxZva2UTuI4bFAJ0izi10Mup7A9lrENnFHG/iVA0rQ
QlqJZoyeDCvbXQqZCgHirYRPhIxXdQj4G5IivfRxQ7Jgjy76Kt9uDp1egwezF/3a
2jVtcK42XokVv3Dhsvq9UNFn9GWdVImZ7eh70XLv+q834zAVxSzjWLtlS8I1Q5WO
7BGIJaICtugNwgYr44Dif6nsoVUmMnSwU5hVw1pApKZspN6EhMhMdp2hw8JPHFUs
mrZdHi1NAWuYSbObc3UB
=W2Ri
-----END PGP SIGNATURE-----
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
"This adds support for the spear13xx platform, which has first been
under review a long time ago and finally been completed after generic
spear work has gone into the clock, dt and pinctrl branches.
Also a number of updates for the samsung socs are part of this branch."
Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997d6 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c983 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.
So the conflict diff looks like hell, but it's actually a fairly simple
change.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
ARM: exynos: fix building with CONFIG_OF disabled
ARM: EXYNOS: Add AUXDATA for i2c controllers
ARM: dts: Update device tree source files for EXYNOS5250
ARM: EXYNOS: Add device tree support for interrupt combiner
ARM: EXYNOS: Add irq_domain support for interrupt combiner
ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
ARM: EXYNOS: update irqs for EXYNOS5250 SoC
ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
ARM: EXYNOS: add GPC4 bank instance
ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
ARM: EXYNOS: Modify the GIC physical address for static io-mapping
ARM: EXYNOS: Add watchdog timer clock instance
pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
SPEAr: Update MAINTAINERS and Documentation
SPEAr13xx: Add defconfig
SPEAr13xx: Add compilation support
SPEAr13xx: Add dts and dtsi files
pinctrl: Add SPEAr13xx pinctrl drivers
pinctrl: SPEAr: Create macro for declaring GPIO PINS
SPEAr13xx: Add common clock framework support
...
With this, five platforms are moving to the relatively new pinctrl
subsystem for their pin management, replacing the older soc specific
in-kernel interfaces with common code.
There is quite a bit of net addition of code for each platform being
added to the pinctrl subsystem. but the payback comes later when adding
new boards can be done by only providing new device trees instead.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPuw1/AAoJEIwa5zzehBx3wbsP/RFCYzMVyz85BNLQuRyY9eO2
GCRWd0Vvy3fIfypiPdHdhkq6nIU/JnxgsfBbKX9FvWqvxXi96Ojh13KSIhSI1rQ9
t14VyuwUXaS3leeCyKxhNF1vRscz2iyEGXJqp+XEN4ckf2nrQCpKBiY5Eg9sH6/J
fvYgSBY9Lf9nFAn+/wqSKIfdvw7H0NXwUdsLvNU0uCwvrSG929bTxx2AnHX00TdJ
qf4XLhmatMg1uwdUgL/99ZxxgHlj6o55u7S6aRhUWXNXCimV6uEZ1F35ET37b+x3
YUltBCIaXjFR7iwNHmkkl42d8uyfkBznB555sY5qS3G/uF5Ma1R5I7fv8EIEy+2w
bVHsva4lj1yFazic6m8yKTET4i8n6OPiKVNqGnDsp2yb6WzOGSliKdr0Jlo1oNG2
gS69LcDZxCkXrqEq0Ht8uUoCo9TWei+qhJ6ZOJ1Z3+9ZyFq1iRTKgPVxyA5VaHaB
wwBbqKrohAwuExY8/gkAj6SYqBOF3l/J8QSB2JjXyj4trLC5UMq+l3L4cIWyMRPc
fil83hV6460CiIBoKcsnV9hDUS0oh74mv52zHo0Xj73qABqZ4dcrpHVayWjtMtpl
Z+tUpvD1rMQ+E0gdXDrwMrwILVyCDsBvpFKF4avnujDJ4WmyywtKZ+xvnpMd73VZ
YrI/+XQsMT8ZfVkkj54D
=HIfz
-----END PGP SIGNATURE-----
Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm soc-specific pinctrl changes from Olof Johansson:
"With this, five platforms are moving to the relatively new pinctrl
subsystem for their pin management, replacing the older soc specific
in-kernel interfaces with common code.
There is quite a bit of net addition of code for each platform being
added to the pinctrl subsystem. But the payback comes later when
adding new boards can be done by only providing new device trees
instead."
Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}
* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
mtd: nand: gpmi: fix compile error caused by pinctrl call
ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
ARM: nomadik: enable PINCTRL_NOMADIK where needed
ARM: mxs: enable pinctrl support
video: mxsfb: adopt pinctrl support
ASoC: mxs-saif: adopt pinctrl support
i2c: mxs: adopt pinctrl support
mtd: nand: gpmi: adopt pinctrl support
mmc: mxs-mmc: adopt pinctrl support
serial: mxs-auart: adopt pinctrl support
serial: amba-pl011: adopt pinctrl support
spi/imx: adopt pinctrl support
i2c: imx: adopt pinctrl support
can: flexcan: adopt pinctrl support
net: fec: adopt pinctrl support
ARM: ux500: switch MSP to using pinctrl for pins
ARM: ux500: alter MSP registration to return a device pointer
ARM: ux500: switch to using pinctrl for uart0
ARM: ux500: delete custom pin control system
ARM: ux500: switch over to Nomadik pinctrl driver
...
The nomadik gpio code has been converted to pinctrl, but the nomadik platform
still expects the old code to be present. Change it to use the new one instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Some SoCs may not have pinmux disable function in HW.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two
machines: SPEAr1310 and SPEAr1340.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Same GPIO pins declarations would be required for other SoCs and that will be a
lot of lines of code. Its better to create common macros for it.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The recent added mxs gpio device tree bindings require gpio nodes
defined under pinctrl node too. The pinctrl-mxs driver should skip
these node for group parsing and creating.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The initial mxs pinctrl support, commit 1772311 (pinctrl: add
pinctrl-mxs support) skipped creating group from device tree pin config
node. Add it to get pin config node work for client device.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPrioxAAoJEEEQszewGV1zpPkP/1nMK0LMo8sy7ScnCCumNils
ZiWgB8pViyfl5gLggOwldI/ILVzXTbR6pJZAJNoU3Tbu7n96UyA2QCdeBn/JKCbY
Yr0I/8uT0hXlh4QVrCgyVKQt2e05rP2mt8vtP1CoFad0R56RfwZ9U9u9S2kx5DnY
oKXeg/sjxURueMPYQuvZVZBdLJ+82rsBNVXukKb2h2gY8ntMm6CBLUgk/oHBpPrM
CWaNBT0llBwwWhsmrErYZ7Sb7nRRGDL2rf6kKrw1UPwZ5FIefS+RHaudRic/AiGD
DfVGh22hpv0WFQ6ruEayA1JfoYS0IKsvGBn8Ywf+2tz9uteED6rXJ+fOF6FayR6y
NarGmCFUoQauh5ZSK8h7nv0oNlRFgb3OFp/FfLZC9N+jCWJVVbtbLD9X+M5wN6aE
lUjQwVbiA7q7ZTYs12X/zzBjrQj+ZrV5IXZLq+dvZ1HKBh4FLSpXaZocOCP0n0f1
N4VkGgIngWeiQDDJqc11mZ3ueD/p2AsWsxLRAEafL5CaIk+vz9JXcF3gYDt57Oph
WjPOWXTHiRxb1W4OfgvKWtZbxJdqECJ8HnWUbpTjiG0/MK8Tfprk8iSEOqS2tM1B
usBXBLk8I4P2RwGgIcsnuJ1gEEsZzjSbvpxf2VKVvdP86qw7LizYrEjXKvjnq4G/
nGSTZ3F3/53x2mFEihpM
=xjdL
-----END PGP SIGNATURE-----
Merge tag 'ux500-gpio-pins-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/pinctrl
ux500 GPIO and pinctrl changes for kernel 3.5
* tag 'ux500-gpio-pins-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: switch MSP to using pinctrl for pins
ARM: ux500: alter MSP registration to return a device pointer
ARM: ux500: switch to using pinctrl for uart0
ARM: ux500: delete custom pin control system
ARM: ux500: switch over to Nomadik pinctrl driver
pinctrl: add sleep state definition
pinctrl/nomadik: implement pin configuration
pinctrl/nomadik: implement pin multiplexing
pinctrl/nomadik: reuse GPIO debug function for pins
pinctrl/nomadik: break out single GPIO debug function
pinctrl/nomadik: basic Nomadik pinctrl interface
pinctrl/nomadik: !CONFIG_OF build error
gpio: move the Nomadik GPIO driver to pinctrl
Context conflicts resolved in drivers/pinctrl/Kconfig and
drivers/pinctrl/Makefile.
Signed-off-by: Olof Johansson <olof@lixom.net>
* spear/pinctrl:
pinctrl: (cosmetic) fix two entries in DocBook comments
pinctrl: add more info to error msgs in pin_request
CLKDEV: provide helpers for common clock framework
pinctrl: add pinctrl-mxs support
pinctrl: pinctrl-imx: add imx6q pinctrl driver
pinctrl: pinctrl-imx: add imx pinctrl core driver
dt: add of_get_child_count helper function
pinctrl: support gpio request deferred probing
pinctrl: add pinctrl_provide_dummies interface for platforms to use
pinctrl: enhance reporting of errors when loading from DT
pinctrl: add kerneldoc for pinctrl_ops device tree functions
pinctrl: propagate map validation errors
pinctrl: fix dangling comment
pinctrl: fix signed vs unsigned conditionals inside pinmux_map_to_setting
ARM: 7392/1: CLKDEV: Optimize clk_find()
ARM: 7376/1: clkdev: Implement managed clk_get()
This just adds more dependencies that are required in order not to
break the spear pinctrl support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The spear/pinctrl branch has hard dependencies on both the
pinctrl branch and the clkdev branch. We merge those here
to fix it up without having to rebase a branch that has
been pulled into other stable branches already.
Conflicts:
Documentation/driver-model/devres.txt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This implements the pin configuration interface for the
Nomadik pin controller.
As part of the exercise we add a bit in the pin_cfg_t for
the Nomadik pinctrl driver that indicates if the pin should
be forced into GPIO mode. This is not done to go behind the
back of the GPIO subsystem, but to ensure that default modes
can be set by hogs on boot and system suspend/resume states.
It was used implicitly by the old code defining all config
settings and modes in a single config word but we now have
a split between pinmux and pinconf leading to the need to
have this.
We also add a bit for explicitly setting sleepmode of the
pin. This was previously handled by custom calls with the
_sleep() suffix, but we now have one single interface into
the configuration so we replace this with a bit indicating
that the pin shall be configured into sleep mode.
Some of the configuration can be refactored later to use
less custom fields on the pin_cfg_t but we are currently
leaving the old function calls in place so we stay
compatible.
ChangeLog v1->v2:
- Drop a hunk changing pinmuxing for GPIO and move it
over to the preceding pinmux patch.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implements basic pinmux for the Nomadik pin controller.
The plan is to split the existing singular pin config interface
nmk_config_pin(), nmk_config_pins(), that will configure muxing
and other settings at the same time, into two interfaces
by splitting the code in pinmux and pinctrl and eventually
deleting the old interface and its helper functions when all
users are gone.
nmk_gpio_set_mode() and nmk_gpio_get_mode() are two older
interfaces for just configuring muxing/altfunctions that
will also be replaced in the end.
We take some extra care to handle the glitch-avoidance here,
but it is simpler now since there is only one altsetting per
pingroup so we know immediately if we need to avoid altfunc
C glitches for a certain group.
As part of the makeover implement the .request() and .free()
calls on the GPIO chips and have them call back into the
pinctrl layer to reserve GPIOs.
ChangeLog v1->v2:
- Rebased on pinctrl-mergebase-20120418 so we get the latest
driver infrastructure where function count is done by a fixed
value and we can drop a few range checks since this is now
handled by the core.
- Include a GPIO muxing hunk erroneously part of the pin config
patch.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since all pins we can control are GPIOs, match a GPIO range to
each pin in the debug function and call into the GPIO debug
print function to have the per-pin information.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Break out the code displaying the status of a single pin so we
can use the same code in the pinctrl debug function.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a scratch pin control interface to the Nomadik pinctrl
driver, and defines the pins and groups in the DB8500 ASIC. We
define GPIO ranges to cover the pins exposed. The DB8500 has
more pins than this but we restrict the driver to the pins that
can be controlled from the combined GPIO and pin control hardware
to begin with.
ChangeLog v1->v2:
- Base on the latest pinctrl development from
pinctrl-mergebase-20120418 so we can get rid of legacy
group count mechanism. Also drop the range checks for group
index, this is handled by the core now.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
a60b57e "drivers/gpio: gpio-nomadik: Add support for irqdomains" broke
building with CONFIG_OF_GPIO disabled.
Without this patch, building nhk8815_defconfig results in:
/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c: In function 'nmk_gpio_probe':
/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c:1238:6: error: 'struct gpio_chip' has no member named 'of_node'
make[3]: *** [drivers/gpio/gpio-nomadik.o] Error 1
make[2]: *** [drivers/gpio] Error 2
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [drivers] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [sub-make] Error 2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I'm moving this driver over to the pinctrl subsystem to convert
the custom pin mux/config scheme over to use pinctrl.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
By Stephen Warren (12) and others
via Linus Walleij
* tag 'pinctrl-mergebase-20120418' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (24 commits)
pinctrl: show pin name for pingroups in sysfs
pinctrl: show pin name when request pins
pinctrl: implement devm_pinctrl_get()/put()
pinctrl: a minor fix of pin config debug information
pinctrl: pinconf: fix compilation error if PINCONF is not selected
pinctrl: allow pctldevs to decode pin config in debugfs
pinctrl: ifdef CONFIG_DEBUG_FS cleanup
pinctrl: mark non-EXPERIMENTAL
pinctrl: tegra: Add complete device tree support
dt: Document Tegra20/30 pinctrl binding
dt: Move Tegra20 pin mux binding into new pinctrl directory
dt: pinctrl: Document device tree binding
dt: add property iteration helpers
pinctrl: implement pinctrl deferred probing
pinctrl: add some error checking for user interfaces
pinctrl: fix pinmux_check_ops error checking
pinctrl: replace list_*() with get_*_count()
pinctrl: mark const init data with __initconst instead of __initdata
Documentation: pinctrl: add missing spi0_0 grp in example
pinctrl: fix build when CONFIG_OF && !CONFIG_PINCTRL
...
Resolved conflicts in drivers/pinctrl/core.c due to same patch being
applied in two branches.
Signed-off-by: Olof Johansson <olof@lixom.net>
Additionally print which pin the request failed for, which entity already
claimed it, and what entity was trying to claim it.
Remove duplicate device name from a debug message.
Clean up some indentation.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.
The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.
Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As pinctrl handles, it may be possible the pinctrl gpio ranges
are still not got registered when user call pinctrl_gpio_request.
Thus, add defer support for it too.
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij <linus.walleij@linaro.org> writes:
This is a pull request for the GPIO and pin control stuff
accumulated in the ST-Ericsson tree. Here we have:
- Improvements and fixes and a custom pin config API from
Rabin Vincent
- Device Tree bindings from Lee Jones
- Some accumulated patches by yours truly.
- A MSP platform data init patch from Ola Lilja that is merged
here due to dependency on pin config work. It is to be
used with work being worked on in parallel in the ALSA
SoC subsystem.
If you wonder about the custom pin config implementation this
is to be used as a transition base as I am rewriting the
driver to use pinctrl. Expect a final pull request on top
of this one that will move the ux500 over to pinctrl.
* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add support for MSP I2S-devices
drivers/gpio: gpio-nomadik: Add support for irqdomains
drivers/gpio: gpio-nomadik: Apply Device Tree bindings
ARM: ux500: update pin handling
ARM: ux500: implement pin API
ARM: ux500: remove a bunch of internal pull-ups
plat-nomadik: new sleep mode pincfg macros
gpio/nomadik: use ioremap() instead of static mappings
gpio/nomadik: support low EMI mode
gpio/nomadik: fix spurious interrupts with SKE
gpio/nomadik: cache [rf]w?imsc
gpio/nomadik: don't set SLPM to 1 for non-wakeup pins
Also includes an update to v3.4-rc4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a interface pinctrl_provide_dummies for platform to indicate
whether it needs use pinctrl dummy state.
ChangeLog v3->v4:
* remove dummy gpio support in pinctrl subsystem.
Let gpio driver decide whether it wants to use pinctrl gpio mux
function.
ChangeLog v2->v3:
* Also changed the missed pinctrl gpio APIs in v1.
ChangeLog v1->v2:
* Based on sascha's suggestion, drop using kconfig since it will hide
pinctrl errors on all other boards.
See: https://lkml.org/lkml/2012/4/18/282
It seemed both Linus and Stephen agreed with this way, so i'm ok
with it too.
* Add dummy gpio support.
pinctrl gpio in the same situation as state.
* Patch name changed.
Original is pinctrl: handle dummy state in core.
* Split removing old dt dummy interface into a separate patch
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are a few places in the api where the code simply returns -EINVAL when
it finds an error. An example is pinmux_map_to_setting() which now reports an
error if we try to match a group with a function that it does not support.
The reporting of errors in pinconf_check_ops and pinmux_check_ops now has the
same style and is located inside the according functions and not the calling
code.
When the map is found in the DT but the default state can not be selected we
get an error to know that the code at least tried.
The patch also removes a stray word from one comment and a "->" from another
for the sake of consistency.
Finally we replace a few pr_err/debug() calls with dev_err/dbg().
Thanks go to Stephen Warren for reviewing the patch and enhancing the reporting
inside pinmux_map_to_setting().
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl_register_map() was returning early if pinmux_validate_map() or
pinconf_validate_map() failed, but was not actually returning the error
code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
