Commit Graph

5694 Commits

Author SHA1 Message Date
Yang Yingliang
aca196842a
spi: mxic: add missing braces
Fix the following waring:

drivers/spi/spi-mxic.c: In function ‘mxic_spi_mem_exec_op’:
drivers/spi/spi-mxic.c:401:3: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
   if (op->data.dir == SPI_MEM_DATA_IN)
   ^~
drivers/spi/spi-mxic.c:403:4: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
    if (op->data.dtr)
    ^~

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Zhengxun Li <zhengxunli@mxic.com.tw>
Link: https://lore.kernel.org/r/20210810142405.2221540-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-12 12:19:19 +01:00
Tony Lindgren
976c1de1de
spi: spi-pic32: Fix issue with uninitialized dma_slave_config
Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For spi-pic32, this is probably not currently an issue but is still good to
fix though.

Fixes: 1bcb9f8ceb ("spi: spi-pic32: Add PIC32 SPI master driver")
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210810081727.19491-2-tony@atomide.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-10 13:22:20 +01:00
Tony Lindgren
209ab223ad
spi: spi-fsl-dspi: Fix issue with uninitialized dma_slave_config
Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For spi-fsl-dspi, this is probably not currently an issue but is still
good to fix though.

Fixes: 90ba37033c ("spi: spi-fsl-dspi: Add DMA support for Vybrid")
Cc: Sanchayan Maity <maitysanchayan@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/20210810081727.19491-1-tony@atomide.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-10 13:22:19 +01:00
Mason Zhang
5c842e51ac
spi: mediatek: fix build warnning in set cs timing
this patch fixed the build warnning in set cs timing.

Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210809055911.17538-1-Mason.Zhang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-09 13:47:52 +01:00
Zhengxun Li
d05aaa66ba
spi: mxic: patch for octal DTR mode support
Driver patch for octal DTR mode support.

Owing to the spi_mem_default_supports_op() is not support dtr
operation. Based on commit <539cf68cd51b> (spi: spi-mem: add
spi_mem_dtr_supports_op()) add spi_mem_dtr_supports_op()
to support dtr and keep checking the buswidth and command bytes.

Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
Link: https://lore.kernel.org/r/1628054827-458-1-git-send-email-zhengxunli@mxic.com.tw
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-09 12:40:29 +01:00
Dmitry Osipenko
26c8634182
spi: tegra20-slink: Don't use resource-managed spi_register helper
Don't use resource-managed spi_register helper to correct the driver
removal order and make it to match the error unwinding order of the
probe function.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210731192731.5869-2-digetx@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-09 12:40:28 +01:00
Dmitry Osipenko
e4bb903fda
spi: tegra20-slink: Improve runtime PM usage
The Tegra SPI driver supports runtime PM, which controls the clock
enable state, but the clk is also enabled separately from the RPM
at the driver probe time, and thus, stays always on. Fix it.

Runtime PM now is always available on Tegra, hence there is no need to
check the RPM presence in the driver anymore. Remove these checks.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210731192731.5869-1-digetx@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-09 12:40:28 +01:00
Mason Zhang
04e6bb0d6b
spi: modify set_cs_timing parameter
This patch modified set_cs_timing parameter, no need pass in spi_delay
to set_cs_timing callback.
By the way, we modified the mediatek and tegra114 spi driver to fix build err.
In mediatek spi driver, We have support set absolute time not clk_count,
and call this function in prepare_message not user's API.

Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210804133746.6742-1-Mason.Zhang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-05 16:42:54 +01:00
Mason Zhang
8c33ebfeeb
spi: move cs spi_delay to spi_device
As we know, spi core layer has removed spi_set_cs_timing() API.
So this patch moved spi_delay for cs_timing from spi_controller
to spi_device, because cs timing should be set by spi_device but
not controller.

Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210804133716.32040-1-Mason.Zhang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-05 16:42:53 +01:00
Mark Brown
726e6f31b1
Merge series "arm: ep93xx: CCF conversion" from Nikita Shubin <nikita.shubin@maquefel.me>:
This series series of patches converts ep93xx to Common Clock Framework.

It consists of preparation patches to use clk_prepare_enable where it is
needed, instead of clk_enable used in ep93xx drivers prior to CCF and
a patch converting mach-ep93xx/clock.c to CCF.

Link: https://lore.kernel.org/patchwork/cover/1445563/
Link: https://lore.kernel.org/patchwork/patch/1435884/

v1->v2:
- added SoB

Alexander Sverdlin (7):
  iio: ep93xx: Prepare clock before using it
  spi: spi-ep93xx: Prepare clock before using it
  Input: ep93xx_keypad: Prepare clock before using it
  video: ep93xx: Prepare clock before using it
  dmaengine: ep93xx: Prepare clock before using it
  ASoC: cirrus: i2s: Prepare clock before using it
  pwm: ep93xx: Prepare clock before using it

Nikita Shubin (1):
  ep93xx: clock: convert in-place to COMMON_CLK

 arch/arm/Kconfig                       |   2 +-
 arch/arm/mach-ep93xx/clock.c           | 975 ++++++++++++++-----------
 arch/arm/mach-ep93xx/core.c            |   2 +-
 arch/arm/mach-ep93xx/soc.h             |  42 +-
 drivers/dma/ep93xx_dma.c               |   6 +-
 drivers/iio/adc/ep93xx_adc.c           |   6 +-
 drivers/input/keyboard/ep93xx_keypad.c |   4 +-
 drivers/pwm/pwm-ep93xx.c               |  12 +-
 drivers/spi/spi-ep93xx.c               |   4 +-
 drivers/video/fbdev/ep93xx-fb.c        |   4 +-
 sound/soc/cirrus/ep93xx-i2s.c          |  12 +-
 11 files changed, 605 insertions(+), 464 deletions(-)

base-commit: 64376a981a0e2e57c46efa63197c2ebb7dab35df
--
2.26.2
2021-08-03 23:27:27 +01:00
Jason Wang
b09bff2676
spi: bcm2835aux: use 'unsigned int' instead of 'unsigned'
Prefer 'unsigned int' to bare use of 'unsigned'.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Link: https://lore.kernel.org/r/20210731133342.432575-1-wangborong@cdjrlc.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-03 18:27:25 +01:00
Alexander Sverdlin
7c72dc56a6
spi: spi-ep93xx: Prepare clock before using it
Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch
to Common Clock Framework, otherwise the following is visible:

WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc
Enabling unprepared ep93xx-spi.0
...
Hardware name: Cirrus Logic EDB9302 Evaluation Board
...
clk_core_enable
clk_core_enable_lock
ep93xx_spi_prepare_hardware
__spi_pump_messages
__spi_sync
spi_sync
spi_sync_transfer.constprop.0
regmap_spi_write
_regmap_raw_write_impl
_regmap_bus_raw_write
_regmap_update_bits
regmap_update_bits_base
cs4271_component_probe
snd_soc_component_probe
soc_probe_component
snd_soc_bind_card
edb93xx_probe
...
spi_master spi0: failed to prepare transfer hardware: -108

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20210726140001.24820-3-nikita.shubin@maquefel.me
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-03 18:27:24 +01:00
Uwe Kleine-König
6e95b23a5b
spi: imx: Implement support for CS_WORD
This only works when the native chipselect is in use. On a board with a
Ti ADS7950 8 channel ADC. This patch reduces the time to read out all
channels once from 280 us to 20 us.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210727124226.5571-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-08-03 01:45:10 +01:00
Andy Shevchenko
e3aa9acc71
spi: pxa2xx: Adapt reset_sccr1() to the case when no message available
In some cases reset_sccr1() can be called when no message available.
This means that there is no associated chip to receive that message
and hence no threshold needs to be set. Adapt the function to such
cases.

Fixes: 3bbdc08326 ("spi: pxa2xx: Reuse int_stop_and_reset() in couple of places")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210721121520.62605-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-22 12:41:19 +01:00
Mark Brown
cfb4dac129
Merge series "spi: fsi: Reduce max transfer size to 8 bytes" from Eddie James <eajames@linux.ibm.com>:
The security restrictions on the FSI-attached SPI controllers have
been applied universally to all controllers, so the controller can no
longer transfer more than 8 bytes for one transfer. Refactor the driver
to remove the looping and support for larger transfers, and remove the
"restricted" compatible string, as all the controllers are now
considered restricted.

Eddie James (2):
  spi: fsi: Reduce max transfer size to 8 bytes
  dt-bindings: fsi: Remove ibm,fsi2spi-restricted compatible

 .../devicetree/bindings/fsi/ibm,fsi2spi.yaml  |   1 -
 drivers/spi/spi-fsi.c                         | 125 +++---------------
 2 files changed, 22 insertions(+), 104 deletions(-)

--
2.27.0
2021-07-19 17:21:24 +01:00
Eddie James
34d34a56a5
spi: fsi: Reduce max transfer size to 8 bytes
Security changes have forced the SPI controllers to be limited to
8 byte reads. Refactor the sequencing to just handle 8 bytes at a
time.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210716133915.14697-2-eajames@linux.ibm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2021-07-19 16:56:14 +01:00
Uwe Kleine-König
bd9616996b
spi: imx: Simplify logic in spi_imx_push()
For each usage of fifo_words it is clear if ->dynamic_burst is true or
not. This can be used to simplify the function a bit.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210716173927.2050620-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-19 12:58:55 +01:00
Andy Shevchenko
3bbdc08326
spi: pxa2xx: Reuse int_stop_and_reset() in couple of places
Reuse int_stop_and_reset() in couple of places.

While at it, change the order of the int_stop_and_reset() and pxa2xx_spi_off()
to be in align with the similar flow in int_error_stop().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-19 12:58:54 +01:00
Andy Shevchenko
cdcb26ce74
spi: pxa2xx: Reset DMA bits in CR1 in reset_sccr1()
In order to allow reset_sccr1() to be reused in DMA paths,
reset DMA bits in CR1 in this function.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-19 12:58:53 +01:00
Andy Shevchenko
e0a6512d29
spi: pxa2xx: Convert reset_sccr1() to use pxa2xx_spi_update()
Convert reset_sccr1() to use pxa2xx_spi_update().
It will help for further improvements.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-19 12:58:52 +01:00
Douglas Anderson
57f1c12e45
spi: spi-geni-qcom: Remove confusing comment about setting the watermark
The comment in setup_fifo_xfer() about setting the watermark wasn't
quite proper grammar and also stopped making sense around commit
6d66507d9b ("spi: spi-geni-qcom: Don't wait to start 1st transfer if
transmitting"). After that commit we actually start the transfer
_before_ the watermark interrupt comes.

I don't think the comment really has any value anymore. We've already
got a comment when we grab the spinlock saying that our interrupt can
come any time as a result of the things in the locked section. Let's
just remove it.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210712085010.1.Ie3bb9f9d30d6475bb75251d32635194c1c72b9ee@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-14 16:37:58 +01:00
Mason Zhang
f84d866ab4
spi: mediatek: add tick_delay support
This patch support tick_delay setting, some users need use
high-speed spi speed, which can use tick_delay to tuning spi clk timing.

Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210713114048.29509-1-mason.zhang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-14 13:30:43 +01:00
Mark Brown
65ab894f2e
Merge series "spi: stm32: various fixes & cleanup" from Alain Volmat <alain.volmat@foss.st.com>:
This series contains fixes & cleanup mainly regarding fifo
and the way end of transfer triggered, when used with or
without DMA.
An additional patch cleans up the pm_runtime calls and another
one enables the autosuspend.

v2: - split pm_runtime fix patch into two
    - correct revert commit subject line

Alain Volmat (6):
  spi: stm32: fixes pm_runtime calls in probe/remove
  spi: stm32: enable pm_runtime autosuspend
  spi: stm32h7: fix full duplex irq handler handling
  spi: stm32: Revert "properly handle 0 byte transfer"
  spi: stm32h7: don't wait for EOT and flush fifo on disable
  spi: stm32: finalize message either on dma callback or EOT

Amelie Delaunay (1):
  spi: stm32h7: rework rx fifo read function

 drivers/spi/spi-stm32.c | 146 +++++++++++++++++-----------------------
 1 file changed, 61 insertions(+), 85 deletions(-)

--
2.25.1
2021-07-12 11:30:37 +01:00
Mason Zhang
162a31effc
spi: mediatek: add no_need_unprepare support
This patch add no_need_unprepare support for spi, if spi src clk is
MAIN PLL, it can keep the clk_prepare and will not cause low power
issue. So we no need do clk_prepare/clk_unprepare in runtime pm,
and it will get better performance, because clk_prepare has called
mutex lock.
In the same way,
clk_get_rate also has called mutex lock, so we moved it to spi_probe.

Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210629100814.21402-1-mason.zhang@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:46 +01:00
Alain Volmat
7ceb0b8a3c
spi: stm32: finalize message either on dma callback or EOT
Depending on the usage, it is necessary to perform the finalize
message operation either upon receiving the EOT interruption,
eiher upon receiving the DMA callback. Indeed, when relying
on DMA, even if the SPI EOT IT has been received, it is
necessary to wait for the end of the DMA RX transaction before
accessing to the data.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-8-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:43 +01:00
Alain Volmat
dc6620c313
spi: stm32h7: don't wait for EOT and flush fifo on disable
In nominal cases, disable is called as part of the unprepare_message,
after receiving a EOT and after receiving all data so it doesn't
make sense to check for EOT and empty the FIFO.
Moreover, at the end of the disable, the SPI is disable (SPE) leading
to clear of all internal FIFO, leaving the IP in a known status.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-7-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:42 +01:00
Amelie Delaunay
d87a5d64b5
spi: stm32h7: rework rx fifo read function
Remove flush parameter and check RXWNE or RXPLVL when end of transfer
flag is set.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-6-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:41 +01:00
Alain Volmat
70526e0b76
spi: stm32: Revert "properly handle 0 byte transfer"
0 byte transfer handling is now done within the core in code added
by commit b306320322 ("spi: Skip zero-length transfers in spi_transfer_one_message()")

This reverts commit 2269f5a8b1 ("spi: stm32: properly handle 0 byte transfer")

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-5-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:40 +01:00
Alain Volmat
9d53541451
spi: stm32: enable pm_runtime autosuspend
This commit enables the pm_runtime autosuspend
and sets a 1ms autosuspend delay.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-3-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-11 23:51:39 +01:00
Mark Brown
da18edb11c
Merge existing fixes from spi/for-5.14 2021-07-11 23:45:34 +01:00
Alain Volmat
7999d2555c
spi: stm32: fixes pm_runtime calls in probe/remove
Add pm_runtime calls in probe/probe error path and remove
in order to be consistent in all places in ordering and
ensure that pm_runtime is disabled prior to resources used
by the SPI controller.

This patch also fixes the 2 following warnings on driver remove:
WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:594 clk_core_disable_lock+0x18/0x24
WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:476 clk_unprepare+0x24/0x2c

Fixes: 038ac869c9 ("spi: stm32: add runtime PM support")

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-2-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-07 17:33:52 +01:00
Marek Vasut
135cbd378e
spi: imx: mx51-ecspi: Reinstate low-speed CONFIGREG delay
Since 00b80ac935 ("spi: imx: mx51-ecspi: Move some initialisation to
prepare_message hook."), the MX51_ECSPI_CONFIG write no longer happens
in prepare_transfer hook, but rather in prepare_message hook, however
the MX51_ECSPI_CONFIG delay is still left in prepare_transfer hook and
thus has no effect. This leads to low bus frequency operation problems
described in 6fd8b8503a ("spi: spi-imx: Fix out-of-order CS/SCLK
operation at low speeds") again.

Move the MX51_ECSPI_CONFIG write delay into the prepare_message hook
as well, thus reinstating the low bus frequency fix.

Fixes: 00b80ac935 ("spi: imx: mx51-ecspi: Move some initialisation to prepare_message hook.")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20210703022300.296114-1-marex@denx.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-07 12:01:35 +01:00
Alain Volmat
e4a5c19888
spi: stm32h7: fix full duplex irq handler handling
In case of Full-Duplex mode, DXP flag is set when RXP and TXP flags are
set. But to avoid 2 different handlings, just add TXP and RXP flag in
the mask instead of DXP, and then keep the initial handling of TXP and
RXP events.
Also rephrase comment about EOTIE which is one of the interrupt enable
bits. It is not triggered by any event.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/1625042723-661-3-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-30 13:50:32 +01:00
Mark Brown
1bee1ecf23
Merge remote-tracking branch 'spi/for-5.14' into spi-next 2021-06-25 14:08:26 +01:00
Mark Brown
edf978a5a1
Merge remote-tracking branch 'spi/for-5.13' into spi-linus 2021-06-25 14:08:25 +01:00
Mark Brown
04045c479a
Merge remote-tracking branch 'spi/for-5.12' into spi-linus 2021-06-25 14:08:23 +01:00
Vinod Koul
b470e10eb4
spi: core: add dma_map_dev for dma device
Some controllers like qcom geni need the parent device to be used for
dma mapping, so add a dma_map_dev field and let drivers fill this to be
used as mapping device

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210625052213.32260-4-vkoul@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-25 12:26:49 +01:00
Colin Ian King
b01d550663
spi: Fix self assignment issue with ancillary->mode
There is an assignment of ancillary->mode to itself which looks
dubious since the proceeding comment states that the speed and
mode is taken over from the SPI main device, indicating that
ancillary->mode should assigned using the value spi->mode.
Fix this.

Addresses-Coverity: ("Self assignment")
Fixes: 0c79378c01 ("spi: add ancillary device support")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210623172300.161484-1-colin.king@canonical.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-24 19:29:57 +01:00
Mark Brown
d74d99229f
Merge series "Support ROCKCHIP SPI new feature" from Jon Lin <jon.lin@rock-chips.com>:
Changes in v10:
- The internal CS inactive function is only supported after VER 0x00110002

Changes in v9:
- Conver to use CS GPIO description

Changes in v8:
- There is a problem with the version 7 mail format. resend it

Changes in v7:
- Fall back "rockchip,rv1126-spi" to "rockchip,rk3066-spi"

Changes in v6:
- Consider to compatibility, the "rockchip,rk3568-spi" is removed in
  Series-changes v5, so the commit massage should also remove the
  corresponding information

Changes in v5:
- Change to leave one compatible id rv1126, and rk3568 is compatible
  with rv1126

Changes in v4:
- Adjust the order patches
- Simply commit massage like redundancy "application" content

Changes in v3:
- Fix compile error which is find by Sascha in [v2,2/8]

Jon Lin (6):
  dt-bindings: spi: spi-rockchip: add description for rv1126
  spi: rockchip: add compatible string for rv1126
  spi: rockchip: Set rx_fifo interrupt waterline base on transfer item
  spi: rockchip: Wait for STB status in slave mode tx_xfer
  spi: rockchip: Support cs-gpio
  spi: rockchip: Support SPI_CS_HIGH

 .../devicetree/bindings/spi/spi-rockchip.yaml |  1 +
 drivers/spi/spi-rockchip.c                    | 55 ++++++++++++++-----
 2 files changed, 41 insertions(+), 15 deletions(-)

--
2.17.1
2021-06-23 16:54:52 +01:00
Wolfram Sang
a26dee29ec
spi: spi-sh-msiof: : use proper DMAENGINE API for termination
dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210623095843.3228-3-wsa+renesas@sang-engineering.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 16:33:53 +01:00
Wolfram Sang
29176edd6e
spi: spi-rspi: : use proper DMAENGINE API for termination
dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210623095843.3228-2-wsa+renesas@sang-engineering.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 16:33:52 +01:00
Jon Lin
736b81e075
spi: rockchip: Support SPI_CS_HIGH
1.Add standard spi-cs-high support
2.Refer to spi-controller.yaml for details

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-2-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:43 +01:00
Jon Lin
b8d423711d
spi: rockchip: Support cs-gpio
1.Add standard cs-gpio support
2.Refer to spi-controller.yaml for details

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-1-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:43 +01:00
Jon Lin
2758bd093a
spi: rockchip: Wait for STB status in slave mode tx_xfer
After ROCKCHIP_SPI_VER2_TYPE2, SR->STB is a more accurate judgment
bit for spi slave transmition.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-5-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:42 +01:00
Jon Lin
4a47fcdb5f
spi: rockchip: Set rx_fifo interrupt waterline base on transfer item
The error here is to calculate the width as 8 bits. In fact, 16 bits
should be considered.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:41 +01:00
Jon Lin
0f4f58b847
spi: rockchip: add compatible string for rv1126
Add compatible string for rv1126 for potential applications.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-3-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 12:35:40 +01:00
Mirko Vogt
0d7993b234
spi: spi-sun6i: Fix chipselect/clock bug
The current sun6i SPI implementation initializes the transfer too early,
resulting in SCK going high before the transfer. When using an additional
(gpio) chipselect with sun6i, the chipselect is asserted at a time when
clock is high, making the SPI transfer fail.

This is due to SUN6I_GBL_CTL_BUS_ENABLE being written into
SUN6I_GBL_CTL_REG at an early stage. Moving that to the transfer
function, hence, right before the transfer starts, mitigates that
problem.

Fixes: 3558fe900e (spi: sunxi: Add Allwinner A31 SPI controller driver)
Signed-off-by: Mirko Vogt <mirko-dev|linux@nanl.de>
Signed-off-by: Ralf Schlatterbeck <rsc@runtux.com>
Link: https://lore.kernel.org/r/20210614144507.y3udezjfbko7eavv@runtux.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23 11:48:36 +01:00
Sebastian Reichel
0c79378c01
spi: add ancillary device support
Introduce support for ancillary devices, similar to existing
implementation for I2C. This is useful for devices having
multiple chip-selects, for example some microcontrollers
provide a normal SPI interface and a flashing SPI interface.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20210621175359.126729-2-sebastian.reichel@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-22 12:54:59 +01:00
Patrice Chotard
6a5976f23d
spi: stm32-qspi: Remove unused qspi field of struct stm32_qspi_flash
Remove struct stm32_qspi_flash's field qspi which is not used.

Fixes: c530cd1d9d ("spi: spi-mem: add stm32 qspi controller")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20210615090115.30702-1-patrice.chotard@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-15 12:51:55 +01:00
Marco Felsch
3ce6c9e261
spi: add of_device_uevent_modalias support
Add OF support as already done for ACPI to take driver
MODULE_DEVICE_TABLE(of, ..) into account.

For example with this change a spi nor device MODALIAS changes from:

MODALIAS=spi:spi-nor

to

MODALIAS=of:Nspi-flashT(null)Cjedec,spi-nor

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20210525091003.18228-1-m.felsch@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-15 11:43:16 +01:00