The patch adds support for NAND flashes connected to GPIOs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch adds TopBottom detection for most Macronix chips with CFI V1.0.
The main purpose of this patch is to add detection of the MX29LV400C B
used on the LaCie Ethernet Disk mini V2 NAS.
It detects the following parts correctly:-
MX28F640C3B T
MX29LV002C B
MX29LV002NC B
MX29LV004C T
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29SL800C T/B
MX29SL802C T/B
It detects the following uniform part as bottom but it should work
correctly:-
MX29LV040C
For T parts it causes the erase block table to be reversed correctly.
For other parts it avoids the bogus "Assuming top" message.
It does not detect the following correctly:-
MX28F640C3B B
MX29LV002C T
MX29LV002NC T
MX29LV004C B
MX29SL400C T/B
MX29SL402C T/B
If desired I could supply a more complicated patch to handle these as
well.
Only the MX29LV400C B has been physically tested; others were checked
against their data sheets.
Signed-off-by: Christopher Moore <moore@free.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This makes the driver erase a block when it doesn't find any
existing saved log messages which is safer than assuming the
flash was already erased.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Add a magic number to logged kernel oops messages so that they
can be more accurately detected rather than just having to rely
on the sequence number. This also allows easier detection of
saved crashes by userspace.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Fix an off by one error in the mtdoops driver
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash.
This driver support SH7723.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The functions that write the OOB info (on hardware ECC only) use the
HW_SYNDROME method.
This is not correct : the start position is "pos = eccsize + chunk" and
should be eccsize. So, the standard (nand_write_oob_std) function should
be used. This patch corrects this by using NAND_ECC_HW instead of
NAND_ECC_HW_SYNDROME.
This has only been tested on small pages nand flash.
(if anyone can test it on large pages that would be great).
kernel version : 2.6.27-rc2 (current git mtd-2.6)
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Removed the Kconfig associated with 'NDFC NanD Flash Controller'.
We can't enable !CONFIG_PPC_MERGE so there is no way to enable
this. Additionally the code needs to get updated for arch/powerpc.
For the time being lets just remove the Kconfig option so we can
actually remove CONFIG_PPC_MERGE.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch extends the FSL UPM NAND driver from Anton Vorontsov to
support hardware which does not have the R/B pin of the NAND chip
connected, like the TQM8548 module:
- The OF_GPIO dependency has been removed from the Kconfig option
because GPIO is not needed. The relevant gpio_* function are then
stubbed out in <linux/gpio.h>.
- It re-introduces the chip-delay property to define an appropriate
maximum delay time (tR) required for read operations. The binding
will be documented in a separate patch.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
- Get rid of fsl,wait-pattern and fsl,wait-write. I think this isn't
chip-specific, and we should always do waits. I saw one board that
didn't need fsl,wait-pattern, but I assume this was the exception
that proves the rule;
- Get rid of chip-delay. Today there are no users for this, and if
anyone really need this they should push the OF bindings beforehand;
- Now flash chips should be child nodes of the FSL UPM NAND controller;
- Implement OF partition parsing.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch makes debugging a missconfigured UBI a bit easier
by providing the needed information in the boot log.
Signed-off-by: Deepak Saxena <dsaxena@laptop.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
When iterating over a chain in reverse (oldest block first), this
patch correctly marks the PUtable[] entry of the second to last erase
block of a chain as BLOCK_NIL, regardless of whether or not it can
format the last block successfully. Before, the second to last block
was only marked as pointing to BLOCK_NIL if INFTL_formatblock()
succeeded on the last block of the chain, which could potentially
result in an infinite loop if the block was worn out and refused to
format.
Signed-off-by: Daniel Rosenthal <danielrosenthal@acm.org>
Acked-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
...since it only probes that
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Now that the needed helpers are exported, it becomes a nice simple
switch over. Closes#9420
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The patch fixes CFI issue with multipartitional devices leading to the
set of errors or even deadlock. The problem is CFI FL_SYNCING state race
with flash operations (e.g. erase suspend). It is reproduced by running
intensive writes on one JFFS2 partition and simultaneously performing
mount/unmount cycle on another partition of the same chip.
Signed-off-by: Alexander Belyakov <abelyako@googlemail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
In case of error, the function add_volume returns an ERR pointer. The
result of IS_ERR, which is supposed to be used in a test as it is, is
here checked to be less than zero, which seems odd. We suggest to
replace this test by a simple IS_ERR test.
A simplified version of the semantic match that finds this problem is
as follows:
(http://www.emn.fr/x-info/coccinelle/)
// <smpl>
@def0@
expression x;
position p0;
@@
x@p0 = add_volume(...)
@protected@
expression def0.x,E;
position def0.p0;
position p;
statement S;
@@
x@p0
... when != x = E
if (!IS_ERR(x) && ...) {<... x@p ...>} else S
@unprotected@
expression def0.x,E;
identifier fld;
position def0.p0;
position p != protected.p;
@@
x@p0
... when != x = E
* x@p->fld
// </smpl>
Signed-off-by: Julien Brunel <brunel@diku.dk>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Very occasionally, (about one in a million) read operations are
ongoing after the timeout has expired. So, retry three times
while the ongoing bit remains set.
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Minor patch to help debugging of NAND detection.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch moves some attributes out from the platform data into the
dynamically created nand device. This results into a cleaner interface
and allows to use constant pxa3xx_nand_flash definitions.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch marks some attributes as 'const' which are set only once and
never be modified by the driver. There are some changes in parameter
list and variable declarations too which mark them as 'const'.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table. Not enabling this
option saves some space in the generated driver.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch adds 'flash' and 'num_flash' attributes to the platform data.
There was added code in the driver to iterate across these attributes in the
detect-flash routine. This is done similarly to the existing method
which uses a 'builtin_flash_types' field.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch moves the exported datastructures from the pxa3xx_nand.c driver
into the <mach/pxa3xx_nand.h> header. This is a plain movement without
any modification of the attributes.
This is the first one of a set of patches which:
* allows to specify used NAND flash in the platform code and allows to turn
off the old way to specify NAND characteristics in the driver. This way did
not worked well as these characteristics depend on the platform and can not be
derived from NAND id alone.
E.g. some NAND chips share the same ID (e.g. K9K8G08U0A and K9NBG08U5A) but
have different timings (which are written in the common driver currently and
must be modified there).
* adds 'const' annotations at various places
Further patches will be sent to the mtd-list.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Semun Lee <semun.lee@samsung.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
It doesn't use LINUX_VERSION_CODE nor KERNEL_VERSION.
This patch removes the said #include <version.h>.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch lets the files using linux/version.h match the files that
#include it.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch for nand_ecc.c fixes three issues
- fix code so it also works on big endian architectures
- added a printk in case of an uncorrectable ecc error
- strengthen the test for correctable errors (decreasing the chance
that multiple bit faults by accident will be seen as correctable)
Note: the big endian code is only tested in a testbed (running on big endian
hardware) as I cannot rebuild and test a big endian kernel at the moment.
However the only thing that can go wrong is if <asm/byteorder.h> does not
give __BIG_ENDIAN in that case. In my eyes very unlikely.
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The drivers below do not use LINUX_VERSION_CODE nor KERNEL_VERSION.
drivers/mtd/maps/amd76xrom.c
drivers/mtd/maps/ck804xrom.c
drivers/mtd/maps/esb2rom.c
This patch removes the said #include <version.h>.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* master.kernel.org:/home/rmk/linux-2.6-arm: (38 commits)
[ARM] 5191/1: ARM: remove CVS keywords
[ARM] pxafb: fix the warning of incorrect lccr when lcd_conn is specified
[ARM] pxafb: add flag to specify output format on LDD pins when base is RGBT16
[ARM] pxafb: fix the incorrect configuration of GPIO77 as ACBIAS for TFT LCD
[ARM] 5198/1: PalmTX: PCMCIA fixes
[ARM] Fix a pile of broken watchdog drivers
[ARM] update mach-types
[ARM] 5196/1: fix inline asm constraints for preload
[ARM] 5194/1: update .gitignore
[ARM] add proc-macros.S include to proc-arm940 and proc-arm946
[ARM] 5192/1: ARM TLB: add v7wbi_{possible,always}_flags to {possible,always}_tlb_flags
[ARM] 5193/1: Wire up missing syscalls
[ARM] traps: don't call undef hook functions with spinlock held
[ARM] 5183/2: Provide Poodle LoCoMo GPIO names
[ARM] dma-mapping: provide sync_range APIs
[ARM] dma-mapping: improve type-safeness of DMA translations
[ARM] Kirkwood: instantiate the orion_spi driver in the platform code
[ARM] prevent crashing when too much RAM installed
[ARM] Kirkwood: Instantiate mv_xor driver
[ARM] Orion: Instantiate mv_xor driver for 5182
...
This patch improves the performance of the ecc generation code by a
factor of 18 on an INTEL D920 CPU, a factor of 7 on MIPS and a factor of 5
on ARM (NSLU2)
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
On OMAP3, the driver was occasionally not seeing the GPIO
interrupt. Adding a small delay of one register read
eliminates the problem.
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This driver had resided in the OMAP tree but is now to be in MTD.
Original authors were:
Jarkko Lavinen <jarkko.lavinen@nokia.com> and Juha Yrjölä
IRQ and DMA support written by Timo Teras
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
- add extended device information support
- add s25sl128 device support
Signed-off-by: Chen Gong <g.chen@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
