Commit Graph

5272 Commits

Author SHA1 Message Date
Christophe JAILLET
aab08c1aac dmaengine: idxd: Fix the error handling path in idxd_cdev_register()
If a call to alloc_chrdev_region() fails, the already allocated resources
are leaking.

Add the needed error handling path to fix the leak.

Fixes: 42d279f913 ("dmaengine: idxd: add char driver to expose submission portal to userland")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/1b5033dcc87b5f2a953c413f0306e883e6114542.1650521591.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-16 16:58:32 +05:30
Akhil R
461cd3709f dmaengine: tegra: Use platform_get_irq() to get IRQ resource
Use platform_irq_get() instead platform_get_resource() for IRQ resource
to fix the probe failure. platform_get_resource() fails to fetch the IRQ
resource as it might not be ready at that time.

platform_irq_get() is also the recommended way to get interrupt as it
directly gives the IRQ number and no conversion from resource is
required.

Fixes: ee17028009 ("dmaengine: tegra: Add tegra gpcdma driver")
Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20220505091440.12981-1-akhilrajeev@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-16 16:58:10 +05:30
Yunbo Yu
99faef48e7 dmaengine: mv_xor_v2 : Move spin_lock_bh() to spin_lock()
It is unnecessary to call spin_lock_bh() for that you are already
in a tasklet.

Signed-off-by: Yunbo Yu <yuyunbo519@gmail.com>
Link: https://lore.kernel.org/r/20220420122754.148359-1-yuyunbo519@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-22 12:56:41 +05:30
Dave Jiang
63c14ae6c1 dmaengine: idxd: refactor wq driver enable/disable operations
Move the core driver operations from wq driver to the drv_enable_wq() and
drv_disable_wq() functions. The move should reduce the wq driver's
knowledge of the core driver operations and prevent code confusion for
future wq drivers.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/165047301643.3841827.11222723219862233060.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-22 12:54:20 +05:30
Jayesh Choudhary
b21fe492a3 dmaengine: ti: k3-psil-am62: Update PSIL thread for saul.
Correct the RX PSIL thread for sa3ul.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Fixes: 5ac6bfb587 ("dmaengine: ti: k3-psil: Add AM62x PSIL and PDMA data")
Link: https://lore.kernel.org/r/20220421065323.16378-1-j-choudhary@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-22 11:30:43 +05:30
Vinod Koul
e235fe3bcf dmaengine: ptdma: statify pt_tx_status
LKP bot reports a new warning:
Warning:
drivers/dma/ptdma/ptdma-dmaengine.c:262:1: warning: no previous prototype for 'pt_tx_status' [-Wmissing-prototypes]

pt_tx_status() should be static, so declare as such.

Reported-by: kernel test robot <lkp@intel.com>
Fixes: d965068259 ("dmaengine: PTDMA: support polled mode")
Link: https://lore.kernel.org/r/20220421052407.745637-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-22 11:29:13 +05:30
Ben Walker
643a4a85b0 dmaengine: hidma: In hidma_prep_dma_memset treat value as a single byte
The value parameter is a single byte, so duplicate it to the 8 byte
range that is used as the pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Sinan Kaya <okaya@kernel.org>
Link: https://lore.kernel.org/r/20220301182551.883474-5-benjamin.walker@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:28:12 +05:30
Ben Walker
3e0c06964b dmaengine: at_xdmac: In at_xdmac_prep_dma_memset, treat value as a single byte
The value passed in to .prep_dma_memset is to be treated as a single
byte repeating pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220301182551.883474-4-benjamin.walker@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:28:12 +05:30
Ben Walker
ceabe10cf5 dmaengine: at_hdmac: In atc_prep_dma_memset, treat value as a single byte
The value passed in to .prep_dma_memset is to be treated as a single
byte repeating pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220301182551.883474-3-benjamin.walker@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:28:12 +05:30
Dave Jiang
439b5e765a dmaengine: idxd: move wq irq enabling to after device enable
Move the calling of request_irq() and other related irq setup code until
after the WQ is successfully enabled. This reduces the amount of
setup/teardown if the wq is not configured correctly and cannot be enabled.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164642777730.179702.1880317757087484299.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:25:42 +05:30
Jiapeng Chong
96144c8fb3 dmaengine: tegra: Remove unused including <linux/version.h>
Eliminate the follow versioncheck warning:

./drivers/dma/tegra186-gpc-dma.c: 21 linux/version.h not needed.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Link: https://lore.kernel.org/r/20220413083842.69845-1-jiapeng.chong@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:21:51 +05:30
Dave Jiang
a8facc7b98 dmaengine: add verification of DMA_INTERRUPT capability for dmatest
Looks like I forgot to add DMA_INTERRUPT cap setting to the idxd driver and
dmatest is still working regardless of this mistake. Add an explicit check
of DMA_INTERRUPT capability for dmatest to make sure the DMA device being used
actually supports interrupt before the test is launched and also that the
driver is programmed correctly.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164978679251.2361020.5856734256126725993.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:21:15 +05:30
Haowen Bai
e335de6ba5 dmaengine: mediatek: mtk-hsdma: use NULL instead of using plain integer as pointer
This fixes the following sparse warnings:
drivers/dma/mediatek/mtk-hsdma.c:604:26: warning: Using plain integer
as NULL pointer

Signed-off-by: Haowen Bai <baihaowen@meizu.com>
Link: https://lore.kernel.org/r/1649750340-30777-1-git-send-email-baihaowen@meizu.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:20:02 +05:30
Haowen Bai
3dbc47a962 dmaengine: pl08x: drop the useless function
Unneeded variable: "retval". Return "NULL" , so we have to make code clear.
better way, drop the function.

Signed-off-by: Haowen Bai <baihaowen@meizu.com>
Link: https://lore.kernel.org/r/1649726180-13133-1-git-send-email-baihaowen@meizu.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:19:09 +05:30
Dave Jiang
23084545db dmaengine: idxd: set max_xfer and max_batch for RO device
Load the max_xfer_size and max_batch_size values from the values read from
registers to the shadow variables. This will allow the read-only device to
display the correct values for the sysfs attributes.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164971507673.2201761.11244446608988838897.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:17:33 +05:30
Dave Jiang
4e5a4eb203 dmaengine: idxd: set DMA_INTERRUPT cap bit
Even though idxd driver has always supported interrupt, it never actually
set the DMA_INTERRUPT cap bit. Rectify this mistake so the interrupt
capability is advertised.

Reported-by: Ben Walker <benjamin.walker@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164971497859.2201379.17925303210723708961.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:17:33 +05:30
Aidan MacDonald
2128565a8d dmaengine: jz4780: set DMA maximum segment size
Set the maximum segment size, since the hardware can do transfers larger
than the default 64 KiB returned by dma_get_max_seg_size().

The maximum segment size is limited by the 24-bit transfer count field
in DMA descriptors. The number of bytes is equal to the transfer count
times the transfer size unit, which is selected by the driver based on
the DMA buffer address and length of the transfer. The size unit can be
as small as 1 byte, so set the maximum segment size to 2^24-1 bytes to
ensure the transfer count will not overflow regardless of the size unit
selected by the driver.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220411153618.49876-1-aidanmacdonald.0x0@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 17:13:22 +05:30
Ilya Novikov
d965068259 dmaengine: PTDMA: support polled mode
If the DMA_PREP_INTERRUPT flag is not provided, run in polled mode,
which significantly improves IOPS: more than twice on chunks < 4K.

Signed-off-by: Ilya Novikov <i.m.novikov@yadro.com>
Link: https://lore.kernel.org/r/20220413113733.59041-1-i.m.novikov@yadro.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 16:38:19 +05:30
Yunbo Yu
1d05a0bdb4 dmaengine: plx_dma: Move spin_lock_bh() to spin_lock()
It is unnecessary to call spin_lock_bh() if you are already in a tasklet.

Signed-off-by: Yunbo Yu <yuyunbo519@gmail.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
Link: https://lore.kernel.org/r/20220418142021.1241558-1-yuyunbo519@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20 15:59:33 +05:30
Bjorn Andersson
d0a3ef6048 dmaengine: qcom: gpi: Add SM8350 support
The Qualcomm SM8350 platform does, like the SM8450, provide a set of GPI
controllers with an ee-offset of 0x10000. Add this to the driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220412212959.2385085-1-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 17:55:36 +05:30
Vinod Koul
6316572cf3 dmaengine: qcom: gpi: Add support for ee_offset
Controller on newer SoCs like SM8450 have registers at at offset. Add
ee_offset to driver_data and add this compatible for the driver.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220406132508.1029348-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 17:54:39 +05:30
Vinod Koul
94b8f0e58f dmaengine: qcom: gpi: set chain and link flag for duplex
Newer platforms seem to have strict requirement for TRE flags which
causes transaction to timeout. This was resolved to missing chain and
link flag for duplex spi transaction.

So add these two flags.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220406132508.1029348-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 17:54:39 +05:30
Christophe JAILLET
52126d4c03 dmaengine: Remove a useless mutex
According to lib/idr.c,
   The IDA handles its own locking.  It is safe to call any of the IDA
   functions without synchronisation in your code.

so the 'chan_mutex' mutex can just be removed.
It is here only to protect some ida_alloc()/ida_free() calls.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/7180452c1d77b039e27b6f9418e0e7d9dd33c431.1644140845.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 19:52:40 +05:30
Akhil R
ee17028009 dmaengine: tegra: Add tegra gpcdma driver
Adding GPC DMA controller driver for Tegra. The driver supports dma
transfers between memory to memory, IO peripheral to memory and
memory to IO peripheral.

Co-developed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Co-developed-by: Rajesh Gumasta <rgumasta@nvidia.com>
Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com>
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220225132044.14478-3-akhilrajeev@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 19:32:24 +05:30
Dave Jiang
81f5eb2b11 dmaengine: idxd: remove trailing white space on input str for wq name
Add string processing with strim() in order to remove trailing white spaces
that may be input by user for the wq->name.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164789525123.2799661.13795829125221129132.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 19:21:34 +05:30
Amelie Delaunay
ec834f1cc7 dmaengine: stm32-mdma: check the channel availability (secure or not)
STM32_MDMA_CCR bit[8] is used to enable Secure Mode (SM). If this bit is
set, it means that all the channel registers are write-protected. So the
channel is not available for Linux use.

Add stm32_mdma_filter_fn() callback filter and give it to
__dma_request_chan (instead of dma_get_any_slave_channel()), to exclude the
channel if it is marked Secure.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20220330103645.99969-1-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 18:58:19 +05:30
Christophe Leroy
1059893114 dmaengine: bestcomm: Prepare cleanup of powerpc's asm/prom.h
powerpc's asm/prom.h brings some headers that it doesn't
need itself.

In order to clean it up, first add missing headers in
users of asm/prom.h

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/f98acba303489bdf003e7256460696225b00702e.1648833428.git.christophe.leroy@csgroup.eu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 17:43:19 +05:30
jianchunfu
9060a7a46a dmaengine: ep93xx: Remove redundant word in comment
Remove the second 'to' which is repeated.

Signed-off-by: jianchunfu <jianchunfu@cmss.chinamobile.com>
Link: https://lore.kernel.org/r/20220403123120.7794-1-jianchunfu@cmss.chinamobile.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 17:31:48 +05:30
Dave Jiang
3157dd0a36 dmaengine: idxd: don't load pasid config until needed
The driver currently programs the system pasid to the WQ preemptively when
system pasid is enabled. Given that a dwq will reprogram the pasid and
possibly a different pasid, the programming is not necessary. The pasid_en
bit can be set for swq as it does not need pasid programming but
needs the pasid_en bit. Remove system pasid programming on device config
write. Add pasid programming for kernel wq type on wq driver enable. The
char dev driver already reprograms the dwq on ->open() call so there's no
change.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164935607115.1660372.6734518676950372366.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 17:28:58 +05:30
Lad Prabhakar
80380f89d0 dmaengine: mediatek-cqdma: Use platform_get_irq() to get the interrupt
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220404155557.27316-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 16:26:53 +05:30
Lad Prabhakar
bb40bb695e dmaengine: mediatek: mtk-hsdma: Use platform_get_irq() to get the interrupt
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220404155557.27316-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 16:26:53 +05:30
Lad Prabhakar
8b0c99371a dmaengine: nbpfaxi: Use platform_get_irq_optional() to get the interrupt
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_optional().

There are no non-DT users for this driver so interrupt range
(irq_res->start-irq_res->end) is no longer required and with DT we will
be sure it will be a single IRQ resource for each index.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220404155557.27316-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 16:26:53 +05:30
Lad Prabhakar
448a0994cc dmaengine: sh: Kconfig: Make RZ_DMAC depend on ARCH_RZG2L
The DMAC block is identical on Renesas RZ/G2L, RZ/G2UL and RZ/V2L SoC's, so
instead of adding dependency for each SoC's add dependency on ARCH_RZG2L.
The ARCH_RZG2L config option is already selected by ARCH_R9A07G043,
ARCH_R9A07G044 and ARCH_R9A07G054.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220406080417.14593-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-08 23:22:00 +05:30
Zong Li
e2dfce24f4 dmaengine: sf-pdma: Get number of channel by device tree
It currently assumes that there are always four channels, it would
cause the error if there is actually less than four channels. Change
that by getting number of channel from device tree.

For backwards-compatibility, it uses the default value (i.e. 4) when
there is no 'dma-channels' information in dts.

Signed-off-by: Zong Li <zong.li@sifive.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Link: https://lore.kernel.org/r/f08a95b6582a51712c5b2c3cb859136d07bfa8b9.1648461096.git.zong.li@sifive.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-08 18:43:29 +05:30
Linus Torvalds
2a44cdaa01 dmaengine updates for v5.18-rc1
New support:
  - Document RZ/V2L and RZ/G2UL dma binding
  - TI AM62x k3-udma and k3-psil support
 
 Updates:
  - Yaml conversion for Mediatek uart apdma schema
  - Removal of DMA-32 fallback configuration for various drivers
  - imx-sdma updates for channel restart
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Merge tag 'dmaengine-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "This time we have bunch of driver updates and some new device support.

  New support:
   - Document RZ/V2L and RZ/G2UL dma binding
   - TI AM62x k3-udma and k3-psil support

  Updates:
   - Yaml conversion for Mediatek uart apdma schema
   - Removal of DMA-32 fallback configuration for various drivers
   - imx-sdma updates for channel restart"

* tag 'dmaengine-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (23 commits)
  dmaengine: hisi_dma: fix MSI allocate fail when reload hisi_dma
  dmaengine: dw-axi-dmac: cleanup comments
  dmaengine: fsl-dpaa2-qdma: Drop comma after SoC match table sentinel
  dt-bindings: dma: Convert mtk-uart-apdma to DT schema
  dmaengine: ppc4xx: Make use of the helper macro LIST_HEAD()
  dmaengine: idxd: Remove useless DMA-32 fallback configuration
  dmaengine: qcom_hidma: Remove useless DMA-32 fallback configuration
  dmaengine: sh: Kconfig: Add ARCH_R9A07G054 dependency for RZ_DMAC config option
  dmaengine: ti: k3-psil: Add AM62x PSIL and PDMA data
  dmaengine: ti: k3-udma: Add AM62x DMSS support
  dmaengine: ti: cleanup comments
  dmaengine: imx-sdma: clean up some inconsistent indenting
  dmaengine: Revert "dmaengine: shdma: Fix runtime PM imbalance on error"
  dmaengine: idxd: restore traffic class defaults after wq reset
  dmaengine: altera-msgdma: Remove useless DMA-32 fallback configuration
  dmaengine: stm32-dma: set dma_device max_sg_burst
  dmaengine: imx-sdma: fix cyclic buffer race condition
  dmaengine: imx-sdma: restart cyclic channel if needed
  dmaengine: iot: Remove useless DMA-32 fallback configuration
  dmaengine: ptdma: handle the cases based on DMA is complete
  ...
2022-03-30 10:54:49 -07:00
Linus Torvalds
9a8b3d5f71 - added support for QCN550x (ath79)
- enabled KCSAN
 - removed TX39XX support
 - various cleanups and fixes
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Merge tag 'mips_5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - added support for QCN550x (ath79)

 - enabled KCSAN

 - removed TX39XX support

 - various cleanups and fixes

* tag 'mips_5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (31 commits)
  MIPS: Fix build error for loongson64 and sgi-ip27
  MIPS: ingenic: correct unit node address
  MIPS: Fix wrong comments in asm/prom.h
  MIPS: Remove redundant definitions of device_tree_init()
  MIPS: Remove redundant check in device_tree_init()
  MIPS: pgalloc: fix memory leak caused by pgd_free()
  MIPS: RB532: fix return value of __setup handler
  MIPS: Only use current_stack_pointer on GCC
  MIPS: boot/compressed: Use array reference for image bounds
  mips: cdmm: Fix refcount leak in mips_cdmm_phys_base
  mips: remove reference to "newer Loongson-3"
  mips: Always permit to build u-boot images
  MIPS: Sanitise Cavium switch cases in TLB handler synthesizers
  DEC: Limit PMAX memory probing to R3k systems
  mips: DEC: honor CONFIG_MIPS_FP_SUPPORT=n
  MIPS: fix fortify panic when copying asm exception handlers
  mips: ralink: fix a refcount leak in ill_acc_of_setup()
  mips: Implement "current_stack_pointer"
  MIPS: Remove TX39XX support
  MIPS: Modernize READ_IMPLIES_EXEC
  ...
2022-03-25 09:35:19 -07:00
Linus Torvalds
90ea15b7c9 ARM development updates for 5.18:
- amba bus cleanups
 - conversion to use reserve_initrd_mem()
 - remove -nostdlib from vdso link
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Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:

 - amba bus cleanups

 - conversion to use reserve_initrd_mem()

 - remove -nostdlib from vdso link

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 9181/1: vdso: remove -nostdlib compiler flag
  ARM: 9175/1: Convert to reserve_initrd_mem()
  ARM: 9174/1: amba: Move EXPORT_SYMBOL() closer to definition
  ARM: 9173/1: amba: kill amba_find_match()
  ARM: 9172/1: amba: Cleanup amba pclk operation
2022-03-21 10:55:18 -07:00
Jie Hai
b95044b384 dmaengine: hisi_dma: fix MSI allocate fail when reload hisi_dma
Remove the loaded hisi_dma driver and reload it, the driver fails
to work properly. The following error is reported in the kernel log:

[ 1475.597609] hisi_dma 0000:7b:00.0: Failed to allocate MSI vectors!
[ 1475.604915] hisi_dma: probe of 0000:7b:00.0 failed with error -28

As noted in "The MSI Driver Guide HOWTO"[1], the number of MSI
interrupt must be a power of two. The Kunpeng DMA driver allocates 30
MSI interrupts. As a result, no space left on device is reported
when the driver is reloaded and allocates interrupt vectors from the
interrupt domain.

This patch changes the number of interrupt vectors allocated by
hisi_dma driver to 32 to avoid this problem.

[1] https://www.kernel.org/doc/html/latest/PCI/msi-howto.html

Fixes: e9f08b6525 ("dmaengine: hisilicon: Add Kunpeng DMA engine support")

Signed-off-by: Jie Hai <haijie1@huawei.com>
Acked-by: Zhou Wang <wangzhou1@hisilicon.com>
Link: https://lore.kernel.org/r/20220216072101.34473-1-haijie1@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 16:05:39 +05:30
Tom Rix
e7c7a0161b dmaengine: dw-axi-dmac: cleanup comments
For spdx, /* */ for *.h, remove extra space

Replacements
configurarion to configuration
inerrupts to interrupts
chanels to channels

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20220309020056.1026106-1-trix@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 16:05:01 +05:30
Geert Uytterhoeven
a0754cf3b3 dmaengine: fsl-dpaa2-qdma: Drop comma after SoC match table sentinel
It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.

Add a comment to clarify the purpose of the empty element.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0b8ad4dcc185aa7a17655983e0eb5690d8fed460.1646311558.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 15:47:39 +05:30
Cai Huoqing
417c7d0dba dmaengine: ppc4xx: Make use of the helper macro LIST_HEAD()
Replace "struct list_head head = LIST_HEAD_INIT(head)" with
"LIST_HEAD(head)" to simplify the code.

Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
Link: https://lore.kernel.org/r/20220209032221.37211-1-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 15:39:09 +05:30
Christophe JAILLET
b6f2f0352c dmaengine: idxd: Remove useless DMA-32 fallback configuration
As stated in [1], dma_set_mask() with a 64-bit mask never fails if
dev->dma_mask is non-NULL.
So, if it fails, the 32 bits case will also fail for the same reason.

Simplify code and remove some dead code accordingly.

[1]: https://lore.kernel.org/linux-kernel/YL3vSPK5DXTNvgdx@infradead.org/#t

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/009c80294dba72858cd8a6ed2ed81041df1b1e82.1642231430.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 15:23:36 +05:30
Christophe JAILLET
8f7cc6373b dmaengine: qcom_hidma: Remove useless DMA-32 fallback configuration
As stated in [1], dma_set_mask() with a 64-bit mask never fails if
dev->dma_mask is non-NULL.
So, if it fails, the 32 bits case will also fail for the same reason.

Simplify code and remove some dead code accordingly.

[1]: https://lore.kernel.org/linux-kernel/YL3vSPK5DXTNvgdx@infradead.org/#t

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/4deb32b0c7838da66608022c584326eb01d0da03.1642232106.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 15:23:23 +05:30
Lad Prabhakar
386fe06c39 dmaengine: sh: Kconfig: Add ARCH_R9A07G054 dependency for RZ_DMAC config option
RZ/V2L DMA block is identical to one found on RZ/G2L SoC. This patch adds
ARCH_R9A07G054 dependency for RZ_DMAC config option so that the driver
can be enabled on RZ/V2L SoC. While at it, also update config help text.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220221224321.11939-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 12:34:05 +05:30
Vignesh Raghavendra
5ac6bfb587 dmaengine: ti: k3-psil: Add AM62x PSIL and PDMA data
Add PSIL EP data and PDMA data for AM62x.

[p.yadav@ti.com: Add CSIRX data]

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20220219083220.489420-3-vigneshr@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 12:32:53 +05:30
Vignesh Raghavendra
03cbdf8b12 dmaengine: ti: k3-udma: Add AM62x DMSS support
Attribute AM64x soc data to AM62x as well as the DMSS IP is similar b/w
these two SoCs

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20220219083220.489420-2-vigneshr@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 12:32:53 +05:30
Tom Rix
2ed4ba9486 dmaengine: ti: cleanup comments
Remove the second 'the'

Replacements
completetion to completion
seens to seen
pendling to pending
atleast to at least
tranfer to transfer
multibple to a multiple
transfering to transferring

Signed-off-by: Tom Rix <trix@redhat.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20220217182546.3266909-1-trix@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 12:31:17 +05:30
Yang Li
fb7a444a5f dmaengine: imx-sdma: clean up some inconsistent indenting
Eliminate the following coccicheck warning:
./drivers/dma/imx-sdma.c:896:3-16: code aligned with following code on
line 897

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/20220217011604.123106-1-yang.lee@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-11 12:29:23 +05:30
Vinod Koul
d143f939a9 dmaengine: Revert "dmaengine: shdma: Fix runtime PM imbalance on error"
This reverts commit 455896c53d ("dmaengine: shdma: Fix runtime PM
imbalance on error") as the patch wrongly reduced the count on error and
did not bail out. So drop the count by reverting the patch .

Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-10 10:13:20 +05:30
Vinod Koul
60c10db9b1 dmaengine fixes for v5.17
Bunch of driver fixes for:
  - ptdma error handling in init
  - lock fix in at_hdmac
  - error path and error num fix for sh dma
  - pm balance fix for stm32
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Merge tag 'dmaengine-fix-5.17' into next

This merges dmaengine/dmaengine-fix-5.17 tag into next as that is
already merged mainline and resolves depencency in patches
2022-03-10 10:12:25 +05:30