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3287 Commits
Author | SHA1 | Message | Date | |
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Taniya Das
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1e910b2ba0 |
dt-bindings: clock: qcom: Add SM8450 video clock controller
Add device tree bindings for the video clock controller on Qualcomm SM8450 platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524140656.7076-2-quic_tdas@quicinc.com |
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Imran Shaik
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1c305ea86b |
dt-bindings: clock: qcom: Add GCC clocks for SDX75
Add support for qcom global clock controller bindings for SDX75 platform. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com |
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Konrad Dybcio
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672b584c68 |
dt-bindings: power: qcom,rpmpd: Add SA8155P
Add a compatible for SA8155P platforms and relevant defines to the include file. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411-topic-hanaau-v2-1-fd3d70844b31@linaro.org |
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Kathiravan T
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fe78d73a91 |
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
Add the SoC ID for IPQ5312 and IPQ5302, which belong to the family of IPQ5332 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230509033531.21468-2-quic_kathirav@quicinc.com |
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Robert Marko
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e5b03cd101 |
dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
Add SOC IDs for the IPQ5018 family. Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230429193336.600629-1-robimarko@gmail.com |
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Dmitry Baryshkov
|
375cccc659 |
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
On msm8996 CBF interconnects power and performance CPU clusters. Add corresponding interconnect defines to be used in device trees. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230512001334.2983048-2-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Konrad Dybcio
|
1738600082 |
dt-bindings: power: qcom,rpmpd: Format RPMh levels better
After adding the missing levels with a nice, easy-to-read diff, reformat the defines to make them nice to look at.. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-2-3063ce19c491@linaro.org |
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Konrad Dybcio
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4755e880b0 |
dt-bindings: power: qcom,rpmpd: add missing RPMH levels
There are a lot of RPMh levels that we haven't included yet.. some sadly turned out to be necessary, add them! Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-1-3063ce19c491@linaro.org |
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Sumit Gupta
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b0dae3df05 |
dt-bindings: tegra: Add ICC IDs for dummy memory clients
Add ICC IDs for dummy software clients representing CCPLEX clusters. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Srinivas Kandagatla
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90848a2557
|
ASoC: qcom: q6dsp: add support to more display ports
Existing code base only supports one display port, this patch adds support upto 8 display ports. This support is required to allow platforms like X13s which have 3 display ports, and some of the Qualcomm SoCs there are upto 7 Display ports. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org Link: https://lore.kernel.org/r/20230509112202.21471-4-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org |
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Linus Torvalds
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1c1094e47e |
- mailbox api: allow direct registration to a channel
Convert omap and pcc to use mbox_bind_client - omap and hi6220 : use of_property_read_bool - test: fix double-free and use spinlock header - rockchip and bcm-pdc: drop of_match_ptr - mpfs: change config symbol - mediatek gce: support MT6795 - qcom apcs: consolidate of_device_id support IPQ9574 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmRWXwYACgkQf9lkf8eY P5V11Q/9G2V2V/QO6EJm8JQ6ElkO+cLeZezmyAhlt3l7n2B5WjEdnKX2nxOYmgZl qb+tYFJO7cd+lpMMTWz4PfOZbedkhrGXwzV8OMzXHJHfOdy3oojw8NYXY7IXdwsy jhik8jYSUx2vHYCTCbAT0SgNLWJHE+RMzFjg01Wb49zIqJf9kbw8RfmWItKGLBJt 0ePSYW2o7LckMf3KSVV3YxfTlvX6Wb0rE0HXv/YI17XtDWT/RlpHb9rVvPWcpKfI wZjQ49wxjtpsilxAQijcT+gE2wmvx62S1HeSSwE7JZ/7k4Ihg269rUa3p0Dp3dcA RLyEhrLt3KWAWYWDXvsGVhaJvrtHI0BMA1Pb3C+qnjdcySs8AZgQbGTtI3RPOiuq 3VCshYVZMEbVoXZOHFbov0e6pyBX5dLqU8W3FhfAVunovj/d7/+74h1uP6ecJjhP +DazIWSc20ATWUaD+UrjPhaGsNwEGceiJiY6nHhnzWZlu2K+2UXRlSrL/iAydvaj SRJeqHiY12fGPGVOScpCMylAGsa+VI+oA61JlMfjLvuyL4qSwNwZGpmCUlIod2AJ 8vUGw254XMr5CiZ4u/D/cyi+7gJ4la53xNkNZIfFs7cP+gbCygaCHDy11bzQa+i1 /sLR9voYIp0Woljds5a6L+o2bP5hkf/Uf+6WKEU8uaW98f5tA14= =NHj4 -----END PGP SIGNATURE----- Merge tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - mailbox api: allow direct registration to a channel and convert omap and pcc to use mbox_bind_client - omap and hi6220 : use of_property_read_bool - test: fix double-free and use spinlock header - rockchip and bcm-pdc: drop of_match_ptr - mpfs: change config symbol - mediatek gce: support MT6795 - qcom apcs: consolidate of_device_id and support IPQ9574 * tag 'mailbox-v6.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: qcom: add compatible for IPQ9574 SoC mailbox: qcom-apcs-ipc: do not grow the of_device_id dt-bindings: mailbox: qcom,apcs-kpss-global: use fallbacks for few variants dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795 mailbox: mpfs: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE mailbox: bcm-pdc: drop of_match_ptr for ID table mailbox: rockchip: drop of_match_ptr for ID table mailbox: mailbox-test: Fix potential double-free in mbox_test_message_write() mailbox: mailbox-test: Explicitly include header for spinlock support mailbox: Use of_property_read_bool() for boolean properties mailbox: pcc: Use mbox_bind_client mailbox: omap: Use mbox_bind_client mailbox: Allow direct registration to a channel |
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Linus Torvalds
|
78b421b6a7 |
linux-watchdog 6.4-rc1 tag
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iEYEABECAAYFAmRTZSoACgkQ+iyteGJfRspyfACgojeDzj400vg0/ZfMrqvwGWiW rroAn13l3UIJI6dI8J89jjp2q5Xo0RSq =ECpF -----END PGP SIGNATURE----- Merge tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - Add watchdog driver for StarFive JH7100 and JH7110 Soc - Add Rockchip RK3588 devices - Add Qualcom IPQ5332 APSS, QCM2290 KPSS and SM6115 SoC devices - Add Mediatke MT8365 and MT6735 devices - Watchdog-core: Always set WDOG_HW_RUNNING when starting watchdog - Convert watchdog platform drivers to return void on the remove callback - Convert to devm_clk_get_enabled() helpers - ... and other small fixes and improvements * tag 'linux-watchdog-6.4-rc1' of git://www.linux-watchdog.org/linux-watchdog: (72 commits) watchdog: dw_wdt: Simplify clk management watchdog: dw_wdt: Fix the error handling path of dw_wdt_drv_probe() watchdog: starfive: Fix the warning of starfive_wdt_match watchdog: starfive: Fix the probe return error if PM and early_enable are both disabled MAINTAINERS: Add fragment for Xilinx watchdog driver watchdog: menz069_wdt: fix timeout setting watchdog: menz069_wdt: fix watchdog initialisation dt-bindings: watchdog: alphascale-asm9260: convert to DT schema watchdog: loongson1_wdt: Implement restart handler dt-bindings: watchdog: Document Qualcomm SM6115 watchdog dt-bindings: watchdog: realtek,otto-wdt: simplify requiring interrupt-names dt-bindings: watchdog: toshiba,visconti-wdt: simplify with unevaluatedProperties dt-bindings: watchdog: fsl-imx7ulp-wdt: simplify with unevaluatedProperties dt-bindings: watchdog: arm,sp805: drop unneeded minItems dt-bindings: watchdog: drop duplicated GPIO watchdog bindings dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT drivers: watchdog: Add StarFive Watchdog driver dt-bindings: watchdog: Add watchdog for StarFive JH7100 and JH7110 dt-bindings: watchdog: indentation, quotes and white-space cleanup watchdog: ebc-c384_wdt: Mark status as orphaned ... |
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AngeloGioacchino Del Regno
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26e02e6c10 |
dt-bindings: mailbox: mediatek,gce-mailbox: Add support for MT6795
Add a compatible string for the MT6795 Helio X10 SoC using MT8173 binding and add a header for the MT6795's GCE mailbox. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
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Linus Torvalds
|
3af49062b0 |
- New Drivers
- Add support for Renesas RZ/G2L MTU3 - New Device Support - Add support for Lenovo Yoga Book X90F to Intel CHT WC - Add support for MAX5970 and MAX5978 to Simple MFD (I2C) - Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI - Add support for AXP15060 PMIC to X-Powers PMIC collection - Remove Device Support - Remove support for Samsung 5M8751 and S5M8763 PMIC devices - New Functionality - Convert deprecated QCOM IRQ Chip to config registers - Add support for 32-bit address spaces to Renesas SMUs - Fix-ups - Make use of APIs / MACROs designed to simplify and demystify - Add / improve Device Tree bindings - Memory saving struct layout optimisations - Remove old / deprecated functionality - Factor out unassigned register addresses from ranges - Trivial: Spelling fixes, renames and coding style fixes - Rid 'defined but not used' warnings - Remove ineffective casts and pointer stubs - Bug Fixes - Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms - Remove MODULE_*() helpers from non-tristate drivers - Do not attempt to use out-of-range memory addresses associated with io_base - Provide missing export helpers - Fix remap bulk read optimisation fallout - Fix memory leak issues in error paths -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmRROFAACgkQUa+KL4f8 d2E9OxAAtG4Ac/I8Cp/VsTGGn5/pxxMnY/AWmdfkexp8bDQSvavKKQZ2wEwgFaTW GVaOIuWpG82fdoIAm1SkLs/gjPbXLnDJlxv8UcYa3kMQik/iiwrWl4zN2KBZqIIX qdg7fZNVAhi/qjue1YCHxKjMB80kK2LBTfwly+mbOXWMOBmoDh957oFuNBAa9W/A QxN9ckU/yVMjpeZQ1M97g/nUu+lKMypcCNHm1hklzqbchqgUiefdYS6t+g7zBgff zvwrlo+Tt0oIef95+TVmiVQBWJ+Cf8ssZphyL9I5dUH1Ft16BsNZYVvD1Eur1WGf N7szGDBZoqK5I6uUJ2t4+xiE4Mh1r+TIoCZuSwpDWS5IRKiWxTTZ9aDTXTKbnVKK Ov5SA3cdC2McXa0NCXB/47HzDTXhffH0SQ9x3JKlba2crSKt7LicVhjeflMOcHw+ HuTzg3imeMQriLVrVcvgce+YOcF3G/bFX9jvxnp8WFY+MLKuTYCGqoUfY6EF6r4i F0Y6DmYDBGX3rND+zvXDVMjS+RymYTSMtY9PKOXEdY1WU9E8GAHSKhrOCyCO3aIm PZRC2GAzGQ5fRCkyXusk0kxJqBBxu1My/wUQ9xRjdMKszFxEgVVFIY7KLwanY5vW 2akDnwOtu+37G9Qm4h2TpQdNLGTldZbbFcWrYGKzbNrVOjYw824= =EBtX -----END PGP SIGNATURE----- Merge tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add support for Renesas RZ/G2L MTU3 New Device Support: - Add support for Lenovo Yoga Book X90F to Intel CHT WC - Add support for MAX5970 and MAX5978 to Simple MFD (I2C) - Add support for Meteor Lake PCH-S LPSS PCI to Intel LPSS PCI - Add support for AXP15060 PMIC to X-Powers PMIC collection Remove Device Support: - Remove support for Samsung 5M8751 and S5M8763 PMIC devices New Functionality: - Convert deprecated QCOM IRQ Chip to config registers - Add support for 32-bit address spaces to Renesas SMUs Fix-ups: - Make use of APIs / MACROs designed to simplify and demystify - Add / improve Device Tree bindings - Memory saving struct layout optimisations - Remove old / deprecated functionality - Factor out unassigned register addresses from ranges - Trivial: Spelling fixes, renames and coding style fixes - Rid 'defined but not used' warnings - Remove ineffective casts and pointer stubs Bug Fixes: - Fix incorrectly non-inverted mask/unmask IRQs on QCOM platforms - Remove MODULE_*() helpers from non-tristate drivers - Do not attempt to use out-of-range memory addresses associated with io_base - Provide missing export helpers - Fix remap bulk read optimisation fallout - Fix memory leak issues in error paths" * tag 'mfd-next-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (88 commits) dt-bindings: mfd: ti,j721e-system-controller: Add SoC chip ID leds: bd2606mvv: Driver for the Rohm 6 Channel i2c LED driver dt-bindings: mfd: qcom,spmi-pmic: Document flash LED controller dt-bindings: mfd: x-powers,axp152: Document the AXP15060 variant mfd: axp20x: Add support for AXP15060 PMIC dt-bindings: mfd: x-powers,axp152: Document the AXP313a variant counter: rz-mtu3-cnt: Unlock on error in rz_mtu3_count_ceiling_write() dt-bindings: mfd: dlg,da9063: Document voltage monitoring dt-bindings: mfd: stm32: Remove unnecessary blank lines dt-bindings: mfd: qcom,spmi-pmic: Use generic ADC node name in examples dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible MAINTAINERS: Add entries for Renesas RZ/G2L MTU3a counter driver counter: Add Renesas RZ/G2L MTU3a counter driver Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select mfd: Add Renesas RZ/G2L MTU3a core driver dt-bindings: timer: Document RZ/G2L MTU3a bindings mfd: rsmu_i2c: Convert to i2c's .probe_new() again mfd: intel-lpss: Add Intel Meteor Lake PCH-S LPSS PCI IDs mfd: dln2: Fix memory leak in dln2_probe() mfd: axp20x: Fix axp288 writable-ranges ... |
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Linus Torvalds
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e81507acdc |
Nothing looks out of the ordinary in this batch of clk driver updates. There
are a couple patches to the core clk framework, but they're all basically cleanups or debugging aids. The driver updates and new additions are dominated in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of new drivers for various SoCs, and MediaTek gained a bunch of drivers for MT8188. The MediaTek drivers are being modernized as well, so there are updates all over that vendor's clk drivers. There's also a couple other new clk drivers in here, for example the Starfive JH7110 SoC support is added. Outside of the two major SoC vendors though, we have the usual collection of non-critical fixes and cleanups to various clk drivers. It's good to see that we're getting more cleanups and modernization patches. Maybe one day we'll be able to properly split clk providers from clk consumers. Core: - Print an informational message before disabling unused clks New Drivers: - BCM63268 timer clock and reset controller - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Clk driver support for Loongson-2 SoCs - Clock driver for Skyworks Si521xx I2C PCIe clock generators - Initial Starfive JH7110 clk/reset support - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs Updates: - Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() - Convert platform clk drivers to remove_new() - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Reimplement Loongson-1 clk driver with DT support - Migrate socfpga clk driver to of_clk_add_hw_provider() - Support for i3c clks on Aspeed ast2600 SoCs - Add clock generic devm_clk_hw_register_gate_parent_data - Add audiomix block control for i.MX8MP - Add support for determine_rate to i.MX composite-8m - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate - Provide clock name in error message for clk-gpr-mux on get parent failure - Drop duplicate imx_clk_mux_flags macro - Register the i.MX8MP Media Disp2 Pix clock as bus clock - Add Media LDB root clock to i.MX8MP - Make i.MX8MP nand_usdhc_bus clock as non-critical - Fix the rate table for i.MX fracn-gppll - Disable HW control for the fracn-gppll in order to be controlled by register write - Add support for interger PLL in fracn-gppll - Add mcore_booted module parameter to i.MX93 provider - Add NIC, A55 and ARM PLL clocks to i.MX93 - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to get more accurate clock rates - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical - Update some of the i.MX critical clocks flags to allow glitchless on-the-fly rate change. - Add I2C5 clock on Renesas R-Car V3H - Exynos850: Add CMU_G3D clock controller for the Mali GPU - Extract Exynos5433 (ARM64) clock controller power management code to common driver parts - Exynos850: make PMU_ALIVE_PCLK clock critical - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H - Add video capture (VIN) clocks on Renesas R-Car V3H - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H - Support for Stromer Plus PLL on Qualcomm IPQ5332 - Add a missing reset to Qualcomm QCM2290 - Migrate Qualcomm IPQ4019 to clk_parent_data - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375, MSM8996 and MSM8998 SoCs - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk - Add two EMAC GDSCs on Qualcomm SC8280XP - Use shared rcg clk ops in Qualcomm SM6115 GCC - Park Qualcomm SM8350 PCIe PIPE clks when disabled - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller - Add missing XO clocks to Qualcomm MSM8226 and MSM8974 - Convert some Qualcomm clk DT bindings to YAML - Reparenting fix for the clock supplying camera modules on Rockchip rk3399 - Mark more critical (bus-)clocks on Rockchip rk3588 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmRMbQURHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSUvyw//Vcqg0h8s+9npz0JsW+nffAXRguy1jum6 tj10++zA+NBhKxmfhyOs/v9UK1nb2DXAhcTIjUDcTDkVy0b2pBUQoGEGMyy9TLve q4MfWx7CwKwASUG2Lr3f1n4qi/vT4PEDlvYzUO94p7c6Y6f6P4JHTCJlJR7cNb4o MyXgiXMxQGaxT0XucSR9J32VxqSbF9KQvb8q+tPV3CDMIWi96aO5ZyewY6KF8a/7 chdXKYQXaYYG4/q4lNjZuvNQ2jidWqp0NlNw7M96U7SK5ESBryk4B4d1/J+QtzxX cuBTF1eoTKYlS3kPhhsuOhbsDi2SFE6D75ps5i9Y57ezSdS9qFcUsaNzUiN6t9ng uW+MRBTz20JDKBTLk6vD75O63fVDg3KG+kkLaF0Ax1Xa99sbrgBdNkPQ0Iu2AbSh assUmbz3s9MaPWj8LpOKLmactm4GbrQ2wtCEjguuynjaFoPUuyunReNkZ1yxfUUl MjRIYpvqVvYp29xHlBjN2cgttHjqVCBg8y7Io6RQonbIvnuN7Zo2cu+vbF7w7mdR 2HtGBe/OFsnZmmsr0pIGQOU25otheIHPudEYLlXEKx03FaMzAXnnDe9f6xXWaWxk Wz0YBofejlkP9ycLjRas2BZo3T66TtAlbQH2UhrSpJZV02Jwfi+JwBaLi9dOwZ7O VL5HI5FSlG8= =bTtL -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Nothing looks out of the ordinary in this batch of clk driver updates. There are a couple patches to the core clk framework, but they're all basically cleanups or debugging aids. The driver updates and new additions are dominated in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of new drivers for various SoCs, and MediaTek gained a bunch of drivers for MT8188. The MediaTek drivers are being modernized as well, so there are updates all over that vendor's clk drivers. There's also a couple other new clk drivers in here, for example the Starfive JH7110 SoC support is added. Outside of the two major SoC vendors though, we have the usual collection of non-critical fixes and cleanups to various clk drivers. It's good to see that we're getting more cleanups and modernization patches. Maybe one day we'll be able to properly split clk providers from clk consumers. Core: - Print an informational message before disabling unused clks New Drivers: - BCM63268 timer clock and reset controller - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Clk driver support for Loongson-2 SoCs - Clock driver for Skyworks Si521xx I2C PCIe clock generators - Initial Starfive JH7110 clk/reset support - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs Updates: - Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() - Convert platform clk drivers to remove_new() - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Reimplement Loongson-1 clk driver with DT support - Migrate socfpga clk driver to of_clk_add_hw_provider() - Support for i3c clks on Aspeed ast2600 SoCs - Add clock generic devm_clk_hw_register_gate_parent_data - Add audiomix block control for i.MX8MP - Add support for determine_rate to i.MX composite-8m - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate - Provide clock name in error message for clk-gpr-mux on get parent failure - Drop duplicate imx_clk_mux_flags macro - Register the i.MX8MP Media Disp2 Pix clock as bus clock - Add Media LDB root clock to i.MX8MP - Make i.MX8MP nand_usdhc_bus clock as non-critical - Fix the rate table for i.MX fracn-gppll - Disable HW control for the fracn-gppll in order to be controlled by register write - Add support for interger PLL in fracn-gppll - Add mcore_booted module parameter to i.MX93 provider - Add NIC, A55 and ARM PLL clocks to i.MX93 - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to get more accurate clock rates - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical - Update some of the i.MX critical clocks flags to allow glitchless on-the-fly rate change. - Add I2C5 clock on Renesas R-Car V3H - Exynos850: Add CMU_G3D clock controller for the Mali GPU - Extract Exynos5433 (ARM64) clock controller power management code to common driver parts - Exynos850: make PMU_ALIVE_PCLK clock critical - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H - Add video capture (VIN) clocks on Renesas R-Car V3H - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H - Support for Stromer Plus PLL on Qualcomm IPQ5332 - Add a missing reset to Qualcomm QCM2290 - Migrate Qualcomm IPQ4019 to clk_parent_data - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375, MSM8996 and MSM8998 SoCs - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk - Add two EMAC GDSCs on Qualcomm SC8280XP - Use shared rcg clk ops in Qualcomm SM6115 GCC - Park Qualcomm SM8350 PCIe PIPE clks when disabled - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller - Add missing XO clocks to Qualcomm MSM8226 and MSM8974 - Convert some Qualcomm clk DT bindings to YAML - Reparenting fix for the clock supplying camera modules on Rockchip rk3399 - Mark more critical (bus-)clocks on Rockchip rk3588" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: rockchip: rk3588: make gate linked clocks critical clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: starfive: Avoid casting iomem pointers clk: microchip: fix potential UAF in auxdev release callback clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: mediatek: fhctl: Mark local variables static clk: sifive: make SiFive clk drivers depend on ARCH_ symbols clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` ... |
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Linus Torvalds
|
1c15ca4e4e |
sound updates for 6.4-rc1
At this time, it's an interesting mixture of changes for both old and new stuff. Majority of changes are about ASoC (lots of systematic changes for converting remove callbacks to void, and cleanups), while we got the fixes and the enhancements of very old PCI cards, too. Here are some highlights: ALSA/ASoC Core: - Continued effort of more ASoC core cleanups - Minor improvements for XRUN handling in indirect PCM helpers - Code refactoring of PCM core code ASoC: - Continued feature and simplification work on SOF, including addition of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4 protocol - Hibernation support for CS35L45 - More DT binding conversions - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363, nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car Gen4, Rockchip RK3588 and TI TAS5733 ALSA: - Lots of works for legacy emu10k1 and ymfpci PCI drivers - PCM kselftest fixes and enhancements -----BEGIN PGP SIGNATURE----- iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmRJBkcOHHRpd2FpQHN1 c2UuZGUACgkQLtJE4w1nLE8S/Q/+If1MEW+XXYushYU6VcWbHevwsRwmUZPtIJzT Nx4PE4Ia8rX++GbsH5Iqt6tmldbb/vMbwy7TGbn/Q4ju2cO5qGT4/qgWdC2TuUX6 icWRHslJ//TffSd/yh1g6JIKBlcCmQeYcw5KoaLzBE/qO3iRP0IQUc17gkLKYNni u1XOGrU9zuh3uwz+UQFfUhB8NlKhD3HVYjwrbd3gwcDsE/0G+q76A/wWghfA+RAb 0ruDhIDtJoem6PKQTwC05UgDpmwd7XFAIgcbOu7E7t/lr4YKwQZhQmJI0IexCR9i aLPqg3Q/6S+WFKpcPcGCHNljqRNp9lUlIXak+NsbCZ7mXKE6tALywAtuB57sZ0sO QM1YrmUAsi0RaD7foPcT64CAq8IVQ6aLWusXwvcxzzvJuHvJdeiBKiI5gmF0GqMu ZLpAMGCoKxft4Il2r+BPTbLHe57uHmp1fKMWUK4NfyIUW7jEdKmf7ALSSJmvcqwU +R0PXikc0lOo1GH9ZQojpVNFwV8XLOd2CWaNfoPl85A0+ngYhTY3ZRQ3qbYWHlU6 zXAu06IUOef5phsn3zerJ1orV729Xdjf+JUbL0uxJvANsX6R93CQWw0tgrUI62EZ 0vhoOp3PPZUKmDKvUo/NtIyuvSGREg3wDug5tiDOb53Qwfr2VIThJa999kNzH76c lHUfrv4= =7XGG -----END PGP SIGNATURE----- Merge tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "At this time, it's an interesting mixture of changes for both old and new stuff. Majority of changes are about ASoC (lots of systematic changes for converting remove callbacks to void, and cleanups), while we got the fixes and the enhancements of very old PCI cards, too. Here are some highlights: ALSA/ASoC Core: - Continued effort of more ASoC core cleanups - Minor improvements for XRUN handling in indirect PCM helpers - Code refactoring of PCM core code ASoC: - Continued feature and simplification work on SOF, including addition of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4 protocol - Hibernation support for CS35L45 - More DT binding conversions - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363, nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car Gen4, Rockchip RK3588 and TI TAS5733 ALSA: - Lots of works for legacy emu10k1 and ymfpci PCI drivers - PCM kselftest fixes and enhancements" * tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (586 commits) ALSA: emu10k1: use high-level I/O in set_filterQ() ALSA: emu10k1: use high-level I/O functions also during init ALSA: emu10k1: fix error handling in snd_audigy_i2c_volume_put() ALSA: emu10k1: don't stop DSP in _snd_emu10k1_{,audigy_}init_efx() ALSA: emu10k1: fix SNDRV_EMU10K1_IOCTL_SINGLE_STEP ALSA: emu10k1: skip Sound Blaster-specific hacks for E-MU cards ALSA: emu10k1: fixup DSP defines ALSA: emu10k1: pull in some register definitions from kX-project ALSA: emu10k1: remove some bogus defines ALSA: emu10k1: eliminate some unused defines ALSA: emu10k1: fix lineup of EMU_HANA_* defines ALSA: emu10k1: comment updates ALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards ALSA: emu10k1: remove unused emu->pcm_playback_efx_substream field ALSA: emu10k1: remove unused `resume` parameter from snd_emu10k1_init() ALSA: emu10k1: minor optimizations ALSA: emu10k1: remove remaining cruft from snd_emu10k1_emu1010_init() ALSA: emu10k1: remove apparently pointless EMU_HANA_OPTION_CARDS reads ALSA: emu10k1: remove apparently pointless FPGA reads ALSA: emu10k1: stop doing weird things with HCFG in snd_emu10k1_emu1010_init() ... |
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Linus Torvalds
|
d42b1c4757 |
Devicetree updates for v6.4, part 1:
Bindings: - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba TC358764 display bridge, Parade PS8622 display bridge, and Xilinx FPGA bindings to DT schema format - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller - Add MediaTek MT8365 UART and SYSIRQ bindings - Add Arm Cortex-A78C and X1C core compatibles - Add vendor prefix for Novatek - Remove bindings for stih415, sti416, stid127 platforms - Drop uneeded quotes in schema files. This is preparation for yamllint checking quoting for us. - Add missing (unevaluated|additional)Properties constraints on child node schemas - Clean-up schema comments formatting - Fix I2C and SPI node bus names in schema examples - Clean-up some display compatibles schema syntax - Fix incorrect references to lvds.yaml - Gather all cache controller bindings in a common directory DT core: - Convert unittest to new void .remove platform device hook - kerneldoc fixes for DT address of_pci_range_to_resource/ of_address_to_resource functions -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmRINPkACgkQ+vtdtY28 YcPIBA//ajT3b/Q98+Tyo20lYMTYLT/5JVehkl6wSctrBd8Td+mt/qdK6H8qmz20 yq5SvO1sdnF5jrZ0EIP1i2xPNcxJFQqqR4Cr8rjR53FerSru6L07a9F/n+2XWBZ3 ZJgDxXSGapby5VJfrF0stqaiHDGLBmsfX+38LYym9OBY99zDbAtVJvH6/rBt02wP nSF3xp5hC4z9J1cmp69DQq9n85UYyodtKwT0DJMaSzD0KlrI2yBxc0xtT0l04ekK 384aM6yesbQV9mdJm10HkKDjqMfEguD0BAlnklHN3q4gVQVqC2yb8VHoOasVVVjl 461UGMw9YRTqNcQjhporZdvpaH0ZLW94lESDF4M9OlP+6Aw88ZHtOIeWkSD1eycw 50aaEX6BRiOQopVopaRPme+AJMSh0e4nBewrsT8mzRsDUbpqZSedN+1CybeBH+TP un4NTimy4opOoXDRhYbFMBhiIqmxDAX2oZUpONstKrjhFW8b93H/n3deHE/fGsG8 TCBjzAD8DCmOBZE3XcoC1ZwJpFc3L+CxZ/bekDvHsuJmdQEF1tLS5F/rO1ty780U wNskteSlMG0vKboNHvZfu/3CgtKLGQsiipUdw9f/5vGjq8epioBksSAL9Dyngt7H 4BknZ73/upFVczaF55udIUMRpxKUavMnCPdKJH+vSNYPMB/3mEg= =u3lA -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba TC358764 display bridge, Parade PS8622 display bridge, and Xilinx FPGA bindings to DT schema format - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller - Add MediaTek MT8365 UART and SYSIRQ bindings - Add Arm Cortex-A78C and X1C core compatibles - Add vendor prefix for Novatek - Remove bindings for stih415, sti416, stid127 platforms - Drop uneeded quotes in schema files. This is preparation for yamllint checking quoting for us. - Add missing (unevaluated|additional)Properties constraints on child node schemas - Clean-up schema comments formatting - Fix I2C and SPI node bus names in schema examples - Clean-up some display compatibles schema syntax - Fix incorrect references to lvds.yaml - Gather all cache controller bindings in a common directory DT core: - Convert unittest to new void .remove platform device hook - kerneldoc fixes for DT address of_pci_range_to_resource/ of_address_to_resource functions" * tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) dt-bindings: rng: Drop unneeded quotes dt-bindings: arm/soc: mediatek: Drop unneeded quotes dt-bindings: soc: qcom: Drop unneeded quotes dt-bindings: i2c: samsung: Fix 'deprecated' value dt-bindings: display: Fix lvds.yaml references dt-bindings: display: simplify compatibles syntax dt-bindings: display: mediatek: simplify compatibles syntax dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references dt-bindings: timer: Drop unneeded quotes dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p dt-bindings: reset: remove stih415/stih416 reset dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127 dt-bindings: irqchip: sti: remove stih415/stih416 and stid127 dt-bindings: iommu: Convert QCOM IOMMU to YAML dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas of: address: Reshuffle to remove forward declarations of: address: Fix documented return value of of_pci_range_to_resource() of: address: Document return value of of_address_to_resource() ... |
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Patrick Delaunay
|
378b0e9f24 |
dt-bindings: mfd: stm32: Remove unnecessary blank lines
Remove double blank line. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230417181342.v2.1.I483a676579cc7e3ac07e1db649091553743fecc8@changeid |
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Linus Torvalds
|
5e0ca0bfc3 |
Thermal control updates for 6.4-rc1
- Add a thermal zone 'devdata' accessor and modify several drivers to use it (Daniel Lezcano). - Prevent drivers from using the 'device' internal thermal zone structure field directly (Daniel Lezcano). - Clean up the hwmon thermal driver (Daniel Lezcano). - Add thermal zone id accessor and thermal zone type accessor and prevent drivers from using thermal zone fields directly (Daniel Lezcano). - Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano). - Add lower bound check for sysfs input to the x86_pkg_temp_thermal Intel thermal driver (Zhang Rui). - Add more thermal zone device encapsulation: prevent setting structure field directly, access the sensor device instead the thermal zone's device for trace, relocate the traces in drivers/thermal (Daniel Lezcano). - Use the generic trip point for the i.MX and remove the get_trip_temp ops (Daniel Lezcano). - Use the devm_platform_ioremap_resource() in the Hisilicon driver (Yang Li). - Remove R-Car H3 ES1.* handling as public has only access to the ES2 version and the upstream support for the ES1 has been shutdown (Wolfram Sang). - Add a delay after initializing the bank in order to let the time to the hardware to initialze itself before reading the temperature (Amjad Ouled-Ameur). - Add MT8365 support (Amjad Ouled-Ameur). - Preparational cleanup and DT bindings for RK3588 support (Sebastian Reichel). - Add driver support for RK3588 (Finley Xiao). - Use devm_reset_control_array_get_exclusive() for the Rockchip driver (Ye Xingchen). - Detect power gated thermal zones and return -EAGAIN when reading the temperature (Mikko Perttunen). - Remove thermal_bind_params structure as it is unused (Zhang Rui) - Drop unneeded quotes in DT bindings allowing to run yamllint (Rob Herring). - Update the power allocator documentation according to the thermal trace relocation (Lukas Bulwahn). - Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor (Chen-Yu Tsai). - Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen). - Add AP domain support to LVTS thermal controllers for mt8195 (Balsam CHIHI). - Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano). - Make thermal_of_zone_[un]register() private to the thermal OF code (Daniel Lezcano). - Create a private copy of the thermal zone device parameters structure when registering a thermal zone (Daniel Lezcano). - Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui). - Revert recent message adjustment in thermal_hwmon (Rafael Wysocki). - Use of_property_present() for testing DT property presence in thermal control code (Rob Herring). - Clean up thermal_list_lock locking in the thermal core (Rafael Wysocki). - Add DLVR support for RFIM control in the int340x Intel thermal driver (Srinivas Pandruvada). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmRGvsYSHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxekAQAJ/hhUZyY2hcFveNfrutkO8OGY+/rtz8 ozMxyfwAdHoD6/zg9zZQTHSQy3W9rx2FC3tYtwHlJopDYFQuNPsfrhYE97EfO9uT Baou3OhoXV+ZJ0EZqIuTNuLaDPD/Hg8KSNmZvb6p/30bLR3Y/gKZutX9+S0x8qpG y7JcA8qPDYTvNfxkDjYv3M7HlfpwIwpi/xPFuw9nI2Fdw0SYRWpHAQlNj6oaF0xT EaNIg5zh4rR81T34/DpaOm1mfrg3Lg9xOJMU0laS5sKkn5Ea8s0E5s3vb5Quup61 eXL3DhxmsIv51+1URZMZIQo2FmogvLmgnIPQyaeSvtlic0t39YS70tL2i8JY6kfL Tkhm8bS8jKQ6Y8GUvUbE/qadWFgkV4/lFTREVkKuq0XUU/YEpl5iQJAc0iEa0soy SISucs/ugoFjqdlN1pNDv7mLIzqyYIF6tZekLZTVa1U++MHKRakY9folD3brc6xO ewp1yO6e/fYZJx0K8LNlBRzXqNuV1Tl+kBDvUNHDNAEN8jONiZ2v+pDQ+VqYYxIc 1A2KVw0l3m0MQ97w3E8LqYJTH6f8bxSLxjXnHLSN0eAXJkn10olfz/RYNsqi+dUb YBnFU8t3plGMVGrDcoDtO6hkujUw3oF7pibWeXXFEvIyRUcOA2e94kd57i9a1zLS 5yyH9UchFcQq =XNJE -----END PGP SIGNATURE----- Merge tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "These mostly continue to prepare the thermal control subsystem for using unified representation of trip points, which includes cleanups, code refactoring and similar and update several drivers (for other reasons), which includes new hardware support. Specifics: - Add a thermal zone 'devdata' accessor and modify several drivers to use it (Daniel Lezcano) - Prevent drivers from using the 'device' internal thermal zone structure field directly (Daniel Lezcano) - Clean up the hwmon thermal driver (Daniel Lezcano) - Add thermal zone id accessor and thermal zone type accessor and prevent drivers from using thermal zone fields directly (Daniel Lezcano) - Clean up the acerhdf and tegra thermal drivers (Daniel Lezcano) - Add lower bound check for sysfs input to the x86_pkg_temp_thermal Intel thermal driver (Zhang Rui) - Add more thermal zone device encapsulation: prevent setting structure field directly, access the sensor device instead the thermal zone's device for trace, relocate the traces in drivers/thermal (Daniel Lezcano) - Use the generic trip point for the i.MX and remove the get_trip_temp ops (Daniel Lezcano) - Use the devm_platform_ioremap_resource() in the Hisilicon driver (Yang Li) - Remove R-Car H3 ES1.* handling as public has only access to the ES2 version and the upstream support for the ES1 has been shutdown (Wolfram Sang) - Add a delay after initializing the bank in order to let the time to the hardware to initialze itself before reading the temperature (Amjad Ouled-Ameur) - Add MT8365 support (Amjad Ouled-Ameur) - Preparational cleanup and DT bindings for RK3588 support (Sebastian Reichel) - Add driver support for RK3588 (Finley Xiao) - Use devm_reset_control_array_get_exclusive() for the Rockchip driver (Ye Xingchen) - Detect power gated thermal zones and return -EAGAIN when reading the temperature (Mikko Perttunen) - Remove thermal_bind_params structure as it is unused (Zhang Rui) - Drop unneeded quotes in DT bindings allowing to run yamllint (Rob Herring) - Update the power allocator documentation according to the thermal trace relocation (Lukas Bulwahn) - Fix sensor 1 interrupt status bitmask for the Mediatek LVTS sensor (Chen-Yu Tsai) - Use the dev_err_probe() helper in the Amlogic driver (Ye Xingchen) - Add AP domain support to LVTS thermal controllers for mt8195 (Balsam CHIHI) - Remove buggy call to thermal_of_zone_unregister() (Daniel Lezcano) - Make thermal_of_zone_[un]register() private to the thermal OF code (Daniel Lezcano) - Create a private copy of the thermal zone device parameters structure when registering a thermal zone (Daniel Lezcano) - Fix a kernel NULL pointer dereference in thermal_hwmon (Zhang Rui) - Revert recent message adjustment in thermal_hwmon (Rafael Wysocki) - Use of_property_present() for testing DT property presence in thermal control code (Rob Herring) - Clean up thermal_list_lock locking in the thermal core (Rafael Wysocki) - Add DLVR support for RFIM control in the int340x Intel thermal driver (Srinivas Pandruvada)" * tag 'thermal-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (55 commits) thermal: intel: int340x: Add DLVR support for RFIM control thermal/core: Alloc-copy-free the thermal zone parameters structure thermal/of: Unexport unused OF functions thermal/drivers/bcm2835: Remove buggy call to thermal_of_zone_unregister thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195 dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195 thermal: amlogic: Use dev_err_probe() thermal/drivers/mediatek/lvts_thermal: Fix sensor 1 interrupt status bitmask MAINTAINERS: adjust entry in THERMAL/POWER_ALLOCATOR after header movement dt-bindings: thermal: Drop unneeded quotes thermal/core: Remove thermal_bind_params structure thermal/drivers/tegra-bpmp: Handle offline zones thermal/drivers/rockchip: use devm_reset_control_array_get_exclusive() dt-bindings: rockchip-thermal: Support the RK3588 SoC compatible thermal/drivers/rockchip: Support RK3588 SoC in the thermal driver thermal/drivers/rockchip: Support dynamic sized sensor array thermal/drivers/rockchip: Simplify channel id logic thermal/drivers/rockchip: Use dev_err_probe thermal/drivers/rockchip: Simplify clock logic thermal/drivers/rockchip: Simplify getting match data ... |
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Linus Torvalds
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d53c3eaaef |
ARM: SoC devicetree changes for 6.4
The devicetree changes overall are again dominated by the Qualcomm Snapdragon platform that weighs in at over 300 changesets, but there are many updates across other platforms as well, notably Mediatek, NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all add new features for existing machines, as well as new machines and SoCs. The newly added SoCs are: - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1 chip. - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its JH7100 predecessor, but with additional CPU cores and a GPU. - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets added, with comparable support as its M1 predecessor. - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on the Cortex-A53 and Cortex-A73 cores, respectively. - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon family. Including the initial board support for the added SoC platforms, there are 52 new machines. The largest group are 19 boards industrial embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit) families. Others include: - Two boards based on the Allwinner f1c200s ultra-low-cost chip - Three "Banana Pi" variants based on the Amlogic g12b (A311D, S922X) SoC. - The Gl.Inet mv1000 router based on Marvell Armada 3720 - A Wifi/LTE Dongle based on Qualcomm msm8916 - Two robotics boards based on Qualcomm QRB chips - Three Snapdragon based phones made by Xiaomi - Five developments boards based on various Rockchip SoCs, including the rk3588s-khadas-edge2 and a few NanoPi models - The AM625 Beagleplay industrial SBC Another 14 machines get removed: both boards for the obsolete "oxnas" platform, three boards for the Renesas r8a77950 SoC that were only for pre-production chips, and various chromebook models based on the Qualcomm Sc7180 "trogdor" design that were never part of products. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRGp0gACgkQYKtH/8kJ UicqgQ//cOC0FIvvzNztCrMDDXcDtltGJl28iyR9Ld8PIQL2/xv58yJ5GqQmF38b ZJSiRZL2TZ8nFG4/H19qirTkoAo3ryc1rcZM+hfxYsF8ikMh7hieUVgI5yo/+OaF Mf/qlu+Usx4Gvr6Kv8fQN9UhJQFBQm2MYumlMvZDC9l7Q1HAgJfq6Hsx1dNZJ05Y RwFk2bgeXze7o5gPwMPKzf88T+dfFBV7uNmPbFd8hAf//ZoMPlrvHt6kmmsVeoOk JsLC5jllh/TbC4GjnYi3f9ipJwsFbp+r5y69IWNsOXBn28cDPJd8pUQtvoFa7fQ4 a3AgzXQM0Ns0cWwGqzHqm/rRX7Wr+Y57BqXUqP2JNCMGYdNO63i5KOE4gp/vbgxn 0WJGC/4oaPyeSqY90LoMTNpvMpNOBjIZCyzyljsrwHuLA3bl7jZWP63Bxc65VhYR XQ6fKzW+Irz49gsyo6fiRhtZYgL+v310u9gigV7ahFrET6vu3K0QDdzbxWcF9cYi BD6OqmlTVbrBSVnKtk1TfSI2IRC8zq+SH7zBN+97OuRnUFe94og83JdsQQI9bl/o x2W/vedxcYaZrj5/1/mCjKskchJg3tvWExLs/0ZKCbol8lZ7RioSqg4EvLkkxF+0 2gXJ7pzfmjqxcoPd90jj8dpbb5SvStz1AErSgkoVehKeOErWGTw= =j12m -----END PGP SIGNATURE----- Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC devicetree updates from Arnd Bergmann: "The devicetree changes overall are again dominated by the Qualcomm Snapdragon platform that weighs in at over 300 changesets, but there are many updates across other platforms as well, notably Mediatek, NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all add new features for existing machines, as well as new machines and SoCs. The newly added SoCs are: - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1 chip. - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its JH7100 predecessor, but with additional CPU cores and a GPU. - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets added, with comparable support as its M1 predecessor. - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on the Cortex-A53 and Cortex-A73 cores, respectively. - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon family. Including the initial board support for the added SoC platforms, there are 52 new machines. The largest group are 19 boards industrial embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit) families. Others include: - Two boards based on the Allwinner f1c200s ultra-low-cost chip - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X) SoC. - The Gl.Inet mv1000 router based on Marvell Armada 3720 - A Wifi/LTE Dongle based on Qualcomm msm8916 - Two robotics boards based on Qualcomm QRB chips - Three Snapdragon based phones made by Xiaomi - Five developments boards based on various Rockchip SoCs, including the rk3588s-khadas-edge2 and a few NanoPi models - The AM625 Beagleplay industrial SBC Another 14 machines get removed: both boards for the obsolete 'oxnas' platform, three boards for the Renesas r8a77950 SoC that were only for pre-production chips, and various chromebook models based on the Qualcomm Sc7180 'trogdor' design that were never part of products" * tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits) arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b arm64: dts: apple: t8112: Add PWM controller arm64: dts: apple: t600x: Add PWM controller arm64: dts: apple: t8103: Add PWM controller arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x ARM: dts: nomadik: Replace deprecated spi-gpio properties ARM: dts: aspeed-g6: Add UDMA node ARM: dts: aspeed: greatlakes: add mctp device ARM: dts: aspeed: greatlakes: Add gpio names ARM: dts: aspeed: p10bmc: Change power supply info arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer arm64: dts: mediatek: mt6795: Add tertiary PWM node arm64: dts: rockchip: add panel to Anbernic RG353 series dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC dt-bindings: arm: fsl: Add chargebyte Tarragon dt-bindings: vendor-prefixes: add chargebyte ... |
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Stephen Boyd
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a9863979fb |
Merge branch 'clk-imx' into clk-next
* clk-imx: (25 commits) clk: imx: imx8ulp: update clk flag for system critical clock clk: imx: imx8ulp: Add tpm5 clock as critical gate clock clk: imx: imx8ulp: keep MU0_B clock enabled always clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents clk: imx: imx93: Add nic and A55 clk dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK clk: imx: imx93: add mcore_booted module paratemter clk: imx: fracn-gppll: Add 300MHz freq support for imx9 clk: imx: fracn-gppll: support integer pll clk: imx: fracn-gppll: disable hardware select control clk: imx: fracn-gppll: fix the rate table clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical clk: imx: imx8mp: Add LDB root clock dt-bindings: clock: imx8mp: Add LDB clock entry clk: imx: imx8mp: correct DISP2 pixel clock type clk: imx: drop duplicated macro clk: imx: clk-gpr-mux: Provide clock name in error message clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate ... |
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Stephen Boyd
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c19c6c7b44 |
Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-of: clk: add missing of_node_put() in "assigned-clocks" property parsing * clk-samsung: clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical clk: samsung: Convert to platform remove callback returning void clk: samsung: exynos5433: Extract PM support to common ARM64 layer clk: samsung: Extract parent clock enabling to common function clk: samsung: Extract clocks registration to common function clk: samsung: exynos850: Add AUD and HSI main gate clocks clk: samsung: exynos850: Implement CMU_G3D domain clk: samsung: clk-pll: Implement pll0818x PLL type clk: samsung: Set dev in samsung_clk_init() clk: samsung: Don't pass reg_base to samsung_clk_register_pll() clk: samsung: Remove np argument from samsung_clk_init() dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D * clk-rockchip: clk: rockchip: rk3588: make gate linked clocks critical clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent * clk-qcom: (57 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: qcom: Add Global Clock Controller driver for IPQ9574 dt-bindings: clock: Add ipq9574 clock and reset definitions clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value clk: qcom: gcc-sm6115: Mark RCGs shared where applicable clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset clk: qcom: apss-ipq-pll: add support for IPQ5332 dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks ... |
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Stephen Boyd
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1a86e99fa0 |
Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
- Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() * clk-starfive: clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: starfive: Avoid casting iomem pointers MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator * clk-fractional: clk: Remove mmask and nmask fields in struct clk_fractional_divider clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider clk: Compute masks for fractional_divider clk when needed. * clk-devmof: clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` clk: hsdk-pll: Use managed `of_clk_add_hw_provider()` clk: cdce706: Use managed `of_clk_add_hw_provider()` clk: axs10x: Use managed `of_clk_add_hw_provider()` clk: axm5516: Use managed `of_clk_add_hw_provider()` clk: axi-clkgen: Use managed `of_clk_add_hw_provider()` |
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Stephen Boyd
|
caca6ad367 |
Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-next
- BCM63268 timer clock and reset controller - Convert platform clk drivers to remove_new * clk-xilinx: clocking-wizard: Support higher frequency accuracy clk: zynqmp: pll: Remove the limit * clk-broadcom: clk: bcm: Add BCM63268 timer clock and reset driver dt-bindings: clock: Add BCM63268 timer binding dt-bindings: reset: add BCM63268 timer reset definitions dt-bindings: clk: add BCM63268 timer clock definitions * clk-platform: (25 commits) clk: xilinx: Convert to platform remove callback returning void clk: x86: Convert to platform remove callback returning void clk: uniphier: Convert to platform remove callback returning void clk: ti: Convert to platform remove callback returning void clk: tegra: Convert to platform remove callback returning void clk: stm32: Convert to platform remove callback returning void clk: mvebu: Convert to platform remove callback returning void clk: mmp: Convert to platform remove callback returning void clk: keystone: Convert to platform remove callback returning void clk: hisilicon: Convert to platform remove callback returning void clk: stm32mp1: Convert to platform remove callback returning void clk: scpi: Convert to platform remove callback returning void clk: s2mps11: Convert to platform remove callback returning void clk: pwm: Convert to platform remove callback returning void clk: palmas: Convert to platform remove callback returning void clk: hsdk-pll: Convert to platform remove callback returning void clk: fixed-rate: Convert to platform remove callback returning void clk: fixed-mmio: Convert to platform remove callback returning void clk: fixed-factor: Convert to platform remove callback returning void clk: axm5516: Convert to platform remove callback returning void ... |
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Stephen Boyd
|
6f7478e3bb |
Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga' into clk-next
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Reimplement Loongson-1 clk driver with DT support - Clk driver support for Loongson-2 SoCs - Migrate socfpga clk driver to of_clk_add_hw_provider() * clk-mediatek: (84 commits) clk: mediatek: fhctl: Mark local variables static clk: mediatek: Use right match table, include mod_devicetable clk: mediatek: Add MT8188 adsp clock support clk: mediatek: Add MT8188 imp i2c wrapper clock support clk: mediatek: Add MT8188 wpesys clock support clk: mediatek: Add MT8188 vppsys1 clock support clk: mediatek: Add MT8188 vppsys0 clock support clk: mediatek: Add MT8188 vencsys clock support clk: mediatek: Add MT8188 vdosys1 clock support clk: mediatek: Add MT8188 vdosys0 clock support clk: mediatek: Add MT8188 vdecsys clock support clk: mediatek: Add MT8188 mfgcfg clock support clk: mediatek: Add MT8188 ipesys clock support clk: mediatek: Add MT8188 imgsys clock support clk: mediatek: Add MT8188 ccusys clock support clk: mediatek: Add MT8188 camsys clock support clk: mediatek: Add MT8188 infrastructure clock support clk: mediatek: Add MT8188 peripheral clock support clk: mediatek: Add MT8188 topckgen clock support clk: mediatek: Add MT8188 apmixedsys clock support ... * clk-sunplus: clk: Add Sunplus SP7021 clock driver * clk-loongson: clk: clk-loongson2: add clock controller driver support dt-bindings: clock: add loongson-2 boot clock index MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE MIPS: loongson32: Update the clock initialization clk: loongson1: Re-implement the clock driver clk: loongson1: Remove the outdated driver dt-bindings: clock: Add Loongson-1 clock * clk-socfpga: clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling |
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Andrew Halaney
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32c2f2a46d |
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com |
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Yassine Oudjana
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edb10ace4d |
dt-bindings: reset: Add binding for MediaTek MT6735 TOPRGU/WDT
Add a DT binding for the MT6735 top reset generation unit/watchdog timer. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20230302124015.75546-2-y.oudjana@protonmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> |
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Alain Volmat
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5c899820ba |
dt-bindings: reset: remove stih415/stih416 reset
Remove the stih415 and stih416 reset dt-bindings since those two platforms are no more supported. Signed-off-by: Alain Volmat <avolmat@me.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230416200442.61554-1-avolmat@me.com Signed-off-by: Rob Herring <robh@kernel.org> |
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Arnd Bergmann
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718acce6f0 |
More Qualcomm ARM64 Devicetree updated for v6.4
Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4xScVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FyAEQANkYPPmcATVeCMu8ABqOGr2YpN2v d1e8/Kdtrg0qWtqnXgkcec/+HvOqxTYlqW/iYLGf2fkgheQhbY8YOv3AU7FEG9Jr RNsPiyZ/2o2VPcskS6jQSsbAGKaWbhSh7Ao2lSUNSsPuhHOYw/Nu3iRxKCE1FdHn yqF2b+cipMwogKgx4LFCLwRTAG6f9HumDb3dwLeiUFPZH321MeJu8FzHnLt/wU5Z 64EzST7W2J5PlWdFEoJOXGDmxnM35hKJrzliRf5oqTHhUMUlyxQI6W61vSfsz5PP 7AE8DEMHD9b5fbRUf2mcMffPmhdvL194dSx10eTFMEuyoe+19CaMiZV86Cf8HeZ7 8K6ZZJ/tF/UrOBc7zMDtCUTm5f9MYyfiKqQNJekcpYWugQSsKw8TQZ58q4jM352R vvq2ywMDk2olt4Jn0on7L6M8x+uOGIMQG3B32jJijE0fRFdMcHJMwfxEBsrGmsUW vZvDdhQtIQSy6aLHFqwzFbGePq1GeYLjEh+PbT8EHkaCHFx0dA+EobLnwcyqJYky AmWA2wjbIYU96KahSZ4Sz3MWTy9MrhHa10bwWoBvOsp1AAM/gpx5nIgoHXmzp2pg cXgCqzUBgdMrWfjEFgtLY1HyRMGbQ7T+fQhaS5xn9TnHNqnvqLAW/APhyhrAWWXx 475V7NXAQMDd5FQX =vVPv -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eO4ACgkQYKtH/8kJ UifICRAAz4I3XrqaTmlk8HtHwCSxhQfpF/6B+HmFbRG/tNFzWu4rbCyju2Gja6bi lQDxP42uuH78m35rXtAA848bZ8BpUQesJcGuwQoPYRwCPTLZH493QryEZ2DM4rp1 IjKe1FmuHlToBiPxBgk+3EqaulXM9wSvV6lb7HlsEx6vt8TC9i0IhnfD6jHJ7ESs Pln0nmTREAyNpdcGOfmCZ3m4Rc6rvz8WHu+pX/nYZIdF44txYJaVh4mU7T0DuxUo KF2rfpPko4FXxqN6V3fYBRuRihu9lAqPwg86imQruqHnc0Lrfw2IMAdnUtXcmJOo qrYvQgifJKd5TZ1aYrkiQk5jSA9Wy5Wt66rzu7XGC8XhEftYcs3D/gYkqfRifI+a d+dqYLYXOLTopdDRfGgnCa74cNs7A+Y/mUC+WZQmWFI4q7I9SUnipRfzZt44Vbmp mn1C6XIoeseO8HOHDx0dNUsgiDH/JDLZv1/RTT6fWj3+9R2fQKmtdq8i9ZBdKL7r M/bAsS8PENmV6Dv3bHWxIa4xC380bDgCrjsLdHh5Oqfvbv2NHpftHkOaCK8BgE/t 8YubTKxaxw0YQ0NtI+ku6Km9VJCG1zDEiQPMYEcklEzUj09CfkfCqBg4EkI92u2i P215llOlgIUzAgad/S0H2YhIIdnhsacU4adPEDD3devtKWdH+PE= =HFrk -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 Devicetree updated for v6.4 Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. * tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits) arm64: dts: qcom: Add base qrb4210-rb2 board dts arm64: dts: qcom: sm8550: add Soundwire controllers arm64: dts: qcom: sm8250: Add GPU speedbin support arm64: dts: qcom: sm8150: Add GPU speedbin support arm64: dts: qcom: sm8150: Don't start Adreno in headless mode arm64: dts: qcom: ipq5332: add support for the RDP468 variant arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs arm64: dts: qcom: sm6115: Add RMTFS arm64: dts: qcom: sm6115-j606f: Add ramoops node arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node arm64: dts: MSM8953: Add lpass nodes arm64: dts: MSM8953: Add mpss nodes arm64: dts: MSM8953: Add wcnss nodes arm64: dts: qcom: sm8350: remove superfluous "input-enable" arm64: dts: qcom: sm8150: remove superfluous "input-enable" arm64: dts: qcom: apq8016: remove superfluous "input-enable" arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength ... Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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10678a0751 |
Qualcomm ARM64 updates for v6.4
PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0QQEVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F3WgQALGaxeK2rYNfVVR8YMrsjDYow2vq Uup1AxG2sAGdLBiegf0btiIlw6y+t7pdUuP+elKx3sLrx/UiJfa7/fqdMhfft3Qo 16xhKIHQwokgGyl6hFJg2WTLrbC/qq60rB2YP/aR3pBCovu1nL/jX/9de28jNXUe FydCDCAfa1Zd3fDdp0uqGWA9mCSDDnlL0UuiP7PIkUFEEkPHdif/a3H1O5y1S+LW Eq38bJeMoQUYOYx4hYTxzmkCjbZVFEhho2lVyfHLy2fIaGuA4Gm4THnXMu5P9vIL Q4dNR6/XnquH2G9LcDLIcPWkWg8KkFDNnRQBkIkNZQAUqqY2klY/8sa0aZZJk53f KD393N/aWUV7tGYynLLc5oluoKLIlFFMdWVdxxR36zP70hu6Q2kGj4NUIB+odMdS QgJIyBBJ2dafvB5llXGaUXMOFYJYolcoss0EWfCU5jCg2XhxC8Q6mvpF1vAuCTTZ aueb0RlXxzdTcCy0jkqCl1GsBOuQONtAOnQ8nRE+8ookzLGJ8RBnoUmWUifzxnqe ueYdGPu2nnmqrbYAJqzr1Y9G7ImsX0V72iwC0wFFL8woZzDPGgEcDIyOaGCI3Hus P3weJ9WScj6ScRvRTI4EdZL03oaPPsF8zMA8xyXoCzeWtp3wsrtFNbVqAZSEvcAq a92owWcK+flh9Ckj =ZyN2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5d90ACgkQYKtH/8kJ UifbkRAA0tH8h0ehQRsfgaijE+KNM5IOwi7iszD7NObNG+5Nal5QO6H9CvrEEbgv 4c6qwkC7F+ZN+zTVeKTufqZ6/zkylW+AMzL4UuAl5BxhMMrWzsg1NR1+NlbKssEb EBbLll7uxohuK79JNjmor/VV+zJX+hOyAhsf6yo6gpYFiJdgrRGwWVFVflNTNQis mpw5U4SyFNo4lq/HDERuxWbbsTl+VmoCeezCRgolaVkq4RTeMNcIxbm/kJ+t9ela HNm6mpJWqUUGeNpos5VdCqLApxBQgYmwz1mPHTQfC0V9v8YlVnTTKVmw4lHoGnZp ADN7iQSqqpsOLjML3+7HfQ8FWTTpj6FbE+vcSTiLjnstv9oDYd2wf9FPzJqcDVTl MucZVPk75zutakDuHOxizdfSTXPnpyEXnpnEUla6E+BntkB5eCTz45NN9B35gowA fY437FQ95eY2mV2vpya91rH2Rtw5BJbZW6jsw+WxT29A67LBa+sJrTayDNzYLuUz GjSb2vmRr2r3WG1jy8QQxVC3R/t4rlqXBnmJ91nHNIgrGl5ExrIEt+IDRsqHlS7T V1xX4fl9Ge2zfZeoFPFhgIBpPtvEkW5mUKIjRX6EBvRnG9+T8CWuWSnJDuFa6AMZ kxAhqUojmDO8f1E/BPiHHCP31dfUrMOVor0fu9qu7o8/H/WPo04= =OcHF -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
c47b89b418 |
TI K3 device tree updates for v6.4
New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo= =zvF1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA= =3wzd -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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17e26de12a |
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs, - Add slide switch and I2C support for the Marzen development board, - Add SCI (serial) and Camera support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Add IOMMU support for the R-Car V4H SoC, - Miscellaneous fixes and improvements. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZDO9eAAKCRCKwlD9ZEnx cDqrAP4wBrYlD0ih3wMZbcrHAZpIfhLLLlUBDT0JfYYy/mSGXwEA69C5A00Gx47o R4eLM6rSfPKw4KNJcLFwO5eqMsPzEQs= =uYv8 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5daMACgkQYKtH/8kJ UicMmw/9EPKDe59WyKOze/gv1OYbAChIIhU6ofuLe8ot3d5W9aqUq9ua3WFnXj4l yA96A8GElmTWLa1XXc6tl25HqAOVuacOTyrSWSfzknWj2w2AY8sssw1BCunxyZLK EG+FNakdYJsTDYUisG1dYFAe8uY/bcagnaJYOVX/+ofX8IaTEddC5pRSv7ytgHZt uK/Jk/S4rAK2XZPRU+xtZgbbD3fmBgVEbofWhYMalZJ5hBFLUfSSBt42LBKFg91J MfDpzfy8gz58G0B9Aoq80WLHdx15MHRdMwT8zmHaPYxOMiufxKCKztfpU9G6aktl PZ7RQgSelL7ZCrfJpJRi5Nd3YrcnNKC2MQulFCbs4BMfF5oLeyjxEsSxQIPum4rq T/yEgsNGK9VgWhYM6as80d+kLFQhEF3DQXcJK3RdpXemS2Yj2s3MXcsQrjQ8zQYY GMH999L0VpC0dgpB5SGWZyBRTX+h8Y0X+tg4OrkWYSVKkShGi6WJ/3GdqyNK2D3o ic8sx+IFrOKDr/mmbcJ2RiYdo16wQp6c/UkZ97Lq9vaXVi4lA6C8oymCEMpdsvbm bvSGI11hGEGsUOA2axbx7XxmkFfBPqUbiNgRWx1YT0u4ILYxRtL+IrFtYKcWcdHM Z5nzWC5Xv/XEvvnNYE/9NQWBEA2MEQG23AwwYvNYtYGwv48PO5w= =UIZB -----END PGP SIGNATURE----- Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.4 (take two) - Add PWM support for the R-Car H1 and H2 SoCs, - Add slide switch and I2C support for the Marzen development board, - Add SCI (serial) and Camera support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Add IOMMU support for the R-Car V4H SoC, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712 arm64: dts: renesas: r8a779g0: Add iommus to MMC node arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes arm64: dts: renesas: r8a779g0: Add IPMMU nodes arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay ARM: dts: r8a7790: Add PWM device nodes ARM: dts: r8a7790: Add TPU device node ARM: dts: marzen: Enable I2C support ARM: dts: marzen: Add slide switches ARM: dts: r8a7779: Add PWM support dt-bindings: clock: r8a7779: Add PWM module clock arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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d40a2f5062 |
RISC-V Devicetrees for v6.4
Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZC8o6wAKCRB4tDGHoIJi 0pdpAP0Y0qkT5tZSV635h2XOrWBpW3D3Vpx6+LGmw2mRjhHVPgD+Mfe0LkP6Dbq3 JS6fMISbgMAG/8dqcys/e0gmHksYJAk= =FsQ1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5U/EACgkQYKtH/8kJ Uif0hhAAxHk3QfPh5BF/1TzzUdeOgXuCiT9sQWHB9VtX1N03nwRoMETbFPRxjI1v P/KckzA5nxVA8q8Me+hb5nRQFwiDOVsH5cBMMnPQ46NGImEaptZ7Jwf1/RT1yk6n eBg9vRipRhD56CYTE20iasjhwjVohljvce58Rg61oXQ2lK1dKxnIjPeDfypPz9/p 149/wWUy8e6pGIciDw25hKGuxZiXHlO4OwdL0yWggXl/iuBi8l7gAQAcCv7vWNS3 oM8t6n/o1Vr0L+MBJtBBKPmuPKu7u54+RWsaKrO3zyiRRKGjI/VMZOi5ZKcooynL ThAGlqCIrnXu25XJ2V7l95FDTdPeTljhh1FRyOIJjvzlCX9QBdr5suQU3q9zr+Mf ZdE5baezkwsTF+1Hi/Yc65gCAtUfQmGG88/TE1krFw4aaE1xVr7nAfDCpdLcCzDS D/1b9/4h/2B2dJIdBO3VdzKG4bTcaK3Eb6TX6z2zIZ6stNHcoDxr6dcQXdiGAoYu /I8zAX3zTo5Q8E0Y67h7ao4dxDqxVUIop/92OJeD3X3IkcJreXEuxBEEsRvs53P6 /tqAsG5zPpW5GwfeopUHfFUYJRn+sLrqQ9zD+k4InwiCSlR/tJ7tBMXqyRsQUEyR P336MHjq10PRVmgKjsPpTx87K9f39Qgh6doHWAKBfMo/gSQ8z9U= =l6EI -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.4 Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree riscv: dts: starfive: Add StarFive JH7110 pin function definitions riscv: dts: starfive: Add initial StarFive JH7110 device tree dt-bindings: riscv: Add SiFive S7 compatible dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator riscv: dts: microchip: fix the mpfs' mailbox regs riscv: dts: microchip: add mpfs specific macb reset support Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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126c6da71f |
Qualcomm driver updates for v6.4
The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0Ka0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F9MIP/0vjJCDf+EtUJpN1KxwMzmXZRuac wJweQdgfD8m+fB+33Gs9bX8Jw8j4zddZlM45XCHiNsQ72Gs8RqvwCBcjkxtCGrTq Jm33zEWcRjm/7Z1R4bOrGdRM92NAUJK0RePSNSpBoB4s5rdvzYHCYttXGe80A7xI nLLEpxAbUb3y6UtP7adqEpiWtIJ16Nv/Sa1uWGXyhwjwTuBCXFKG2UdsQxJhxLna CkkJ2d4tfVcRcYNh8DEZEX9qs9aikZJvH3QtTe2UpJz8hlNroqmgHZtAWdPbOzAY xAMv/UUeq+kquUJr0cRhcuIRBruUGhnXISqHsc0T6xqyfnq6dR4m/tVfwlQ15BKe zq17mJUiK7fZyWWSkBf8SOPgez8GUaD/2Zqssf4JIKeC/VT3uqW3oejhm6o+sfrG ik0Tph/SVhcVvUQOsVygdf4BQXvOJDnXoZo182XZV4FiESkxnbRlhedzk2+s3agU 0F76hcNgASpskPw37A4uHHC9bwfpWJQWuGVHUVW9Me6CMxxaCcXWIhDc47i6NZeB vrwJGXs8dWCKj9pOdI1Fb9GJ7LvP7kQF9VfdwqA4jstWggooAkNaAfgYnAuprsAC kCCvBOfoB1LjB4fLjf5gJEwr9HOOwS9TPtsfd772IFXdI9zwv9ImDYRMpCX5L3pk aVEW4VjRI6TRTFMB =Bo2w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5SFYACgkQYKtH/8kJ UieADQ/+JSEbvQapNaxgKpG6HS3uQq+24BUmBvh2MbM5SwPi6D0JqoUx5wtnpg91 uBanGMKqCKkqc64jgNVsRwJW6/d8pdLLx7VCEsJaJPjhvBptD6K2QTFF5Gflbp7a HZmlteqMZG8zdc0KHSCuSXX6RtonAE9xBWBXe5EUhY22eyPB9okhNerRDSHU3add 7fm48p3V5k4/atX4BFYiysiHoAWxnXW+mz1uSfTWuONkW8+vKrAcD5b9ujzXW6ZD TGXmKHY5M08BsqHqDcEBjReuIVcacs63H6rX0JMx0I7uCT1qNvmwEqLeXrXKoo0n hwumr+I2+CEzhhSCkZY8rWH/He7Kd7WxfLAxCMdaDBoZYbxGAAqytZGYBJUx8mY8 RDA8YHfYWt56rhZL8SrwhD0dzLkeDTT5oKXFLtrTTcghOFNJl4uELhUU5wXJGP6q 3GTK0nxIoBKznaCzAhD/9JonS8mO3GbigVhw/yGQeionwZJyl1DXdSeRYGezDeII eKjtKvngoKbt/3Il9yiL+JUaPFIfPwVrIGnMBQjayjyH8m+5TDHD0+f0R5mnW8g8 qLvyga0GndPkFYS0Gpnw8Dqd5NfeRQVGkSJEELyFevnFHldZpVw8kCuejmfjXvGV tsOMjL0iZt4NrIZr5eFBa4b41o47hU8s9WYY/4VEaccuybTCxUc= =wYqZ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.4 The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. * tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits) dt-bindings: firmware: document Qualcomm SC8180X SCM dt-bindings: sram: qcom,imem: document SM6375 IMEM soc: qcom: icc-bwmon: Handle global registers correctly soc: qcom: icc-bwmon: Remove unused struct member soc: qcom: smsm: Use dev_err_probe() firmware: qcom_scm: Add SM6375 compatible soc: qcom: llcc: Add configuration data for SM7150 dt-bindings: arm: msm: Add LLCC for SM7150 dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994 soc: qcom: pmic_glink: register ucsi aux device dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible firmware: qcom_scm: Clear download bit during reboot dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible firmware: qcom_scm: Use fixed width src vm bitmap dt-bindings: firmware: qcom,scm: document IPQ5332 SCM dt-bindings: scm: Add compatible for IPQ9574 soc: qcom: rpmpd: Remove useless comments ... Link: https://lore.kernel.org/r/20230410152421.4477-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Bartosz Golaszewski
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daa9e76d17 |
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
Add the compatible for the Qualcomm Graphics Clock control module present on sa8775p platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl |
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Peng Fan
|
5fd7b00ca2 |
dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
Add i.MX93 NIC, A55 and ARM PLL CLK. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-7-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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Peng Fan
|
79643567cc |
dt-bindings: clock: imx8mp: Add LDB clock entry
Add LDB clock entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403094633.3366446-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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Dylan Van Assche
|
77c7a41e05 |
dt-bindings: firmware: qcom: scm: add SSC_Q6 and ADSP_Q6 VMIDs
SSC_Q6 and ADSP_Q6 are used in the FastRPC driver for accessing the secure world. Signed-off-by: Dylan Van Assche <me@dylanvanassche.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406173148.28309-3-me@dylanvanassche.be |
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Bjorn Andersson
|
5602dfc37a |
Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEAD
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make available the clock definitions used in the Devicetree source. |
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Bjorn Andersson
|
3a5c7ed3d8 |
Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into clk-for-6.4
Merge IPQ9574 Global Clock Controller binding through a topic branch to allow it also be introduced in the Devicetree source tree. |
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Devi Priya
|
b065b23d3c |
dt-bindings: clock: Add ipq9574 clock and reset definitions
Add clock and reset ID definitions for ipq9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com |
||
Balsam CHIHI
|
05aaa7fdb0 |
dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com |
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Emil Renner Berthing
|
3de0c91032 |
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
Emil Renner Berthing
|
7fce1e39f0 |
dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Bjorn Andersson
|
7c3a3554ba |
Merge branch '20230208091340.124641-1-konrad.dybcio@linaro.org' into HEAD
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use clock defines in the devicetree source. |
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Bjorn Andersson
|
25dac40a63 |
Merge branch '20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org' into clk-for-6.4
Merge dt-binding include file additions through topic branch, to allow them to be made available in DT source tree as well. |
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Konrad Dybcio
|
123ee7550e |
dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
Add the MDSS_CORE reset which can be asserted to reset the state of the entire MDSS. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org |
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Garmin.Chang
|
1086a5310f |
dt-bindings: clock: mediatek: Add new MT8188 clock
Add the new binding documentation for system clock and functional clock on MediaTek MT8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230331123621.16167-2-Garmin.Chang@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Geert Uytterhoeven
|
f0545078e1 |
dt-bindings: clock: r8a7779: Add PWM module clock
Add the module clock used by the PWM Timers on the Renesas R-Car H1 (R8A7779) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1397b517fccbe716a71cfae770512ed577730a25.1679329211.git.geert+renesas@glider.be |
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Álvaro Fernández Rojas
|
2a67e196bb |
dt-bindings: reset: add BCM63268 timer reset definitions
Add missing timer reset definitions for BCM63268. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230322171515.120353-3-noltari@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Álvaro Fernández Rojas
|
0ca6a09700 |
dt-bindings: clk: add BCM63268 timer clock definitions
Add missing timer clock definitions for BCM63268. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230322171515.120353-2-noltari@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Yinbo Zhu
|
d8c0ee307a |
dt-bindings: clock: add loongson-2 boot clock index
The Loongson-2 boot clock was used to spi and lio peripheral and this patch was to add boot clock index number. Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230323025229.2971-1-zhuyinbo@loongson.cn Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Keguang Zhang
|
12de2f5024 |
dt-bindings: clock: Add Loongson-1 clock
Add devicetree binding document and related header file for the Loongson-1 clock. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230321111817.71756-2-keguang.zhang@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Vlad.Karpovich
|
fa8c052b4c
|
ASoC: cs35l45: Support for GPIO pins configuration.
Adds device tree configuration for cs35l45 GPIOs Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230315154722.3911463-1-vkarpovi@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Nishanth Menon
|
f2de003e14 |
dt-bindings: pinctrl: k3: Deprecate header with register constants
For convenience (less code duplication), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers. These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. In fact, the Linux pinctrl-single driver actually do not use the bindings header at all. All of the constants were moved already to headers local to DTS (residing in DTS directory), so remove any references to the bindings header and add a warning that it is deprecated. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/ Link: https://lore.kernel.org/r/20230315155228.1566883-4-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com> |
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Bjorn Andersson
|
518634f959 |
Merge branch '20230223180935.60546-1-otto.pflueger@abscue.de' into clk-for-6.4
Merge MSM8917 Global Clock Controller and RPM clock controller bindings through topic branch, to make it possible to introduce in Devicetree source depending on these. |
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Otto Pflüger
|
2d1fc2d804 |
dt-bindings: clock: Add MSM8917 global clock controller
Add a device tree binding to describe clocks, resets and power domains provided by the global clock controller on MSM8917 SoCs and the very similar QM215 SoCs. Add the new compatibles to qcom,gcc-msm8909.yaml. There is no need to create another YAML file because the bindings are identical (MSM8917 GCC requires the same parent clocks as the MSM8909 GCC). Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230223180935.60546-2-otto.pflueger@abscue.de |
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Bjorn Andersson
|
bfb23a538e |
Merge branch '20230307062232.4889-1-quic_kathirav@quicinc.com' into clk-for-6.4
Merge the IPQ5332 Global Clock Controller binding through a topic branch to make it possible to include in Devicetree source as well. |
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Kathiravan T
|
f99cdbd858 |
dt-bindings: clock: Add Qualcomm IPQ5332 GCC
Add binding for the Qualcomm IPQ5332 Global Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230307062232.4889-4-quic_kathirav@quicinc.com |
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David Wronek
|
de7aeee0d9 |
dt-bindings: arm: qcom,ids: Add Soc ID for SM7150
Add the ID for the Qualcomm SM7150 SoC. Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230305191745.386862-2-danila@jiaxyga.com |
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Bhupesh Sharma
|
ee6ae544dd |
dt-bindings: arm: qcom,ids: Add IDs for QRB4210
Add the ID for QRB4210 variant. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230315160151.2166861-2-bhupesh.sharma@linaro.org |
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Varadarajan Narayanan
|
fd972da1b2 |
dt-bindings: arm: qcom,ids: Add IDs for IPQ9574 and its variants
Add SOC ID for Qualcomm IPQ9574, IPQ9570, IPQ9554, IPQ9550, IPQ9514 and IPQ9510 Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1678774414-14414-2-git-send-email-quic_varada@quicinc.com |
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Konrad Dybcio
|
f26e18bda9 |
dt-bindings: arm: qcom,ids: Add IDs for QCM2290/QRB2210
Add the missing IDs for scuba and its QRB variant. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230314-topic-scuba_socinfo-v2-1-44fa1256aa6d@linaro.org |
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Bjorn Andersson
|
3097d5e208 |
Merge branch '20230213165318.127160-2-danila@jiaxyga.com' into clk-for-6.4
Merge SM7180 Global Clock Controller binding through a dedicated topic branch, so that it can be introduced into the Devicetree source tree as well in the same kernel release. |
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Danila Tikhonov
|
bad27783c9 |
dt-bindings: clock: Add SM7150 GCC clocks
Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SM7150 SoCs. Co-developed-by: David Wronek <davidwronek@gmail.com> Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230213165318.127160-2-danila@jiaxyga.com |
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Bartosz Golaszewski
|
26a4bf805c |
dt-bindings: arm: qcom: add the SoC ID for SA8775P
Add the SoC ID entry for SA8775P. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Eric Chanudet <echanude@redhat.com> Tested-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230209095753.447347-3-brgl@bgdev.pl |
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Konrad Dybcio
|
c413f34e7a |
dt-bindings: clock: Add Qcom SM6115 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6115 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-10-konrad.dybcio@linaro.org |
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Konrad Dybcio
|
94329ce6e3 |
dt-bindings: clock: Add Qcom SM6375 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6375 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-8-konrad.dybcio@linaro.org |
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Konrad Dybcio
|
a5b9c5c548 |
dt-bindings: clock: Add Qcom SM6125 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6125 SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-6-konrad.dybcio@linaro.org |
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Wolfram Sang
|
fd9c55c0ac |
soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Jeremy Kerr
|
ced8a02b34 |
dt-bindings: clock: ast2600: Expand comment on reset definitions
The current "not part of a gate" is a little ambiguous. Expand this a little to clarify the reference to the paired clock + reset control. Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230302005834.13171-7-jk@codeconstruct.com.au Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Jeremy Kerr
|
1f15e0486b |
dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
The current ast2600 clock definitions include entries for i3c6 and i3c7 devices, which don't exist: there are no clock control lines documented for these, and only i3c devices 0 through 5 are present. So, remove the definitions for I3C6 and I3C7. Although this is a potential ABI-breaking change, there are no in-tree users of these, and any references would be broken anyway, as the hardware doesn't exist. This is a partial cherry-pick and rework of |
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Jeremy Kerr
|
1038b6978b |
dt-bindings: clock: ast2600: Add top-level I3C clock
The ast2600 hardware has a top-level clock for all i3c controller peripherals (then gated to each individual controller), so add a top-level i3c clock line to control this. This is a partial cherry-pick and rework of |
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Sam Protsenko
|
284f6dcb50 |
dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
Add main gate clocks for controlling AUD and HSI CMUs: - gout_aud_cmu_aud_pclk - gout_hsi_cmu_hsi_pclk While at it, add missing PPMU (Performance Profiling Monitor Unit) clocks for CMU_HSI. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230223042133.26551-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Sam Protsenko
|
521568cff7 |
dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
CMU_G3D generates Gondul GPU and bus clocks for BLK_G3D. Add clock indices and binding documentation for CMU_G3D. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230223042133.26551-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Herve Codina
|
f8c760e8fc
|
dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Add support for the time slot assigner (TSA) available in some PowerQUICC SoC such as MPC885 or MPC866. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-2-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Linus Torvalds
|
11c7052998 |
ARM: SoC drivers for 6.3
As usual, there are lots of minor driver changes across SoC platforms from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung. These usually add support for additional chip variations in existing drivers, but also add features or bugfixes. The SCMI firmware subsystem gains a unified raw userspace interface through debugfs, which can be used for validation purposes. Newly added drivers include: - New power management drivers for StarFive JH7110, Allwinner D1 and Renesas RZ/V2M - A driver for Qualcomm battery and power supply status - A SoC device driver for identifying Nuvoton WPCM450 chips - A regulator coupler driver for Mediatek MT81xxv -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPtSN8ACgkQmmx57+YA GNkOSw/+JS5tElm/ZP7c3uWYp6uwvcb0jUlKW/U3aCtPiPEcYDLEqIEXwcNdaDMh m4rW3GYlW0IRL3FsyuYkSLx+EIIUIfs40wldYXJOqRDj0XasndiloIwltOQJGfd9 C/UVM0FpJdxMJrcBMFgwLLQCIbAVnhHP34i6ppDRgxW/MfTeiCaaG6fnS70iv6mC oh2N7FoZSKDtTrFtlR5TqFiK5v/W1CgNJVuglkFB0ceFpjyBpp/8AT0FGS887xCz IYSTqm4Q/79vaZXI1Y2oog257cgdwsVqgPrnK5CuSFhTnAcJMCekiFelHq8Yhyuk Rw7j/B3KO3AOaxmR75c6SZdeZ+VHgUMRC/RKe3fay0sm3Zea2kAIPXA6Zn+r/cxb 8M94V59qBz+f8XmpXRTK1UR3s3EbwFIuNyuDIkeorMtpSKtvqJXmZxGDwNIfXr2F /voo++MKjzdtdxdW/D/5Tc9DC0Pyb4HLi0EYj2QCzA03njmfLDF1w73NfzMec+GD R1zAd3FEbiJQx8Hin0PSPjYXpfMnkjkGAEcE9N9Ralg4ewNWAxfOFsAhHKTZNssL pitTAvHR/+dXtvkX7FUi2l/6fqn8nJUrg/xRazPPp3scRbpuk8m6P4MNr3/lsaHk HTQ/hYwDdecWLvKXjw5y9yIr3yhLmPPcloTVIIFFjsM0t8b+d9E= =p6Xp -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, there are lots of minor driver changes across SoC platforms from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung. These usually add support for additional chip variations in existing drivers, but also add features or bugfixes. The SCMI firmware subsystem gains a unified raw userspace interface through debugfs, which can be used for validation purposes. Newly added drivers include: - New power management drivers for StarFive JH7110, Allwinner D1 and Renesas RZ/V2M - A driver for Qualcomm battery and power supply status - A SoC device driver for identifying Nuvoton WPCM450 chips - A regulator coupler driver for Mediatek MT81xxv" * tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits) power: supply: Introduce Qualcomm PMIC GLINK power supply soc: apple: rtkit: Do not copy the reg state structure to the stack soc: sunxi: SUN20I_PPU should depend on PM memory: renesas-rpc-if: Remove redundant division of dummy soc: qcom: socinfo: Add IDs for IPQ5332 and its variant dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1 firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/ MAINTAINERS: Update qcom CPR maintainer entry dt-bindings: firmware: document Qualcomm SM8550 SCM dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants soc: qcom: socinfo: Add support for new field in revision 17 soc: qcom: smd-rpm: Add IPQ9574 compatible soc: qcom: pmic_glink: remove redundant calculation of svid soc: qcom: stats: Populate all subsystem debugfs files dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies soc: qcom: pmic_glink: Introduce altmode support ... |
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Linus Torvalds
|
1ec35eadc3 |
We have one small patch to the clk core this time around. It fixes a corner
case with the CLK_OPS_PARENT_ENABLE flag combined with clk_core_is_enabled() where it hangs the system. We'll simply assume the clk is disabled if the parent is disabled and the flag is set. Trying to turn on the parent to check the enable state of the clk runs into system hangs at boot. We let this bake in -next for a couple weeks to make sure there aren't any more issues because the last attempt to fix this ran into hangs and had to be reverted. Note: There were some more patches to the core framework around sync_state and disabling unused clks, but I asked for that to be reverted from the qcom PR because it isn't ready and we're still discussing the best solution on the list. Outside of the core clk framework, we have the usual collection of clk driver updates and support for new SoCs (which seems to never stop). The dirstat is dominated by Qualcomm because they added support for quite a few SoCs this time around and also migrated quite a few of their drivers to clk_parent_data. The other big diff is in the Mediatek clk drivers that saw a significant rework this cycle to similarly modernize the code, and we'll see that work continue in the next cycle as well. Nothing really jumps out as scary here, except that the significant churn in parent data descriptions can have typos that go unnoticed. More details below. Core: - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() New Drivers: - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref clocks - Support for Mediatek MT7891 SoC clks - Support for many Qualcomm clk controllers: - QDU1000/QRU1000 global clock controller - SA8775P global clock controller - SM8550 TCSR and display clock controller - SM6350 clock controller - MSM8996 CBF and APCS clock controllers Updates: - Various cleanups and improvements to Mediatek clk drivers to reduce code size and modernize the drivers - Support for Versa 5P49V60 clks - Disable R-Car H3 ES1.*, as it was only available to an internal development group and needed a lot of quirks and workarounds - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and resets on Renesas RZ/V2M - Add display clocks on Renesas R-Car V4H - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L - Free the imx_uart_clocks even if imx_register_uart_clocks returns early - Get the stdout clocks count from device tree on i.MX - Drop the clock count argument from imx_register_uart_clocks() - Keep the uart clocks on i.MX93 for when earlycon is used - Fix SPDX comment in i.MX6SLL clocks bindings header - Drop some unnecessary spaces from i.MX8ULP clocks bindings header - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is not configured via devicetree - Fix the ENET1 gate configuration for i.MX6UL according to the reference manual - Add ENET refclock mux support for i.MX6UL - Add support for USB host/device configuration on Renesas RZ/N1 - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car V4H - Add D1 CAN bus gates and resets for Allwinner - Mark D1 CPUX clock as critical on Allwinner - Reuse D1 driver for Allwinner R528/T113 - Cleanup sunxi-ng Kconfig - Fix sunxi-ng kernel-doc issues - Model Allwinner H3/H5 DRAM clock as fixed clock - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll, sclk-div and cpu-dyn-div amlogic clock drivers - DDR clocks were marked as critical in the proper clock driver for each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted in the next releases as it only does clock enablement - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some of them may use it - Support synchronous power_off requests in the qcom GDSC driver for proper GPU power collapse - Drop test clocks from various Qualcomm clk drivers - Update parent references to use clk_parent_data/clk_hw in various Qualcomm clk drivers - Fixes for the Qualcomm MSM8996 CPU clock controller - Transition Qualcomm MSM8974 GCC off the externally defined sleep_clk - Add GDSCs in the global clock controller for Qualcomm QCS404 - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and SDM845 are moved to use the recently introduced properties in the GDSC struct - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and the IPA clock is added on a variety of platforms - De-duplicate identical clks in Qualcomm SMD RPM clk driver - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 to Qualcomm SDM RPM clk driver - Various Qualcomm clk drivers use devm_pm_runtime_enable() to simplify -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmP5L68RHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXLxRAAx5C2PBxGnQS5Dqy7yGFBKhoyM6MnD131 4wsWunTzw/fx3MWTRUBu1FYq7ZN38dmeUNeKVNO7QkfIzXe/Htxa5DJp8oJjeFkA WBlJr/S9pnCKJ1+jGgnEJ3AL8rtssc2nasS8Gj66eu3Zs3dA1MlUz1M0wqiGeD/Y 2crg1nowHurxhsmdUM+6sBRZsCoUz1DxAynqOK25Ip08ygBGYRdkk3aCoyx1bICF 02RwSTQP9pGykgkO7BMkr1pA000mlcawXflzfbY0bA57GKvITBaXh3PhVWwsAnqk utagT3G2/mQNBF+DVX4Xr5rRqYttDeATiS2D0B31x68Ovjw6kaA28QoY19oIjc1p D7CabcPnrdK6JFimJL/uEnjIpVnMW2kbTAkTdgGFNKqYUC1O+Mm5ZscKo8RUaiQ7 8XAgJXnGxG7RlZDIMCj69xiZBR0I0wgyx6E7sqMK5j4/v9ezhUMemj4u/sNe3R1n ih43L2vXjftAhl7jlGQb6eFQjPU/n8kf1rte5miJxX2vFBgWqiCfKHnVSe8KSNU+ gqhar55G9ACnYBjqApmySd/7IFBzmJSyWujXg+fwIu0ZI5ir+ZPr+rQ7RkAUqMij QCPvJa6XlRIyl6j54E5GaSFO3ZDc3wAZEs3I2N4yhYTDUGv342G3YdwNU+b0ioHB bDW5Gec9u2s= =Fle/ -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have one small patch to the clk core this time around. It fixes a corner case with the CLK_OPS_PARENT_ENABLE flag combined with clk_core_is_enabled() where it hangs the system. We'll simply assume the clk is disabled if the parent is disabled and the flag is set. Trying to turn on the parent to check the enable state of the clk runs into system hangs at boot. We let this bake in -next for a couple weeks to make sure there aren't any more issues because the last attempt to fix this ran into hangs and had to be reverted. Note: There were some more patches to the core framework around sync_state and disabling unused clks, but I asked for that to be reverted from the qcom PR because it isn't ready and we're still discussing the best solution on the list. Outside of the core clk framework, we have the usual collection of clk driver updates and support for new SoCs (which seems to never stop). The dirstat is dominated by Qualcomm because they added support for quite a few SoCs this time around and also migrated quite a few of their drivers to clk_parent_data. The other big diff is in the Mediatek clk drivers that saw a significant rework this cycle to similarly modernize the code, and we'll see that work continue in the next cycle as well. Nothing really jumps out as scary here, except that the significant churn in parent data descriptions can have typos that go unnoticed. More details below. Core: - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() New Drivers: - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref clocks - Support for Mediatek MT7891 SoC clks - Support for many Qualcomm clk controllers: - QDU1000/QRU1000 global clock controller - SA8775P global clock controller - SM8550 TCSR and display clock controller - SM6350 clock controller - MSM8996 CBF and APCS clock controllers Updates: - Various cleanups and improvements to Mediatek clk drivers to reduce code size and modernize the drivers - Support for Versa 5P49V60 clks - Disable R-Car H3 ES1.*, as it was only available to an internal development group and needed a lot of quirks and workarounds - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and resets on Renesas RZ/V2M - Add display clocks on Renesas R-Car V4H - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L - Free the imx_uart_clocks even if imx_register_uart_clocks returns early - Get the stdout clocks count from device tree on i.MX - Drop the clock count argument from imx_register_uart_clocks() - Keep the uart clocks on i.MX93 for when earlycon is used - Fix SPDX comment in i.MX6SLL clocks bindings header - Drop some unnecessary spaces from i.MX8ULP clocks bindings header - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is not configured via devicetree - Fix the ENET1 gate configuration for i.MX6UL according to the reference manual - Add ENET refclock mux support for i.MX6UL - Add support for USB host/device configuration on Renesas RZ/N1 - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car V4H - Add D1 CAN bus gates and resets for Allwinner - Mark D1 CPUX clock as critical on Allwinner - Reuse D1 driver for Allwinner R528/T113 - Cleanup sunxi-ng Kconfig - Fix sunxi-ng kernel-doc issues - Model Allwinner H3/H5 DRAM clock as fixed clock - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll, sclk-div and cpu-dyn-div amlogic clock drivers - DDR clocks were marked as critical in the proper clock driver for each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted in the next releases as it only does clock enablement - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some of them may use it - Support synchronous power_off requests in the qcom GDSC driver for proper GPU power collapse - Drop test clocks from various Qualcomm clk drivers - Update parent references to use clk_parent_data/clk_hw in various Qualcomm clk drivers - Fixes for the Qualcomm MSM8996 CPU clock controller - Transition Qualcomm MSM8974 GCC off the externally defined sleep_clk - Add GDSCs in the global clock controller for Qualcomm QCS404 - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and SDM845 are moved to use the recently introduced properties in the GDSC struct - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and the IPA clock is added on a variety of platforms - De-duplicate identical clks in Qualcomm SMD RPM clk driver - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 to Qualcomm SDM RPM clk driver - Various Qualcomm clk drivers use devm_pm_runtime_enable() to simplify" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits) clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP clk: qcom: Revert sync_state based clk_disable_unused clk: imx: pll14xx: fix recalc_rate for negative kdiv clk: rs9: Drop unused pin_xin field MAINTAINERS: clk: imx: Add Peng Fan as reviewer clk: sprd: Add dependency for SPRD_UMS512_CLK clk: ralink: fix 'mt7621_gate_is_enabled()' function clk: mediatek: clk-mtk: Remove unneeded semicolon dt-bindings: clock: remove stih416 bindings dt-bindings: clock: add loongson-2 clock dt-bindings: clock: add loongson-2 clock include file clk: imx: fix compile testing imxrt1050 clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static clk: renesas: rcar-gen3: Disable R-Car H3 ES1.* dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property clk: qcom: cpu-8996: add missing cputype include ... |
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Linus Torvalds
|
8395d932d2 |
Devicetree updates for v6.3:
DT core: - Add node lifecycle unit tests - Add of_property_present() helper aligned with fwnode API - Print more information on reserved regions on boot - Update dtc to upstream v1.6.1-66-gabbd523bae6e - Use strscpy() to instead of strncpy() in DT core - Add option for schema validation on %.dtb targets Bindings: - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES - Rework external memory controller/bus bindings to properly support controller specific child node properties - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format - Add RiscV SBI PMU event mapping binding - Add missing contraints on Arm SCMI child node allowed properties - Add a bunch of missing Socionext UniPhier glue block bindings and example fixes - Various fixes for duplicate or conflicting type definitions on DT properties -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmP1dxgACgkQ+vtdtY28 YcOkBw//RU8EHTznVRBSbLbolpMPLVF4CGmWeE9bxLTZWIUaSG1NyhQgyKmzGqCR nsu/g14y3ZCrr4wkNvygWjumsuKu+uwMY0eQtEXEvpb47NBR/nhFaZ8/DWp2TeAr INizwgr1gc1l3n8cuTL8OBIsu37iNEDVrUuTkcJCdhJkTsEMLK0dA82uBEIWWGPR dWvhNFjplrCkzycfdbzTG4LMgzmtJ5RtVMT61FgwDd04UtBEOeB6wR3HME0UftG0 XxpzTtskMDiqEgzFFI3tZr82u3SrDzYPjeJVQkZC3VigV+s/ZW1Yh2t7/NH9negl fsidcNvFBAQFLIPY1QT+wJj3h2jmVThTKUjXo7KrmPgC1gJMaKrMsqQfcI/uqHm3 xFd+Vr/nspIBuuAth+04hdb0sBpvyYaEHoRwPWSWXTdNG7O50pZT5k+e0Lg/jjkM LmL79yVDPE5hFyH1TfYdUMb5Xn3hui//UUvLaTK0F1AjdEYIvUYchFi5H/Vg7szr +qGraGMH5fLyNjvI/X8K1ajKNa0xUAKK9JxqM308tD6tMWryZyF0MWD1sjPsvl7T wBm2fjGaEjapJ7vyywYyuZu3WpTY0eUtOGYIQQ6F+4Q/1h1aj4SeeEGmzZxvOivB CoWXpYkH/HPoAv+EwWXfGPV4pqxY8L3ZnzV13NcGSvE7Ha7+glo= =ywsL -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add node lifecycle unit tests - Add of_property_present() helper aligned with fwnode API - Print more information on reserved regions on boot - Update dtc to upstream v1.6.1-66-gabbd523bae6e - Use strscpy() to instead of strncpy() in DT core - Add option for schema validation on %.dtb targets Bindings: - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES - Rework external memory controller/bus bindings to properly support controller specific child node properties - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format - Add RiscV SBI PMU event mapping binding - Add missing contraints on Arm SCMI child node allowed properties - Add a bunch of missing Socionext UniPhier glue block bindings and example fixes - Various fixes for duplicate or conflicting type definitions on DT properties" * tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (66 commits) dt-bindings: regulator: Add mps,mpq7932 power-management IC of: dynamic: Fix spelling mistake "kojbect" -> "kobject" dt-bindings: drop Sagar Kadam from SiFive binding maintainership dt-bindings: sram: qcom,imem: document sm8450 dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema dt-bindings: arm: Add Cortex-A715 and X3 of: dynamic: add lifecycle docbook info to node creation functions of: add consistency check to of_node_release() of: do not use "%pOF" printk format on node with refcount of zero of: unittest: add node lifecycle tests of: update kconfig unittest help of: add processing of EXPECT_NOT to of_unittest_expect of: prepare to add processing of EXPECT_NOT to of_unittest_expect of: Use preferred of_property_read_* functions of: Use of_property_present() helper of: Add of_property_present() helper of: reserved_mem: Use proper binary prefix dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES of: reserved-mem: print out reserved-mem details during boot dt-bindings: serial: restrict possible child node names ... |
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Linus Torvalds
|
693fed981e |
Char/Misc and other driver subsystem changes for 6.3-rc1
Here is the large set of driver changes for char/misc drivers and other smaller driver subsystems that flow through this git tree. Included in here are: - New IIO drivers and features and improvments in that subsystem - New hwtracing drivers and additions to that subsystem - lots of interconnect changes and new drivers as that subsystem seems under very active development recently. This required also merging in the icc subsystem changes through this tree. - FPGA driver updates - counter subsystem and driver updates - MHI driver updates - nvmem driver updates - documentation updates - Other smaller driver updates and fixes, full details in the shortlog All of these have been in linux-next for a while with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY/inQw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yksvwCeOvU//SPwrbIpaeHAmHUv0PSVOrwAoKmt4ICh hQUudlztfkvUJxKIH0gh =Sjk4 -----END PGP SIGNATURE----- Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver subsystem updates from Greg KH: "Here is the large set of driver changes for char/misc drivers and other smaller driver subsystems that flow through this git tree. Included in here are: - New IIO drivers and features and improvments in that subsystem - New hwtracing drivers and additions to that subsystem - lots of interconnect changes and new drivers as that subsystem seems under very active development recently. This required also merging in the icc subsystem changes through this tree. - FPGA driver updates - counter subsystem and driver updates - MHI driver updates - nvmem driver updates - documentation updates - Other smaller driver updates and fixes, full details in the shortlog All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits) scripts/tags.sh: fix incompatibility with PCRE2 firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries mei: lower the log level for non-fatal failed messages mei: bus: disallow driver match while dismantling device misc: vmw_balloon: fix memory leak with using debugfs_lookup() nvmem: stm32: fix OPTEE dependency dt-bindings: nvmem: qfprom: add IPQ8074 compatible nvmem: qcom-spmi-sdam: register at device init time nvmem: rave-sp-eeprm: fix kernel-doc bad line warning nvmem: stm32: detect bsec pta presence for STM32MP15x nvmem: stm32: add OP-TEE support for STM32MP13x nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of() nvmem: core: add nvmem_add_one_cell() nvmem: core: drop the removal of the cells in nvmem_add_cells() nvmem: core: move struct nvmem_cell_info to nvmem-provider.h nvmem: core: add an index parameter to the cell of: property: add #nvmem-cell-cells property of: property: make #.*-cells optional for simple props of: base: add of_parse_phandle_with_optional_args() net: add helper eth_addr_add() ... |
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Stephen Boyd
|
b64baafa24 |
Merge branches 'clk-loongson' and 'clk-qcom' into clk-next
* clk-loongson: dt-bindings: clock: add loongson-2 clock dt-bindings: clock: add loongson-2 clock include file * clk-qcom: (143 commits) clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP clk: qcom: Revert sync_state based clk_disable_unused dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property clk: qcom: cpu-8996: add missing cputype include clk: qcom: gcc-sa8775p: remove unused variables clk: qcom: smd-rpm: provide RPM_SMD_XO_CLK_SRC on MSM8996 platform clk: qcom: add msm8996 Core Bus Framework (CBF) support dt-bindings: clock: qcom,msm8996-cbf: Describe the MSM8996 CBF clock controller clk: qcom: add the driver for the MSM8996 APCS clocks clk: qcom: gcc-qcs404: fix duplicate initializer warning clk: qcom: cpu-8996: change setup sequence to follow vendor kernel clk: qcom: cpu-8996: fix PLL clock ops clk: qcom: cpu-8996: fix ACD initialization clk: qcom: cpu-8996: fix PLL configuration sequence clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call clk: qcom: cpu-8996: setup PLLs before registering clocks clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb ... |
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Stephen Boyd
|
60950df7b4 |
Merge branches 'clk-microchip', 'clk-allwinner', 'clk-mediatek', 'clk-imx' and 'clk-core' into clk-next
- Various cleanups and improvements to Mediatek clk drivers to reduce code size and modernize the drivers - Support for Mediatek MT7891 SoC clks * clk-microchip: clk: at91: do not compile dt-compat.c for sama7g5 and sam9x60 clk: at91: mark ddr clocks as critical * clk-allwinner: clk: sunxi-ng: d1: Add CAN bus gates and resets dt-bindings: clock: Add D1 CAN bus gates and resets clk: sunxi-ng: d1: Mark cpux clock as critical clk: sunxi-ng: d1: Allow building for R528/T113 clk: sunxi-ng: Move SoC driver conditions to dependencies clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies clk: sunxi-ng: Avoid computing the rate twice clk: sunxi-ng: h3/h5: Model H3 CLK_DRAM as a fixed clock clk: sunxi-ng: fix ccu_mmc_timing.c kernel-doc issues * clk-mediatek: (29 commits) clk: mediatek: clk-mtk: Remove unneeded semicolon clk: mediatek: remove MT8195 vppsys/0/1 simple_probe dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver clk: mediatek: add MT7981 clock support dt-bindings: clock: mediatek: add mt7981 clock IDs dt-bindings: clock: Add compatibles for MT7981 clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe() clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe() clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs clk: mediatek: mt8186: Join top_adj_div and top_muxes clk: mediatek: mt8192: Join top_adj_divs and top_muxes clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() clk: mediatek: Switch to mtk_clk_simple_probe() where possible clk: mediatek: mt8173: Break down clock drivers and allow module build ... * clk-imx: clk: imx: pll14xx: fix recalc_rate for negative kdiv MAINTAINERS: clk: imx: Add Peng Fan as reviewer clk: imx: fix compile testing imxrt1050 clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static clk: imx6ul: add ethernet refclock mux support clk: imx6ul: fix enet1 gate configuration clk: imx: add imx_obtain_fixed_of_clock() clk: imx6q: add ethernet refclock mux support clk: imx: add clk-gpr-mux driver dt-bindings: imx8ulp: clock: no spaces before tabs clk: imx6sll: add proper spdx license identifier clk: imx: imx93: invoke imx_register_uart_clocks clk: imx: remove clk_count of imx_register_uart_clocks clk: imx: get stdout clk count from device tree clk: imx: avoid memory leak * clk-core: clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() |
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Linus Torvalds
|
d5176cdbf6 |
Core changes:
- Add PINCTRL_PINFUNCTION() macro and use it in several drivers. New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller. - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers. - New subdriver for the Qualcomm SA8775P SoC pin controller. - New subdriver for the Qualcomm IPQ5332 SoC pin controller. - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control. - New subdriver for the Mediatek MT7981 SoC pin controller. Improvements: - Several cleanups and refactorings to the Intel drivers. - Add 4KOhm bias support to the Intel driver. - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver. - Support general purpose clocks in the Qualcomm MSM8226 SoC. - Several conversions to use the new I2C .probe_new() call. - Massive clean-up of the Qualcomm Device Tree YAML schemas. - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmP1/+EACgkQQRCzN7AZ XXMKXw//VTMUTZ5mS9GWk8F3MSkHQ9p1nE9I7KxMHWkWZ5b7kNWUI8x7SM1FO42L mlIWeHEr5ZJxooZYYllrgVcEB70LMobFf5dwNaF7V4toIwlHCF8FZ5yAN6fS3Do8 hykck13KWirNl/gBYFhy9s8hRdaAnW7bFN/gewuKAFJH3NCAztrJiug4ggkkR1N6 rRlmi0RaOPjVcb/osvgAUxfpdW69VxlEDs/viJdIdx4criRZI0qphmfAhYU0wKl+ o0qFu1R/qTvtikKNrb/7yzKIXokraMP2lL+QniOVbiaj5Cyl0liO65+wtOIjYQSd J7dwelecHX7Q8QJCIeugBf7DQskw0a9OlXNUucvgD4q7sKY/JrwFSp9Zyf2PKUaL iBqEoC6XNjPvK97+Zx1uj1BkPk0ikYUKHXLMuLchcINevGr8xphpkfVL3/S4jNDR n0SxnvtvhY1lqAu+czhotMDBsj5UrnDKd4KDIpWdoUeHCql11F7iPRurTQcl/4qF vYTZ/5PwYTlJJV6/Ra10jcHXBQmbcWyYK+gIqfT8nYTWDAx96Dw0gx7ggObv9XFr rt3RbH2J/cEx1VdspWe4wu9SYmBBiQuubI/Ii9WpPNfIfNyBWwaELYXjSYhTt/07 TivLZbvn2Efu7n7hVubx/DkArLGpVevSdWtOwalTCtBaMUSUdGA= =P75R -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ... |
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Linus Torvalds
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1b72607d73 |
Thermal control updates for 6.3-rc1
- Rework a large bunch of drivers to use the generic thermal trip structure and use the opportunity to do more cleanups by removing unused functions from the OF code (Daniel Lezcano). - Remove core header inclusion from drivers (Daniel Lezcano). - Fix some locking issues related to the generic thermal trip rework (Johan Hovold). - Fix a crash when requesting the critical temperature on tegra, which is related to the generic trip point work (Jon Hunter). - Clean up thermal device unregistration code (Viresh Kumar). - Fix and clean up thermal control core initialization error code paths (Daniel Lezcano). - Relocate the trip points handling code into a separate file (Daniel Lezcano). - Make the thermal core fail registration of thermal zones and cooling devices if the thermal class has not been registered (Rafael Wysocki). - Add trip point initialization helper functions for ACPI-defined trip points and modify two thermal drivers to use them (Rafael Wysocki, Daniel Lezcano). - Make the core thermal control code use sysfs_emit_at() instead of scnprintf() where applicable (ye xingchen). - Consolidate code accessing the Intel TCC (Thermal Control Circuitry) MSRs by introducing library functions for that and making the TCC-related code in thermal drivers use them (Zhang Rui). - Enhance the x86_pkg_temp_thermal driver to support dynamic tjmax changes (Zhang Rui). - Address an "unsigned expression compared with zero" warning in the intel_soc_dts_iosf thermal driver (Yang Li). - Update comments regarding two functions in the Intel Menlow thermal driver (Deming Wang). - Use sysfs_emit_at() instead of scnprintf() in the int340x thermal driver (ye xingchen). - Make the intel_pch thermal driver support the Wellsburg PCH (Tim Zimmermann). - Modify the intel_pch and processor_thermal_device_pci thermal drivers use generic trip point tables instead of thermal zone trip point callbacks (Daniel Lezcano). - Add production mode attribute sysfs attribute to the int340x thermal driver (Srinivas Pandruvada). - Rework dynamic trip point updates handling and locking in the int340x thermal driver (Rafael Wysocki). - Make the int340x thermal driver use a generic trip points table instead of thermal zone trip point callbacks (Rafael Wysocki, Daniel Lezcano). - Clean up and improve the int340x thermal driver (Rafael Wysocki). - Simplify and clean up the intel_pch thermal driver (Rafael Wysocki). - Fix the Intel powerclamp thermal driver and make it use the common idle injection framework (Srinivas Pandruvada). - Add two module parameters, cpumask and max_idle, to the Intel powerclamp thermal driver to allow it to affect only a specific subset of CPUs instead of all of them (Srinivas Pandruvada). - Make the Intel quark_dts thermal driver Use generic trip point objects instead of its own trip point representation (Daniel Lezcano). - Add toctree entry for thermal documents and fix two issues in the Intel powerclamp driver documentation (Bagas Sanjaya). - Use strscpy() to instead of strncpy() in the thermal core (Xu Panda). - Fix thermal_sampling_exit() (Vincent Guittot). - Add Mediatek Low Voltage Thermal Sensor (LVTS) driver (Balsam Chihi). - Add r8a779g0 RCar support to the rcar_gen3 thermal driver (Geert Uytterhoeven). - Fix useless call to set_trips() when resuming in the rcar_gen3 thermal control driver and add interrupt support detection at init time to it (Niklas Söderlund). - Fix memory corruption in the hi3660 thermal driver (Yongqin Liu). - Fix include path for libnl3 in pkg-config file for libthermal (Vibhav Pant). - Remove syscfg-based driver for st as the platform is not supported any more (Alain Volmat). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmPuJuESHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxef0P/3h73rPjGEyuDlvXaazyXsJ2ItIoGeXF v9sDwK3IPeFTNwAu80RySXQViOG6G1e5Cl8Ee+LuuMZfPRlBnr3n35BazejDDK0N u3YAhPqtNOvWqr31T3A27dYtK+feFR2QL9SGFP0E4yxS1jpMOSO4Q24z7yaXdegT hD8YT1HbTW4Cra7A17qdXsG8LkIe0+GQXy7Ig/Dul1eqXTM4RSReGTmXic66hGpv lutqIQl8VdjmVBcQtTustpdycAD9zj07xd9BvOyM0lmF90zt6S0VOWFDsk+8u1jA FCiuRLBAM1xbguxGubahTVOM051J/MdfM5WqGgPtesNIXlDq4Je2WUGC07jGvSfV DMjNNb+nTkD3BK+BEe+rgv3KZBngj4p2sGHFW19v3EPdGftzohqDD5Oqn0GpsKR0 J4GaT04T66A6jlNdzY/nPfOIw5FYEAsMwx4hR0qtEWDMT4uYtXQYM5iml9TBDoDx Kqyx+N8KhaKnQ4PLZ0MwtusyZydKQC1S1YK6G2eo+bXeJEre07FjZkiNfURi5gv9 lrKS5nbAGBqUrNV4XnS18RmGAC+bxuQrNA5Gr0ouYaaLMT+jGzcdu1yCMeWJxwZI fFGAwE6sOU8EtmdGJrQdJt4eKCnpzOS7I1XuMDTBstl8Wv92x/YbH39vOl9wbJVs rmSkM+4t+sXb =tZwm -----END PGP SIGNATURE----- Merge tag 'thermal-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "The majority of changes here are related to the general switch-over to using arrays of generic trip point structures registered along with a thermal zone instead of trip point callbacks (this has been done mostly by Daniel Lezcano with some help from yours truly on the Intel drivers front). Apart from that and the related reorganization of code, there are some enhancements of the existing driver and a new Mediatek Low Voltage Thermal Sensor (LVTS) driver. The Intel powerclamp undergoes a major rework so it will use the generic idle_inject facility for CPU idle time injection going forward and it will take additional module parameters for specifying the subset of CPUs to be affected by it (work done by Srinivas Pandruvada). Also included are assorted fixes and a whole bunch of cleanups. Specifics: - Rework a large bunch of drivers to use the generic thermal trip structure and use the opportunity to do more cleanups by removing unused functions from the OF code (Daniel Lezcano) - Remove core header inclusion from drivers (Daniel Lezcano) - Fix some locking issues related to the generic thermal trip rework (Johan Hovold) - Fix a crash when requesting the critical temperature on tegra, which is related to the generic trip point work (Jon Hunter) - Clean up thermal device unregistration code (Viresh Kumar) - Fix and clean up thermal control core initialization error code paths (Daniel Lezcano) - Relocate the trip points handling code into a separate file (Daniel Lezcano) - Make the thermal core fail registration of thermal zones and cooling devices if the thermal class has not been registered (Rafael Wysocki) - Add trip point initialization helper functions for ACPI-defined trip points and modify two thermal drivers to use them (Rafael Wysocki, Daniel Lezcano) - Make the core thermal control code use sysfs_emit_at() instead of scnprintf() where applicable (ye xingchen) - Consolidate code accessing the Intel TCC (Thermal Control Circuitry) MSRs by introducing library functions for that and making the TCC-related code in thermal drivers use them (Zhang Rui) - Enhance the x86_pkg_temp_thermal driver to support dynamic tjmax changes (Zhang Rui) - Address an "unsigned expression compared with zero" warning in the intel_soc_dts_iosf thermal driver (Yang Li) - Update comments regarding two functions in the Intel Menlow thermal driver (Deming Wang) - Use sysfs_emit_at() instead of scnprintf() in the int340x thermal driver (ye xingchen) - Make the intel_pch thermal driver support the Wellsburg PCH (Tim Zimmermann) - Modify the intel_pch and processor_thermal_device_pci thermal drivers use generic trip point tables instead of thermal zone trip point callbacks (Daniel Lezcano) - Add production mode attribute sysfs attribute to the int340x thermal driver (Srinivas Pandruvada) - Rework dynamic trip point updates handling and locking in the int340x thermal driver (Rafael Wysocki) - Make the int340x thermal driver use a generic trip points table instead of thermal zone trip point callbacks (Rafael Wysocki, Daniel Lezcano) - Clean up and improve the int340x thermal driver (Rafael Wysocki) - Simplify and clean up the intel_pch thermal driver (Rafael Wysocki) - Fix the Intel powerclamp thermal driver and make it use the common idle injection framework (Srinivas Pandruvada) - Add two module parameters, cpumask and max_idle, to the Intel powerclamp thermal driver to allow it to affect only a specific subset of CPUs instead of all of them (Srinivas Pandruvada) - Make the Intel quark_dts thermal driver Use generic trip point objects instead of its own trip point representation (Daniel Lezcano) - Add toctree entry for thermal documents and fix two issues in the Intel powerclamp driver documentation (Bagas Sanjaya) - Use strscpy() to instead of strncpy() in the thermal core (Xu Panda) - Fix thermal_sampling_exit() (Vincent Guittot) - Add Mediatek Low Voltage Thermal Sensor (LVTS) driver (Balsam Chihi) - Add r8a779g0 RCar support to the rcar_gen3 thermal driver (Geert Uytterhoeven) - Fix useless call to set_trips() when resuming in the rcar_gen3 thermal control driver and add interrupt support detection at init time to it (Niklas Söderlund) - Fix memory corruption in the hi3660 thermal driver (Yongqin Liu) - Fix include path for libnl3 in pkg-config file for libthermal (Vibhav Pant) - Remove syscfg-based driver for st as the platform is not supported any more (Alain Volmat)" * tag 'thermal-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (135 commits) thermal/drivers/st: Remove syscfg based driver thermal: Remove core header inclusion from drivers tools/lib/thermal: Fix include path for libnl3 in pkg-config file. thermal/drivers/hisi: Drop second sensor hi3660 thermal/drivers/rcar_gen3_thermal: Fix device initialization thermal/drivers/rcar_gen3_thermal: Create device local ops struct thermal/drivers/rcar_gen3_thermal: Do not call set_trips() when resuming thermal/drivers/rcar_gen3: Add support for R-Car V4H dt-bindings: thermal: rcar-gen3-thermal: Add r8a779g0 support thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver dt-bindings: thermal: mediatek: Add LVTS thermal controllers thermal/drivers/mediatek: Relocate driver to mediatek folder tools/lib/thermal: Fix thermal_sampling_exit() Documentation: powerclamp: Fix numbered lists formatting Documentation: powerclamp: Escape wildcard in cpumask description Documentation: admin-guide: Add toctree entry for thermal docs thermal: intel: powerclamp: Add two module parameters Documentation: admin-guide: Move intel_powerclamp documentation thermal: core: Use sysfs_emit_at() instead of scnprintf() thermal: intel: powerclamp: Fix duration module parameter ... |
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Linus Torvalds
|
950b6662e2 |
SoC: DT changes for 6.3
About a quarter of the changes are for 32-bit arm, mostly filling in device support for existing machines and adding minor cleanups, mostly for Qualcomm and Samsung based machines. Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from Rockchips that have been around for a while but were lacking kernel support so far: RV1126 is a Vision SoC with an NPU and is used in the Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for TV boxes and so far only comes with a dts for its refernece design. The other 32-bit boards that were added are two ASpeed AST2600 based BMC boards, the Microchip sam9x60_curiosity development board (Armv5 based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53 and i.MX6ULL. On the RISC-V side, there are fewer patches, but a total of ten new single-board computers based on variations of the Allwinner D1/T113 chip, plus one more board based on Microchip Polarfire. As usual, arm64 has by far the most changes here, with over 700 non-merge changesets, among them over 400 alone for Qualcomm. The newly added SoCs this time are all recent high-end embedded SoCs for various markets, each on comes with support for its reference board: - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones - Qualcomm QDU1000/QRU1000 5G RAN platform - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs - TI J784S4 for industrial and automotive applications In total, there are 46 new arm64 machines: - Reference platforms for each of the five new SoCs - Three Amlogic based development boards - Six embedded machines based on NXP i.MX8MM and i.MX8MP - The Mediatek mt7986a based Banana Pi R3 router - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865) - Two LTE dongles, also based on MSM8916 - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610), SDM450 and SDM632 - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c) - Nine development boards based on Rockchips RK3588, RK3568, RK3566 and RK3328. - Five development machines based on TI K3 (AM642/AM654/AM68/AM69) The cleanup of dtc warnings continues across all platforms, adding to the total number of changes. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPvpVYACgkQmmx57+YA GNm3iA/+NgaiEgwxaot1eoBqKImyP6NtC9VHFYRbscVkaBEkdNpm2zeVX92E2/8d dZuGiOqY5VC+e53Rbig6m0GLrctYJfZTdJ0tYih8cwkB0jVL6bHzFQE1ugZkXkQC /dXx2ozNQD1XqfgXqi7OC2PeaBqBxOK4UFrhUvjfzR68GuZmWpdC4+1mdIs106D1 252vV3y3biMDKXg1SgTXc4t8nb/ZT69gJpgJdbNuypDcAVrqlLaQZQ1sdEUu2wsh 6XnBZKe8srkFFwN+eR0Tdf9MhneUFJxLQsAajAm4WN1QiGrqtU42mrpJE80b6Uic wnkvgwfyGVeGivM4/bAkeug5dCiElzCiwQBCKzL95ucf75Z8SfmhFAVAqji/MFBF yzfetUld975qI0Bw6zh9dJALz6hElZAbbvcGI1imlXjVIsOwINvCoB5r3YPJw7FR 2nhJrsXs8h37VZgkeTlMp5BMu9j0AQKoBL4zbOSdrDr+XuOvuzIez+8ashFLijvu FO+qlXfHUC7WsR6wktVumCsADnVRPJZN0UeMhSFixceD/njVaRZBk3BOY5Ea9wjm G0s3KpqnLgEMrjDW3FLBf8xb9qEQPBAyeYUL9d0MHByz8W7iI/dQjEie0UEzmCqI J+cDdhMCKDNYOF0Xk8d9k2g5/p62/0akmncOBCZRJf9bMHklBWY= =I8Ga -----END PGP SIGNATURE----- Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC DT updates from Arnd Bergmann: "About a quarter of the changes are for 32-bit arm, mostly filling in device support for existing machines and adding minor cleanups, mostly for Qualcomm and Samsung based machines. Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from Rockchips that have been around for a while but were lacking kernel support so far: RV1126 is a Vision SoC with an NPU and is used in the Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for TV boxes and so far only comes with a dts for its refernece design. The other 32-bit boards that were added are two ASpeed AST2600 based BMC boards, the Microchip sam9x60_curiosity development board (Armv5 based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53 and i.MX6ULL. On the RISC-V side, there are fewer patches, but a total of ten new single-board computers based on variations of the Allwinner D1/T113 chip, plus one more board based on Microchip Polarfire. As usual, arm64 has by far the most changes here, with over 700 non-merge changesets, among them over 400 alone for Qualcomm. The newly added SoCs this time are all recent high-end embedded SoCs for various markets, each on comes with support for its reference board: - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones - Qualcomm QDU1000/QRU1000 5G RAN platform - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs - TI J784S4 for industrial and automotive applications In total, there are 46 new arm64 machines: - Reference platforms for each of the five new SoCs - Three Amlogic based development boards - Six embedded machines based on NXP i.MX8MM and i.MX8MP - The Mediatek mt7986a based Banana Pi R3 router - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865) - Two LTE dongles, also based on MSM8916 - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610), SDM450 and SDM632 - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c) - Nine development boards based on Rockchips RK3588, RK3568, RK3566 and RK3328. - Five development machines based on TI K3 (AM642/AM654/AM68/AM69) The cleanup of dtc warnings continues across all platforms, adding to the total number of changes" * tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits) dt-bindings: riscv: correct starfive visionfive 2 compatibles ARM: dts: socfpga: Add enclustra PE1 devicetree dt-bindings: altera: Add enclustra mercury PE1 arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings arm64: dts: qcom: qcs404: align RPM G-Link node with bindings arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam arm64: dts: qcom: sc7280: Adjust zombie PWM frequency arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses arm64: dts: qcom: sm7225-fairphone-fp4: move status property down arm64: dts: qcom: pmk8350: Use the correct PON compatible arm64: dts: qcom: sc8280xp-x13s: Enable external display arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks arm64: dts: qcom: sm8350-hdk: enable GPU arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes arm64: dts: qcom: sm8350: finish reordering nodes arm64: dts: qcom: sm8350: move more nodes to correct place arm64: dts: qcom: sm8350: reorder device nodes ... |
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Balsam CHIHI
|
498e2f7a6e |
dt-bindings: thermal: mediatek: Add LVTS thermal controllers
Add LVTS thermal controllers dt-binding definition for mt8192 and mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230209105628.50294-3-bchihi@baylibre.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
||
Arnd Bergmann
|
68907175ec |
More Qualcomm driver updates for 6.3
The qcom_scm.h file is moved into firmware/qcom, to avoid having any Qualcomm-specific files directly in include/linux. Support for PMIC GLINK is introduced, which on newer Qualcomm platforms provides an interface to the firmware implementing battery management and USB Type-C handling. Together with the base driver comes the custom altmode support driver. SMD RPM gains support for IPQ9574, and socinfo is extended with support for revision 17 of the information format and soc_id for IPQ5332 and IPQ8064 are added. The qcom_stats is changes not to fail when not all parts are initialized. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPmiz4VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FMZ8QANXJEr7U2KX/yd4riBju6Btn0unl I8TR5XlaQAoBUbyp4yTcCUfCe0mEiNcE/YgJwzSKY3mNxc9vLhn1GgqdF+5RFTZw 0H8GBjUpQiRoCC2+pq3YCEisQ49HYXy9W3ys6t1Y3l8xUDLhw5CkeKOGQCqeBDX7 pCflPy7HFUQwPhGt7AOmpNj8+Kh4GnpJHF3D2ShAMFNOn4+l0v8Gh7zDw62FmhBg gjA7eS2aZS7KmqEJMAC4dEFdmhvvN+a80KaWNOOQn2sdLtD64pRW2hknxinPRN+t dGQKeD+VGFHLfxWO40Lv0nP8P/EWjXiZdhO8HXLmVjHC56G/MG8AW0BkvxW9jPAa QGlzY0TbEbi0MbbAnyCJTy6USGtVUZbEmfcZ8r3rUJX5xO8eszSjueD6fH/nKIgo hDIIG8nSLf5TCY+NJzGr8dKENiElsgsfdNAypoX6kpXCRUCXxkiKlWzy/3oywVcO bKm5xs76YNNaANFf46oO6kts7nrOcegyTAdvauFemy1Q3KSWQuFP4jNpcRvWnVMN 8/BlQ+a5uGofN/wwHS2CPmE1r8njEqlPc7wWNc0ugoRO4kAUtB2UldjjS/ZfaFvH BZiDDXhjScPj8lKk4kzGOb34W5AKkwFbTwSR1oN0ckW9UNDx51pNu72YlU8WLydV VHmzD9ndTkWSmp7W =+KgT -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqVbkACgkQmmx57+YA GNnlFRAAuaoe9/7kOAliVks4vkJ8284POk50kuS5llzNAP4BPsQIJakE6dOOiTY1 01qbvTlu5pK+f2ls+3WQYr5Rhgck4BUEFD+t9WcPtOpB1uq0puyWj3fwuErjDFJv S6nKp2P0tpru5VzQFPROyrBCw5Zlkc0U9FID4P1Ub5ulxxDWJ4ODb9Q+C9DtDxJo HuUGRnGPLmAJd4ymKzCtnqcg3gocFdrl9K+msFuJwAgdZ0xB893l3wyOFn2k97Uh 8m8WEI/NbCTfDEjag3+yx9Sl3rZhtav0EnlIqowBHQFvxFaBDnvW6H4QmNRugAog +kH1hVzojj35jDllwL07OJzdjqW497Z9i+MEGz45h/8FvvdqJ+71UTkOwr+vnWKu zuEzEfM+bB434UBCQihJ7emx7eCac3TP3Von/NigDDBIXDu8iqNgUNmB8eNyN+gJ Db1mdatG4TuSEqnzetX4XKLP3eydxG8lkEZDOcWlhRz8CSWx9KkBU7W+hVNCBLdV kdhjvZpb5cRcqc/KsS22hmB3HIoISGkLrBOvqs375+Sg9PFxBGst+q24kf9MEDFz ypj/CRiMzkNq8IBwGF003CVhDHmlloq2afQ7YX0w1sEE0XOCIDE0YWNNb9fcoTAC MeDL9R4VgfjR/8Bj7zgnYOMAt6hRoHXsZ1gtS29doIH5iLdTXVI= =8eLr -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for 6.3 The qcom_scm.h file is moved into firmware/qcom, to avoid having any Qualcomm-specific files directly in include/linux. Support for PMIC GLINK is introduced, which on newer Qualcomm platforms provides an interface to the firmware implementing battery management and USB Type-C handling. Together with the base driver comes the custom altmode support driver. SMD RPM gains support for IPQ9574, and socinfo is extended with support for revision 17 of the information format and soc_id for IPQ5332 and IPQ8064 are added. The qcom_stats is changes not to fail when not all parts are initialized. * tag 'qcom-drivers-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: socinfo: Add IDs for IPQ5332 and its variant dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1 firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/ MAINTAINERS: Update qcom CPR maintainer entry dt-bindings: firmware: document Qualcomm SM8550 SCM dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants soc: qcom: socinfo: Add support for new field in revision 17 soc: qcom: smd-rpm: Add IPQ9574 compatible soc: qcom: pmic_glink: remove redundant calculation of svid soc: qcom: stats: Populate all subsystem debugfs files dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies soc: qcom: pmic_glink: Introduce altmode support soc: qcom: pmic_glink: Introduce base PMIC GLINK driver dt-bindings: soc: qcom: Introduce PMIC GLINK binding soc: qcom: dcc: Drop driver for now Link: https://lore.kernel.org/r/20230210182242.2023901-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Arnd Bergmann
|
01e9d2c6be |
Qualcomm driver updates for v6.3
This introduces a new driver for the Data Capture and Compare block, which provides a mechanism for capturing hardware state (access MMIO registers) either upon request of triggered automatically e.g. upon a watchdog bite, for post mortem analysis. The remote filesystem memory share driver gains support for having its memory bound to more than a single VMID. The SCM driver gains the minimal support needed to support a new mechanism where secure world can put calls on hold and later request them to be retried. Support for the new SA8775P platform is added to rpmhpd, QDU1000 is added to the SCM driver and a long list of platforms are added to the socinfo driver. Support for socinfo data revision 16 is also introduced. Lastly a driver to program the ramp controller in MSM8976 is introduced. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPSqkcVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FZJoQANgP9rQgJ/JNvKMHA0ZiBK5NmCi+ Km+b2ufICk1au7IhiwRDTlZZBSozShIqSp8ua+WsKQqzKd2Reyj3F33/TZdZrHg+ LW7A3g8e6a6Ook/iJgD0LiTlaGz+/umQ7lnUaaARUPv4JZ/y+pCphTdxTwRXNhvw T6ndjbx7W/qhb9WlZaP3Jnd4z3csr1fpiOfvK1TgJpgZzsKUUq/V9SSRKs3BS5lK gG/F9wxfRVhpjZZCdx9cCO4WtI4xwuocxdGhzljH0AHvAAgab/c7w9YKrkFpGib6 lj3sJ+TLC/nZc93Swzk4Sv57F//f1EhBvWZImBiZioR7IPPrcotdVa0wKOuiEmPn TWPnEDk+5KiTG4iXOfQ6z0NbAM9S057El0nb8jYw6rx04xOHZYpb5w6172ftYNFk 0DSfNuEImh8YZwhwRKbP1LHemwliUptaFonYc9SrFW+Y9MLh69TTTggv/N6YzLK5 /e+RQ7tjE/idg//iZAK649mqzZCnHc+di3S055otcqm3Uhr5/xYfIwFce6ssTNjK SNaK9LjwE+g7Rqy0jQV7uFyQ+HXy443TX8fRnnwZHMv+M+U+9VpuNYaNL3cJ9j7S qsCUWcjN36pFCPMrDPSSmW5VEQD+WJOwGA4ZqQrUVXvLgtEfHZPd0PID8kxul6PE KRl0gMt770iAnUtK =EWZ7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqVYUACgkQmmx57+YA GNnD1xAApXNA9N+BLLjfOXErNlKWTQXHThSQIvHxx7xubIy3Nm/soGCJFcp45hYJ IW74MuOy5N3ngFe4HzGyUiHW/9E9BLZGh0ZzHUO/dIhG7io3zAC7tDw6bbwu67Wz NhWBurgsy5BL7jjX/bBDKZuthyEI6IlD2TYLeFqrD63ZoryviyvD3IKS4JAo8zg3 Fz7z8Cr9v02cur6QJum95iNxogncX8L1/WQwRfHXsMV4MgteArTuNTh8zAXBPAlV T7ENWe/2U6GCvoU295hl5NLHwARSm1bsSNYVCJR5cvSBXqd8U06WDFLBttUdRg8J 32KCWDLZ/J8IF69DvOWRfh+cmJmlM14o2uNLSnFbV2PyNh4LORsWCbx2J4zX147T nocFySuOxP9g4+7h0zv5FFm+uAS7RPIPLKCdCsYR3RbZl5cbZmnvJzQIgLKaVa+e fprcDT6X8HhODDtj49kEtK7kRe3dFz0MwiHf9wxyx7rm1eIlqGI3reHaU4fcaml2 PqgtuShMGx3uSnpHsi2j/sXuCEmKpNSwOBPU1INNgKm2FmMFy4OYsPbe7s1vdTpi irJ3CC/3Uk9r4CEoJe3G9TURFQyEpNISjdCEa21tGD0miMrdsB79JMU/nJkiLpg9 7l8EDMU33HYKsAqqezocNqzreV2s0YjFPs7Vts5aIh+aecS/Kzk= =B0bJ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.3 This introduces a new driver for the Data Capture and Compare block, which provides a mechanism for capturing hardware state (access MMIO registers) either upon request of triggered automatically e.g. upon a watchdog bite, for post mortem analysis. The remote filesystem memory share driver gains support for having its memory bound to more than a single VMID. The SCM driver gains the minimal support needed to support a new mechanism where secure world can put calls on hold and later request them to be retried. Support for the new SA8775P platform is added to rpmhpd, QDU1000 is added to the SCM driver and a long list of platforms are added to the socinfo driver. Support for socinfo data revision 16 is also introduced. Lastly a driver to program the ramp controller in MSM8976 is introduced. * tag 'qcom-drivers-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (33 commits) firmware: qcom: scm: Add wait-queue handling logic dt-bindings: firmware: qcom,scm: Add optional interrupt Revert "dt-bindings: power: rpmpd: Add SM4250 support" Revert "soc: qcom: rpmpd: Add SM4250 support" soc: qcom: socinfo: Add a bunch of older SoCs dt-bindings: arm: qcom,ids: Add a bunch of older SoCs dt-bindings: arm: qcom,ids: Add QRD board ID soc: qcom: socinfo: Fix soc_id order dt-bindings: soc: qcom: smd-rpm: Exclude MSM8936 from glink-channels dt-bindings: firmware: qcom: scm: Separate VMIDs from header to bindings soc: qcom: rmtfs: Optionally map RMTFS to more VMs dt-bindings: reserved-memory: rmtfs: Make qcom,vmid an array dt-bindings: firmware: scm: Add QDU1000/QRU1000 compatible dt-bindings: firmware: qcom,scm: narrow clocks and interconnects dt-bindings: firmware: qcom,scm: document MSM8226 clocks soc: qcom: ramp_controller: Make things static soc: qcom: rmphpd: add power domains for sa8775p dt-bindings: power: qcom,rpmpd: document sa8775p PM: AVS: qcom-cpr: Fix an error handling path in cpr_probe() soc: qcom: dcc: rewrite description of dcc sysfs files ... Link: https://lore.kernel.org/r/20230126163008.3676950-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
7dbdc16fc8 |
More Qualcomm ARM64 DT updates for 6.3
The new Qualcomm QDU1000 and QRU1000 platforms, and the IDP device on these are introduced. New support for a couple of USB modem sticks from THWC are introduced, so is support for Xiaomi Mi Pad 5 Pro and the Pro SKU of the Herobrine device. The Core Bus Fabric (CBF) is introduced on MSM8996. Interconnect paths for UFS are also described. A few fixes related to the power-grid of herobrine, on SC7280, are introduced. QFPROM is introduced on IPQ8074 and Interconnect providers are added for SDM670. On SDM845 the duplicated wcd9340 audio coded description is moved from devices to a common file, audio devices are added to the OnePlus 6 and 6T. On SM6115 debug UART, SMP2P, watchdog nodes are introduced, and the platform is switched to use #address/size-cells of 2, in line with most other platforms. Camera control interface and clock controllers are added for SM6350, and the CCI interface is enabled on the Fairphone FP4. On SM8350 the interconnect reference of SDHCI controller is corrected, DSI1 PHY clocks are properly described as sources for the Display clock controller and DSI1 is wired up to the display controller. The firmware paths are corrected for the Sony Xperia Nagara platform. The GPR bus, audio servic3es and LPASS pinctrl nodes are added for the SM8550 platform. Additionally a few small typos/errors are corrected. gpio-ranges are corrected across MSM8953, SM6115 and SC8280XP and a range of DT validation issues are corrected. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPmmt0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FuXsP/0/VRqYf9SxY5iVEWAuUnsf+sVAT fGzZ0YvE3NQoYA0xoExVYZWrDDzkdSp2RoMbLh8kWyku1BCmEeV/X8RnbLoQAM8D txUJjpazAVxRiMoDgxxyGpn55KVxb6gAO8fXi9mbc6X+0wsPoWsghZVx5AicEiIY 3f3m63yFjLGO7aOKs7wfBx5odgUuXoBBzzHYw+VKnp9NAhfMLudM7JCa8kTrOnOZ JaPMnvbaQg7i1WEW6jJt4Gbp4+f+IqfYhm1RkzzJbVmf1bYWEEhHltM1p50gwkAK fFG6mV+j6WqhJd9myhswvuP9YrBQ0cxZjKErBTNSxzegzgOFfxnG4LsRZRh5oJjq qZC+edkPXe6DDIidcGcGvkGekc3c1Xidnwoui7xwIFQ/KN+zZDDg+psnAH3L1On+ /vWKNetiwXZ5uN3yv8WmTm/5YDLBltjh7RlQVo448RMKSfyt6VEJaJHcJN3G3Nof J5F8EJI/EanDU9XjpUEEYGZ2e3yagtc9x6ThVMX+k8tqxhZLxhVDRi7SnY0XKfjQ 5FVE45sX+J5jlnRu6lx4xF2sgO5jUvTEs1vVY/1IloAfCHipsbhQfU8f4KUN0bNO XmTDzsDYK/QXGTYQ27P/xCqu8fRTDbRD8cBF5PWEBbw8uDWtK5bZk1mZFjdkNCge E3pIAn6Gs8MANubJ =wSbI -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPqTZgACgkQmmx57+YA GNlv9g//f6Ya0tDtXwr7GTU3HZc/lEEhibifep5aohWuTsMqoUiic1lLdV2/aXsW FZxgQ5TaH7UluqZ1Acrxt9+saYaMu15SBgBXM///pYcY7r5p/sKlRSrNU1sKZv29 psTGrhotU03TM5XFmavu9su7l34sAO1NAiXTF9h/bSdaX4KYUSQCucBlSFQ7Q2c4 XlqI9uy79NHIC+O6x4RXdYvmAUb6rQ9rZ4WQOzy+gkFbF19gpz9X+XP5nDMPnfnw C31+4SrvMI2/sej+3CZjwg/Vfz5Ahq1WKrOd8jPcdpGiXmfP3iDZlMV9dMbwQbzS cF7Jx8S7/p6KaAn8OtnCaD4rar17YJnIjpzlP6gZKj82WCheaK2hwDYT1FcR80bj tmjH2hvV8X48njgUga18ZM489xdPkw3rWH/jmH8lnntTqOdR0lsbqlnpsztrO/4H W0FVXiKanvwOSYE3Z6I7QrL1ajB+33/nnqPiaevkajtoeGShap5v32FieIjrwa8x fYMNjxAegzDUUxQNm7omc+oL7PYTwo26qqJcWiMqa8l6LVx/+o6WPmLIZkzGkEAC qqzPU/m55c+E+tEkBf9aW1QMgjBfjdysfnu158mgfVH2ouc2l7p92FqMgWCEz2qo XSA0dU2enNus2qJM9oAXPzahPzvM8pHN+EPUFnzVupPqlgawnP8= =nzqV -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt More Qualcomm ARM64 DT updates for 6.3 The new Qualcomm QDU1000 and QRU1000 platforms, and the IDP device on these are introduced. New support for a couple of USB modem sticks from THWC are introduced, so is support for Xiaomi Mi Pad 5 Pro and the Pro SKU of the Herobrine device. The Core Bus Fabric (CBF) is introduced on MSM8996. Interconnect paths for UFS are also described. A few fixes related to the power-grid of herobrine, on SC7280, are introduced. QFPROM is introduced on IPQ8074 and Interconnect providers are added for SDM670. On SDM845 the duplicated wcd9340 audio coded description is moved from devices to a common file, audio devices are added to the OnePlus 6 and 6T. On SM6115 debug UART, SMP2P, watchdog nodes are introduced, and the platform is switched to use #address/size-cells of 2, in line with most other platforms. Camera control interface and clock controllers are added for SM6350, and the CCI interface is enabled on the Fairphone FP4. On SM8350 the interconnect reference of SDHCI controller is corrected, DSI1 PHY clocks are properly described as sources for the Display clock controller and DSI1 is wired up to the display controller. The firmware paths are corrected for the Sony Xperia Nagara platform. The GPR bus, audio servic3es and LPASS pinctrl nodes are added for the SM8550 platform. Additionally a few small typos/errors are corrected. gpio-ranges are corrected across MSM8953, SM6115 and SC8280XP and a range of DT validation issues are corrected. * tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (81 commits) arm64: dts: qcom: sc7280: Power herobrine's 3.3 eDP/TS rail more properly arm64: dts: qcom: pmk8550: fix PON compatible arm64: dts: qcom: sm8550: fix DSI controller compatible arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on evoker arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on villager arm64: dts: qcom: sc7280: Add 3ms ramp to herobrine's pp3300_left_in_mlb arm64: dts: qcom: sc7280: On QCard, regulator L3C should be 1.8V arm64: dts: qcom: sc8280xp: correct LPASS GPIO gpio-ranges arm64: dts: qcom: msm8992-lg-bullhead: Enable regulators arm64: dts: qcom: sm6115: correct TLMM gpio-ranges arm64: dts: qcom: msm8953: correct TLMM gpio-ranges arm64: dts: qcom: msm8992-lg-bullhead: Correct memory overlaps with the SMEM and MPSS memory regions arm64: dts: qcom: sm8350-hdk: correct LT9611 pin function arm64: dts: qcom: sm8350-hdk: align pin config node names with bindings arm64: dts: qcom: sm6350: Use specific qmpphy compatible arm64: dts: qcom: sm6115: Add smp2p nodes arm64: dts: qcom: sm7225-fairphone-fp4: Enable CCI busses arm64: dts: qcom: sm6350: Add CCI nodes arm64: dts: qcom: sm6350: Add camera clock controller dt-bindings: clock: add QCOM SM6350 camera clock bindings ... Link: https://lore.kernel.org/r/20230210192908.2039976-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Alain Volmat
|
d10e9f8813 |
dt-bindings: clock: remove stih416 bindings
Remove the stih416 clock dt-bindings since this platform is no more supported. Signed-off-by: Alain Volmat <avolmat@me.com> Link: https://lore.kernel.org/r/20230209091659.1409-11-avolmat@me.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Yinbo Zhu
|
01d63ce425 |
dt-bindings: clock: add loongson-2 clock include file
This file defines all Loongson-2 SoC clock indexes, it should be included in the device tree in which there's device using the clocks. Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221129034157.15036-1-zhuyinbo@loongson.cn Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Jianlong Huang
|
716129d3b7 |
dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-3-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Jianlong Huang
|
d6e0a66009 |
dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
Add pinctrl bindings for StarFive JH7110 SoC sys pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-2-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Bjorn Andersson
|
c0cf43f63a |
Merge branch '20221213152617.296426-1-konrad.dybcio@linaro.org' into HEAD
Merge DT binding to gain Camera clock defines for SM6350 |
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Konrad Dybcio
|
717607f1a4 |
dt-bindings: clock: add QCOM SM6350 camera clock bindings
Add device tree bindings for camera clock controller for Qualcomm Technology Inc's SM6350 SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213152617.296426-1-konrad.dybcio@linaro.org |
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Kathiravan T
|
4ad66c3f4b |
dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
Add SOC ID for Qualcomm IPQ5332 and IPQ5322 variants. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208055709.13162-2-quic_kathirav@quicinc.com |
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Dmitry Baryshkov
|
bdd133c2ee |
dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
Add define for another power saving state used on SM8350 for the GPU. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206145707.122937-3-dmitry.baryshkov@linaro.org |
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Christian Marangi
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d615ef0c92 |
dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
Add Soc IDs for Qualcomm IPQ8064 and variants. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230124143236.1038-1-ansuelsmth@gmail.com |
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Georgi Djakov
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b1f5e7ff0c |
Merge branch 'icc-sa8775p' into icc-next
* icc-sa8775p dt-bindings: interconnect: qcom: document the interconnects for sa8775p interconnect: qcom: add a driver for sa8775p dt-bindings: interconnect: qcom,sa8775p-rpmh: fix a typo Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Georgi Djakov
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b9544fb577 |
Merge branch 'icc-sdm670' into icc-next
* icc-sdm670 dt-bindings: interconnect: add sdm670 interconnects interconnect: qcom: add sdm670 interconnects Link: https://lore.kernel.org/r/20230111005155.50452-1-mailingradian@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |