Commit Graph

697 Commits

Author SHA1 Message Date
Ralf Baechle
a36920200c [MIPS] Enable support for the userlocal hardware register
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
d223a86154 [MIPS] FP affinity: Coding style cleanups
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
e7c4782f92 [MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:01 +01:00
Franck Bui-Huu
192cca6ef2 [MIPS] Remove Momenco Ocelot C support
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/configs/ocelot_c_defconfig
 delete mode 100644 arch/mips/momentum/ocelot_c/Makefile
 delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c
 delete mode 100644 arch/mips/momentum/ocelot_c/irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
 delete mode 100644 arch/mips/momentum/ocelot_c/platform.c
 delete mode 100644 arch/mips/momentum/ocelot_c/prom.c
 delete mode 100644 arch/mips/momentum/ocelot_c/reset.c
 delete mode 100644 arch/mips/momentum/ocelot_c/setup.c
 delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c
 delete mode 100644 arch/mips/pci/fixup-ocelot-c.c
 delete mode 100644 arch/mips/pci/pci-ocelot-c.c
2007-07-10 17:33:01 +01:00
Ralf Baechle
19df0d1169 [MIPS] PCI: Make dev pointer argument of pcibios_map_irq const.
This is to break the code of people who think they are supposed to scribble
into the pci device structure - it's off limits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Yoichi Yuasa
6b5bf50931 [MIPS] EV64120: Remove support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Atsushi Nemoto
b63e804459 [MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Franck Bui-Huu
b1c65b3988 [MIPS] Fix PHYS_OFFSET for 64-bits kernels with 32-bits symbols
The current implementation of __pa() for 64-bits kernels with 32-bits
symbols is broken. In this configuration, we need 2 values for
PAGE_OFFSET, one in XKPHYS and the other in CKSEG0 space.

When the value in CKSEG0 space is used, it doesn't take into account
of PHYS_OFFSET. Even worse we can't redefine this value.

The patch restores CPHYSADDR() but in __pa()'s implementation because
it removes the need of 2 PAGE_OFFSET.

OTOH, CPHYSADDR() is quite bad when dealing with mapped kernels. So
this patch assumes there's no need to deal with such kernel in 64-bits
world.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Franck Bui-Huu
41b0483ee5 [MIPS] Move PHY_OFFSET definition in spaces.h
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Franck Bui-Huu
db38501511 [MIPS] Make PAGE_OFFSET aware of PHYS_OFFSET
For platforms that use PHYS_OFFSET and do not use a mapped kernel,
this patch automatically adds PHYS_OFFSET into PAGE_OFFSET.
Therefore there are no more needs for them to redefine PAGE_OFFSET.

For mapped kernel, they need to redefine PAGE_OFFSET anyways.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Franck Bui-Huu
c4612c8596 [MIPS] Clean up asm-mips/mach-generic/spaces.h
PAGE_OFFSET definition is now using CAC_BASE by default.

This patch also reorder some macros to make them appear
in the same order for both 32 and 64 bits configs.

It also makes use of const.h generic header file to
annotate constants.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Franck Bui-Huu
09bb9ce15f [MIPS] Allow generic spaces.h to be included by platform specific ones
Before this patch, when a platform needed to customize one constant in
spaces.h, they need to redefine all of them.

Now they can just redefine one constant and include the generic file
header at the end:

	#include <asm/mach-generic/spaces.h>

This patch doesn't allow to redefine CAC_BASE, IO_BASE and UNCAC_BASE
for 32 bits platforms because there's no need to do so.

This will avoid some macro duplications. It's important specially if
we'll add complex macros.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 include/asm-mips/mach-ip32/spaces.h
2007-07-10 17:32:57 +01:00
Ralf Baechle
f6e2373ad6 [MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.
It shares no code at all.  While at it also fix up the beginning bitrot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
8bb809df69 [MIPS] Cleanup TO_PHYS_MASK definition
No point in adding yet another #ifdef for Loongson since all this mask is
being used for is converting an XKPHYS address into a physical address
anyway.  So replace all definitions by one with the highest architectural
possible value.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Florian Fainelli
4ead16819b [MIPS] Add generic GPIO to Au1x00
This patch adds support for the generic GPIO API to Au1x00 boards. It requires
the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS
target using it, can you queue these patchset for 2.6.22 ? Thank you very
much in advance.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Atsushi Nemoto
82b8d2250c [MIPS] Create fallback gpio.h
Create fallback gpio.h which only contains prototypes for gpio API.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Yoichi Yuasa
096633358c [MIPS] Add generic GPIO support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Adrian Bunk
4679258d52 [MIPS] Remove unused cpu_callout_map and num_booting_cpus()
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Adrian Bunk
9797cae3bf [MIPS] "extern inline" -> "static inline"
"extern inline" will have different semantics with gcc 4.3, and
"static inline" is correct here.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Yoichi Yuasa
e934c82657 [MIPS] remove unused definitions for Cobalt
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Junio C Hamano
bb53cfe9fa mips au1xxx_ide.h: use NULL as firmware-revision wildcard
This updates the DMA whitelist in MIPS specific au1xxx ide
driver to use NULL instead of "ALL" as the wildcard.

Signed-off-by: Junio C Hamano <junkio@cox.net>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-07-09 23:17:56 +02:00
Ralf Baechle
4b3e975e4a [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
fde97822a2 [MIPS] Add macros to encode processor revisions.
Older processors used to encode processor version and revision in two
4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
have switched to use the 8-bits as 3:3:2 bitfield with the last field as
the patch number.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
075c733e19 [MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR.
The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
opposes it being called that) where invalid instructions in the same
I-cache line worth of instructions being fetched may case spurious
exceptions.

The workaround for this was only enabled for E9000 cores; enable it also
for all RM7000-based platforms.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Andrew Sharp
5a19709590 [MIPS] 64-bit TO_PHYS_MASK macro for RM9000 processors
Signed-off-by: Andrew Sharp <tigerand@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:10 +01:00
Atsushi Nemoto
83d0f2332e [MIPS] Add whitelists for checksyscalls.sh
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04 15:53:16 +01:00
Maciej W. Rozycki
eaf2b8dca4 [MIPS] die(): Properly declare as non-returning
This marks the declaration of die() correctly, removing "control reaches
end of non-void function" warnings from non-void functions that die() at
the end.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04 15:53:15 +01:00
Kumba
ab012ebf9e [MIPS] Fix include wrapper symbol definitions in IP32 code.
Some IP35 defines snuck into some IP32-specific code during the DMA re-write.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04 15:53:15 +01:00
Ralf Baechle
2fae3731b1 [MIPS] SMTC and non-SMTC kernel and modules are incompatible
So don't allow mixing.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:34 +02:00
Atsushi Nemoto
8e09ffb60b [MIPS] Remove a duplicated local variable in test_and_clear_bit()
Fix a sparse warning caused by 2c921d07f8c641e691b0dfd80a5cfe14c60ec489

include2/asm/bitops.h:313:23: warning: symbol 'res' shadows an earlier one
include2/asm/bitops.h:309:16: originally declared here

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Pavel Kiryukhin
a76f3a417a [MIPS] use compat_siginfo in rt_sigframe_n32
Signed-off-by: Pavel Kiryukhin <vksavl@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
3b1d4ed535 [MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict.  So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-20 22:27:10 +01:00
Chris Dearman
b72c052622 [MIPS] Malta: Fix for SOCitSC based Maltas
And an attempt to tidy up the core/controller differences.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:14 +01:00
Ralf Baechle
ff72b7a618 [MIPS] Fix smp barriers in test_and_{change,clear,set}_bit
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:55 +01:00
Atsushi Nemoto
7a6d4f3874 [MIPS] Wire up utimensat, signalfd, timerfd, eventfd
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Maciej W. Rozycki
fbf6ede2ce [MIPS] Fix KMODE for the R3000
This must be the oldest bug that we have got.  Leaving interrupts "as
they are" for the R3000 obviously means copying IEp to IEc.  Since we have
got STATMASK now, I took this opportunity to mask the status register
"correctly" for the R3000 now too.  Oh, and the R3000 hardly ever is
64-bit.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Atsushi Nemoto
1fe5f2c450 [MIPS] Drop __ARCH_WANT_SYS_FADVISE64
sys_fadvise64() is not used on MIPS.  The libc can implement
both posix_fadvise() and posix_fadvise64() using sys_fadvise64_64().

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:32 +01:00
Chris Dearman
f9509c84d8 [MIPS] Remove duplicate fpu enable hazard code.
Use common code from hazards.h instead.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:31 +01:00
Ralf Baechle
79894c7b47 [MIPS] Atlas, Malta, SEAD: Remove scroll from interrupt handler.
Aside of being handy for debugging this has never been a particularly
good idea but is now getting in the way of dyntick / tickless kernels
and general cleanups.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:30 +01:00
Alexey Dobriyan
e8edc6e03a Detach sched.h from mm.h
First thing mm.h does is including sched.h solely for can_do_mlock() inline
function which has "current" dereference inside. By dealing with can_do_mlock()
mm.h can be detached from sched.h which is good. See below, why.

This patch
a) removes unconditional inclusion of sched.h from mm.h
b) makes can_do_mlock() normal function in mm/mlock.c
c) exports can_do_mlock() to not break compilation
d) adds sched.h inclusions back to files that were getting it indirectly.
e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were
   getting them indirectly

Net result is:
a) mm.h users would get less code to open, read, preprocess, parse, ... if
   they don't need sched.h
b) sched.h stops being dependency for significant number of files:
   on x86_64 allmodconfig touching sched.h results in recompile of 4083 files,
   after patch it's only 3744 (-8.3%).

Cross-compile tested on

	all arm defconfigs, all mips defconfigs, all powerpc defconfigs,
	alpha alpha-up
	arm
	i386 i386-up i386-defconfig i386-allnoconfig
	ia64 ia64-up
	m68k
	mips
	parisc parisc-up
	powerpc powerpc-up
	s390 s390-up
	sparc sparc-up
	sparc64 sparc64-up
	um-x86_64
	x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig

as well as my two usual configs.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21 09:18:19 -07:00
Linus Torvalds
0c4ea957c6 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-ip22
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-ip22:
  Convert SGI IP22 and specific drivers to platform_device.
2007-05-11 10:00:50 -07:00
Linus Torvalds
f2c60ed038 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits)
  [MIPS] Rework cobalt_board_id
  [MIPS] Use RTC_CMOS for Cobalt
  [MIPS] Use platform_device for Cobalt UART
  [MIPS] Separate Alchemy processor based boards config
  [MIPS] Fix build error in atomic64_cmpxchg
  [MIPS] Run checksyscalls for N32 and O32 ABI
  [MIPS] tlbex: use __maybe_unused
  [MIPS] excite: use __maybe_unused
  [MIPS] Add extern cobalt_board_id
  [MIPS] Remove unused CONFIG_TOSHIBA_BOARDS
  [MIPS] Rename tb0229_defconfig to tb0219_defconfig
  [MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219.
  [MIPS] Add minimum defconfig for RBHMA4200
  [MIPS] SB1: Build fix.
  [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno()
  [MIPS] clocksource: use CLOCKSOURCE_MASK() macro
  [MIPS] Remove LIMITED_DMA support
  [MIPS] Remove Momenco Jaguar ATX support
  [MIPS] Remove Momenco Ocelot G support
  [MIPS] FPU hazard handling
  ...
2007-05-11 09:59:50 -07:00
Ralf Baechle
df9f54084f Convert SGI IP22 and specific drivers to platform_device.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 17:00:29 +01:00
Stephen Rothwell
04dd08b45b Consolidate asm/poll.h
These files are almost all the same.

This patch could be made even simpler if we don't mind POLLREMOVE turning
up in a few architectures that didn't have it previously (which should be
OK as POLLREMOVE is not used anywhere in the current tree).

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11 08:29:34 -07:00
Atsushi Nemoto
7b239bb106 [MIPS] Fix build error in atomic64_cmpxchg
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:33 +01:00
Yoichi Yuasa
44320f2bcb [MIPS] Add extern cobalt_board_id
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:32 +01:00
Ralf Baechle
a1b53a7b22 [MIPS] SB1: Build fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Franck Bui-Huu
599ca0fb63 [MIPS] Remove LIMITED_DMA support
This code was needed only by Jaguar ATX.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Franck Bui-Huu
bef964e55a [MIPS] Remove Momenco Jaguar ATX support
It has some hackish code and it odd DMA results in the need to support
old features in kernel code.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Franck Bui-Huu
1e54f778af [MIPS] Remove Momenco Ocelot G support
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00