Add debounce support for ep93xx gpio interrupts.
On the EP93xx, GPIO ports A, B, and F can be used to generate
interrupts. For each port, if interrupts are enabled, it is
possible to debouce the input signal. Debouncing is implemented
by passing the input signal through a 2-bit shift register clocked
by a 128Hz clock.
This patch adds a platform specific way to enable the debouce
feature for these input ports.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the ep93xx platform init code to register the built-in i2c bus.
The EP93xx processor has two GPIO pins dedicated for an I2C bus. This
patch registers the platform supplied i2c_board_info and the necessary
platform_device information for the i2c-gpio driver to use these pins.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add Cirrus Logic EDB9307A Dev Board to arch/arm/mach-ep93xx
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
This patch adds the detection routines to recognize the different
AT91CAP9 revisions (based on the PMC subsystem version number), and
uses them to:
- activate a workaround for the external interrupts levels
(on revB CPUs)
- set the UDPHS_BYPASS bit (on revB CPUs)
- set AT91_GPBR register address to the correct offset
(0xfffffd50 on revB, 0xfffffd60 on revC)
For debugging usage, the CPU revision can be found in /proc/cpuinfo
on the 'Revision' line.
This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch)
where it has been tested for the last 6 months.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the Adeneo NeoCore 926 board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert the SAM9 and CAP9 board-specific files to make use of the
sam9_smc_configure() method to configure the memory-controller for
external peripherals.
The following boards have been modified:
cam60 : NAND
cap9adk : NAND, NOR
qil-a9260 : NAND
sam9-l9260 : NAND
sam9260ek : NAND
sam9261ek : DM9000 Ethernet, NAND
sam9263 : NAND
sam9g20ek : NAND
sam9rlek : NAND
usb-a9260 : NAND
usb-a9263 .: NAND
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In at91_add_device_nand(), do not configure the Static Memory
controller with specific timing values.
The *_devices.c files are board independent, and the SMC timing values
are specific to the NAND devices that are installed on the board.
The board-specific files are now responsible for configuring the
Static Memory controller (if the don't want to leave it up to a
bootloader).
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a structure 'sam9_smc_config' and function sam9_smc_configure() to
allow the board-specific files to specify the configuration of the
Static Memory Controller per chip-select. This allows the board file
to specify timings for NAND flash, NOR flash or other external
peripherals.
This functionality can be used for all the SAM9 and CAP9 processors.
(the AT91RM9200 has a different memory-controller)
This patch is based on similar code in the AVR32 architecture.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This seems to be missing from the arm:devel branch, though the other
RealView configurations were modified accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.19-rc3. Apart from the new symbols,
the explicitly enabled eatures are AEABI, REALVIEW_HIGH_PHYS_OFFSET and
MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.14-rc2. Apart from the new symbols,
the explicitly enabled features are AACI, MMC, AEABI,
MACH_REALVIEW_PB1176 and MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds smc911x.c device configuration to the RealView
platforms. At some point it may be changed to the new smsc911x.c driver
(once complete testing was done).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch moves the Ethernet device registration from individual
realview_*.c files to core.c.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Some of the calls weren't necessary and some others were duplicated.
This patch tidies up the platsmp.c file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
All the cases where the local timer for a CPU is accessed happen on the
corresponding current CPU, hence no need to access the per-CPU local
timer mappings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds the necessary definitions and Kconfig entries to enable
Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.
Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The MCR for flushing the whole D cache is undefined on ARMv7 CPUs.
Signed-off-by: Harry Fearnhamm <Harry.Fearnhamm@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds support for RealView/PB-A8, a platform based on
Cortex-A8 with support for PCI-E and compact flash.
Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
RealView boards like PB11MPCore have 512MB of RAM available contiguously
at 0x70000000. Half of the memory is mirrored at 0x00000000 for
backwards compatibility. This patch adds the
CONFIG_REALVIEW_HIGH_PHYS_OFFSET option option to change the physical
base address so that the full amount of RAM is available to Linux. Note
that the EB board has 256MB of RAM also mirrored at 0x70000000, the only
board without this feature being PB1176.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Update to use the asm/sections.h header rather than declaring these
symbols ourselves. Change __data_start to _data to conform with the
naming found within asm/sections.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
lh7a40x only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
aaec2000 only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Both of these symbols should be defined by a platform, or neither
should be defined. Ensure that all platforms conform.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
RiscPC is the only platform using the default setting for NR_IRQS,
so the default NR_IRQS doesn't really make sense; remove it and
make RiscPC provide such a definition.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since 8d5796d2ec, we have allowed
PAGE_OFFSET to be configurable, so a constant virtual address
for MAX_DMA_ADDRESS is buggy. It should be defined in terms of
PAGE_OFFSET rather than a constant virtual address.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ixp23xx's mach/io.h claims to need linux/kernel.h for BUG().
However, this header doesn't make use of BUG().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/timex.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h, mach/memory.h and mach/timex.h. Include
this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Let's provide an overridable default instead of having every machine
class define __virt_to_bus and __bus_to_virt to the same thing. What
most platforms are using is bus_addr == phys_addr so such is the default.
One exception is ebsa110 which has no DMA what so ever, so the actual
definition is not important except only for proper compilation. Also
added a comment about the special footbridge bus translation.
Let's also remove comments alluding to set_dma_addr which is not
(and should not) be commonly used.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There is no machine class overriding this. If non linear translations
are implemented again for some machines then this could be restored at
that time.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The restriction on !CONFIG_HIGHMEM is unneeded since page tables are
currently never allocated with highmem pages, and actually disable PTE
dump whenever highmem is configured. Let's have a dynamic test to better
describe the current limitation instead.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 8d5796d2ec allows for the vmalloc
area to be resized from the kernel cmdline. Make sure it cannot overlap
with RAM entirely.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make free_area() arguments pfn based, and return number of freed pages.
This will simplify highmem initialization later.
Also, codepages, datapages and initpages are actually codesize, datasize
and initsize.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Doing so will greatly simplify the bootmem initialization code as each
bank is therefore entirely lowmem or highmem with no crossing between
those zones.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently there are two instances of struct meminfo: one in
kernel/setup.c marked __initdata, and another in mm/init.c with
permanent storage. Let's keep only the later to directly populate
the permanent version from arm_add_memory().
Also move common validation tests between the MMU and non-MMU cases
into arm_add_memory() to remove some duplication. Protection against
overflowing the membank array is also moved in there in order to cover
the kernel cmdline parsing path as well.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In all cases the kaddr is assigned an input register even though it is
modified in the assembly code. Let's assign a new variable to the
modified value and mark those inline asm with volatile otherwise they
get optimized away because the output variable is otherwise not used.
Also fix a few conversion errors in copypage-feroceon.c and
copypage-v4mc.c.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For similar reasons as copy_user_page(), we want to avoid the
additional kmap_atomic if it's unnecessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We used to override the copy_user_page() function. However, this
is not only inefficient, it also causes additional complexity for
highmem support, since we convert from a struct page to a kernel
direct mapped address and back to a struct page again.
Moreover, with highmem support, we end up pointlessly setting up
kmap entries for pages which we're going to remap. So, push the
kmapping down into the copypage implementation files where it's
required.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Continuing the move away from implementations which give an excuse
for other bad implementations, convert SA1100 to lookup its singular
clock by dev_name(dev) rather than by id.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Where devices only have one consumer, passing a consumer clock ID
has no real benefit. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
People often point to the Integrator/Versatile/Realview
implementations to justify using the consumer name as the sole
selector for clocks.
Eliminate this excuse by changing the Versatile implementation, so
it provides a better example of how it should be done.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
People often point to the Integrator/Versatile/Realview
implementations to justify using the consumer name as the sole
selector for clocks.
Eliminate this excuse by changing the Integrator implementation, so
it provides a better example of how it should be done.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
People often point to the Integrator/Versatile/Realview
implementations to justify using the consumer name as the sole
selector for clocks.
Eliminate this excuse by changing the Realview implementation, so
it provides a better example of how it should be done.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The CLPS7500 platform has not built since 2.6.22-git7 and there
seems to be no interest in fixing it. So, remove the platform
support.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than:
config CPU_BLAH
bool
depends on ARCH_FOO || MACH_BAR
default y if ARCH_FOO || MACH_BAR
arrange for ARCH_FOO and MACH_BAR to select CPU_BLAH directly.
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Acked-by: Brian Swetland <swetland@google.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As suggested by Andrew Morton, remove memzero() - it's not supported
on other architectures so use of it is a potential build breaking bug.
Since the compiler optimizes memset(x,0,n) to __memzero() perfectly
well, we don't miss out on the underlying benefits of memzero().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use the correct wake-up enable register, and make it
work with 34xx also.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
0 is a valid GPIO number, use a negative number to specify, that this camera
doesn't have a GPIO for bus-width switching.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The second clk_deny_idle instance should be clk_allow_idle instead.
Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The G3IPL expects the value at RAM address 0xa020b020 to be
exactly 1 to setup the bluetooth GPIOs properly. The actual
code got a value from gpio_get_value() which was not 1, but
a "not equal to 0" integer.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
In the resume bootstrap, the early disable address is wrong.
Fix it to RAM address 0xa020b000 instead of 0xa0200000, and
make it consistent with RESUME_ENABLE_ADDR in mioa701.c.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch makes do_hw_reset the default reboot behavior when nothing
else matches. This restores reboot functionality on gumstix basix
devices where reboot=cold is the default boot argument.
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The original incorrect configuration caused GPIO79_nCS_3 being overriden,
thus resulted in the NAND flash not being detected. The real PSKTSEL pin
is on GPIO104 instead of GPIO79.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
FLASH_* and EPROM_* constants are unused, and clash with drivers:
drivers/atm/ambassador.h:257:1: warning: "FLASH_BASE" redefined
drivers/atm/ambassador.h:258:1: warning: "FLASH_SIZE" redefined
drivers/atm/iphase.h:332:1: warning: "EPROM_SIZE" redefined
so remove them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/dma-mapping.c: In function `dma_sync_sg_for_cpu':
arch/arm/mm/dma-mapping.c:588: warning: statement with no effect
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that the critical read back to flush the next descriptor address is
fixed we can downgrade some BUG_ONs that need only be enabled when testing
changes to the driver.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Since WFI may cause the processor to enter a low-power mode, data may
still be in the write buffer. This patch adds a DSB (or DWB) to the
cpu_(v6|v7)_do_idle functions before the WFI.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Since boards like PB11MPCore have 512MB of RAM and 128MB of flash, the
virtual space is short on vmalloc memory and mapping the flash fails.
This patch changes the IO_ADDRESS so that static mappings start at
0xfc000000 and moves the PCI virtual addresses higher up. The new
VMALLOC_END is set to 0xf8000000 (512MB higher than the old value).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The UART0 address is different on PB1176 from EB or PB11MPCore. This
patch adds the necessary #ifdef's to this file. The disadvantage is
that enabling CONFIG_DEBUG_LL will work properly on PB1176 if only
this platform is enabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds another clcd_panel structure for the above resolution
and makes it the default for the PB1176 and PB11MPCore platforms.
Signed-off-by: Colin Tuckley <Colin.Tuckley@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
On PB1176, oscillator 0 rather than 4 should be used.
Signed-off-by: Colin Tuckley <colin.tuckley@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Mikael Pettersson reported:
The 2.6.28-rc kernels fail to detect PCI device 0000:00:01.0
(the first ethernet port) on my Thecus n2100 XScale box.
There is however still a strange "ghost" device that gets partially
detected in 2.6.28-rc2 vanilla.
The IOP321 manual says:
The user designates the memory region containing the OCCDR as
non-cacheable and non-bufferable from the IntelR XScaleTM core.
This guarantees that all load/stores to the OCCDR are only of
DWORD quantities.
Ensure that the OCCDR is so mapped.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Same fix as commit c7cf72dcad: when 'start' and 'end' are less than a
cacheline apart and 'start' is unaligned we are done after cleaning and
invalidating the first cacheline.
Cc: <stable@kernel.org>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When 'start' and 'end' are less than a cacheline apart and 'start' is
unaligned we are done after cleaning and invalidating the first
cacheline. So check for (start < end) which will not walk off into
invalid address ranges when (start > end).
This issue was caught by drivers/dma/dmatest.
2.6.27 is susceptible.
Cc: <stable@kernel.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Lothar WaÃ<9f>mann <LW@KARO-electronics.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
As a result of the ptebits changes, we ended up marking device mappings
as normal memory on ARMv7 CPUs, resulting in undesirable behaviour with
serial ports and the like. While reviewing the section mapping table
entries, other errors in the memory type settings for devices were
detected and confirmed to prevent Xscale3 platforms booting.
Tested on:
OMAP34xx (ARMv7),
OMAP24xx (ARMv6),
OMAP16xx (ARM926T, ARMv5),
PXA311 (Xscale3),
PXA272 (Xscale),
PXA255 (Xscale),
IXP42x (Xscale),
S3C2410 (ARM920T, ARMv4T),
ARM720T (ARMv4T)
StrongARM-110 (ARMv4)
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Mike Rapoport <mike@compulab.co.il>
Tested-by: Ben Dooks <ben-linux@fluff.org>
Tested-by: Anders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As of 73bdf0a60e, the kernel needs
to know where modules are located in the virtual address space.
On ARM, we located this region between MODULE_START and MODULE_END.
Unfortunately, everyone else calls it MODULES_VADDR and MODULES_END.
Update ARM to use the same naming, so is_vmalloc_or_module_addr()
can work properly. Also update the comment on mm/vmalloc.c to
reflect that ARM also places modules in a separate region from the
vmalloc space.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the SMP/nAMP mode setting to __v7_setup and also sets
TTBR to shared page table walks if SMP is enabled. The PTWs are also
marked inner cacheable for both SMP and UP modes (setting this is fine
even if the CPU doesn't support the feature).
Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
In case of non-aliasing VIPT caches, there is no need to flush the whole
cache when new mapping is created. The patch introduces this condition
check. In the non-aliasing VIPT case flush_cache_vmap() needs a DSB
since the set_pte_at() function called from vmap_pte_range() does not
have such barrier (done usually via TLB flushing functions).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
On ARMv7, conditional undefined instructions may generate exceptions
even if the condition is not met. The vfphw.S contains the FPINST and
FPINST2 access instructions which may not be present on processors with
synchronous VFP exceptions.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The flush_cache_all function on ARMv7 is implemented as a series of
cache operations by set/way. These are not guaranteed to be ordered with
previous memory accesses, requiring a DMB. This patch also adds barriers
for the TLB operations in compressed/head.S
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
On omap24xx, INTCPS_SIR_IRQ_OFFSET bits [6:0] contains the current
active interrupt number.
However, on 34xx INTCPS_SIR_IRQ_OFFSET bits [31:7] also contains the
SPURIOUSIRQFLAG, which gets set if the interrupt sorting information
is invalid.
If the SPURIOUSIRQFLAG bits are not ignored, the interrupt code will
occasionally produce a bunch of confusing errors:
irq -33, desc: c02ddcc8, depth: 0, count: 0, unhandled: 0
->handle_irq(): c006f23c, handle_bad_irq+0x0/0x22c
->chip(): 00000000, 0x0
->action(): 00000000
Fix this by masking out only the ACTIVEIRQ bits. Also fix a
confusing comment.
Signed-off-by: Tony Lindgren <tony@atomide.com>
debugfs_create_*() returns NULL if an error occurs, returns -ENODEV
when debugfs is not enabled in the kernel.
Comparing to PATCH v1, because clk_debugfs_init is included in
"#if defined CONFIG_DEBUG_FS", we only need to check NULL return.
Thanks Li Zefan <lizf@cn.fujitsu.com>
debugfs_create_u8() and other function's return value's checking method are
also fixed in this patch.
Signed-off-by: Zhao Lei <zhaolei@cn.fujitsu.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix these compiler warnings:
gpmc.c: In function 'gpmc_init':
gpmc.c:432: warning: 'return' with a value, in function returning void
gpmc.c:439: warning: 'return' with a value, in function returning void
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2.6.28-rc tightened up the ELF architecture checks on ARM. For
non-EABI it only allows VFP if the hardware supports it. However,
the kernel fails to also inspect the soft-float flag, so it
incorrectly rejects binaries using soft-VFP.
The fix is simple: also check that EF_ARM_SOFT_FLOAT isn't set
before rejecting VFP binaries on non-VFP hardware.
Acked-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
i2c_board_info array was filled incorrectly.
Due to circumstances, the way it is filled works.
This patch fills array properly.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mx31ads_defconfig compilation failed with
arch/arm/mach-mx3/mx31ads.c: In function 'mxc_init_imx_uart':
arch/arm/mach-mx3/mx31ads.c:102: error: 'mxc_uart_device0' undeclared (first use in this function)
arch/arm/mach-mx3/mx31ads.c:102: error: (Each undeclared identifier is reported only once
arch/arm/mach-mx3/mx31ads.c:102: error: for each function it appears in.)
make[1]: *** [arch/arm/mach-mx3/mx31ads.o] Error 1
Add missing include
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Data register holds the value we have written to a gpio. To
get the input value we must read the Pad Status Register MX3 (or Sample
Status register in MX1/2 terms)
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The internal devices of the MX3 Processor have to be mapped
MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the documentation gpio_free should only be called from task
context only. To make this more explicit add a might sleep to all
implementations.
This patch changes the gpio_free implementations for the arm architecture.
DaVinci is skipped on purpose to simplify the merge process for patches
switching it over to use gpiolib as per request by David Brownell.
Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix compilation of sharpsl_pm when CONFIG_PM in unselected.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Move mci.h to new position in arch/arm/plat-s3c24xx/include/plat
ready to clean out old include directories.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move plat/regs-spi.h to arch/arm/plat-s3c/include/plat ready
ready to clean out old include directories.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the udc headers to the proper home in
arch/arm/plat-s3c24xx/include/plat ready to clean out
the old include directories.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The internal devices of the MX3 Processor have to be mapped
MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
corgi_lcd has symbol conflict with corgi_bl driver.
Fix it by renaming common symbol in new corgi_lcd driver.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Commit 40df2d1d "[ARM] Update Xscale and Xscale3 PTE mappings" was
fingered by git-bisect for a boot failure on iop13xx. The change made
L_PTE_MT_WRITETHROUGH mappings L2-uncacheable. Russell points out that
this mapping is used for the vector page. Given the regression, and the
fact this page is used often, restore the old behaviour.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] pxa: corgi backlight driver should not select ssp drivers
[ARM] 5321/1: Kirkwood: fix typo in Makefile
[ARM] 5320/1: fix assembly constraints in implementation of do_div()
[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.S
[ARM] 5316/1: AT91: oops (regression) fix on gpio irq
[ARM] msm: vreg interface to msm7k pmic
[ARM] msm: dma: various basic dma improvements and bugfixes
[ARM] msm: clock: provide clk_*() api support for
[ARM] msm: clean up iomap and devices
[ARM] msm: add proc_comm support, necessary for clock and power control
[ARM] msm: rename ARCH_MSM7X00A to ARCH_MSM
[ARM] pxa/spitz: fix unbalance parenthesis in header file spitz.h
[ARM] pxa: update {corgi,spitz}_defconfig to favor SPI-based drivers
[ARM] pxa: fix the corgi_ssp.c dependency issue in {corgi,spitz}_defconfig
Revert "[ARM] pxa/corgi: remove now unused corgi_ssp.c and corgi_lcd.c"
* 'for-linus' of git://git.o-hand.com/linux-rpurdie-backlight:
backlight: Add driver for Tabletkiosk Sahara TouchIT-213 Tablet PC
backlight: da903x: Add backlight driver for DA9030/DA9034
tosa: add support for bl/lcd driver
backlight: add support for Sharp SL-6000 LCD and backlight drivers
* 'for-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/dvrabel/uwb: (47 commits)
uwb: wrong sizeof argument in mac address compare
uwb: don't use printk_ratelimit() so often
uwb: use kcalloc where appropriate
uwb: use time_after() when purging stale beacons
uwb: add credits for the original developers of the UWB/WUSB/WLP subsystems
uwb: add entries in the MAINTAINERS file
uwb: depend on EXPERIMENTAL
wusb: wusb-cbaf (CBA driver) sysfs ABI simplification
uwb: document UWB and WUSB sysfs files
uwb: add symlinks in sysfs between radio controllers and PALs
uwb: dont tranmit identification IEs
uwb: i1480/GUWA100U: fix firmware download issues
uwb: i1480: remove MAC/PHY information checking function
uwb: add Intel i1480 HWA to the UWB RC quirk table
uwb: disable command/event filtering for D-Link DUB-1210
uwb: initialize the debug sub-system
uwb: Fix handling IEs with empty IE data in uwb_est_get_size()
wusb: fix bmRequestType for Abort RPipe request
wusb: fix error path for wusb_set_dev_addr()
wusb: add HWA host controller driver
...
The arch dependent function ftrace_mcount_set was only used by the daemon
start up code. This patch removes it.
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The ftrace daemon is complex and can cause nasty races if something goes
wrong. Since it affects all of the kernel, this patch disables dynamic
ftrace from any arch that depends on the daemon. Until the archs are
ported over to the new MCOUNT_RECORD method, I am disabling dynamic
ftrace from them.
Note: I am leaving in the arch/<arch>/kernel/ftrace.c code alone since
that can be used when the arch is ported to MCOUNT_RECORD. To port
the arch to MCOUNT_RECORD, the scripts/recordmcount.pl needs to be
updated. I will make that easier to do for 2.6.29. For 28, we will keep
the archs disabled.
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Those inline assembly segments using the umlal instruction must have
the & modifier so to be sure that a purely input register won't alias
one of the registers used as input+output. In most cases, the inputs
are still used after the outputs are touched, and most binutil versions
insist on "rdhi, rdlo and rm must all be different" even for ARMv6+.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A typo caused these values to be swapped leading to incorrect memory
type attributes.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
From: David Brownell <dbrownell@users.sourceforge.net>
The "5298/1: Drop desc_handle_irq()" patch went overboard
and deleted an essential line of code, causing all AT91
GPIO interrupts to oops (in irq). Trimmed example:
Unable to handle kernel NULL pointer dereference at virtual address 000000c4
...
PC is at gpio_irq_handler+0x78/0xd0
LR is at gpio_irq_handler+0x38/0xd0
...
Backtrace:
[<c0029884>] (gpio_irq_handler+0x0/0xd0) from [<c0020054>] (__exception_text_start+0x54/0x7c)
[<c0020000>] (__exception_text_start+0x0/0x7c) from [<c00209ec>] (__irq_svc+0x2c/0x60)
Exception stack(0xc1c1de00 to 0xc1c1de48)
[<c01f4ca8>] (_spin_unlock_irq+0x0/0x3c) from [<c01389f8>] (at91ether_open+0x220/0x318)
[<c01387d8>] (at91ether_open+0x0/0x318) from [<c018caa4>] (dev_open+0xa8/0x10c)
[<c018c9fc>] (dev_open+0x0/0x10c) from [<c018b874>] (dev_change_flags+0x98/0x164)
[<c018b7dc>] (dev_change_flags+0x0/0x164) from [<c0019f8c>] (ip_auto_config+0x164/0xe28)
[<c0019e28>] (ip_auto_config+0x0/0xe28) from [<c0020318>] (__exception_text_end+0x60/0x180)
[<c00202b8>] (__exception_text_end+0x0/0x180) from [<c0008738>] (kernel_init+0x70/0xd8)
[<c00086c8>] (kernel_init+0x0/0xd8) from [<c00398e0>] (do_exit+0x0/0x6ac)
This patch restores the missing line'o'code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The baseband cpu owns the pmic, so voltage regulator control is only
available via a relatively limited interface through the proc_comm
transport.
Signed-off-by: Brian Swetland <swetland@google.com>
San:
- Propagate DM errors to the originator of the request.
- Implement msm_dmov_stop_cmd()
- Add return value to init code
- Modify msm_dmov_stop_cmd() to support ungraceful flushing
Arve:
- Disable datamover interrupt when not in use.
We turn off the interrrupt to allow power collapse from idle.
Signed-off-by: San Mehat <san@android.com>
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Signed-off-by: Brian Swetland <swetland@google.com>
- Add some more peripherals (sdcc, etc) to the iomap.
- Remove virtual base addresses for devices that we should be passing
physical addresses to drivers via resources and ioremap()ing.
- don't try to use uarts for ll debug once the mmu is enabled due to
problems with the peripheral window
- make base addresses void __iomem * and fixup irq.c and timer.c
- Remove common.c and bring in devices.c/devices.h similar to
the PXA architecture.
Signed-off-by: Brian Swetland <swetland@google.com>
The proc_comm protocol is the lowest level protocol available for
communicating with the modem core. It provides access to clock and
power control, among other things, and is safe for use from atomic
contexts, unlike the higher level SMD and RPC transports.
Signed-off-by: Brian Swetland <swetland@google.com>
The MSM architecture covers a wider family of chips than just the MSM7X00A.
Move to a more generic name, in perparation for supporting the specific
SoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc). This
gives us ARCH_MSM for the (many) common peripherals.
This also removes the unused/obsolete config item MSM7X00A_IDLE.
Signed-off-by: Brian Swetland <swetland@google.com>
This patch fixes the section mismatch warning from
sa1111.o at buildtime.
CC arch/arm/common/sa1111.o
LD arch/arm/common/built-in.o
LD vmlinux.o
MODPOST vmlinux.o
WARNING: vmlinux.o(.text+0x87f4): Section mismatch in reference from the function sa1111_probe() to the function .devinit.text:sa1110_mb_enable()
The function sa1111_probe() references
the function __devinit sa1110_mb_enable().
This is often because sa1111_probe lacks a __devinit
annotation or the annotation of sa1110_mb_enable is wrong.
Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Recent changes have been made to use the generic SPI-based ads7846
touch screen driver and a generic SPI-based corgi-type LCD/backlight
driver. Update the {corgi,spitz}_defconfig to favor the use of these
drivers instead of the legacy ones.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Separate building of corgi_ssp.c, and introduce a new hidden config option
CONFIG_CORGI_SSP_DEPRECATED for this. Aslo mark corgi_ts.c and corgi_bl.c
as deprecated.
This unbreaks the legacy configs in {corgi,spitz}_defconfig, however, SPI
based ADS7846 touchscreen driver and a new SPI-based corgi_lcd.c driver
with integrated backlight support are recommended.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This reverts commit 68677ab3d0.
A smoother migration path would be making corgi_ts.c and other drivers
depending on corgi_ssp.c and corgi_lcd.c to depend on BROKEN instead,
and still allows those to exist around for some time.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
On Sharp SL-6000 lcd/backlight is a bit complex, so add two drivers
one for lcd-driving chip, other one for dac regulating the backlight
LEDS.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu
and x86/uv.
The sparseirq branch is just preliminary groundwork: no sparse IRQs are
actually implemented by this tree anymore - just the new APIs are added
while keeping the old way intact as well (the new APIs map 1:1 to
irq_desc[]). The 'real' sparse IRQ support will then be a relatively
small patch ontop of this - with a v2.6.29 merge target.
* 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits)
genirq: improve include files
intr_remapping: fix typo
io_apic: make irq_mis_count available on 64-bit too
genirq: fix name space collisions of nr_irqs in arch/*
genirq: fix name space collision of nr_irqs in autoprobe.c
genirq: use iterators for irq_desc loops
proc: fixup irq iterator
genirq: add reverse iterator for irq_desc
x86: move ack_bad_irq() to irq.c
x86: unify show_interrupts() and proc helpers
x86: cleanup show_interrupts
genirq: cleanup the sparseirq modifications
genirq: remove artifacts from sparseirq removal
genirq: revert dynarray
genirq: remove irq_to_desc_alloc
genirq: remove sparse irq code
genirq: use inline function for irq_to_desc
genirq: consolidate nr_irqs and for_each_irq_desc()
x86: remove sparse irq from Kconfig
genirq: define nr_irqs for architectures with GENERIC_HARDIRQS=n
...
Due to confusion between the ftrace infrastructure and the gcc profiling
tracer "ftrace", this patch renames the config options from FTRACE to
FUNCTION_TRACER. The other two names that are offspring from FTRACE
DYNAMIC_FTRACE and FTRACE_MCOUNT_RECORD will stay the same.
This patch was generated mostly by script, and partially by hand.
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
* 'for-next' of git://git.o-hand.com/linux-mfd:
mfd: further unbork the ucb1400 ac97_bus dependencies
mfd: ucb1400 needs GPIO
mfd: ucb1400 sound driver uses/depends on AC97_BUS:
mfd: Don't use NO_IRQ in WM8350
mfd: update TMIO drivers to use the clock API
mfd: twl4030-core irq simplification
mfd: add base support for Dialog DA9030/DA9034 PMICs
mfd: TWL4030 core driver
mfd: support tmiofb cell on tc6393xb
mfd: add OHCI cell to tc6393xb
mfd: Fix htc-egpio compile warning
mfd: do tcb6393xb state restore on resume only if requested
mfd: provide and use setup hook for tc6393xb
mfd: update sm501 debugging/low information messages
mfd: reduce stack usage in mfd-core.c
* git://git.infradead.org/mtd-2.6: (69 commits)
Revert "[MTD] m25p80.c code cleanup"
[MTD] [NAND] GPIO driver depends on ARM... for now.
[MTD] [NAND] sh_flctl: fix compile error
[MTD] [NOR] AT49BV6416 has swapped erase regions
[MTD] [NAND] GPIO NAND flash driver
[MTD] cmdlineparts documentation change - explain where mtd-id comes from
[MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection
[MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c
[JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash
[MTD] mtdoops: Fix a bug where block may not be erased
[MTD] mtdoops: Add a magic number to logged kernel oops
[MTD] mtdoops: Fix an off by one error
[JFFS2] Correct parameter names of jffs2_compress() in comments
[MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL
[MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written
[MTD] [MAPS] Remove unused variable after ROM API cleanup.
[MTD] m25p80.c extended jedec support (v2)
[MTD] remove unused mtd parameter in of_mtd_parse_partitions()
[MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE
[MTD] [NAND] driver extension to support NAND on TQM85xx modules
...
This patch implements a new freezer subsystem in the control groups
framework. It provides a way to stop and resume execution of all tasks in
a cgroup by writing in the cgroup filesystem.
The freezer subsystem in the container filesystem defines a file named
freezer.state. Writing "FROZEN" to the state file will freeze all tasks
in the cgroup. Subsequently writing "RUNNING" will unfreeze the tasks in
the cgroup. Reading will return the current state.
* Examples of usage :
# mkdir /containers/freezer
# mount -t cgroup -ofreezer freezer /containers
# mkdir /containers/0
# echo $some_pid > /containers/0/tasks
to get status of the freezer subsystem :
# cat /containers/0/freezer.state
RUNNING
to freeze all tasks in the container :
# echo FROZEN > /containers/0/freezer.state
# cat /containers/0/freezer.state
FREEZING
# cat /containers/0/freezer.state
FROZEN
to unfreeze all tasks in the container :
# echo RUNNING > /containers/0/freezer.state
# cat /containers/0/freezer.state
RUNNING
This is the basic mechanism which should do the right thing for user space
task in a simple scenario.
It's important to note that freezing can be incomplete. In that case we
return EBUSY. This means that some tasks in the cgroup are busy doing
something that prevents us from completely freezing the cgroup at this
time. After EBUSY, the cgroup will remain partially frozen -- reflected
by freezer.state reporting "FREEZING" when read. The state will remain
"FREEZING" until one of these things happens:
1) Userspace cancels the freezing operation by writing "RUNNING" to
the freezer.state file
2) Userspace retries the freezing operation by writing "FROZEN" to
the freezer.state file (writing "FREEZING" is not legal
and returns EIO)
3) The tasks that blocked the cgroup from entering the "FROZEN"
state disappear from the cgroup's set of tasks.
[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: export thaw_process]
Signed-off-by: Cedric Le Goater <clg@fr.ibm.com>
Signed-off-by: Matt Helsley <matthltc@us.ibm.com>
Acked-by: Serge E. Hallyn <serue@us.ibm.com>
Tested-by: Matt Helsley <matthltc@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
As requested by Ian make state restore only if it's requested
by platform data: some platforms do correctly save the state of
the chip during suspend/resume, but some (like tosa) incorrectly
power off the chip at suspend, so the driver supports restoring
some bits of the tc6393xb state (not full, merely enough to support
resume on tosa). With this patch this code is disabled by default.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
Instead of using bitfields for initial gpio setup,
provide generic setup/teardown hooks that can be used
to set the gpio states, register child devices, etc.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
Commit 2ede90ca78500ca0ffeee19d7812d345f8ad152d adds 6183 support,
but the SPI support in there doesn't work since it depends on a
6183 SPI unit erratum fix that only just went upstream, via commit
2bec19feab.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This adds DSA switch instantiation hooks to the orion5x and the
kirkwood ARM SoC platform code, and instantiates the DSA switch
driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE
RD, the Linksys WRT350n v2, and the 88F6281 RD boards.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
On the mv78xx0 development board, eth2 and eth3 do not have
corresponding PHYs, but are internally connected, as a way of
facilitating communication between the two CPU cores. Since there are
no PHYs, we need to tell the network driver explicitly to force the
link on eth2 and eth3 up, to 1000 Mb/s full duplex.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
