Currently, Orion window setup uses hardcoded window indexes for each
of the boot/cs0/cs1/cs2/PCIe WA windows. The static window allocation
used can clash if board support code will ever attempt to configure
both a dev2 and a PCIe WA window, as both of those use CPU mbus window
#7 at present.
This patch keeps track of the last used window, and opens subsequently
requested windows sequentially, starting from 4. (Windows 0-3 are used
as MEM/IO windows for the PCI/PCIe buses.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
This patch cleans up Orion's addr-map.c a bit after all peripheral
window programming code has been moved out into the relevant drivers.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Make the Orion 5x platform code use the mbus window handling code
that's in the mv643xx_eth driver, instead of programming the GigE
block's mbus window registers by hand.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e.
not the plat-orion bits.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
