Fix the name of the driver, as well as the fact we are not
passing the number of chipselects to the driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A common core driver for the S3C24XX ADC block so that
the touchscreen, hwmon and any other drivers can share
the resource.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Changes made as suggested by Eric Miao (including fix to map_io
silly mistake!).
Originally designed by Intel, now sold by Crossbow (www.xbow.com).
Very little actually on board. The patch includes sensors and
similar as found on commonly occurring daughter boards.
Some of the drivers are not in mainline as yet as they are either
part of the IIO subsystem or need a lot of work before submission.
What is the position wrt to putting them in i2c board configs etc?
Support for these boards has been maintained outside the kernel
for a long time, but now that there is a good da9030 pmic driver
available the last major hurdle no longer exists.
All comments welcomed.
The Imote2's big brother (stargate2) will follow once any problems
with this one have been cleaned up and a few bits and bobs have
been added to the da903x driver. Hopefully the cc2420 driver will
get cleaned up and submitted in the not too distant future as
well.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
I2C platform data setups.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Matrix and single key setups for all phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Pin configs for different generations and phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Our bootloader now supports ATAGS_MEM
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Some smart panel requires a delay between command sequences, while PXA
LCD controller didn't provide such one, let's emulate this by software.
A software delay marker can be inserted into the command sequence, once
pxafb_smart_queue() detects this, it flushes the previous commands and
delay for a specified number of milliseconds.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
For smart panels (LCD panel with internal framebuffer), the following
LCCR3 register bits have different meanings than the parallel one:
LCCR3_PCP - controls the L_PCLK_WR polarity
LCCR3_HSP - controls the L_LCLK_A0 polarity
LCCR3_VSP - controls the L_FCLK_RD polarity
To keep minimum change to the original parallel timing, the .lcd_conn
flags and 'pxafb_mode_info.sync' are re-used to reflect this:
LCD_PCLK_EDGE_{RISE,FALL} - configures LCCR3_PCP
sync & FB_SYNC_{HOR,VERT}_HIGH_ACT - configures LCCR3_{HSP,VSP}
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds MX1 architecture to platform MXC. It will supersede mach-imx
and let it die.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix GIUS register setup in the mxc_gpio_mode().
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Initial support for mx31moboard platfor with 3 serial ports
and NOR Flash
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pins definition for UART5 when used in alternate mode 2
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
UART2 pins when used in functionnal mode
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic support to the MX31PDK development board, also known
as MX31 3DS or MX31 3-stack board (http://www.freescale.com/imx31pdk).
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: sascha Hauer <s.hauer@pengutronix.de>
The pcm038 module (phyCORE-i.MX27) comes with a 512 KiB static RAM which
can be battery buffered. Add mtd_ram support and configure the chip select
line, to which the sram is attached.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_iomux_set_pad() is buggy on i.MX31 - it calculates the register and
the offset therein wrongly. Fix it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most
of them are unused, so simplify the function by removing the flags. Also,
instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function
having alloc in its name, add a mxc_gpio_release_multiple_pins function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EMMA (Enhanced Multimedia Engine) is divided into two parts, the
postprocessor and the preprocessor. Fix the base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This one updates DMA support on MX2 which got broken in:
[ARM] Hide ISA DMA API when ISA_DMA_API is unset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a configuration option to start the UART FIFOs during the
decompressions sequence to improve boot time when the bootloader
fails to enable the UART FIFOs.
For example, the SMDK6410 UBoot 1.1.6 leaves the FIFOs off.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Select the correct EINT configuration register when configuring
the external interrupt level/edge type.
Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: description improvement]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the initialisation of the fifo data in the uncompression serial
routines to ensure that if the FIFO is enabled, that the serial output
is not corrupted.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: edit description to add more detail]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX timer is running at the wrong rate due to the
assumptions made in the timer initialisation about the way
the pwm dividers work. This means that time on the S3C64XX
runs twice as fast as it should.
Fix the problem by moving to using the clk framework to setup
the pwm timer clock muxes, as the pwm-clock code has all the
necessary knowledge of how the timer clock inputs are routed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX series has a new TCFG divider setting to allow the clock
directly through, which means that we need to update the pwm-clock
code to cope with this.
Add <mach/pwm-clock.h> containing the specific code to deal with the
TCFG divider settings and provide any other per-arch data that the
pwm-clock driver needs to function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Provide the initial register definitions for the newer
style of framebuffer cores found in the Samsung SoCs
such as S3C2450, S3C64XX.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the compilation of the SDHCI configuration/setup
functions to depend on their respective configuration
variables.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The function s3c64xx_init_io was missing from <plat/cpu.h>
and was masked by the SMDK6410 having an local definition.
Fix by removing the SMDK6410 variant and adding it to the
relevant <plat/cpu.h> file.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the specific register definitions for the Samsung SDHCI
(HSMMC) block for the S3C2443 and S3C64XX series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_fout_epll clock wasn't registered as part of the initial clock
work, which can cause problems if it is used by one of the hardware
blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The gpiolib driver keeps its chip array to itself
and having a separate array for s3c-only gpios stops
any non-s3c gpio being used in one of the s3c specific
configuration calls.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the definition for the hsmmc device to plat-s3c
to be shared between the s3c24xx and s3c64xx platforms.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add definitions for the external interrupt groups which accompany
the original IRQ_EINT from the s3c24xx series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Discard the 'void *' from the pointers used for the
virtual addresses when setting up the .virtual fields
of the io map to avoid implicit cast warnings
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Index: linux.git/arch/arm/plat-s3c64xx/cpu.c
===================================================================
Some of the startup output can be reduced to
KERN_DEBUG from KERN_INFO as it is only really
useful when trying to debug kernel initialisation
problems.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.
Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The original arch/arm/include/asm/hardware/vic.h was
written for the PL190 ARM VIC implementation, and as
such does not have any information about the PL192
version.
Add details about the PL192 and PL190 specific registers
and any changes between the two units.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add demux handling for the UART interrupts
generated by the VIC into their seperate IRQs
that the serial driver can register.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the PLL clock initialisation and clock registration
and include the clocks sourced via CLKDIVx for most of
the on-chip peripherals.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial clocks definitions for the s3c6400
and s3c6410. Move the epll and ext clock from the
s3c2443 support into the common code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the physical to virtual memory mapping and the
necessary interrupt demuxing for the PWM timer blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The pwm-clock.c needs <mach/map.h> which is included
via other means on S3C24XX systems, so ensure it is
explicitly included.
Remove the includes of regs-clock.h and regs-gpio.h as
these are not needed by the build.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Initialise the basic physical to virtual mappings and
then detect the CPU that the system is being run on so
that the cpu code code can call the correct initialisation
code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the include for the interrupt entry macros needed
to be included by <mach/entry-macro.S> for the kernel
interrupt handler.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial header files for the S3C64XX support to satisfy the
minimal requirements to build a kernel. Some definitions will therefore
be placeholders or empty functions that will ensure that the system can
build and have base functionality. These will be filled in at a later
date.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Split the timer pending code out to a seperate per-machine
header so that when compiling for mach-s3c2410 or mach-s3c24a0
we can use the right timer code without having to #ifdef the
timer driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Initial architecture support for the S3C24A0 ARCH_S3C24A0.
We don't yet add an kconfig entry in the main arch/arm/Kconfig
file as the series is not complete, so that is left until enough
support is in to be useful.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Split the map.h definitions into common S3C24XX code by
adding arch/arm/plat-s3c24xx/include/plat/map.h and
altering the machine specific header for the S3C24A0.
As we add a new <plat/map.h> we move the original one
in arch/arm/plat-s3c include directory to be called
map-base.h to distinguish the two files.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add serial support for S3C24A0, based on current S3C2410
UART driver. It adds necessary new defines in regs-serial.h
for S3C24A0 and the code to support this device in
drivers/serial/s3c24a0.c
Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the necessary debug macros for the S3C24A0 to enable
kernel debugging, and fix a bug with selecting the wrong
default debug implementation from the base include.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The definition of S3C24XX_VA_GPIO used S3C2410_PA_GPIO
where it should have read S3C24XX_PA_GPIO.
Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The pwm-scaler0 and pwm-scaler1 clocks have their
.id field set to -1 as they are not referenced to
any specific device. However, parts of the pwm-clock
code used the .id field to identify which scaler
clock was being used.
Fix the problem by comparing against the pointer to
the clock to identify the scalers.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
All the s3c24xx gpiolib chips share the same get/set
calls and all but one bank shares the same calls for
.direction_input and .direction_output methods.
Change the initialisation process to use an new call
to register the chips that fills in any blank calls
with the default values to avoid having to fill them
in the structure initialisers.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a simple check when registering a clock on whether
the clock has already been added to the list.
Any attempt to re-register a clock will cause the
clock list to be come looped and thus produces silent
failures when looking up clocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the core clock registration and definitions
in arch/arm/plat-s3c24xx/clock.c to arch/arm/plat-s3c
to be shared with the S3C64XX implementations.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We cannot sleep if we have cpufreq pm enabled during some
of the clock operations, so change to use a spinlock to
protect the clock system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the PLL calculation code into it's own header
file for re-use with the other plat-s3c24xx based
systems such as the S3C24A0.
Note, we change the name of s3c2410_get_pll to the
more generically named s3c24xx_get_pll as well as
the related defintions.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Only certain boards need these clocks, and they are not
available on some CPUs (such as the S3C24A0) so remove
them from arch/arm/plat-s3c24xx/clock.c and into their
own file with appropriate Kconfig entries.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We need to add plat-s3c to the build to get the headers
that will go in here once moved from include/asm-arm so
we may as well put some useful common s3c code in here
to stop the errors generated form having nothing built.
The cpu setup is now passed the cpu idcode and the table
of supported cpus to s3c_init_cpu() to abstract the
cpu identification out of the initial io setup.
As well as moving the cpu initialisation code, we move the
map of the board specific items up to the calling code as
none of the map_io() functions actually do anything other
than pass this to iotable_init().
This patch does not rename any of the init functions that
will be common to s3c24xx and any other s3c architectures
as this can be done at a later date as it will touch all
the board support files which use functions such as
s3c24xx_init_clocks() and s3c24xx_init_uarts().
Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h
still has functions that are used by both the cpu and
board initialisation functions. This means that each board
has definitions specific to the cpu support included and
the vice-versa.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a default header for <mach/io.h> for systems
such as the S3C24A0 which do not need any of the
complex code that the S3C2410 uses.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
vmalloc.h is common across all the current s3c platforms,
so move it to arch/arm/plat-s3c/include/mach to be used
for all the targets.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move <mach/timex.h> to arch/arm/plat-s3c/include/mach/timex.h
so it can be the default for all S3C based architectures.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the S3C2410 base clock list to arch/arm/plat-s3c24xx
as this code is common to the S3C2410, S3C2440 and S3C2442
cpus.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This is the header file that defines the basic cpu frequency
scalling support for the Samsung S3C series of SoC.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
