A bunch of defconfig changes, and some patches to make the Allwinner H3 and
A33 boot properly.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVmUC5AAoJEBx+YmzsjxAgc24P/Ah6q+SSSv68adzGQp6LGO8t
ru2OWZwlQn+w2gHJK9qAytmQdpSRqbbjB+8muLz9WwNNjHliDmJawUvBPdC2p03L
ZrugiVUSKBeQOzdqvG0B3vOO3xszDE06DA+i0PZaBWH2uXDVfohhCFQ2n2/oQsS7
eDSlBl1EHtZOKEHtuEi988YDJhYDnJeSG/SWwyUbW73QH5eYYl+9TnSXdwDKGmJS
JyfWkafIsI3EKWUYmOJ2NgUv13pYQU9k/we53n+PxeGevsPuenJH8r2j/N8pWtUl
srfZP82aEYCqlY4M6QL21k2KOPW8MIDMOOk9dh8l8k9nSC2oJXqsROJQpw2nrJRo
oPoT+gxWacc+AutX3Hz+XjXNsCIsE3q0Yd7yBfiszXroPtkIBslJGhdJRbh3VrxO
JS7lKVubJepePpARiWT4ginenWPgGPirDHWixSUcfgBnMN6fpdhOGpdDxWePy1IJ
7wox3lRThnBhhvI1HuLES92XEiRYhin21LA00juPbvCMbQKuG2W9fBryXTi3U3LC
g3RQfy3ViZbrEw/7iTjlm2MVYSRxSdA1SAQHNS5Q+4fem22XKeSlzHON/0izrCdV
10zWNUAlolESWhCyD3TMScFl7WG+KMrjaHE/02+q7wSA6sr1aMGfjL6buVA7R5bF
KiCWz4Sqp8p/a4RejDVl
=m0CY
-----END PGP SIGNATURE-----
Merge tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Merge "Allwinner late changes for 4.2" from Maxime Ripard:
Allwinner late changes for 4.2
A bunch of defconfig changes, and some patches to make the Allwinner H3 and
A33 boot properly.
* tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Enable simplefb in the defconfig
ARM: Remove deprecated symbol from defconfig files
ARM: sunxi: Add Machine support for A33
ARM: sunxi: Introduce Allwinner H3 support
Documentation: sunxi: Update Allwinner SoC documentation
Add machine support for the Allwinner A33 quad core cortex-a7 based SoC,
which is similar to the A23 SoC.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
to other sun8i family SoCs like the A23.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers and updates to existing ones, as usual. There are some fixes to
the framework itself and several cleanups for sparse warnings, etc.
Please consider pulling.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVlCubAAoJEKI6nJvDJaTUJ3cQAKdaU+NpWX9Qajt6snIHcqB6
nBg57DltuPh1XFMPHDIdPe+8rK0RDQjao6jwzzqUKGaZJ3sycPCIn8mh+iZCP7Se
yxhacQIAIp2qbIlIQ8Epcc6jnma/8cUyfB0BuYMddzb7bk2PXLfLxzJgAo5pXZM1
LQoBxdpBh3Y7vcdBFLuHsnORTZdRI29Nu7p5dRK27vxWFBoCqL3bshHSS8g7lTBc
XUWcFhfFe7WvMvBqqF8pSJlCmHzO90S0MmFPT4OQy4NtAysPpjsqI6RPCHBTyvy+
oniMM6zM/RdN1VnLB49HvAL4mArjAdsQGxNywsUpvD/IcZPbpM8N3VA3xHzANMfy
iJ9374zgjRn3/YBfjYFCcyVUY7SPeiRsXh97ZMZJGY5BC5FbXuKMn3STPrUilhw/
CMSq9ARdmjlPQDW5EuEGFeap+7oz4q4Kgk0qgmOktIVYhtt9Pn0ddMKINIpokzbi
4w0z1kc/YVHZpFMNYxAQoxYzejU9hxybUvYUEnu9RFzzOW+o7DsmMv7k5r1XY+oO
P1Kz0jVWCw46XnvP6z1V4SforZOQXr1Om698O8fd7ke7Q7gFCr2UQjIuXliC/g8u
NREqu1kceXTeWnt0LFZB7GMOo2Edo21qYIAILyqTO50QJL2at5WLoibaM03y7I7x
GeMP1APDHJI0E5dn0v5P
=Iv72
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clock framework updates from Michael Turquette:
"The changes to the common clock framework for 4.2 are dominated by new
drivers and updates to existing ones, as usual.
There are some fixes to the framework itself and several cleanups for
sparse warnings, etc"
* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
clk: stm32: Add clock driver for STM32F4[23]xxx devices
dt-bindings: Document the STM32F4 clock bindings
cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
clk: samsung: add infrastructure to register cpu clocks
clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
doc: dt: add documentation for lpc1850-ccu clk driver
clk: add lpc18xx ccu clk driver
doc: dt: add documentation for lpc1850-cgu clk driver
clk: add lpc18xx cgu clk driver
clk: keystone: add support for post divider register for main pll
clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
clk: cygnus: remove Cygnus dummy clock binding
clk: cygnus: add clock support for Broadcom Cygnus
clk: Change bcm clocks build dependency
clk: iproc: add initial common clock support
clk: iproc: define Broadcom iProc clock binding
MAINTAINERS: update email for Michael Turquette
clk: meson: add some error handling in meson_clk_register_cpu()
...
Here's the big char/misc driver pull request for 4.2-rc1.
Lots of mei, extcon, coresight, uio, mic, and other driver updates in
here. Full details in the shortlog. All of these have been in
linux-next for some time with no reported problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlWNn0gACgkQMUfUDdst+ykCCQCgvdF4F2+Hy9+RATdk22ak1uq1
JDMAoJTf4oyaIEdaiOKfEIWg9MasS42B
=H5wD
-----END PGP SIGNATURE-----
Merge tag 'char-misc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here's the big char/misc driver pull request for 4.2-rc1.
Lots of mei, extcon, coresight, uio, mic, and other driver updates in
here. Full details in the shortlog. All of these have been in
linux-next for some time with no reported problems"
* tag 'char-misc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (176 commits)
mei: me: wait for power gating exit confirmation
mei: reset flow control on the last client disconnection
MAINTAINERS: mei: add mei_cl_bus.h to maintained file list
misc: sram: sort and clean up included headers
misc: sram: move reserved block logic out of probe function
misc: sram: add private struct device and virt_base members
misc: sram: report correct SRAM pool size
misc: sram: bump error message level on unclean driver unbinding
misc: sram: fix device node reference leak on error
misc: sram: fix enabled clock leak on error path
misc: mic: Fix reported static checker warning
misc: mic: Fix randconfig build error by including errno.h
uio: pruss: Drop depends on ARCH_DAVINCI_DA850 from config
uio: pruss: Add CONFIG_HAS_IOMEM dependence
uio: pruss: Include <linux/sizes.h>
extcon: Redefine the unique id of supported external connectors without 'enum extcon' type
char:xilinx_hwicap:buffer_icap - change 1/0 to true/false for bool type variable in function buffer_icap_set_configuration().
Drivers: hv: vmbus: Allocate ring buffer memory in NUMA aware fashion
parport: check exclusive access before register
w1: use correct lock on error in w1_seq_show()
...
Pull ARM updates from Russell King:
"Bigger items included in this update are:
- A series of updates from Arnd for ARM randconfig build failures
- Updates from Dmitry for StrongARM SA-1100 to move IRQ handling to
drivers/irqchip/
- Move ARMs SP804 timer to drivers/clocksource/
- Perf updates from Mark Rutland in preparation to move the ARM perf
code into drivers/ so it can be shared with ARM64.
- MCPM updates from Nicolas
- Add support for taking platform serial number from DT
- Re-implement Keystone2 physical address space switch to conform to
architecture requirements
- Clean up ARMv7 LPAE code, which goes in hand with the Keystone2
changes.
- L2C cleanups to avoid unlocking caches if we're prevented by the
secure support to unlock.
- Avoid cleaning a potentially dirty cache containing stale data on
CPU initialisation
- Add ARM-only entry point for secondary startup (for machines that
can only call into a Thumb kernel in ARM mode). Same thing is also
done for the resume entry point.
- Provide arch_irqs_disabled via asm-generic
- Enlarge ARMv7M vector table
- Always use BFD linker for VDSO, as gold doesn't accept some of the
options we need.
- Fix an incorrect BSYM (for Thumb symbols) usage, and convert all
BSYM compiler macros to a "badr" (for branch address).
- Shut up compiler warnings provoked by our cmpxchg() implementation.
- Ensure bad xchg sizes fail to link"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (75 commits)
ARM: Fix build if CLKDEV_LOOKUP is not configured
ARM: fix new BSYM() usage introduced via for-arm-soc branch
ARM: 8383/1: nommu: avoid deprecated source register on mov
ARM: 8391/1: l2c: add options to overwrite prefetching behavior
ARM: 8390/1: irqflags: Get arch_irqs_disabled from asm-generic
ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap
ARM: 8388/1: tcm: Don't crash when TCM banks are protected by TrustZone
ARM: 8384/1: VDSO: force use of BFD linker
ARM: 8385/1: VDSO: group link options
ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations
ARM: remove __bad_xchg definition
ARM: 8369/1: ARMv7M: define size of vector table for Vybrid
ARM: 8382/1: clocksource: make ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK
ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource
ARM: 8365/1: introduce sp804_timer_disable and remove arm_timer.h inclusion
ARM: 8364/1: fix BE32 module loading
ARM: 8360/1: add secondary_startup_arm prototype in header file
ARM: 8359/1: correct secondary_startup_arm mode
ARM: proc-v7: sanitise and document registers around errata
ARM: proc-v7: clean up MIDR access
...
Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses
Conflicts:
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Trivial add/add conflict with our dt branch.
Resolution: take both sides.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RRAAoJEFk3GJrT+8ZljIcQAIsqxM/o0drd90xTJ6ex9h0B
RmqVLTDgesHmBacJ+SBsa9/ybFIM1uErByftc1dmKankEQVXW3wcH7keQnoStPT2
zTEjadHgZ/ARYjV/oG5oohjfDZpO1kECVHL8O8RmcWxgzRB3az1IW2eD+dzrga/Y
R7K6D8rDHMADIUmv0e0DzvQEbSUYdCx3rBND1qZznwZDP3NoivLkOG5MTraccLbQ
ouCRoZtyNYD5Lxk+BHLBepnxAa0Ggc6IjEmiUv8fF2OYdu0OruMliT4rcAtOSmzg
2Y7pP85h8u0CxbJDkOyc+2BELyKo7Hv97XtDNNbRYABTMXdskRIadXt4Sh4mwFtM
nvlhB4ovbIX7noECJToEkSAgmStLSUwA3R6+DVdLbeQY4uSuXuTRhiWHMyQB6va9
CdjJDk2RE0dZ77c5ZoUnUDtBe4cULU/n4agpYkKMf/HcpnqMUwZzP4KZbbPMBpgL
0CVTt3YrEcjoU7g0SFHhOGPSgl4yIXKU2eHEscokyFYLrS5zRWepmUEmlSoaWn+W
p7pJE65TvOGf2xbaWI+UBeK/3ZG7XAP8qUfhsi7NS4bV6oFCk/foqsWAuru0H7OW
2Gk8fuF0qLgE1eFWQp8BHZ4IUeytoWbnGhhHXh8zH39SKAVncOiAGDNfuEP9CyXJ
fZFfruYrnz2emOwj2v9m
=02Gm
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Kevin Hilman:
"Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
drivers: soc: sunxi: Introduce SoC driver to map SRAMs
arm-cci: Add aliases for PMU events
arm-cci: Add CCI-500 PMU support
arm-cci: Sanitise CCI400 PMU driver specific code
arm-cci: Abstract handling for CCI events
arm-cci: Abstract out the PMU counter details
arm-cci: Cleanup PMU driver code
arm-cci: Do not enable CCI-400 PMU by default
firmware: qcom: scm: Add HDCP Support
ARM: berlin: add an ADC node for the BG2Q
ARM: berlin: remove useless chip and system ctrl compatibles
clk: berlin: drop direct of_iomap of nodes reg property
ARM: berlin: move BG2Q clock node
ARM: berlin: move BG2CD clock node
ARM: berlin: move BG2 clock node
clk: berlin: prepare simple-mfd conversion
pinctrl: berlin: drop SoC stub provided regmap
ARM: berlin: move pinctrl to simple-mfd nodes
pinctrl: berlin: prepare to use regmap provided by syscon
reset: berlin: drop arch_initcall initialization
...
As usual, quite a few device-tree updates in ARM land. There was ome
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey
Conflicts: None
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4ROAAoJEFk3GJrT+8ZlBcsP/jjXN+pucA3oHE/Jn9j1yF8e
aPENC0iXVDr2ru5SikBlgmBYeoZjsXV90HWnEo3RZrF4/zMa8CUOD6UqKZLp7x9d
SYEtuFk98VM/7Qtho6qDvZaLTnzWT5CL24E+J899P8V9lWVm3mwklKE9ScmkDd5m
kQxtj5rk1HcaDPmtJ0rseqNoaqRSG1UmhAHLkHMYLg5CyQb7L4FZx+l+Zj4FpYFE
js9uIVpp2gIuJu3nLRWgkhnoOVQzLAftPnmkbgEYYjqY3/kCtkvRA3g3QoDwn6nc
qjI3iFSYudyum9CmCMfvPYFfwXJ7uT3s+GPXJj+vLZomFfQm5g9S0/RGLQh2loi+
zCBeCw63y22qqJfNVLx3yVdyEYslu9RcFeuBzWrQ2R+ZYYq1MBdKeNIUqlnbRAvv
gB5jOT5yg5Tzme94Uk2WfTiy5Es2d7KsqlvnKSRuItFI2+LvjfMipV7JLf/5gPE1
1A/A9ALW550kyxVsQtST8wMyTN5ASQ+fyM9MvICgpZa/LBA2hXsO+XCKO0LzOZUg
3ABJVogUpqLwuA6qVAToq4bRNPC7p72odM1tKRHHCNf29r5wtYqu79Eon+3v4Zgf
1wjSJocjJ9yCFxxLMn8PgxcF8Maedp9y/I6dCHEYN5zI6RdwlelUvWcuul6RIEeO
+XORenPq9ZRR8tDO+HSU
=wWIc
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Kevin Hilman:
"As usual, quite a few device-tree updates in ARM land. There was one
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
ARM: hisi: revert changes from hisi/hip04-dt branch
ARM: nomadik: set proper compatible for accelerometer
ARM64: juno: add GPIO keys
ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
ARM: dts: Introduce STM32F429 MCU
ARM: socfpga: dts: enable ethernet for Arria10 devkit
ARM: dts: k2l: fix the netcp range size
ARM: dts: k2e: fix the netcp range size
ARM: dts: k2hk: fix the netcp range size
ARM: dts: k2l-evm: Add device bindings for netcp driver
ARM: dts: k2e-evm: Add device bindings for netcp driver
ARM: dts: k2hk-evm: Add device bindings for netcp driver
ARM: BCM5301X: Add DT for Asus RT-AC87U
ARM: BCM5301X: add IRQ numbers for PCIe controller
ARM: BCM5301X: add NAND flash chip description
arm64: dts: Add dts files for Hisilicon Hi6220 SoC
clk: hi6220: Document devicetree bindings for hi6220 clock
arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
ARM: at91/dt: sama5d4ek: mci0 uses slot 0
ARM: at91/dt: kizbox: fix mismatch LED PWM device
...
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
GPeeJrJaYQsDvTrO8wjU
=ZtPK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
A relatively small setup of cleanups this time around, and similar to last time
the bulk of it is removal of legacy board support:
- OMAP: removal of legacy (non-DT) booting for several platforms
- i.MX: remove some legacy board files
Conflicts: None
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RJAAoJEFk3GJrT+8ZlS78P/28n9U/KBoBkHWFhLmsgAUC/
X06CfjxcFuRndLoj96jxhWdaf65GwFsDPCsWfI270X7kYlu08dn2AlLOOHxNf1Ou
DvfqXz8dBl3z8pg0VHcZzUaV9CwfbvIHbalD2rLQ26sF6vRfHrF7AC+ITTi2TEpY
CMX7LF1igX8nnRRZpl0Oya8Uvr8vsjuuvSq6I2GFav/JhZpYhz19FqbVPtu13Kuw
+AZrwvgn5KwSxYw6cDjwWgbSBBuZi2m22LJxrs8z/ckRVA0ErpKLD83GZ5DeA+Ii
m+f0xv/EE59AnfCnlpnZizxeQQ7BSVAZbaSp4GuXgLtg+1zJZP9tsJ8gLGuSLIo4
TMMcB7K2VQMs4orAEvd0B7QB2WEtu4NDgKmD7k7tSy0uCMqxY/ItYDFVLpLRz9+r
cnB469H312MJuk+7eH324n62lWhlQ8h1D2zHXMDCo4kvgZg/Qcbl6joj34B6oTqz
Pa1RoJwrh4CsihDF/2aUt1IOZ+4mm0hhg4gocZEyqvf7Xdya2oFiyoUQCLnPQfbd
Vvw7JMxnIW9iQbYzu4eHlZin3TK53osmIepj7pnlrmdLcM046fLONDxsg9JovsrS
+TwHE00DZdAgpH/z1aUo8Ft4xO60FkPK2YcOCUvKZKi3mIHenvZZQo+s28suNni1
Q1dz9aZWNvaunmRl4EcH
=0zof
-----END PGP SIGNATURE-----
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Kevin Hilman:
"A relatively small setup of cleanups this time around, and similar to
last time the bulk of it is removal of legacy board support:
- OMAP: removal of legacy (non-DT) booting for several platforms
- i.MX: remove some legacy board files"
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: fix EFM32 build breakage caused by cpu_resume_arm
ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
ARM: v7 setup function should invalidate L1 cache
mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c
ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c
ARM: OMAP2+: Constify irq_domain_ops
ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers
ARM: at91: remove useless Makefile.boot
ARM: at91: remove at91rm9200_sdramc.h
ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
ARM: at91/pm: use the atmel-mc syscon defines
pcmcia: at91_cf: Use syscon to configure the MC/smc
ARM: at91: declare the at91rm9200 memory controller as a syscon
mfd: syscon: Add Atmel MC (Memory Controller) registers definition
ARM: at91: drop sam9_smc.c
ata: at91: use syscon to configure the smc
ARM: ux500: delete static resource defines
ARM: ux500: rename ux500_map_io
ARM: ux500: look up PRCMU resource from DT
ARM: ux500: kill off L2CC static map
...
* New APM X-Gene SoC EDAC driver (Loc Ho)
* AMD error injection module improvements (Aravind Gopalakrishnan)
* Altera Arria 10 support (Thor Thayer)
* misc fixes and cleanups all over the place
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJViuInAAoJEBLB8Bhh3lVKHT8QAKkHIMreO8obo09haxNJlfdF
BaG7SNEDhvcgQ1B76RsjnjkUpsivvUt+mCYMP+BxcAqFrTA33UZCCOK5tEhGb1wr
matRdR6+aezqAl2e/0/Ti25bWOkDxcOeazh2TyezuyIXtaJjOq1oZC7OaYGmxPun
NlZY+/uY1eiHlewKsK04y8G8J5i4wGoKnuxBvOyELT90+a+fLfAOshAp0D4r0piB
Znv0ydsHlu+Wx57slg1DktlsyswmcGS9WfWwwTlELOLulKgN8wEAVYzUB5pJzNbz
ehq0J4wYz95juXADC4M4tEjErHVJNl6PbyMqwt0+XUUJ1NSgOj7Q6iqwxDoZX8km
oxiLVydQBtoIzF1LojFKAVZDFnrMKHKwK3RaDaUJjTI90+tVzEU8xsBlUf6+EgD2
Ss2RH8Gfuf52RdtwHh9++T1ur5rM9YNCAm31msq06mcOf0bEtmDbhZ+fVC5mjhqB
fIb3hxnk0r2BVg+ZCN/boxGS6RzUtYVcCXaBPDMeHcg9BEEds70KCFEcsX7TvJIg
5/SHI+033MylqkX2zrgDQLj7CQk3R0jaotHVbdhLupyOldcM7r5uF+VO84drNWGN
GfM2lpyE/swZWnzKuotgYIGR1XvFjtJAVAyNGIvwP+ajjTsqXzEnLSLClY5LWfYd
nSSSMpCCqsEmhoWftOix
=Id4f
-----END PGP SIGNATURE-----
Merge tag 'edac_for_4.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
- New APM X-Gene SoC EDAC driver (Loc Ho)
- AMD error injection module improvements (Aravind Gopalakrishnan)
- Altera Arria 10 support (Thor Thayer)
- misc fixes and cleanups all over the place
* tag 'edac_for_4.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (28 commits)
EDAC: Update Documentation/edac.txt
EDAC: Fix typos in Documentation/edac.txt
EDAC, mce_amd_inj: Set MISCV on injection
EDAC, mce_amd_inj: Move bit preparations before the injection
EDAC, mce_amd_inj: Cleanup and simplify README
EDAC, altera: Do not allow suspend when EDAC is enabled
EDAC, mce_amd_inj: Make inj_type static
arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support
EDAC, altera: Add Arria10 EDAC support
EDAC, altera: Refactor for Altera CycloneV SoC
EDAC, altera: Generalize driver to use DT Memory size
EDAC, mce_amd_inj: Add README file
EDAC, mce_amd_inj: Add individual permissions field to dfs_node
EDAC, mce_amd_inj: Modify flags attribute to use string arguments
EDAC, mce_amd_inj: Read out number of MCE banks from the hardware
EDAC, mce_amd_inj: Use MCE_INJECT_GET macro for bank node too
EDAC, xgene: Fix cpuid abuse
EDAC, mpc85xx: Extend error address to 64 bit
EDAC, mpc8xxx: Adapt for FSL SoC
EDAC, edac_stub: Drop arch-specific include
...
* zte/soc:
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
Add initial dts file and document for ZX296702 and board ZX296702-AD1.
More peripherals will be added later.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- add failure(exception) handling
: of_iomap(), of_find_device_by_node() and kstrdup()
- add common poweroff to use PS_HOLD based for all of exynos SoCs
- add exnos_get/set_boot_addr() helper
- constify platform_device_id and irq_domain_ops
- get current parent clock for power domain on/off
- use core_initcall to register power domain driver
- make exynos_core_restart() less verbose
- add support coupled CPUidle for exynos3250
- fix exynos_boot_secondary() return value on timeout
- fix clk_enable() in s3c24xx adc
- fix missing of_node_put() for power domains
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVcdzXAAoJEA0Cl+kVi2xql4QP/3rDUfEGSifijucf8K2fssVa
mQ/a++UG//uXE6Pv9t5tymsEIwKceqxoBOMR5XgmHdftYHc7if7lwNOlTcllbUYj
W1a7W4rCJboh2hl7oChz5tDYedoFiEJUZLAaJ1yLF+5vm6nVZYplHOCiG4q6le36
4DzQ1f8ECUHrWvfGtowK61NE9GiiixJHoBJpBnFmtx67w10KeS8zVmRrhrYghyNF
QX3rveWpuZcAtBy1YzLsEtuMucG3iLtg+JJE+9j5Sqj/nZxlUWLpD1q8f65c77tW
QrJOCnDEFIOzai6XjCLMbD1euiRhAZze1Rqq7giqRjFyUbAJi+OUiTkt2yjy5hZR
G9INmY7qgHWFyBQmqLLmA4nPdh2kdPp9FH9r17fI9IDDwv10kktJ69n06tVoQLQX
L+m8LAzpx5ubgJe7/R8sFockDN1BE03F1GTVdXuGJFzjPat/JG0PddoPM9l+Quxk
+KSHexmdMYy9B7P2LqEQezyP4Y7en9ywUzUiQprKnz5wQSfTx6GA5l6j2rno4xte
h93MooUSt9GScubaaFRaQeU81gphc9cMMsU43On0DHbQ71CGnaBmxkGwC4FOdSkV
PaevURAT5hkeDQjbaHaYVTfh/qC1aQJFv3eDDwoaYpjqXPSnqeB3R/ZbAZpfthEG
jLQ1zkRIo435Sc7wCrce
=LybA
-----END PGP SIGNATURE-----
Merge tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Samsung updates for v4.2
- add failure(exception) handling
: of_iomap(), of_find_device_by_node() and kstrdup()
- add common poweroff to use PS_HOLD based for all of exynos SoCs
- add exnos_get/set_boot_addr() helper
- constify platform_device_id and irq_domain_ops
- get current parent clock for power domain on/off
- use core_initcall to register power domain driver
- make exynos_core_restart() less verbose
- add support coupled CPUidle for exynos3250
- fix exynos_boot_secondary() return value on timeout
- fix clk_enable() in s3c24xx adc
- fix missing of_node_put() for power domains
* tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (301 commits)
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
ARM: EXYNOS: Get current parent clock for power domain on/off
ARM: SAMSUNG: fix clk_enable() WARNing in S3C24XX ADC
ARM: EXYNOS: Add missing of_node_put() when parsing power domains
ARM: EXYNOS: Handle of_find_device_by_node() and kstrdup() failures
ARM: EXYNOS: Handle of of_iomap() failure
Linux 4.1-rc4
....
These options make it possible to overwrites the data and instruction
prefetching behavior of the arm pl310 cache controller.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Using a fixed (by DTS) parent for clocks when turning on the power
domain may introduce issues in other drivers. For example when such
driver changes the parent during runtime and expects that he is the
only place of such change.
Do not rely on DTS providing the fixed parent for such clocks. Instead
before switching domain off, grab a current parent of a clock with
clk_get_parent().
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon hi6220 SoC mobile platform.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This adds documentation of device tree bindings for the
ARM System timer.
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
- Document Snoop Control Unit (SCU) bindings
- Document Ux500 board bindings
- Define the backup RAM in the DBx500 device tree
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVbEwwAAoJEEEQszewGV1zw5IQAMgEalCaSArXm/a12eogltuE
rGzJtP6MRwqLA4dGe+rOnUEsw2+jX1uBpUsBt7akBRbl2prRUpm89SJxZg8E5YpG
u2c+ODrh1lp4sRpAtKiMrLVx+hIjR4YFEa2cW0/OAJKG+4h1RXeQlXW3bw9q0qov
dO+M+NlcmWHyaJU9bNHYPZNYtG+9rVYY8kEK/LFe1xiY/VYC8KIe+gikR/R9WHI1
PZgAi1rARLeKAC7eThUDA+XnhzpxwYyqsxHsLV92l0l/cfly6DKCmZ1Zn9jk7v4b
L24jZ8OpHhJX5s//vsBmLxSobisuL8aLJDHCkrBmIb+geRsphOYmYTwmKdRJ2YkB
CyuxmvjdpKNiBIb8SGEKplrRaAexRfjXxX1GdNZNzdvIDo7T1hrM3/Fzo5TXxP61
Tgtu3I2Cwa3luDxFKaGlgldihvhUVPcAoBQUXyF57teWIh4iwTcrGZ3Li9kxTY32
ZvunTP/z8XjWRKFHv5KFCnnpxoQLDB/aHuv36H94hol5Nf95MC0EjGvBRM582z+u
1znExgtfSUt0BfqaxFgTieIu8RrQK0bxGcwBK6Okmv+j2BjTnE10ZuoqZSCaurOQ
QEkO336JNyYSwSu9Bxcwcx5x/qB+X5yuZLvmzhOp8Ld0omUngOqSpBtxdQQNQBK5
9qwI0QJ0Unc3rSgkJ6Ho
=IRmr
-----END PGP SIGNATURE-----
Merge tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Device Tree changes for Ux500 and ARM SOC" from Linus Walleij:
- Document Snoop Control Unit (SCU) bindings
- Document Ux500 board bindings
- Define the backup RAM in the DBx500 device tree
* tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: define the backupram in the device tree
ARM: ux500: add board documentation
ARM: scu: document Snoop Control Unit DT bindings
CCI-500 provides 8 event counters which can count any of the
supported events independently. The PMU event id is a 9-bit
value made of two parts.
bits [8:5] - Source port
0x0-0x6 Slave Ports
0x8-0xD Master Ports
0xf Global Events to CCI
0x7,0xe Reserved
bits [0:4] - Event code (specific to each type of port)
The generic CCI-500 controlling interface remains the same with CCI-400.
However there are some differences in the PMU event counters.
- No cycle counter
- Upto 8 counters(4 in CCI-400)
- Each counter area is 64K(4K in CCI400)
- The counter0 starts at offset 0x10000 from the base of CCI
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This driver manages Qualcomm CoreSight Replicator device, which
resides on the AMBA bus. Replicator has been made programmable to
allow software to turn of the replicator branch to sink that is not
being used. This avoids trace traffic to the unused/non-current sink
from causing back pressure that results in overflows at the source.
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Put in a blurb in the device tree bindings indicating that
coresight blocks may have an optional ATCLK.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge "Documentation: bindings: Add DT bindings for ARM Juno boards" from Liviu Dudau:
* 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld:
Documentation: bindings: Add DT bindings for ARM Juno boards.
arm64: Add DT support for Juno r1 board.
arm64: Juno: Add GICv2m support in device tree.
arm64: Juno: Add memory mapped timer node
arm64: Juno: Split juno.dts into juno-base.dtsi and juno.dts.
arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.
- use syscon in the ata and cf drivers to configure the SMC and drop
sam9_smc.c
- switch the at91rm9200 memory controller to syscon
- remove last useless headers
- remove now useless Makefile.boot
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJVXkSpAAoJEKbNnwlvZCyzauwQAMw7hS1F13piSpN5JBlST6yx
I4ojH/wB5GzI+qvTTcBZQR0AGcDatU3cHuzIPzYypKTB76iLf5DaZPvPjN3S3EK0
2/4R2eJyz0pA/2liTQ17e0MjKSIR0Ui7kk/aWYnC92/p2KK8xpUsbxznAIkAdw8I
a1HgsM1IKPVnyyxgvrKNhNcsP7fCzfjgnRNmRiFe9iDIbLervE+jKpm7PTakWtQL
OeLqRoURVd7yOLeqhlrmgch0ut8MqdHPgD57M/xbgi11VSg1PwLWTpuUlbnbVFwD
nw8A7d24+rUYLgyhTj92RmSiPjFyztHL6S+rw4yzaDLHMIr4Vm/U4eS9xcRhXzhe
FaigePDKYQiDNZ3u3NCDwOJk3HLlTkpvlzmVd1nFn313afFOy4AtIwtyUgg51946
HkZQSU0JIcqd6y53EFjSMjdGxuDavyrYsV9KNDh3dFNHEKfe41LJBnYB9Q3mSYZC
H66sqs+5JVguwNdLJKXKvrehTF0dmsawvd0cjZgBDDj8JORjBPLIquU+IVJ1isYV
KDH4JjEWYqVk86j0Cpt0A+vCBOCAS21dn5wb6vi8dD4agoRr7HuQnSMbvzDhNLnY
93Ah82q5bQJjvWgb5FXYp2Ar9IhLBZ7sLqcnF1Fo5S7KCC6wMnd11/NeFYsnKfE/
N55fXpd/pPYDNg3XDs+q
=iSye
-----END PGP SIGNATURE-----
Merge tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/cleanup
Merge "First batch of cleanup for 4.2" from Alexandre Belloni:
- use syscon in the ata and cf drivers to configure the SMC and drop
sam9_smc.c
- switch the at91rm9200 memory controller to syscon
- remove last useless headers
- remove now useless Makefile.boot
* tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: remove useless Makefile.boot
ARM: at91: remove at91rm9200_sdramc.h
ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
ARM: at91/pm: use the atmel-mc syscon defines
pcmcia: at91_cf: Use syscon to configure the MC/smc
ARM: at91: declare the at91rm9200 memory controller as a syscon
mfd: syscon: Add Atmel MC (Memory Controller) registers definition
ARM: at91: drop sam9_smc.c
ata: at91: use syscon to configure the smc
This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores are used
simultaneously, orthogonal device tree's are required.
The boot CPU is dependent on the SoC variant. The available
boards use mostly variants where the Cortex-A5 is the primary
and hence the boot CPU. Booting the secondary Cortex-M4 CPU
needs SoC specific registers written. There is no in kernel
support for this right now, a external userspace utility
called "m4boot" can be used to boot the kernel:
m4boot xipImage initramfs.cpio.lzo vf610m4-colibri.dtb
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVWi8WAAoJEN2kpao7fSL4A/0P/AyWkBuASmgR2ubNndP2eNEo
gp/rXfLcSR4G9BVliwOm0y8HjXK9fmyzrHRxiKb4dmY49CFemmIwQ8/V4GOd2Xot
F8lC9ncMllNjiSBqMgNr2ByTkCR/nrPLWe8kmy5sJoffmdnwZvHouomokOgWWe3g
bhQJPr07h6Jbqp1i76pdM+e6l4LDCD5QjjDx6+B2dzz8ofnOFZmP2CNA6IMJ6jZW
t0mqc+fsB/zqW07p8BM3h3YkSEjzT26sy2C/o3rHcl51yCtCtYhbRhMpTJtjrV/o
mbgkAfSS/4F1Lj6IAm95Q3faNkU6Lab8eXloIe6DR0VMJTJXsYmzrR31Udim0Z2w
aw46wcPo7bK5hvCPHSP0SJl2MdWBxadhVEMDdxT0K4ieEQcoBryoALzI/v0S1Teo
lXVFfbz6MkCjP7OZZiaeT3Q5rQSlz5Etn/EkwTQhuixVNTTaH3g6en3Z+1cGISi5
V40aIv7nRLXxPhSNattfDfBPGefbE78cMNsErK/M8Kz4hqRA8PY/EO2KoqyCIVSt
1LGAKsqtEh+emdIrEIdbtQ1UkeNkx24pKayWmNoq0r2vLMzpCDwq8yOnowHwQAic
fPT2FDHkC1GsyoBt24uBHzde+K8uYrPabvN3Jh/f9i7tsLQCXUqbllsi4AUpIR4W
drilObi2VLSVB4kJknrn
=C6Wl
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Berlin DT changes for v4.2" from Sebastian Hesselbarth:
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
* tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin:
Documentation: bindings: update the berlin chip and system ctrl doc
Documentation: bindings: move the Berlin clock documentation
Documentation: bindings: move the Berlin pinctrl documentation
Documentation: bindings: move the Berlin reset documentation
Documentation: bindings: update the Berlin controllers documentation
Documentation: bindings: berlin: consider our dt bindings as unstable
ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11
The at91rm9200 memory controller is not simply an SDRAM controller. It also
controls the EBI (External Bus Interface), the SMC (Static Memory Controller)and
the Burst Flash Controller.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This documents the device tree bindings on the top level of
the Ux500 boards.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds device tree bindings for the ARM Cortex-A5 and
Cortex-A9 Snoop Control Units.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that the rework to have one sub-node per device in the chip and
system controllers is done, their dedicated compatible can be removed.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin clock documentation was part of the Marvell Berlin SoC
documentation because the Berlin clock configuration was inside the
chip controller. With the recent rework of the chip and system
controller handling (now all sub-devices of the soc and system
controller nodes are registred with simple-mfd, and each device has its
own sub-node), the documentation of the Berlin clock driver can be moved
to the generic clock documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin pinctrl documentation was part of the Marvell Berlin SoC
documentation because the Berlin pinctrl configuration was inside the
chip and the system controllers. With the recent rework of the chip and
system controller handling (now an MFD driver registers all sub-devices
of the two soc and system controller nodes and each device has its own
sub-node), the documentation of the Berlin pinctrl driver can be moved
to the generic pinctrl documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin reset documentation was part of the Marvell Berlin SoC
documentation because the Berlin reset configuration was inside the chip
controller. With the recent rework of the chip and system controller
handling (now an MFD driver registers all sub-devices of the two soc and
system controller nodes and each device has its own sub-node), the
documentation of the Berlin reset driver can be moved to the generic
reset documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
We're moving from a single node for multiple devices to a node with one
sub-node per sub-device, registered by simple-mfd. Update the
documentation to reflect the changes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Because the support of Marvell Berlin SoCs is still a work in progress,
add a statement to explicitly consider our device tree files and
bindings as unstable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVVGaiAAoJEFGvii+H/Hdh+EgP/3TFK863t7j9r4UdN76dPogx
GUvaT0U1H6/zs3P9B0/L4FVVdkIhEXZ7NvkiEjGuMySpSoAAouWclaW40FQUysK4
Pr9A0Qssp0QjjIwBpT/cRWyCmTpP00qbYsDRlKWtDmMu4A134UCUTXY5008+S++2
EqVyP28hpkImAvPEt2jj14kFep/HroxVPvsD7/vWM0SP5BY3zXxHl5wSD/6XzmEa
/jJonhhNWVd+/Vkgu331360vEx6zvC66GhIqFLHlSz7dUI4cw008c4NtxcYjFUVl
0Jv9YXyxD3GC52S1cZ0MGrWaMXC9LBOq4/5THU/rU+7n3rrkIl/Wrj4zvyKy6IUo
E/XRzZ0EBRooSR+z/ptZ1QBZouhWRRi5iN8Ql+AqHhUg9QV03wXtauijpkRgKRnO
+eiPeuMvHnWzfWLrfHamQTgHAJdfD8o0+nBx/0mvy76JidamIsbYoRB1NSixKNEz
lZXeQoKQ7H+2Ojky+QQArBFnxH1z1OAga2lKh1MXaHs6mvNzHL1W1btcg66sIjFV
FJHqJjZgPgbelG+fqvYtegfOQKVAGVMDhnGUUeVA22bTPgHvdaLCCTiaCXdpsNC9
cuM0yykWZL0NcZiGXtWSs/2rA7Fw25TJkZ23i1lye15nNeyFLoEZIE1UbtcxylPt
edoYW47mgIS0Xdoi/wim
=KpAt
-----END PGP SIGNATURE-----
Merge tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt
Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones:
* tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
ARM: bcm2835: dt: Add the mailbox to the device tree
ARM: bcm2835: dt: Fix i2c0 node name
ARM: bcm2835: dt: Use pinctrl header
ARM: bcm2835: dt: Add header file for pinctrl constants
ARM: bcm2835: dt: Add root properties for Raspberry Pi
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Merge "Device Tree changes" from Florian Fainelli:
New devices:
- Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo
WZR-1750DHP
- Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U
New peripheral support:
- Brian adds Device Tree nodes for the Broadcom NAND controller found on
BCM7xxx, BCM63138 and Cygnus SoCs
- Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on
BCM7xxx
- I add the Device Tree nodes and bindings documents for bringing-up secondary
CPUs and timer/syscon-reboot on BCM63138
* tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Add DT for Asus RT-AC56U
ARM: BCM5301X: Add DT for Asus RT-AC68U
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
ARM: dts: brcmstb: add nodes for SATA controller and PHY
ARM: dts: cygnus: Enable NAND support for Cygnus
ARM: bcm63138: add NAND DT support
ARM: bcm7445: add NAND to DTS
ARM: BCM5301X: Add DT for SmartRG SR400ac
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
ARM: dts: BCM63xx: Add SMP nodes and required properties
Documentation: DT: Document SMP DT nodes and properties for BCM63138
ARM: dts: BCM63xx: Add PMB busses nodes
Documentation: DT: Add Broadcom BCM63138 PMB binding
This patch adds root compatible properties for the following boards:
- Raspberry Pi Model A
- Raspberry Pi Model A+
- Raspberry Pi Model B
- Raspberry Pi Model B (no P5)
- Raspberry Pi Model B rev2
- Raspberry Pi Model B+
- Raspberry Pi Compute Module
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
A timer node and a syscon-reboot node are required for software reboot
to work on BCM63138, document these two nodes in the platform binding.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add binding documentation for the additional nodes and properties
required to get the secondary CPU online on the BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This pull request contains only the changes needed to support the SMP on
the Allwinner A23.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUQFvAAoJEBx+YmzsjxAgzZEQAIvJbHSZKtuI7gVgD+74oa7A
yigsnhdoOTMtWlgWWZHuN56CjEZNSosZoa9NLJhEDBAPEbDr74SoegW7knW6/xkD
B6s/TV4zGCciZ6AWa7zJEwwvibzdhw+9fGTIWZ4ZLr5fiaPPOE4jN3+O2Cu/oydC
7kD0buhh2QJpQp9ryy8L0S9pafAp8iBaux2zP1xZElG0s52xyNKtZlKD7B8SywFH
UFhJmjhL0Fq7APi1SUtLbESyIZWmvgE7G8Oh9l/N7VXnkb6R4eiKb/Q3QO8FXpKh
qO26A0k5cPtnAwMCYbXWimGh/X/2bY+eY8YPa/yUj19Pz770kT6loZRhvGEmkhDy
aSbJFC49/sco9FIkgNMNNFyPi6rCsrmj4CGOI67cDqomARUCxiQmg3Lr71NS5rtN
m6drF/6B9EzDochK9k/P/uAW0I/HJtR9Lbh/TZYLEb0SbL+j+s4s7iFhHhI3S0zh
hB9mfWvbse+2vLyjyoyT58igZAf9gg/QJFnHWDFPAc3D15zxg9xQObGQ68d6CNDB
1OvjDUBCwQBOdRQgFW2YUl70lm7Sm/rDFvWR/cY6+9QSEBeDeEglP0ji+BdHynAl
QPdUiiTs5tuz6WtLDX3mRYGfocUCRbPxPQ2BNZtn9gpAx4N9eCDQQuX3f937Ur9F
zMhuV7zfQ3X87beuUMWx
=RNcV
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Merge "Allwinner core additions for 4.2" from Maxime Ripard:
This pull request contains only the changes needed to support the SMP on
the Allwinner A23.
* tag 'sunxi-core-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun8i: Add SMP support for the Allwinner A23
Use 'clock-controller' and 'power-controller' as node names in the
examples rather than the specific names of the units.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds the binding documentation for the apmixedsys, perisys and
infracfg controllers found on Mediatek SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:
1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
11 bits on OMAP5 as against 8 bits on OMAP4, with the master
NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
field.
2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
input sources on OMAP5. The common DEBUGSS source is at a
different input on each SoC.
Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
