Commit Graph

3 Commits

Author SHA1 Message Date
Tom Rini
a7adb70a73 dt-bindings: gpmc: Correct location of generic gpmc binding
The binding bus/ti-gpmc.txt has been moved to
memory-controllers/omap-gpmc.txt.  Update all references to this in
order to make reading and understanding a given binding easier.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc:Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-22 21:12:15 +02:00
Javier Martinez Canillas
97a3b027b3 Documentation: dt: update TI GPMC ethernet binding properties
The GPMC timing properties for device-tree have been updated
by adding a "-ns" or "-ps" suffix to indicate the units of
time the property represents. Therefore, update the timing
property names for TI GPMC ethernet binding.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
2013-04-30 08:33:59 -05:00
Javier Martinez Canillas
5330dc161c ARM: OMAP2+: Add GPMC DT support for Ethernet child nodes
Besides being used to interface with external memory devices,
the General-Purpose Memory Controller can be used to connect
Pseudo-SRAM devices such as ethernet controllers to OMAP2+
processors using the TI GPMC as a data bus.

This patch allows an ethernet chip to be defined as an GPMC
child device node.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
2013-04-03 20:13:42 -05:00