Commit Graph

3833 Commits

Author SHA1 Message Date
Seungwon Jeon
1a25b1b419 mmc: dw_mmc: fix the max_blk_count in IDMAC
Even though 1MB is reserved for descriptor table in IDMAC,
the dw_mmc host driver is allowed to receive only maximum
128KB block length in one request. This is caused by setting
improper max_blk_count. It needs to be e adjusted so that
descriptor table is used fully. It is found that the performance
is improved with the increased the max_blk_count.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:11 +01:00
Dan Carpenter
9ef219c53f mmc: mxs-mmc: remove unneeded NULL check
Static checkers complain about the inconsistent NULL checking here:

	drivers/mmc/host/mxs-mmc.c:680 mxs_mmc_probe()
	warn: variable dereferenced before check 'ssp->dmach' (see line 660)

The variable can't actually be NULL so we can remove the check.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:10 +01:00
David Lanzendörfer
de0673cdf0 mmc: sunxi: Removing unused code
Removing a relict from reverse engineering of the Android driver code
in sunxi_mmc_clk_set_rate.

Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:10 +01:00
David Lanzendörfer
0f0fcd374b mmc: sunxi: Correcting SDXC_HARDWARE_RESET bit
Fixing the register name in sunxi_mmc_reset_host since the
SDXC_HARDWARE_RESET bit is actually located within REG_GCTRL and not
REG_CMDR as it was pointed out by Allwinner.

Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:09 +01:00
David Lanzendörfer
dd9b380392 mmc: sunxi: Lock fix
1) Adding a comment in order to clarify the choice of the locks within
sunxi_mmc_handle_manual_stop

2) As <lixiang@allwinnertech.com> has pointed out the wait_dma variable
was not accessed within the spin lock block in sunxi_mmc_request and so
(even if it should never happend) it would have theoretically been
possible that some other function would access the variable at the same
time as the function. This has been changed now and the function is
using local variables outside the lock and copys the value over during
the lock phase.

Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:09 +01:00
Hans de Goede
e8a5904945 mmc: sunxi: Fix setup of last descriptor of dma transfer
The last descriptor might be the first descriptor as well, so use masking to
add the LD (last descriptor) bit and drop the DIC (disable interrupt on
completion) bit rather then hard assignment as hard assignment will override
the FD (first descriptor) bit if there is only 1 descriptor.

Also set the ER (end of ring) bit and clear buf_addr_ptr2 on the last
descriptor, like the android kernel code does.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reported-by: <lixiang@allwinnertech.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:08 +01:00
NeilBrown
61bd8a04b3 mmc: omap_hsmmc: remove prepare/complete system suspend support.
The only function of these 'prepare' and 'complete' is to
disable the 'card detect' irq during suspend.

The commit which added this,
commit a48ce884d5
    mmc: omap_hsmmc: Introduce omap_hsmmc_prepare/complete

justified it by the need to avoid the registration of new devices
during suspend.
However mmc_pm_notify will set ->rescan_disable in the 'prepare'
stage and clear it in the 'complete' stage, so no card detection
will actually happen.
Also the interrupt will be disabled before final suspend as part
of common suspend processing.

So this disabling of the interrupt is unnecessary, and interferes
with a transition to using common code for card-detect management.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Chris Ball <cjb@laptop.org>
Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:08 +01:00
Axel Lin
8a66fdae77 mmc: toshsd: Fix unbalanced locking
Fix returning IRQ_HANDLED with spin_lock held.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:07 +01:00
Wei Yongjun
1818681cda mmc: toshsd: use module_pci_driver to simplify the code
Use the module_pci_driver() macro to make the code simpler
by eliminating module_init and module_exit calls.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:07 +01:00
Alessio Igor Bogani
304f0a98d1 mmc: sdhci: Fix FSL ESDHC reset handling quirk
The commit 0718e59ae2 ("mmc: sdhci: move FSL ESDHC reset handling quirk into
esdhc code") states that Freescale esdhc is the only controller which needs
the interrupt registers restored after a reset. So it moves
SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET quirk handling code into the
esdhc-imx driver only. Unfortunately the same controller is used in
other boards which use the of-esdhc driver instead (like powerpc P2020).

Restore interrupts after reset in the sdhci-of-esdhc driver also.

Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:06 +01:00
Minda Chen
fc0b638a03 mmc: sdhci-sirf: add sirf tuning function (cmd 19)
Add manual tuning function in CSR atlas7 SoC. It is mainly used
for the UHS-I SD card working SDR50 SDR104 mode.

The tuning principle can be seen in SD spec part1 v3.01 4.2.4.5
(tuning command).

SD host send the cmd19 and set the delay value(0-127).
and the sdcard return 64 bytes data. If the data is same with
the tuning data. The delay value is valid. Execute this commmand
128 times. And calculate the longest window of the valid values.
The value in the middle of this window is the best value.

Signed-off-by: Minda Chen <Minda.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:06 +01:00
Doug Anderson
f8c58c1136 mmc: dw_mmc: Protect read-modify-write of INTMASK with a lock
We're running into cases where our enabling of the SDIO interrupt in
dw_mmc doesn't actually take effect.  Specifically, adding patch like
this:

 +++ b/drivers/mmc/host/dw_mmc.c
 @@ -1076,6 +1076,9 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)

      mci_writel(host, INTMASK,
           (int_mask | SDMMC_INT_SDIO(slot->id)));
 +    int_mask = mci_readl(host, INTMASK);
 +    if (!(int_mask & SDMMC_INT_SDIO(slot->id)))
 +      dev_err(&mmc->class_dev, "failed to enable sdio irq\n");
    } else {

...actually triggers the error message.  That's because the
dw_mci_enable_sdio_irq() unsafely does a read-modify-write of the
INTMASK register.

We can't just use the standard host->lock since that lock is not irq
safe and mmc_signal_sdio_irq() (called from interrupt context) calls
dw_mci_enable_sdio_irq().  Add a new irq-safe lock to protect INTMASK.

An alternate solution to this is to punt mmc_signal_sdio_irq() to the
tasklet and then protect INTMASK modifications by the standard host
lock.  This seemed like a bit more of a high-latency change.

Reported-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:05 +01:00
Doug Anderson
b24c8b2601 mmc: dw_mmc: Cleanup disable of low power mode w/ SDIO interrupts
In the patch (9623b5b mmc: dw_mmc: Disable low power mode if SDIO
interrupts are used) I added code that disabled the low power mode of
dw_mmc when SDIO interrupts are used.  That code worked but always
felt a little hacky because we ended up disabling low power as a side
effect of the first enable_sdio_irq() call.  That wouldn't be so bad
except that disabling low power involves a complicated process of
writing to the CMD/CMDARG registers and that extra process makes it
difficult to cleanly the read-modify-write race in
dw_mci_enable_sdio_irq() (see future patch in the series).

Change the code to take advantage of the init_card() callback of the
mmc core to do this right at bootup.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:05 +01:00
Doug Anderson
eac86321b5 mmc: core: Support the optional init_card() callback for MMC and SD
In (3fcb027 ARM: MXC: mxcmmc: work around a bug in the SDHC busy line
handling) the optional init_card() callback was added.  According to
the original change it was "for now only called from
mmc_sdio_init_card()".

This callback really ought to be called from the SD and MMC init
functions as well.  One current user of this callback
(mxcmci_init_card) will not work as expected if you insert an SDIO
card, then eject it and put a normal SD card in.  Specifically the
normal SD card will not get to run with 4-bit data.

I'd like to use the init_card() callback to handle a similar quirk on
dw_mmc when using SDIO Interrupts (the "low power" feature of the card
needs to be disabled), so that will add a second user of the function.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Grant Grundler <grundler@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19 09:56:04 +01:00
Maxime Ripard
6c09bb851e mmc: sunxi: Convert MMC driver to the standard clock phase API
Now that we have proper support to use the generic phase API in our clock
driver, switch the MMC driver to use it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
2015-01-14 10:45:26 +01:00
Tim Kryger
3cbc6123a9 mmc: sdhci: Set SDHCI_POWER_ON with external vmmc
Host controllers lacking the required internal vmmc regulator may still
follow the spec with regard to the LSB of SDHCI_POWER_CONTROL.  Set the
SDHCI_POWER_ON bit when vmmc is enabled to encourage the controller to
to drive CMD, DAT, SDCLK.

This fixes a regression observed on some Qualcomm and Nvidia boards
caused by 5222161 mmc: sdhci: Improve external VDD regulator support.

Fixes: 52221610dd (mmc: sdhci: Improve external VDD regulator support)
Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Tested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-14 09:47:19 +01:00
Adrian Hunter
1f7f26528f mmc: sdhci-pci: Add support for Intel SPT
Add PCI IDs for SPT eMMC, SDIO and SD card.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:58 +01:00
Adrian Hunter
d0ed8e6b0a mmc: sdhci-acpi: Add ACPI HID INT344D
Add ACPI HID INT344D for an Intel SDIO host controller.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:57 +01:00
Krzysztof Kozlowski
2836766a9d mmc: sdhci: Fix sleep in atomic after inserting SD card
Sleep in atomic context happened on Trats2 board after inserting or
removing SD card because mmc_gpio_get_cd() was called under spin lock.

Fix this by moving card detection earlier, before acquiring spin lock.
The mmc_gpio_get_cd() call does not have to be protected by spin lock
because it does not access any sdhci internal data.
The sdhci_do_get_cd() call access host flags (SDHCI_DEVICE_DEAD). After
moving it out side of spin lock it could theoretically race with driver
removal but still there is no actual protection against manual card
eject.

Dmesg after inserting SD card:
[   41.663414] BUG: sleeping function called from invalid context at drivers/gpio/gpiolib.c:1511
[   41.670469] in_atomic(): 1, irqs_disabled(): 128, pid: 30, name: kworker/u8:1
[   41.677580] INFO: lockdep is turned off.
[   41.681486] irq event stamp: 61972
[   41.684872] hardirqs last  enabled at (61971): [<c0490ee0>] _raw_spin_unlock_irq+0x24/0x5c
[   41.693118] hardirqs last disabled at (61972): [<c04907ac>] _raw_spin_lock_irq+0x18/0x54
[   41.701190] softirqs last  enabled at (61648): [<c0026fd4>] __do_softirq+0x234/0x2c8
[   41.708914] softirqs last disabled at (61631): [<c00273a0>] irq_exit+0xd0/0x114
[   41.716206] Preemption disabled at:[<  (null)>]   (null)
[   41.721500]
[   41.722985] CPU: 3 PID: 30 Comm: kworker/u8:1 Tainted: G        W      3.18.0-rc5-next-20141121 #883
[   41.732111] Workqueue: kmmcd mmc_rescan
[   41.735945] [<c0014d2c>] (unwind_backtrace) from [<c0011c80>] (show_stack+0x10/0x14)
[   41.743661] [<c0011c80>] (show_stack) from [<c0489d14>] (dump_stack+0x70/0xbc)
[   41.750867] [<c0489d14>] (dump_stack) from [<c0228b74>] (gpiod_get_raw_value_cansleep+0x18/0x30)
[   41.759628] [<c0228b74>] (gpiod_get_raw_value_cansleep) from [<c03646e8>] (mmc_gpio_get_cd+0x38/0x58)
[   41.768821] [<c03646e8>] (mmc_gpio_get_cd) from [<c036d378>] (sdhci_request+0x50/0x1a4)
[   41.776808] [<c036d378>] (sdhci_request) from [<c0357934>] (mmc_start_request+0x138/0x268)
[   41.785051] [<c0357934>] (mmc_start_request) from [<c0357cc8>] (mmc_wait_for_req+0x58/0x1a0)
[   41.793469] [<c0357cc8>] (mmc_wait_for_req) from [<c0357e68>] (mmc_wait_for_cmd+0x58/0x78)
[   41.801714] [<c0357e68>] (mmc_wait_for_cmd) from [<c0361c00>] (mmc_io_rw_direct_host+0x98/0x124)
[   41.810480] [<c0361c00>] (mmc_io_rw_direct_host) from [<c03620f8>] (sdio_reset+0x2c/0x64)
[   41.818641] [<c03620f8>] (sdio_reset) from [<c035a3d8>] (mmc_rescan+0x254/0x2e4)
[   41.826028] [<c035a3d8>] (mmc_rescan) from [<c003a0e0>] (process_one_work+0x180/0x3f4)
[   41.833920] [<c003a0e0>] (process_one_work) from [<c003a3bc>] (worker_thread+0x34/0x4b0)
[   41.841991] [<c003a3bc>] (worker_thread) from [<c003fed8>] (kthread+0xe4/0x104)
[   41.849285] [<c003fed8>] (kthread) from [<c000f268>] (ret_from_fork+0x14/0x2c)
[   42.038276] mmc0: new high speed SDHC card at address 1234

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fixes: 94144a465d ("mmc: sdhci: add get_cd() implementation")
Cc: <stable@vger.kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:57 +01:00
Thomas Petazzoni
aa8165f914 mmc: sdhci-pxav3: do the mbus window configuration after enabling clocks
In commit 5491ce3f79 ("mmc: sdhci-pxav3: add support for the Armada
38x SDHCI controller"), the sdhci-pxav3 driver was extended to include
support for the SDHCI controller found in the Armada 38x
processor. This mainly involved adding some MBus window related
configuration.

However, this configuration is currently done too early in ->probe():
it is done before clocks are enabled, while this configuration
involves touching the registers of the controller, which will hang the
SoC if the clock is disabled. It wasn't noticed until now because the
bootloader typically leaves gatable clocks enabled, but in situations
where we have a deferred probe (due to a CD GPIO that cannot be taken,
for example), then the probe will be re-tried later, after a clock
disable has been done in the exit path of the failed probe attempt of
the device. This second probe() will hang the system due to the clock
being disabled.

This can for example be produced on Armada 385 GP, which has a CD GPIO
connected to an I2C PCA9555. If the driver for the PCA9555 is not
compiled into the kernel, then we will have the following sequence of
events:

  1. The SDHCI probes
  2. It does the MBus configuration (which works, because the clock is
     left enabled by the bootloader)
  3. It enables the clock
  4. It tries to get the CD GPIO, which fails due to the driver being
     missing, so -EPROBE_DEFER is returned.
  5. Before returning -EPROBE_DEFER, the driver cleans up what was
     done, which includes disabling the clock.
  6. Later on, the SDHCI probe is tried again.
  7. It does the MBus configuration, which hangs because the clock is
     no longer enabled.

This commit does the obvious fix of doing the MBus configuration after
the clock has been enabled by the driver.

Fixes: 5491ce3f79 ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:56 +01:00
Adrian Hunter
b5540ce151 mmc: sdhci: Disable re-tuning for HS400
Re-tuning for HS400 mode must be done in HS200
mode. Currently there is no support for that.
That needs to be reflected in the code.
Specifically, if tuning is executed in HS400 mode
then return an error, and do not start the
tuning timer if HS200 tuning is being done prior
to switching to HS400.

Note that periodic re-tuning is not expected
to be needed for HS400 but re-tuning is still
needed after the host controller has lost power.
In the case of suspend/resume that is not necessary
because the card is fully re-initialised. That
just leaves runtime suspend/resume with no support
for HS400 re-tuning.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:56 +01:00
Adrian Hunter
38e40bf5db mmc: sdhci: Simplify use of tuning timer
The tuning timer is always used if the tuning mode
is 1 and there is a tuning count, irrespective of
whether this is the first call, or any subsequent
call. Consequently the logic to start the timer
can be simplified.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:56 +01:00
Adrian Hunter
d519c863fc mmc: sdhci: Add out_unlock to sdhci_execute_tuning
A 'goto' can be used to save duplicating unlocking
and returning.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:55 +01:00
Adrian Hunter
ac00531d9f mmc: sdhci: Tuning should not change max_blk_count
Re-tuning requires that the maximum data length
is limited to 4MiB. The code currently changes
max_blk_count in an attempt to achieve that.
This is wrong because max_blk_count is a different
limit, but it is also un-necessary because
max_req_size is 512KiB anyway. Consequently, the
changes to max_blk_count are removed and the
comment for max_req_size adjusted accordingly.
The comment is also tweaked to show that the 512KiB
limit is a SDMA limit not an ADMA limit.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-12 10:14:55 +01:00
Alexandre Belloni
1c2d26e379 mmc: core: stop trying to switch width when only one bit is supported
mmc_select_bus_width() will try to switch to MMC_BUS_WIDTH_4 even if
MMC_CAP_4_BIT_DATA and MMC_CAP_8_BIT_DATA are not set in host->caps.
Return as soon as possible when those flags are not set

Fixes: 577fb13199 (mmc: rework selection of bus speed mode)
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-29 14:49:28 +01:00
Linus Torvalds
c0f486fde3 More ACPI and power management updates for 3.19-rc1
- Fix a regression in leds-gpio introduced by a recent commit that
    inadvertently changed the name of one of the properties used by
    the driver (Fabio Estevam).
 
  - Fix a regression in the ACPI backlight driver introduced by a
    recent fix that missed one special case that had to be taken
    into account (Aaron Lu).
 
  - Drop the level of some new kernel messages from the ACPI core
    introduced by a recent commit to KERN_DEBUG which they should
    have used from the start and drop some other unuseful KERN_ERR
    messages printed by ACPI (Rafael J Wysocki).
 
  - Revert an incorrect commit modifying the cpupower tool
    (Prarit Bhargava).
 
  - Fix two regressions introduced by recent commits in the OPP
    library and clean up some existing minor issues in that code
    (Viresh Kumar).
 
  - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout
    the tree (or drop it where that can be done) in order to make
    it possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki,
    Ulf Hansson, Ludovic Desroches).  There will be one more
    "CONFIG_PM_RUNTIME removal" batch after this one, because some
    new uses of it have been introduced during the current merge
    window, but that should be sufficient to finally get rid of it.
 
  - Make the ACPI EC driver more robust against race conditions
    related to GPE handler installation failures (Lv Zheng).
 
  - Prevent the ACPI device PM core code from attempting to
    disable GPEs that it has not enabled which confuses ACPICA
    and makes it report errors unnecessarily (Rafael J Wysocki).
 
  - Add a "force" command line switch to the intel_pstate driver
    to make it possible to override the blacklisting of some
    systems in that driver if needed (Ethan Zhao).
 
  - Improve intel_pstate code documentation and add a MAINTAINERS
    entry for it (Kristen Carlson Accardi).
 
  - Make the ACPI fan driver create cooling device interfaces
    witn names that reflect the IDs of the ACPI device objects
    they are associated with, except for "generic" ACPI fans
    (PNP ID "PNP0C0B").  That's necessary for user space thermal
    management tools to be able to connect the fans with the
    parts of the system they are supposed to be cooling properly.
    From Srinivas Pandruvada.
 
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Merge tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more ACPI and power management updates from Rafael Wysocki:
 "These are regression fixes (leds-gpio, ACPI backlight driver,
  operating performance points library, ACPI device enumeration
  messages, cpupower tool), other bug fixes (ACPI EC driver, ACPI device
  PM), some cleanups in the operating performance points (OPP)
  framework, continuation of CONFIG_PM_RUNTIME elimination, a couple of
  minor intel_pstate driver changes, a new MAINTAINERS entry for it and
  an ACPI fan driver change needed for better support of thermal
  management in user space.

  Specifics:

   - Fix a regression in leds-gpio introduced by a recent commit that
     inadvertently changed the name of one of the properties used by the
     driver (Fabio Estevam).

   - Fix a regression in the ACPI backlight driver introduced by a
     recent fix that missed one special case that had to be taken into
     account (Aaron Lu).

   - Drop the level of some new kernel messages from the ACPI core
     introduced by a recent commit to KERN_DEBUG which they should have
     used from the start and drop some other unuseful KERN_ERR messages
     printed by ACPI (Rafael J Wysocki).

   - Revert an incorrect commit modifying the cpupower tool (Prarit
     Bhargava).

   - Fix two regressions introduced by recent commits in the OPP library
     and clean up some existing minor issues in that code (Viresh
     Kumar).

   - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout the
     tree (or drop it where that can be done) in order to make it
     possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki, Ulf
     Hansson, Ludovic Desroches).

     There will be one more "CONFIG_PM_RUNTIME removal" batch after this
     one, because some new uses of it have been introduced during the
     current merge window, but that should be sufficient to finally get
     rid of it.

   - Make the ACPI EC driver more robust against race conditions related
     to GPE handler installation failures (Lv Zheng).

   - Prevent the ACPI device PM core code from attempting to disable
     GPEs that it has not enabled which confuses ACPICA and makes it
     report errors unnecessarily (Rafael J Wysocki).

   - Add a "force" command line switch to the intel_pstate driver to
     make it possible to override the blacklisting of some systems in
     that driver if needed (Ethan Zhao).

   - Improve intel_pstate code documentation and add a MAINTAINERS entry
     for it (Kristen Carlson Accardi).

   - Make the ACPI fan driver create cooling device interfaces witn
     names that reflect the IDs of the ACPI device objects they are
     associated with, except for "generic" ACPI fans (PNP ID "PNP0C0B").

     That's necessary for user space thermal management tools to be able
     to connect the fans with the parts of the system they are supposed
     to be cooling properly.  From Srinivas Pandruvada"

* tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits)
  MAINTAINERS: add entry for intel_pstate
  ACPI / video: update the skip case for acpi_video_device_in_dod()
  power / PM: Eliminate CONFIG_PM_RUNTIME
  NFC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  SCSI / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  ACPI / EC: Fix unexpected ec_remove_handlers() invocations
  Revert "tools: cpupower: fix return checks for sysfs_get_idlestate_count()"
  tracing / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  x86 / PM: Replace CONFIG_PM_RUNTIME in io_apic.c
  PM: Remove the SET_PM_RUNTIME_PM_OPS() macro
  mmc: atmel-mci: use SET_RUNTIME_PM_OPS() macro
  PM / Kconfig: Replace PM_RUNTIME with PM in dependencies
  ARM / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  sound / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  phy / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  video / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  tty / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  spi: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  ACPI / PM: Do not disable wakeup GPEs that have not been enabled
  ACPI / utils: Drop error messages from acpi_evaluate_reference()
  ...
2014-12-18 20:28:33 -08:00
Linus Torvalds
e6b5be2be4 Driver core patches for 3.19-rc1
Here's the set of driver core patches for 3.19-rc1.
 
 They are dominated by the removal of the .owner field in platform
 drivers.  They touch a lot of files, but they are "simple" changes, just
 removing a line in a structure.
 
 Other than that, a few minor driver core and debugfs changes.  There are
 some ath9k patches coming in through this tree that have been acked by
 the wireless maintainers as they relied on the debugfs changes.
 
 Everything has been in linux-next for a while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core update from Greg KH:
 "Here's the set of driver core patches for 3.19-rc1.

  They are dominated by the removal of the .owner field in platform
  drivers.  They touch a lot of files, but they are "simple" changes,
  just removing a line in a structure.

  Other than that, a few minor driver core and debugfs changes.  There
  are some ath9k patches coming in through this tree that have been
  acked by the wireless maintainers as they relied on the debugfs
  changes.

  Everything has been in linux-next for a while"

* tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits)
  Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries"
  fs: debugfs: add forward declaration for struct device type
  firmware class: Deletion of an unnecessary check before the function call "vunmap"
  firmware loader: fix hung task warning dump
  devcoredump: provide a one-way disable function
  device: Add dev_<level>_once variants
  ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries
  ath: use seq_file api for ath9k debugfs files
  debugfs: add helper function to create device related seq_file
  drivers/base: cacheinfo: remove noisy error boot message
  Revert "core: platform: add warning if driver has no owner"
  drivers: base: support cpu cache information interface to userspace via sysfs
  drivers: base: add cpu_device_create to support per-cpu devices
  topology: replace custom attribute macros with standard DEVICE_ATTR*
  cpumask: factor out show_cpumap into separate helper function
  driver core: Fix unbalanced device reference in drivers_probe
  driver core: fix race with userland in device_add()
  sysfs/kernfs: make read requests on pre-alloc files use the buffer.
  sysfs/kernfs: allow attributes to request write buffer be pre-allocated.
  fs: sysfs: return EGBIG on write if offset is larger than file size
  ...
2014-12-14 16:10:09 -08:00
Ludovic Desroches
c3cb6ba415 mmc: atmel-mci: use SET_RUNTIME_PM_OPS() macro
The currently used SET_PM_RUNTIME_PM_OPS() macro is defined to the
SET_RUNTIME_PM_OPS() macro. Convert to the later, since that's the
proper one to use.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-12-13 00:44:11 +01:00
Linus Torvalds
92a578b064 ACPI and power management updates for 3.19-rc1
This time we have some more new material than we used to have during
 the last couple of development cycles.
 
 The most important part of it to me is the introduction of a unified
 interface for accessing device properties provided by platform
 firmware.  It works with Device Trees and ACPI in a uniform way and
 drivers using it need not worry about where the properties come
 from as long as the platform firmware (either DT or ACPI) makes
 them available.  It covers both devices and "bare" device node
 objects without struct device representation as that turns out to
 be necessary in some cases.  This has been in the works for quite
 a few months (and development cycles) and has been approved by
 all of the relevant maintainers.
 
 On top of that, some drivers are switched over to the new interface
 (at25, leds-gpio, gpio_keys_polled) and some additional changes are
 made to the core GPIO subsystem to allow device drivers to manipulate
 GPIOs in the "canonical" way on platforms that provide GPIO information
 in their ACPI tables, but don't assign names to GPIO lines (in which
 case the driver needs to do that on the basis of what it knows about
 the device in question).  That also has been approved by the GPIO
 core maintainers and the rfkill driver is now going to use it.
 
 Second is support for hardware P-states in the intel_pstate driver.
 It uses CPUID to detect whether or not the feature is supported by
 the processor in which case it will be enabled by default.  However,
 it can be disabled entirely from the kernel command line if necessary.
 
 Next is support for a platform firmware interface based on ACPI
 operation regions used by the PMIC (Power Management Integrated
 Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
 That interface is used for manipulating power resources and for
 thermal management: sensor temperature reporting, trip point setting
 and so on.
 
 Also the ACPI core is now going to support the _DEP configuration
 information in a limited way.  Basically, _DEP it supposed to reflect
 off-the-hierarchy dependencies between devices which may be very
 indirect, like when AML for one device accesses locations in an
 operation region handled by another device's driver (usually, the
 device depended on this way is a serial bus or GPIO controller).
 The support added this time is sufficient to make the ACPI battery
 driver work on Asus T100A, but it is general enough to be able to
 cover some other use cases in the future.
 
 Finally, we have a new cpufreq driver for the Loongson1B processor.
 
 In addition to the above, there are fixes and cleanups all over the
 place as usual and a traditional ACPICA update to a recent upstream
 release.
 
 As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver
 for Intel platforms should be able to handle power management of
 the DMA engine correctly, the cpufreq-dt driver should interact
 with the thermal subsystem in a better way and the ACPI backlight
 driver should handle some more corner cases, among other things.
 
 On top of the ACPICA update there are fixes for race conditions
 in the ACPICA's interrupt handling code which might lead to some
 random and strange looking failures on some systems.
 
 In the cleanups department the most visible part is the series
 of commits targeted at getting rid of the CONFIG_PM_RUNTIME
 configuration option.  That was triggered by a discussion
 regarding the generic power domains code during which we realized
 that trying to support certain combinations of PM config options
 was painful and not really worth it, because nobody would use them
 in production anyway.  For this reason, we decided to make
 CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the
 conclusion that the latter became redundant and CONFIG_PM could
 be used instead of it.  The material here makes that replacement
 in a major part of the tree, but there will be at least one more
 batch of that in the second part of the merge window.
 
 Specifics:
 
  - Support for retrieving device properties information from ACPI
    _DSD device configuration objects and a unified device properties
    interface for device drivers (and subsystems) on top of that.
    As stated above, this works with Device Trees and ACPI and allows
    device drivers to be written in a platform firmware (DT or ACPI)
    agnostic way.  The at25, leds-gpio and gpio_keys_polled drivers
    are now going to use this new interface and the GPIO subsystem
    is additionally modified to allow device drivers to assign names
    to GPIO resources returned by ACPI _CRS objects (in case _DSD is
    not present or does not provide the expected data).  The changes
    in this set are mostly from Mika Westerberg, Rafael J Wysocki,
    Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam,
    Geert Uytterhoeven).
 
  - Support for Hardware Managed Performance States (HWP) as described
    in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
    driver.  CPUID is used to detect whether or not the feature is
    supported by the processor.  If supported, it will be enabled
    automatically unless the intel_pstate=no_hwp switch is present in
    the kernel command line.  From Dirk Brandewie.
 
  - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
 
  - Support for firmware interface based on ACPI operation regions
    used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
    platforms for power resource control and thermal management
    (Aaron Lu).
 
  - Limited support for retrieving off-the-hierarchy dependencies
    between devices from ACPI _DEP device configuration objects
    and deferred probing support for the ACPI battery driver based
    on the _DEP information to make that driver work on Asus T100A
    (Lan Tianyu).
 
  - New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
 
  - ACPICA update to upstream revision 20141107 which only affects
    tools (Bob Moore).
 
  - Fixes for race conditions in the ACPICA's interrupt handling
    code and in the ACPI code related to system suspend and resume
    (Lv Zheng and Rafael J Wysocki).
 
  - ACPI core fix for an RCU-related issue in the ioremap() regions
    management code that slowed down significantly after CPUs had
    been allowed to enter idle states even if they'd had RCU callbakcs
    queued and triggered some problems in certain proprietary graphics
    driver (and elsewhere).  The fix replaces synchronize_rcu() in
    that code with synchronize_rcu_expedited() which makes the issue
    go away.  From Konstantin Khlebnikov.
 
  - ACPI LPSS (Low-Power Subsystem) driver fix to handle power
    management of the DMA engine included into the LPSS correctly.
    The problem is that the DMA engine doesn't have ACPI PM support
    of its own and it simply is turned off when the last LPSS device
    having ACPI PM support goes into D3cold.  To work around that,
    the PM domain used by the ACPI LPSS driver is redesigned so at
    least one device with ACPI PM support will be on as long as the
    DMA engine is in use.  From Andy Shevchenko.
 
  - ACPI backlight driver fix to avoid using it on "Win8-compatible"
    systems where it doesn't work and where it was used by default by
    mistake (Aaron Lu).
 
  - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
    Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and
    Ashwin Chaugule (mostly related to the upcoming ARM64 support).
 
  - Intel RAPL (Running Average Power Limit) power capping driver
    fixes and improvements including new processor IDs (Jacob Pan).
 
  - Generic power domains modification to power up domains after
    attaching devices to them to meet the expectations of device
    drivers and bus types assuming devices to be accessible at
    probe time (Ulf Hansson).
 
  - Preliminary support for controlling device clocks from the
    generic power domains core code and modifications of the
    ARM/shmobile platform to use that feature (Ulf Hansson).
 
  - Assorted minor fixes and cleanups of the generic power
    domains core code (Ulf Hansson, Geert Uytterhoeven).
 
  - Assorted minor fixes and cleanups of the device clocks control
    code in the PM core (Geert Uytterhoeven, Grygorii Strashko).
 
  - Consolidation of device power management Kconfig options by making
    CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
    which is now redundant (Rafael J Wysocki and Kevin Hilman).  That
    is the first batch of the changes needed for this purpose.
 
  - Core device runtime power management support code cleanup related
    to the execution of callbacks (Andrzej Hajda).
 
  - cpuidle ARM support improvements (Lorenzo Pieralisi).
 
  - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and
    a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
    Bartlomiej Zolnierkiewicz).
 
  - New cpufreq driver callback (->ready) to be executed when the
    cpufreq core is ready to use a given policy object and cpufreq-dt
    driver modification to use that callback for cooling device
    registration (Viresh Kumar).
 
  - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu,
    James Geboski, Tomeu Vizoso).
 
  - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
    cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
    Stefan Wahren, Petr Cvek).
 
  - OPP (Operating Performance Points) framework modification to
    allow OPPs to be removed too and update of a few cpufreq drivers
    (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
    during initialization) on driver removal (Viresh Kumar).
 
  - Hibernation core fixes and cleanups (Tina Ruchandani and
    Markus Elfring).
 
  - PM Kconfig fix related to CPU power management (Pankaj Dubey).
 
  - cpupower tool fix (Prarit Bhargava).
 
 /
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Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and power management updates from Rafael Wysocki:
 "This time we have some more new material than we used to have during
  the last couple of development cycles.

  The most important part of it to me is the introduction of a unified
  interface for accessing device properties provided by platform
  firmware.  It works with Device Trees and ACPI in a uniform way and
  drivers using it need not worry about where the properties come from
  as long as the platform firmware (either DT or ACPI) makes them
  available.  It covers both devices and "bare" device node objects
  without struct device representation as that turns out to be necessary
  in some cases.  This has been in the works for quite a few months (and
  development cycles) and has been approved by all of the relevant
  maintainers.

  On top of that, some drivers are switched over to the new interface
  (at25, leds-gpio, gpio_keys_polled) and some additional changes are
  made to the core GPIO subsystem to allow device drivers to manipulate
  GPIOs in the "canonical" way on platforms that provide GPIO
  information in their ACPI tables, but don't assign names to GPIO lines
  (in which case the driver needs to do that on the basis of what it
  knows about the device in question).  That also has been approved by
  the GPIO core maintainers and the rfkill driver is now going to use
  it.

  Second is support for hardware P-states in the intel_pstate driver.
  It uses CPUID to detect whether or not the feature is supported by the
  processor in which case it will be enabled by default.  However, it
  can be disabled entirely from the kernel command line if necessary.

  Next is support for a platform firmware interface based on ACPI
  operation regions used by the PMIC (Power Management Integrated
  Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
  That interface is used for manipulating power resources and for
  thermal management: sensor temperature reporting, trip point setting
  and so on.

  Also the ACPI core is now going to support the _DEP configuration
  information in a limited way.  Basically, _DEP it supposed to reflect
  off-the-hierarchy dependencies between devices which may be very
  indirect, like when AML for one device accesses locations in an
  operation region handled by another device's driver (usually, the
  device depended on this way is a serial bus or GPIO controller).  The
  support added this time is sufficient to make the ACPI battery driver
  work on Asus T100A, but it is general enough to be able to cover some
  other use cases in the future.

  Finally, we have a new cpufreq driver for the Loongson1B processor.

  In addition to the above, there are fixes and cleanups all over the
  place as usual and a traditional ACPICA update to a recent upstream
  release.

  As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for
  Intel platforms should be able to handle power management of the DMA
  engine correctly, the cpufreq-dt driver should interact with the
  thermal subsystem in a better way and the ACPI backlight driver should
  handle some more corner cases, among other things.

  On top of the ACPICA update there are fixes for race conditions in the
  ACPICA's interrupt handling code which might lead to some random and
  strange looking failures on some systems.

  In the cleanups department the most visible part is the series of
  commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration
  option.  That was triggered by a discussion regarding the generic
  power domains code during which we realized that trying to support
  certain combinations of PM config options was painful and not really
  worth it, because nobody would use them in production anyway.  For
  this reason, we decided to make CONFIG_PM_SLEEP select
  CONFIG_PM_RUNTIME and that lead to the conclusion that the latter
  became redundant and CONFIG_PM could be used instead of it.  The
  material here makes that replacement in a major part of the tree, but
  there will be at least one more batch of that in the second part of
  the merge window.

  Specifics:

   - Support for retrieving device properties information from ACPI _DSD
     device configuration objects and a unified device properties
     interface for device drivers (and subsystems) on top of that.  As
     stated above, this works with Device Trees and ACPI and allows
     device drivers to be written in a platform firmware (DT or ACPI)
     agnostic way.  The at25, leds-gpio and gpio_keys_polled drivers are
     now going to use this new interface and the GPIO subsystem is
     additionally modified to allow device drivers to assign names to
     GPIO resources returned by ACPI _CRS objects (in case _DSD is not
     present or does not provide the expected data).  The changes in
     this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron
     Lu, and Darren Hart with some fixes from others (Fabio Estevam,
     Geert Uytterhoeven).

   - Support for Hardware Managed Performance States (HWP) as described
     in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
     driver.  CPUID is used to detect whether or not the feature is
     supported by the processor.  If supported, it will be enabled
     automatically unless the intel_pstate=no_hwp switch is present in
     the kernel command line.  From Dirk Brandewie.

   - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).

   - Support for firmware interface based on ACPI operation regions used
     by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
     platforms for power resource control and thermal management (Aaron
     Lu).

   - Limited support for retrieving off-the-hierarchy dependencies
     between devices from ACPI _DEP device configuration objects and
     deferred probing support for the ACPI battery driver based on the
     _DEP information to make that driver work on Asus T100A (Lan
     Tianyu).

   - New cpufreq driver for the Loongson1B processor (Kelvin Cheung).

   - ACPICA update to upstream revision 20141107 which only affects
     tools (Bob Moore).

   - Fixes for race conditions in the ACPICA's interrupt handling code
     and in the ACPI code related to system suspend and resume (Lv Zheng
     and Rafael J Wysocki).

   - ACPI core fix for an RCU-related issue in the ioremap() regions
     management code that slowed down significantly after CPUs had been
     allowed to enter idle states even if they'd had RCU callbakcs
     queued and triggered some problems in certain proprietary graphics
     driver (and elsewhere).  The fix replaces synchronize_rcu() in that
     code with synchronize_rcu_expedited() which makes the issue go
     away.  From Konstantin Khlebnikov.

   - ACPI LPSS (Low-Power Subsystem) driver fix to handle power
     management of the DMA engine included into the LPSS correctly.  The
     problem is that the DMA engine doesn't have ACPI PM support of its
     own and it simply is turned off when the last LPSS device having
     ACPI PM support goes into D3cold.  To work around that, the PM
     domain used by the ACPI LPSS driver is redesigned so at least one
     device with ACPI PM support will be on as long as the DMA engine is
     in use.  From Andy Shevchenko.

   - ACPI backlight driver fix to avoid using it on "Win8-compatible"
     systems where it doesn't work and where it was used by default by
     mistake (Aaron Lu).

   - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
     Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin
     Chaugule (mostly related to the upcoming ARM64 support).

   - Intel RAPL (Running Average Power Limit) power capping driver fixes
     and improvements including new processor IDs (Jacob Pan).

   - Generic power domains modification to power up domains after
     attaching devices to them to meet the expectations of device
     drivers and bus types assuming devices to be accessible at probe
     time (Ulf Hansson).

   - Preliminary support for controlling device clocks from the generic
     power domains core code and modifications of the ARM/shmobile
     platform to use that feature (Ulf Hansson).

   - Assorted minor fixes and cleanups of the generic power domains core
     code (Ulf Hansson, Geert Uytterhoeven).

   - Assorted minor fixes and cleanups of the device clocks control code
     in the PM core (Geert Uytterhoeven, Grygorii Strashko).

   - Consolidation of device power management Kconfig options by making
     CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
     which is now redundant (Rafael J Wysocki and Kevin Hilman).  That
     is the first batch of the changes needed for this purpose.

   - Core device runtime power management support code cleanup related
     to the execution of callbacks (Andrzej Hajda).

   - cpuidle ARM support improvements (Lorenzo Pieralisi).

   - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a
     new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
     Bartlomiej Zolnierkiewicz).

   - New cpufreq driver callback (->ready) to be executed when the
     cpufreq core is ready to use a given policy object and cpufreq-dt
     driver modification to use that callback for cooling device
     registration (Viresh Kumar).

   - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James
     Geboski, Tomeu Vizoso).

   - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
     cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
     Stefan Wahren, Petr Cvek).

   - OPP (Operating Performance Points) framework modification to allow
     OPPs to be removed too and update of a few cpufreq drivers
     (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
     during initialization) on driver removal (Viresh Kumar).

   - Hibernation core fixes and cleanups (Tina Ruchandani and Markus
     Elfring).

   - PM Kconfig fix related to CPU power management (Pankaj Dubey).

   - cpupower tool fix (Prarit Bhargava)"

* tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits)
  i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c
  dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  tools: cpupower: fix return checks for sysfs_get_idlestate_count()
  drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME
  MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  leds: leds-gpio: Fix multiple instances registration without 'label' property
  iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  hwrandom / exynos / PM: Use CONFIG_PM in #ifdef
  block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  USB / PM: Drop CONFIG_PM_RUNTIME from the USB core
  PM: Merge the SET*_RUNTIME_PM_OPS() macros
  ...
2014-12-10 21:17:00 -08:00
Ulf Hansson
33d73935e4 mmc: sdhci-msm: Convert to mmc_send_tuning()
Instead of having a local hack taking care of sending the tuning
command and as well to verify the response pattern, let's convert to
the common mmc_send_tuning() API instead.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Georgi Djakov <gdjakov@mm-sol.com>
Acked-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
2014-12-08 09:21:06 +01:00
Ulf Hansson
d178532689 mmc: sdhci-esdhc-imx: Convert to mmc_send_tuning()
Instead of having a local function taking care of sending the tuning
command, let's use the common mmc_send_tuning() API provided by the mmc
core. In this way the request will be handled as any other request by
sdhci core.

As an effect of this change, the pm_runtime_get_sync() call at
esdhc_prepare_tuning() isn't needed any more.

This patch will also introduce another change in behavior, since before
the response pattern to the tuning command wasn't verified by
sdhci-esdhc-imx. The mmc_send_tuning() does that.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Dong Aisheng <b29396@freescale.com>
2014-12-08 09:20:47 +01:00
Ulf Hansson
fe5afb13d4 mmc: core: Let mmc_send_tuning() to take struct mmc_host* as parameter
To be able to use mmc_send_tuning() prior the struct mmc_card has been
allocated, let's convert it to take the struct mmc_host* as parameter
instead.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Dong Aisheng <b29396@freescale.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
2014-12-08 09:11:04 +01:00
Bhuvanesh Surachari
fdb409f636 mmc: queue: Improve error handling during allocation of bounce buffers
Allocation of previous bounce buffer in mmc_init_queue when the current
bounce buffer allocation fails was leading to a crash later in
__blk_segment_map_sg. Error handling is improved by allocating previous
bounce buffer only if the current bounce buffer allocation succeeds.

Signed-off-by: Bhuvanesh Surachari <bhuvanesh_surachari@mentor.com>
Signed-off-by: Harish Jenny K N <harish_kandiga@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-05 10:33:17 +01:00
Rafael J. Wysocki
162d6f9800 MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
After commit b2b49ccbdd (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks
depending on CONFIG_PM_RUNTIME may now be changed to depend on
CONFIG_PM.

Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under
drivers/mmc/.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-05 03:05:33 +01:00
Rafael J. Wysocki
6ed23b806e PM: Merge the SET*_RUNTIME_PM_OPS() macros
The SET_PM_RUNTIME_PM_OPS() and SET_RUNTIME_PM_OPS() macros are
identical except that one of them is not empty for CONFIG_PM set,
while the other one is not empty for CONFIG_PM_RUNTIME set,
respectively.

However, after commit b2b49ccbdd (PM: Kconfig: Set PM_RUNTIME if
PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so one
of these macros is now redundant.

For this reason, replace SET_PM_RUNTIME_PM_OPS() with
SET_RUNTIME_PM_OPS() everywhere and redefine the SET_PM_RUNTIME_PM_OPS
symbol as SET_RUNTIME_PM_OPS in case new code is starting to use the
macro being removed here.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-12-04 00:51:30 +01:00
Adrian Hunter
9d65cb88e5 mmc: sdhci-acpi: Add two host capabilities for Intel
Intel host controllers are capable of doing the bus
width test and of waiting while busy, so add the
capability flags.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 12:25:29 +01:00
Adrian Hunter
6aab23a8f7 mmc: sdhci-pci: Add two host capabilities for BYT
BYT host controllers are capable of doing the bus
width test and of waiting while busy, so add the
capability flags.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 12:25:29 +01:00
Adrian Hunter
e1f5633ad4 mmc: sdhci-acpi: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC actually causes
standard-compliant behaviour by causing the flagging
of the last DMA transfer descriptor as the end
instead of there being an additional nop descriptor
which is flagged as the end.  Consequently, it is
better to have the quirk.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 12:25:29 +01:00
Adrian Hunter
db6e8cdfcd mmc: sdhci-pci: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC to BYT
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC actually causes
standard-compliant behaviour by causing the flagging
of the last DMA transfer descriptor as the end
instead of there being an additional nop descriptor
which is flagged as the end.  Consequently, it is
better to have the quirk.  Add it for BYT.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 12:25:29 +01:00
ludovic.desroches@atmel.com
467e081d23 mmc: atmel-mci: use probe deferring if dma controller is not ready yet
Return probe defer if requesting a dma channel without a dma controller
probed.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 11:08:33 +01:00
ludovic.desroches@atmel.com
5e0fe89740 mmc: atmel-mci: stop using specific initcall
No more use late initcall to manage probing order. Use probe deferring
if needed.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 11:01:35 +01:00
ludovic.desroches@atmel.com
ab050b9269 mmc: atmel-mci: remove __init/__exit attributes
Using __init/__exit attributes can cause several breakages so remove
them.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 11:01:06 +01:00
ludovic.desroches@atmel.com
1c7615b90c mmc: atmel-mci: remove useless DMA stuff for non-dt devices
All devices with a DMA controller are DT compliant and legacy support
has been removed. For those reasons, some DMA stuff is useless.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-12-02 11:00:31 +01:00
Ulf Hansson
903101a839 mmc: omap_hsmmc: Fix UHS card with DDR50 support
The commit, mmc: omap: clarify DDR timing mode between SD-UHS and eMMC,
switched omap_hsmmc to support MMC DDR mode instead of UHS DDR50 mode.

Add UHS DDR50 mode again and this time let's also keep the MMC DDR mode.

Fixes: 5438ad95a5 (mmc: omap: clarify DDR timing mode between SD-UHS and eMMC)
Reported-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:40:39 +01:00
Minda Chen
996903de92 mmc: core: add core-level function for sending tuning commands
According to the SD card spec, Add a manual tuning command function
for SDR104/HS200.
Sending command 19 or command 21 to read data and compare with the
tunning block pattern.

This patch will help to decrease some platform private codes in SDHCI
platform_execute_tuning() callbacks.

Signed-off-by: Minda Chen <Minda.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:36:51 +01:00
Vincent Yang
c6eb588028 mmc: core: hold SD Clock before CMD11 during Signal
Voltage Switch Procedure

This patch is to fix an issue found on mb86s7x platforms.

[symptom]
There are some UHS-1 SD memory cards sometimes cannot be detected correctly,
e.g., Transcend 600x SDXC 64GB UHS-1 memory card.
During Signal Voltage Switch Procedure, failure to switch is indicated
by the card holding DAT[3:0] low.

[analysis]
According to SD Host Controller Simplified Specification Version 3.00
chapter 3.6.1, the Signal Voltage Switch Procedure should be:
(1) Check S18A; (2) Issue CMD11; (3) Check CMD 11 response;
(4) Stop providing SD clock; (5) Check DAT[3:0] should be 0000b;
(6) Set 1.8V Signal Enable; (7) Wait 5ms; (8) Check 1.8V Signal Enable;
(9) Provide SD Clock; (10) Wait 1ms; (11) Check DAT[3:0] should be 1111b;
(12) error handling

With CONFIG_MMC_CLKGATE=y, sometimes there is one more gating/un-gating
SD clock between (2) and (3). In this case, some UHS-1 SD cards will hold
DAT[3:0] 0000b at (11) and thus fails Signal Voltage Switch Procedure.

[solution]
By mmc_host_clk_hold() before CMD11, the additional gating/un-gating
SD clock between (2) and (3) can be prevented and thus no failure at (11).
It has been verified with many UHS-1 SD cards on mb86s7x platforms and
works correctly.

Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com>
Reviewed-by: Johan Rudholm <jrudholm@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:05 +01:00
Fabio Estevam
e34d467c51 mmc: mxs-mmc: Check for clk_prepare_enable() error
clk_prepare_enable() may fail and in this case we should propagate the error.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:04 +01:00
Fabio Estevam
5654d90064 mmc: mxs-mmc: Propagate the real error
If platform_get_irq() fails, it is better to propagate the real error value
instead of a 'fake' one.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:04 +01:00
Fabio Estevam
c3cd5c076c mmc: mxs-mmc: No need to do NULL check on 'iores'
devm_ioremap_resource() already checks if 'iores' is NULL or not, so we can
skip this manual check.

While at it, move platform_get_resource() closer to devm_ioremap_resource() for
better readability.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:03 +01:00
Andrew Bresticker
4d7c07cd6c mmc: dw_mmc: Add support for IMG Pistachio
Add support for the DW MMC host found on the Imagination Pistachio SoC.
Like the DW MMC hosts found on SOCFPGA and Rockchip SoCs, the DW MMC
host on Pistachio requires the use of SDMMC_CMD_USE_HOLD_REG.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:03 +01:00
Fabio Estevam
d13552908b mmc: mxs-mmc: Simplify PM hooks
By using SIMPLE_DEV_PM_OPS we can make the code smaller and cleaner.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:02 +01:00
Fabio Estevam
cc87a358c5 mmc: mxs-mmc: Register the irq with the device name
Instead of registering the irq name with the driver's name, it's better to pass
the device name so that we have a more explicit indication as to what mmc
instance the irq is related:

$ cat /proc/interrupts
           CPU0
...
 26:          6         -  96  80010000.ssp

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:02 +01:00
James Hogan
66dfd10173 mmc: dw_mmc: avoid write to CDTHRCTL on older versions
Commit f1d2736c81 (mmc: dw_mmc: control card read threshold) added
dw_mci_ctrl_rd_thld() with an unconditional write to the CDTHRCTL
register at offset 0x100. However before version 240a, the FIFO region
started at 0x100, so the write messes with the FIFO and completely
breaks the driver.

If the version id < 240A, return early from dw_mci_ctl_rd_thld() so as
not to hit this problem.

Fixes: f1d2736c81 (mmc: dw_mmc: control card read threshold)
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.13+
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:02 +01:00
Dan Carpenter
9e2a0c96ef mmc: toshsd: move dereference below check for NULL
We check for NULL pointers after dereferencing so it's too late.  Oddly
enough, Smatch misses this code but complains about the caller passing
NULL pointers to this function:

	drivers/mmc/host/toshsd.c:389 toshsd_irq()
	error: we previously assumed 'host->cmd' could be null (see line 349)

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:01 +01:00
ludovic.desroches@atmel.com
ecb89f2f5f mmc: atmel-mci: remove compat for non DT board when requesting dma chan
All boards with a dma controller have DT support so using
dma_request_slave_channel_compat is no more needed.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:01 +01:00
Addy Ke
767562348b mmc: dw_mmc: add support for the other bit of sdio interrupt
The bit of sdio interrupt is 16 in designware implementation,
but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
number of slot0 in the SDIO interrupt registers.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:00 +01:00
Andrew Lunn
3c583f70a8 mmc: mvsdio: Work around broken TX DMA
In order to use the mvsdio driver for sdio, it has been necessary to
use a module parameter to disable DMA so to force PIO is used. It is
then possible to use wireless LAN devices like mwifiex found on
topkick and mirabox. However, accessing an MMC SD card does work with
DMA.

Investigation has shown that MMC block device accesses are always
aligned to 64 byte boundaries, where as transfers from mwifiex are
rarely more than word aligned. It has also been determined that card
to host transfers work with DMA for SDIO devices, but host to card
transfers with DMA have problems.

This patch extends the current checks for buffers which are not word
aligned or multiple of words. All host to card transfers which are not
64 byte aligned are now also performed via PIO. This should not affect
the performance of SD cards, but allow sdio devices to work out of the
box, and they are likely to be more efficient since DMA will be used
for card to host transfers.

Tested on mirabox for wifi via mwifiex
Tested on 370 RD for file systems on an SD card.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:31:00 +01:00
Ben Hutchings
a26eba614a mmc: block: Increase max_devices
Currently the driver imposes a limit of 256 total minor numbers,
apparently based on the historic Unix/Linux limit.  This is quite
restrictive, particularly if we raise the maximum number of
partitions per card to 256 to match sd.

In order to make the full minor number space available we would
have to replace the static dev_use and name_use arrays with struct
ida.  But we can at least allow use of 256 cards rather than just
256 minors, with only a small change.

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:59 +01:00
Alim Akhtar
c34346b200 mmc: dw_mmc: add support for ARM64
There are upcoming ARM64 SoCs with dw_mmc host controller.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:59 +01:00
NeilBrown
006fc51cb3 mmc: core: reset sdio card properly on resume.
mmc_sdio_power_restore() calls
	mmc_send_if_cond(host, host->card->ocr);

	ret = mmc_send_io_op_cond(host, 0, NULL);

between mmc_go_idle() and mmc_sdio_init_card().
mmc_sdio_resume() needs to as well, else my libertas sdio wifi
device doesn't resume properly from suspend.

Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:59 +01:00
NeilBrown
59b6c9e0ad mmc: core: use card->ocr when negotiating voltage setting in mmc_sdio_power_restore
As we are restoring power to a known card, it makes sense to use
the 'ocr' value known for the card rather than the generic one
for the host interface.
This matches the use of card->ocr passed to mmc_power_up in
mmc_sdio_runtime_resume  (just before mmc_sdio_power_restore is
called), and the value passed to mmc_sdio_init_card() a little
later in mmc_sdio_power_restore().

Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:58 +01:00
Ondrej Zary
a5eb8bbd66 mmc: add Toshiba PCI SD controller driver
This patch resurrects an old never-finished driver for Toshiba PCI SD
controllers found in some older Toshiba laptops (such as Portege R100):

02:0d.0 System peripheral [0880]: Toshiba America Info Systems SD TypA Controller [1179:0805] (rev 05)

The code is fixed, cleaned up and successfully tested with SD, SDHC, SDXC and
MMC cards on Portege R100. (MMC cards don't even work in Windows!)
SDIO probably does not work (don't have any SDIO card).

The hardware is slow (around 2 MB/s - same in Windows) because it does not
support bus mastering (busmaster enable bit cannot be set in PCI control reg).
Also the card clock is limited to 16MHz (33MHz PCI clock divided by 2).

Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:58 +01:00
Abhilash Kesavan
89ad2be75a mmc: dw_mmc: exynos: Add support for exynos7
The Exynos7 has a DWMMC controller (v2.70a) which is different from
prior versions. This patch adds new compatible strings for exynos7.
This patch also fixes the CLKSEL register offset on exynos7.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Tested-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:57 +01:00
Johan Rudholm
2d079c43bc mmc: core: consistent handling of initial values
mmc_do_hw_reset(), mmc_power_up() and mmc_power_off() all set similar
initial values for bus_mode, bus_width, chip_select and timing. Let's
make this handling simpler and more consistent by sticking them
together in a common function. This will introduce small changes in
behavior in the following places:

mmc_power_off():

  For SPI hosts, explicitly set bus_mode = MMC_BUSMODE_PUSHPULL and
  chip_select = MMC_CS_HIGH, before we left them as they were.

  For non-SPI hosts, set bus_mode = MMC_BUSMODE_PUSHPULL instead of
  MMC_BUSMODE_OPENDRAIN as before.

  These two changes should not be a problem since the device will be
  powered off anyway.

mmc_do_hw_reset():

  Always set bus_mode = MMC_BUSMODE_PUSHPULL, as required by SD/SDIO
  cards. MMC cards require MMC_BUSMODE_OPENDRAIN, but this is taken
  care of by mmc_init_card() and mmc_attach_mmc().

Signed-off-by: Johan Rudholm <johanru@axis.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:57 +01:00
Andreas Fenkart
80412ca8ab mmc: omap_hsmmc: remove unused slot_id parameter
omap_hsmmc only supports one slot. So slot id is always zero, and
slot id was never used in the callbacks anyway

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:56 +01:00
Andreas Fenkart
b5cd43f062 mmc: omap_hsmmc: Remove unnecessary callbacks from platform data
These callbacks are set during driver probe and not from the platform
init, -- evtl. they had been for oamp 1/2 -- for omap3 they are local
functions of the driver. These indirection could be dropped
altogether in favor of regular function calls TODO

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:56 +01:00
Andreas Fenkart
1e363e3b47 mmc: omap_hsmmc: pass mmc_priv struct to gpio init / free
this is needed when installing callbacks in the host struct and not
in the platform data, e.g. cover detect irq should be stored in
omap_hsmmc_host and not platform data

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:56 +01:00
Andreas Fenkart
326119c992 mmc: omap_hsmmc: remove unnecessary omap_hsmmc_slot_data indirection
omap_hsmmc supports only one slot per controller, see OMAP_MMC_MAX_SLOTS.
This unnecessary indirection leads to confusion in the omap_hsmmc driver.
For example the card_detect callback is not installed by platform code
but from the driver probe function. So it should be a field of
omap_hsmmc_host. But since it is declared under the platform slot while
the drivers struct omap_hsmmc_host has no slot abstraction, this looks
like a bug, especially when not familiar that this driver only supports
1 slot anyway.
Either we should add a slot abstraction to omap_hsmmc_host or remove
it from the platform data struct. Removed since slot multiplexing is
an un-implemented feature

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:55 +01:00
Andreas Fenkart
bb09d15114 mmc: omap_hsmmc: remove un-initialized callbacks from platform data
these callbacks are not set, probably legacy omap 1/2 features

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:54 +01:00
Andreas Fenkart
5514343890 ARM: OMAP1/2+: MMC: separate platform data for mmc and mmc hs driver
- omap mmc driver supports multiplexing, omap_mmc_hs doesn't
this leads to one of the major confusions in the omap_hsmmc driver

- platform data should be read-only for the driver
most callbacks are not set by the omap3 platform init code while still
required. So they are set from the driver probe function, which is against
the paradigm that platform-data should not be modified by the driver
typical examples are card_detect, read_only callbacks

un-bundling by searching for driver name \"omap_hsmmc in the
arch/arm folder. omap_hsmmc_platform_data is not initialized directly,
but from omap2_hsmmc_info, which is defined in a separate header file
not touched by this patch

hwmod includes platform headers to declare features of the platform. All
the declared features are prefixed OMAP_HSMMC. There is no need to
include platform header from hwmod other except for feature defines

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:53 +01:00
Wenyou Yang
b5b64fa6cd mmc: atmel-mci: adopt pinctrl support
Amend the atmel mci pin controller to optionally take a pin control
handle and set the state of the pins to:
- "default" on boot, resume and before performing an transfer.
- "sleep" on suspend().

This should make it possible to optimize energy usage for the pins
both for the suspend/resume cycle.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:52 +01:00
Adrian Hunter
e9fb05d5bc mmc: sdhci: Add HS400 support to SDHCI driver
MMC core already has support for HS400.  Add HS400
support to SDHCI driver.  The SDHC Standard specification
does not define HS400 so consequently HS400 support is
non-standard.  However HS400 is not selected without
the host controller setting the corresponding capability
flags so host controllers not yet supporting HS400
will not be affected.  To support that, a quirk
SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 is introduced to
enable the use of capabilities register reserved bit-63
to indicate HS400 support.

Because HS400 is non-standard for SDHCI, it is possible
that different vendors will do things in different ways.
However HS200 support faced the same issue but currently
there is only one solution.  As such, no attempt has
been made to provide for alternate HS400 solutions except
for SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:52 +01:00
Adrian Hunter
549c0b1848 mmc: sdhci: Clear also HS400 1.2V capability if 1.2V is not supported
1.2V HS200 mode capability is cleared if there is not a voltage
regulator that supports 1.2V.  Do the same for 1.2V HS400 mode.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:51 +01:00
Adrian Hunter
4bb74313b3 mmc: sdhci: Fix vqmmc error setting
supply.vqmmc is used with the IS_ERR macro which means
the value must be valid or an error code.  NULL is
neither, so replace with ERR_PTR(-EINVAL).

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:51 +01:00
Adrian Hunter
04834a78bd mmc: sdhci: Remove unused SDHCI_CTRL_HS_SDR200
SDHCI_CTRL_HS_SDR200 is unused.  Remove it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:50 +01:00
Prabu Thangamuthu
69d99fdcfd mmc: dw_mmc: Add IDMAC 64-bit address mode support
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address mode from IP version 2.70a onwards.
Updated the driver to support IDMAC 64-bit addressing mode.

Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:50 +01:00
Vincent Wan
e765bfa22a mmc: sdhci-pci: enable sdhci doesn't support hs200 quirk for AMD sdhci
AMD SD controller supports the SDR104 mode, but caps2 can not
be promoted to support hs200 for eMMC.

Signed-off-by: Vincent Wan <vincent.wan@amd.com>
Signed-off-by: Wan Zongshun <mcuos.com@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:45 +01:00
Vincent Wan
d44f88da42 mmc: sdhci-pci: enable the clear transfer mode register quirk for AMD sdhci
This patch is to enable the quirk for AMD sdhci requiring transfer
mode register need to be cleared for commands without data

Signed-off-by: Vincent Wan <vincent.wan@amd.com>
Signed-off-by: Wan Zongshun <mcuos.com@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:39 +01:00
Vincent Wan
9b8ffea6ef mmc: sdhci: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data
SDHC controller in AMD chipsets require SDHC transfer mode
register to be cleared for commands without data. The issue was
uncovered during testing eMMC cards on KB/ML based platforms

Signed-off-by: Vincent Wan <vincent.wan@amd.com>
Signed-off-by: Wan Zongshun <mcuos.com@gmail.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Tested-by: Vikram B <vikram.b@amd.com>
Tested-by: Raghavendra Swamy <raghavendra.swamy@amd.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26 14:30:28 +01:00
Johan Rudholm
ad89fcb290 mmc: core: use mmc_send_status to check hw_reset
Signed-off-by: Johan Rudholm <johanru@axis.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:56 +01:00
Mark Brown
cd0cfdd248 mmc: sdhci-s3c: Check if clk_set_rate() succeeds
It is possible that we may fail to set the clock rate, if we do so then
log the failure and don't bother reprogramming the IP.

Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:55 +01:00
Wenyou Yang
ae552ab02c mmc: atmel-mci: add runtime pm support
Add runtime pm support to atmel mci controller.
Use runtime pm APIs to enable/disable atmel mci's clock.
Use runtime autosuspend APIs to enable auto suspend delay.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[Ulf: Fixed compile error]
2014-11-10 12:40:55 +01:00
Adrian Hunter
3ee14bf79d mmc: mmc_test: Extend "Badly aligned" tests for 8-byte alignment
The "Badly aligned" tests, test reading/writing with alignments
of 1,2 and 3.  SDHCI now has 64-bit ADMA which has 8-byte
alignment, so extend the tests to test up to 7.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:54 +01:00
Adrian Hunter
3828ecaa1d mmc: sdhci-pci: Add 64-bit DMA support
Set a 64-bit DMA mask when using 64-bit DMA.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:54 +01:00
Adrian Hunter
4f64f84348 mmc: sdhci-acpi: Add 64-bit DMA support
Set the DMA mask during the first call to ->enable_dma() to
make use of the SDHCI_USE_64_BIT_DMA flag.

This patch is dependent on
commit 8a2f38ddfe ("ACPI / platform: provide default DMA mask")
which provides the dev->dma_mask pointer without
which dma_set_mask_and_coherent() will always fail.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:53 +01:00
Adrian Hunter
e57a5f61ea mmc: sdhci: Add 64-bit ADMA support
Add 64-bit ADMA support including:
	- add 64-bit ADMA descriptor
	- add SDHCI_USE_64_BIT_DMA flag
	- set upper 32-bits of DMA addresses
	- ability to select 64-bit ADMA
	- ability to use 64-bit ADMA sizes and alignment
	- display "ADMA 64-bit" when host is added

It is assumed that a 64-bit capable device has set a 64-bit DMA mask
and *must* do 64-bit DMA.  A driver has the opportunity to change
that during the first call to ->enable_dma().  Similarly
SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to
implement.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:53 +01:00
Adrian Hunter
0545230f17 mmc: sdhci: Define ADMA descriptor structure
Define the ADMA descriptor structure instead of
using manual offsets and casts.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:53 +01:00
Adrian Hunter
739d46dcc2 mmc: sdhci: Define ADMA constants
Define all the ADMA constants instead of having numbers
scattered throughout the code.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:52 +01:00
Adrian Hunter
4fb213f81f mmc: sdhci: Define maximum segments
Define the maximum number of segments instead of
having the constant 128 appearing in the code in
various places.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:52 +01:00
Adrian Hunter
76fe379aca mmc: sdhci: Parameterize ADMA sizes and alignment
In preparation for 64-bit ADMA, parameterize ADMA sizes
and alignment.  64-bit ADMA has a larger descriptor
because it contains a 64-bit address instead of a 32-bit
address.  Also data must be 8-byte aligned instead
of 4-byte aligned.  Consequently, sdhci_host members
are added for descriptor, table, and buffer sizes
and alignment.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:51 +01:00
Adrian Hunter
1c3d5f6ddc mmc: sdhci: Use 'void *' for not 'u8 *' for ADMA data
It is kernel-style to use 'void *' for anonymous data.
This is being applied to the ADMA bounce buffer which
contains unaligned bytes, and to the ADMA descriptor
table which will contain 32-bit ADMA descriptors
or 64-bit ADMA descriptors when support is added.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:51 +01:00
Adrian Hunter
b5ffa6749c mmc: sdhci: Add sdhci_adma_mark_end()
In preparation for 64-bit ADMA, separate out code
that touches the ADMA descriptor by adding
sdhci_adma_mark_end().

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:50 +01:00
Adrian Hunter
4efaa6fbe1 mmc: sdhci: Rename adma_desc to adma_table
In preparation for 64-bit ADMA, rename adma_desc to
adma_table.  That is because members will be added
for descriptor size and table size, so using adma_desc
(which is the table) is confusing.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:50 +01:00
Adrian Hunter
08621b18a1 mmc: sdhci: Rename two ADMA-related functions for consistency
Rename sdhci_set_adma_desc to sdhci_adma_write_desc and
sdhci_show_adma_error to sdhci_adma_show_error so that
all ADMA functions start with sdhci_adma_.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:50 +01:00
Adrian Hunter
b521cf34bb mmc: sdhci: Fix ADMA table size warning
The intent of the warning is to warn if the ADMA table
overflows.  However there can be one more 'end' entry
so the condition should be adjusted accordingly.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:49 +01:00
Adrian Hunter
8be78c6ad4 mmc: sdhci: Fix ADMA page boundary warnings
Bytes are being copied from/to a single page.  The intent
of the warning is to warn if the page boundary is crossed.
There are two problems.  First, PAGE_MASK is mistaken for
(PAGE_SIZE - 1).  Secondly, instead of using the number
of bytes to copy, the warning is using the maximum that
that value could be.  Fix both.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:49 +01:00
Adrian Hunter
c09df940eb mmc: sdhci: Fix incorrect ADMA2 descriptor table size
The ADMA2 descriptor table size was being calculated incorrectly
Fix it.

Note that it has been wrong for a long time and likely has not
caused any problems because of a combination of 1) not needing
alignment descriptors for block operations 2) more memory being
allocated than was requested 3) the use of
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC which does not use an extra
descriptor for the end marker.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:48 +01:00
Timo Kokkonen
76d5556428 mmc: host: atmel-mci: Add support for non-removable slots
Add support for non-removable slots which have no card detection GPIO
and which should not be polled for a card change.

Signed-off-by: Timo Kokkonen <timo.kokkonen@offcode.fi>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:48 +01:00
Sebastian Hesselbarth
8afdc9cca2 mmc: sdhci-pxav3: Get optional core clock
Besides the I/O clock, some PXAv3 SDHCI IP also requires a core clock to
be enabled. Add an optional core clock to the corresponding driver.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:47 +01:00
Sebastian Hesselbarth
01ae1070cb mmc: sdhci-pxav3: Try to get named I/O clock first
With support for more than one clock, we'll need to distinguish between
the clock by name. Change clock probing to first try to get "io" clock
before falling back to unnamed clock.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:47 +01:00
Sebastian Hesselbarth
8c96a7a331 mmc: sdhci-pxav3: Move I/O clock to private data
As we are using references to the I/O clock throughout the driver,
move it to the private data. Also, in preparation for core clock,
rename it to clk_io.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:46 +01:00
Mike Looijmans
b1df9de75c mmc: sdhci-of-arasan: Omit superfluous error messages
sdhci_add_host and sdhci_platfm_init already report failure,
so don't emit error messages when a failure occurs. This prevents
occurences of "deferred" messages when required power supplies
are not ready for operation yet.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:46 +01:00
Ulf Hansson
22b787007f mmc: core: Convert to use kzalloc() for CXD register buffers
While allocating buffers for CXD data, let's use kzalloc() to make sure
those are zeroed.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:45 +01:00
Ulf Hansson
601ed60cef mmc: core: Don't handle buffers on stack while fetching CXD registers
Due to previous patches, all callers of mmc_send_cxd_data() now
allocates their buffers from the heap. This enables us to simplify
mmc_send_cxd_data() by removing the support of handling buffers, which
are allocated from the stack.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:45 +01:00
Ulf Hansson
2fc91e8b0e mmc: core: Remove the redundant mmc_send_ext_csd() API
Previous patches has replaced the calls to mmc_send_ext_csd() into
mmc_get_ext_csd(), thus mmc_send_ext_csd() has become redundant. Let's
remove it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:44 +01:00
Ulf Hansson
b2cada73a8 mmc: core: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease
code duplication.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:44 +01:00
Ulf Hansson
86817ffb49 mmc: block: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease
code duplication.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:44 +01:00
Ulf Hansson
e21aa519ee mmc: core: Export mmc_get_ext_csd()
Callers of mmc_send_ext_csd() will be able to decrease code duplication
by using mmc_get_ext_csd() instead. Let's make it available.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:43 +01:00
Ulf Hansson
2fd322a58e mmc: core: Don't panic when fetching EXT_CSD
Instead of doing BUG_ON(), return an error code.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:43 +01:00
Ulf Hansson
c197787ced mmc: core: Let's callers of from mmc_get_ext_csd() do error handling
The callers of mmc_get_ext_csd() need the flexibility to handle errors
themselves, because they behave differently.

Let's clean up mmc_get_ext_csd() with its friends and adopt the error
handling as stated above.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:42 +01:00
Ulf Hansson
076ec38a58 mmc: core: Fetch and decode EXT_CSD from mmc_read_ext_csd()
As a step in cleaning up code around reading/decoding EXT_CSD, convert
the current mmc_read_ext_csd(), to handle both fetching the EXT_CSD
and decoding its data.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:42 +01:00
Ulf Hansson
148bcab28f mmc: core: Add helper function for EXT_CSD support
The helper function mmc_can_ext_csd() will return a positive value if
the card supports the EXT_CSD register. Start using it at relavant
places in the mmc core.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:41 +01:00
Ulf Hansson
a1fc444e83 mmc: core: Remove unnecessary 'out of memory' message
Rely on the prints handled internally by kmalloc().

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:41 +01:00
Ulf Hansson
9e304d67ad mmc: core: Remove redundant check of max_dtr while selecting timings
If the MMC spec version is < CSD_SPEC_VER_4, there aren't support for
the EXT_CSD register. Since max_dtr is fetched from there, it will
default to zero, which thus isn't needed to verify.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:41 +01:00
Ulf Hansson
56d09b1da7 mmc: core: Remove redundant check while selecting powerclass
The validation of the buswidth and the MMC spec version in
__mmc_select_powerclass() is redundant, let's remove it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:40 +01:00
Ulf Hansson
fd372f7d7f mmc: core: Remove duplicated definition of mmc_send_ext_csd()
mmc_send_ext_csd() is an exported function used by both the mmc core
and the mmc block layer. Let's remove the local duplicated definition
in the mmc core.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:40 +01:00
Ulf Hansson
00b41b58cd mmc: core: Remove mmc_free_ext_csd()
Let callers of mmc_free_ext_csd() do kfree() directly instead.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:39 +01:00
Doug Anderson
6130e7a9c3 mmc: dw_mmc: Remove old card detect infrastructure
The dw_mmc driver had a bunch of code that ran whenever a card was
ejected and inserted.  However, this code was old and crufty and
should be removed.  Some evidence that it's really not needed:

1. Is is supposed to be legal to use 'cd-gpio' on dw_mmc instead of
   using the built-in card detect mechanism.  The 'cd-gpio' code
   doesn't run any of the crufty old code but yet still works.

2. While looking at this, I realized that my old change (369ac86 mmc:
   dw_mmc: don't queue up a card detect at slot startup) actually
   castrated the old code a little bit already and nobody noticed.
   Specifically "last_detect_state" was left as 0 at bootup.  That
   means that on the first card removal none of the crufty code ran.

3. I can run "while true; do dd if=/dev/mmcblk1 of=/dev/null; done"
   while ejecting and inserting an SD Card and the world doesn't
   explode.

If some of the crufty old code is actually needed, we should justify
it and also put it in some place where it will be run even with
"cd-gpio".

Note that in my case I'm using the "cd-gpio" mechanism but for various
reasons the hardware triggers a dw_mmc "card detect" at bootup.  That
was actually causing a real bug.  The card detect workqueue was
running while the system was trying to enumerate the card.  The
"present != slot->last_detect_state" triggered and we were doing all
kinds of crazy stuff and messing up enumeration.  The new mechanism of
just asking the core to check the card is much safer and then the
bogus interrupt doesn't hurt.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: alim.akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:39 +01:00
Dan Carpenter
51d3460688 mmc: core: silence a shift wrapping warning
Presumably ->slotno is normally fairly small and the shift doesn't wrap
but static checkers will complain about it.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:38 +01:00
Mike Looijmans
5d0e119445 mmc: sdhci-of-arasan: Use signed formatting in error messages
"ret" is a signed int, so use "%d" in format strings instead of "%u".
This prevents cryptic codes in error messages like this:
sdhci-arasan e0101000.sdhci: platform register failed (4294966779)

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:38 +01:00
Alexandre Belloni
9cbef73cb6 mmc: atmel-mci: move mach header to platform_data
Move the mach header that can come either from arm/mach-at91 or avr32 to
platform_data to be able to switch the AT91 platforms to multiplatform.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[Ulf: Fixed compile error]
2014-11-10 12:40:37 +01:00
Gwendal Grignou
0f76242676 mmc: core: Report firmware version for eMMC 5.0 devices.
For eMMC 5.0 compliant device, firmware version is stored in ext_csd.
Report firmware as a 64bit hexa decimal. Vendor can use hexa or ascii
string to report firmware version.
Also add FFU related EXT_CSD register and note if the device is FFU capable.

Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:36 +01:00
Doug Anderson
e7791079ae mmc: dw_mmc: rockchip: Don't recalc the clock when it goes off
The "set_ios" function is called with a clock of 0 when the clock is
turning off.  There's no reason to go through all the extra Rockchip
logic (whose goal is to make sure DIV is 0 or 1) in that case.  The
Rockchip logic happened to work because the CCF will pick the lowest
possible rate when you ask it for a clock of 0, but it's silly to go
through all the remuxing and adjusting for no reason.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:36 +01:00
Doug Anderson
b19caf379c mmc: dw_mmc: Change signal voltage error to dev_dbg()
In (28f92b5 mmc: core: Try other signal levels during power up) we can
see that there are times when it's valid to try several signal
voltages.  Don't print an ugly error in the logs when that happens.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:35 +01:00
Sonny Rao
536f6b91d2 mmc: dw_mmc: Reset DMA before enabling IDMAC
We've already got a reset of DMA after it's done.  Add one before we
start DMA too.  This fixes a data corruption on Rockchip SoCs which
will get bad data when doing a DMA transfer after doing a PIO transfer.

We tested this on an Exynos 5800 with HS200 and didn't notice any
difference in sequential read throughput.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:35 +01:00
Ulf Hansson
fc95e30ba3 mmc: block: Use dev_set|get_drvdata()
In most of the cases mmc_get|set_drvdata() didn't simplify code, which
should be the primary reason for such macros.

Let's remove them and convert to the common device_driver macros,
dev_set|get_drvdata() instead.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:34 +01:00
Ulf Hansson
eaaceb6cbf mmc: msm_sdcc: Use platform_set|get_drvdata
The msm_sdcc host shall not use mmc core specific macros to handle its
driver data. Instead, convert to use the platform device driver macros.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:34 +01:00
Ulf Hansson
6685ac62b2 mmc: core: Convert mmc_driver to device_driver
The struct mmc_driver adds an extra layer on top of the struct
device_driver. That would be fine, if there were a good reason, but
that's not the case.

Let's simplify code by converting to the common struct device_driver
instead and thus also removing superfluous overhead.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:33 +01:00
Ulf Hansson
0967edc6ef mmc: core: Convert the mmc_driver to use the modern PM ops
Instead of having specific mmc system PM callbacks for the mmc driver,
let's convert to use the common ones.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:33 +01:00
Ulf Hansson
433b7b1210 mmc: core: Don't export the to_sdio_driver macro
The macro is only used by the mmc core, so let's move it in there.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:32 +01:00
Ulf Hansson
d99903ca4c mmc: core: Remove superfluous ifdefs for SDIO bus' PM callbacks
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:32 +01:00
Sebastian Hesselbarth
20d5a70344 mmc: sdhci-pxav3: Remove checks for mandatory host clock
NULL-checking a struct clk it not only wrong but also not required as
for PXAv3 driver the corresponding clock is mandatory. Remove the
checks from sdhci_pxav3_runtime_{suspend,resume}.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:31 +01:00
Sebastian Hesselbarth
ff8878fd64 mmc: sdhci-pxav3: Remove unused clk_enable from sdhci_pxa
clk_enable from struct sdhci_pxa is unused, remove it from the private
driver data.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:31 +01:00
Sebastian Hesselbarth
cc9571e858 mmc: sdhci-pxav3: Move private driver data to driver source
struct sdhci_pxa is only used in sdhci_pxa driver itself, so move it
there.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:31 +01:00
Sebastian Hesselbarth
668e84b20f mmc: sdhci-pxav3: Respect MMC_DDR52 timing on uhs signaling
commit bb8175a8aa
  ("mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC")
added MMC_DDR52 as eMMC's DDR mode to be distinguished from SD-UHS.

While the differentation may be useful, pxav3 SDHCI controller lacks
a corresponding check in its custom .set_uhs_signaling callback for
MMC_DDR52. This patch adds a new switch case for MMC_TIMING_MMC_DDR52
to MMC_TIMING_UHS_DDR50 case.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:30 +01:00
Sebastian Hesselbarth
6a686c3132 mmc: sdhci-pxav2: Drop unused struct sdhci_pxa
struct sdhci_pxa is private data of PXA SDHCI driver, but not used in
sdhci-pxav2 at all. Drop unused references to struct sdhci_pxa.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:30 +01:00
Tomeu Vizoso
05e07d8be1 mmc: sunxi: Remove unused includes of linux/clk-private.h
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:29 +01:00
Srinivas Kandagatla
b5c16a60e5 mmc: mmci: fix mmci_post_request
If the post request is cancelling the channel and descriptor and which are
equal to host->dma_current and host->dma_desc_current respectively, then it
makes sense to reset these pointers to NULL, so that the driver does not
reference it.

Also the host_cookie can be reset to 0 in cases of error, so that the
core could reissue the same mmc_request.

This patch was tested with 'mmc: core: fix prepared requests while doing
bkops' to fix the below issue.

mmci-pl18x 12400000.sdcc: error during DMA transfer!
Unable to handle kernel paging request at virtual address 40000000
pgd = c0204000
[40000000] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
Modules linked in: ipv6 ath6kl_sdio ath6kl_core
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G        W      3.17.0-rc7-linaro-multi-v7 #1
task: c0c9d7e0 ti: c0c92000 task.ti: c0c92000
PC is at v7_dma_inv_range+0x34/0x4c
LR is at __dma_page_dev_to_cpu+0x80/0x100
pc : [<c021efc0>]    lr : [<c021af18>]    psr: 400f0193
sp : c0c93e20  ip : c0c9a478  fp : c08ea538
r10: c0c9f548  r9 : 00000002  r8 : e97d9000
r7 : 00000200  r6 : c0c9d504  r5 : c0db0880  r4 : 00000000
r3 : 0000003f  r2 : 00000040  r1 : 40000200  r0 : 40000000
Flags: nZcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c5787d  Table: a9ef406a  DAC: 00000015
Process swapper/0 (pid: 0, stack limit = 0xc0c92250)
Stack: (0xc0c93e20 to 0xc0c94000)
3e20: c021f058 e9a17178 e9a171bc e99dfd6c 00000001 00000001 e995de10 00000002
3e40: 00000000 c021b574 00000000 c04bc4a4 00000000 e9b49ac0 c0ce6e6c e99dfda4
3e60: 00000088 e9810780 c0d8291c c072ea58 00000000 c072d3fc 00000000 c072f534
3e80: 00000000 e9b49ac0 00000100 c0c9a444 00000088 c072f6b4 c072f5d4 e9d40080
3ea0: e98107dc 00000000 00000000 c0280a60 00000000 7d55bf61 e9810780 e98107dc
3ec0: 00000000 f0002000 c0d460e8 c0d460e8 c0c92000 c0280b60 e9810780 c0ce7190
3ee0: 00000000 c028369c c02835f4 00000088 00000088 c0280278 c0c8ec70 c020f080
3f00: f000200c c0c9a958 c0c93f28 c02088e4 c04bd630 c04bd5bc 200f0013 ffffffff
3f20: c0c93f5c c0212800 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff c04bd574 c071bd24 7d50c9b4 c0719a44
3f80: 7d50c9b4 0000015b c0c9a498 c0c92028 c0c9a498 c0c9a4fc ea7a0e40 c0c8ee38
3fa0: c0d460e8 c0276198 00000000 c0d8291a 00000000 c0c9a400 00000000 c0be0bc4
3fc0: ffffffff ffffffff c0be05f8 00000000 00000000 c0c533d8 c0d82ed4 c0c9a47c
3fe0: c0c533d4 c0c9e870 8020406a 511f06f0 00000000 80208074 00000000 00000000
[<c021efc0>] (v7_dma_inv_range) from [<c021af18>] (__dma_page_dev_to_cpu+0x80/0x100)
[<c021af18>] (__dma_page_dev_to_cpu) from [<c021b574>] (arm_dma_unmap_sg+0x5c/0x84)
[<c021b574>] (arm_dma_unmap_sg) from [<c072ea58>] (mmci_dma_unmap.isra.16+0x60/0x74)
[<c072ea58>] (mmci_dma_unmap.isra.16) from [<c072f534>] (mmci_data_irq+0x1fc/0x29c)
[<c072f534>] (mmci_data_irq) from [<c072f6b4>] (mmci_irq+0xe0/0x114)
[<c072f6b4>] (mmci_irq) from [<c0280a60>] (handle_irq_event_percpu+0x78/0x134)
[<c0280a60>] (handle_irq_event_percpu) from [<c0280b60>] (handle_irq_event+0x44/0x64)
[<c0280b60>] (handle_irq_event) from [<c028369c>] (handle_fasteoi_irq+0xa8/0x1a8)
[<c028369c>] (handle_fasteoi_irq) from [<c0280278>] (generic_handle_irq+0x2c/0x3c)
[<c0280278>] (generic_handle_irq) from [<c020f080>] (handle_IRQ+0x40/0x90)
[<c020f080>] (handle_IRQ) from [<c02088e4>] (gic_handle_irq+0x38/0x68)
[<c02088e4>] (gic_handle_irq) from [<c0212800>] (__irq_svc+0x40/0x54)
Exception stack(0xc0c93f28 to 0xc0c93f70)
3f20:                   00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff
[<c0212800>] (__irq_svc) from [<c04bd5bc>] (msm_cpu_pm_enter_sleep+0x48/0x4c)
[<c04bd5bc>] (msm_cpu_pm_enter_sleep) from [<c071bd24>] (qcom_lpm_enter_spc+0x20/0x2c)
[<c071bd24>] (qcom_lpm_enter_spc) from [<c0719a44>] (cpuidle_enter_state+0x44/0xf0)
[<c0719a44>] (cpuidle_enter_state) from [<c0276198>] (cpu_startup_entry+0x1f4/0x238)
[<c0276198>] (cpu_startup_entry) from [<c0be0bc4>] (start_kernel+0x384/0x390)
Code: 1e070f3e e1110003 e1c11003 1e071f3e (ee070f36)
---[ end trace cf6cb3f6432c9834 ]---
Kernel panic - not syncing: Fatal exception in interrupt

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:29 +01:00
Srinivas Kandagatla
64b12a68a9 mmc: core: fix prepared requests while doing bkops
While starting the bkops the previously prepared request should be canceled
and restarted after the bkops. As the prepared resource might already
setup the dma channels and ready to be started. Now with the arrival of bkops
request this prepared request can be serviced ONLY after the bkops. So
holding on to the prepared request in the host driver is confusing at
this point in time, so it makes sense to cleanup such dangling requests and
reissue this request once bkops is done.
Canceling the prepared request would give opportunity to the host drivers
to perform cleanup on the prepared request.

Without this patch host drivers like mmci gets confused when a blocking
request like send_ext_csd(CMD8) is issued while there is already a prepared
request. With the help of this patch, the driver can better manage such
blocking requests and cleanup the prepared requests which are not started yet.

Without this patch I hit below crash on Qualcomm APQ8064 based IFC6410 board
with mmci host driver.

mmci-pl18x 12400000.sdcc: error during DMA transfer!
Unable to handle kernel paging request at virtual address 40000000
pgd = c0204000
[40000000] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
Modules linked in: ipv6 ath6kl_sdio ath6kl_core
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G        W      3.17.0-rc7-linaro-multi-v7 #1
task: c0c9d7e0 ti: c0c92000 task.ti: c0c92000
PC is at v7_dma_inv_range+0x34/0x4c
LR is at __dma_page_dev_to_cpu+0x80/0x100
pc : [<c021efc0>]    lr : [<c021af18>]    psr: 400f0193
sp : c0c93e20  ip : c0c9a478  fp : c08ea538
r10: c0c9f548  r9 : 00000002  r8 : e97d9000
r7 : 00000200  r6 : c0c9d504  r5 : c0db0880  r4 : 00000000
r3 : 0000003f  r2 : 00000040  r1 : 40000200  r0 : 40000000
Flags: nZcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c5787d  Table: a9ef406a  DAC: 00000015
Process swapper/0 (pid: 0, stack limit = 0xc0c92250)
Stack: (0xc0c93e20 to 0xc0c94000)
3e20: c021f058 e9a17178 e9a171bc e99dfd6c 00000001 00000001 e995de10 00000002
3e40: 00000000 c021b574 00000000 c04bc4a4 00000000 e9b49ac0 c0ce6e6c e99dfda4
3e60: 00000088 e9810780 c0d8291c c072ea58 00000000 c072d3fc 00000000 c072f534
3e80: 00000000 e9b49ac0 00000100 c0c9a444 00000088 c072f6b4 c072f5d4 e9d40080
3ea0: e98107dc 00000000 00000000 c0280a60 00000000 7d55bf61 e9810780 e98107dc
3ec0: 00000000 f0002000 c0d460e8 c0d460e8 c0c92000 c0280b60 e9810780 c0ce7190
3ee0: 00000000 c028369c c02835f4 00000088 00000088 c0280278 c0c8ec70 c020f080
3f00: f000200c c0c9a958 c0c93f28 c02088e4 c04bd630 c04bd5bc 200f0013 ffffffff
3f20: c0c93f5c c0212800 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff c04bd574 c071bd24 7d50c9b4 c0719a44
3f80: 7d50c9b4 0000015b c0c9a498 c0c92028 c0c9a498 c0c9a4fc ea7a0e40 c0c8ee38
3fa0: c0d460e8 c0276198 00000000 c0d8291a 00000000 c0c9a400 00000000 c0be0bc4
3fc0: ffffffff ffffffff c0be05f8 00000000 00000000 c0c533d8 c0d82ed4 c0c9a47c
3fe0: c0c533d4 c0c9e870 8020406a 511f06f0 00000000 80208074 00000000 00000000
[<c021efc0>] (v7_dma_inv_range) from [<c021af18>] (__dma_page_dev_to_cpu+0x80/0x100)
[<c021af18>] (__dma_page_dev_to_cpu) from [<c021b574>] (arm_dma_unmap_sg+0x5c/0x84)
[<c021b574>] (arm_dma_unmap_sg) from [<c072ea58>] (mmci_dma_unmap.isra.16+0x60/0x74)
[<c072ea58>] (mmci_dma_unmap.isra.16) from [<c072f534>] (mmci_data_irq+0x1fc/0x29c)
[<c072f534>] (mmci_data_irq) from [<c072f6b4>] (mmci_irq+0xe0/0x114)
[<c072f6b4>] (mmci_irq) from [<c0280a60>] (handle_irq_event_percpu+0x78/0x134)
[<c0280a60>] (handle_irq_event_percpu) from [<c0280b60>] (handle_irq_event+0x44/0x64)
[<c0280b60>] (handle_irq_event) from [<c028369c>] (handle_fasteoi_irq+0xa8/0x1a8)
[<c028369c>] (handle_fasteoi_irq) from [<c0280278>] (generic_handle_irq+0x2c/0x3c)
[<c0280278>] (generic_handle_irq) from [<c020f080>] (handle_IRQ+0x40/0x90)
[<c020f080>] (handle_IRQ) from [<c02088e4>] (gic_handle_irq+0x38/0x68)
[<c02088e4>] (gic_handle_irq) from [<c0212800>] (__irq_svc+0x40/0x54)
Exception stack(0xc0c93f28 to 0xc0c93f70)
3f20:                   00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff
[<c0212800>] (__irq_svc) from [<c04bd5bc>] (msm_cpu_pm_enter_sleep+0x48/0x4c)
[<c04bd5bc>] (msm_cpu_pm_enter_sleep) from [<c071bd24>] (qcom_lpm_enter_spc+0x20/0x2c)
[<c071bd24>] (qcom_lpm_enter_spc) from [<c0719a44>] (cpuidle_enter_state+0x44/0xf0)
[<c0719a44>] (cpuidle_enter_state) from [<c0276198>] (cpu_startup_entry+0x1f4/0x238)
[<c0276198>] (cpu_startup_entry) from [<c0be0bc4>] (start_kernel+0x384/0x390)
Code: 1e070f3e e1110003 e1c11003 1e071f3e (ee070f36)
---[ end trace cf6cb3f6432c9834 ]---
Kernel panic - not syncing: Fatal exception in interrupt

Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:28 +01:00
Andrew Gabbasov
4b75bffc77 mmc: core: Fix error paths and messages in mmc_init_card
In mmc_init_card function some of the branches in error handling paths
go to "err" label, which skips removing of newly allocated card structure,
that will actually not be used. Fix that by using proper "free_card" label.

Also, some messages in these branches are reported as warnings,
although the operation processing is not continued. Change these
messages to error level.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:28 +01:00
Andrew Gabbasov
fc75b708b8 mmc: core: Add debug message for SET_BLOCK_COUNT result
The debug messages with commands execution results, that are printed
after processing the request, do not include results of sbc (set block count)
part of request. Add the debug message for that part too.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:28 +01:00
Andrew Gabbasov
cce411e685 mmc: core: Initialize SET_BLOCK_COUNT request fields
Some request fields are initialized just before request processing
for sanity purposes. This is done for command, data, and stop parts
of the request, but not for sbc (set block count) part. Add such
initialization for that part too.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:27 +01:00
Andrew Gabbasov
fce9d33f51 mmc: sdhci: fix error conditions for controller reset
Add the case of SET_BLOCK_COUNT command error to the error conditions
check for making a controller reset at request handling finish.
Otherwise, if the SET_BLOCK_COUNT command failed, e.g. with a timeout,
the controller state was not reset, and the next command failed too.

In the case of data error the controller reset is already done in
finish_data() function before sending stop command (if present),
so the finish tasklet should make a reset after data error only
if no stop command existed in the request.

Also, fix the indentation of this condition check to make it more logical.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:27 +01:00
Andrew Gabbasov
fbfaf0326b mmc: sdhci: Balance vmmc regulator_disable()
As a follow-up of commit
"mmc: sdhci: Balance vmmc regulator_enable(), and always enable vqmmc"
vmmc regulator disable is also not needed in sdhci_remove_host.
The regulator is completely controlled by mmc_power_up and mmc_power_off
functions and is already disabled by the time of removing the host.
Extra regulator_disable call in sdhci_remove_host is unbalanced and
causes a warning reported by regulator core, so should be removed.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:26 +01:00
Dirk Behme
cd529af7ee mmc: sdhci-esdhc-imx: don't exit in case of no pinctrl states
The commit ad93220de7 ("mmc: sdhci-esdhc-imx: change pinctrl state
according to uhs mode") exits the probe in case there are no valid
pinctrl states found.

As there are configurations doing the pin mux properly in the boot
loader, don't exit. Just warn, but go on in case if there are no
pinctrl states in the device tree.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:26 +01:00
Matteo Facchinetti
18a0980635 mmc: mxcmmc: fix the default value for available voltages into mxcmci_probe
If available voltages are not given, mmc_regulator_get_supply() function
returns 0 and mxcmmc driver doesn't set a value for ocr_avail mask.

In accordance with the comment in platform_data/mmc-mxcmmc.h,
fix it, assuming MMC_VDD_32_33 | MMC_VDD_33_34 as default value.

Signed-off-by: Matteo Facchinetti <matteo.facchinetti@sirius-es.it>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:25 +01:00
Matteo Facchinetti
adfa57033d mmc: mxcmmc: fix race condition when dma finish a data transfer
During a read of data block using dma, driver might have two ways to finish to read
and free the resources:
1) checking STATUS_DATA_TRANS_DONE mask, in the mxcmci_irq() routine
   (pending to mmc irq)
2) mxmmc driver, registers also a mxcmci_dma_callback() and when transfer is finished,
   dma driver calls this callback. (pending to dma irq)
Both ways are concurrent with each other.

Race condition happens when following events occur:
/* (1) mxcmci driver start data transfer */
         158.418970: mpc_dma_execute: mpc_dma_execute(): will_access_peripheral start cid=31
         158.418976: mpc_dma_issue_pending <-mxcmci_request
         158.418983: mxcmci_start_cmd <-mxcmci_request
/* (2) mxcmci driver receive mmc irq */
         158.419656: mxcmci_irq <-handle_irq_event_percpu
         158.419692: mxcmci_read_response <-mxcmci_irq
/* (3) mxcmci driver checks that transfer is complete and call mxcmci_finish_data() */
         158.419726: mxcmci_data_done <-mxcmci_irq
         158.419729: mxcmci_finish_data <-mxcmci_data_done
         158.419733: dma_direct_unmap_sg <-mxcmci_finish_data
         158.419736: mxcmci_swap_buffers.isra.24 <-mxcmci_finish_data
         158.419762: mxcmci_read_response <-mxcmci_data_done
/* (4) mxcmci driver (no dma): send stop command */
         158.419765: mxcmci_start_cmd <-mxcmci_data_done
/* (5) mxcmci driver (no dma): receive the stop command irq response */
         158.419782: mxcmci_irq <-handle_irq_event_percpu
         158.419812: mxcmci_read_response <-mxcmci_irq
         158.419843: mxcmci_finish_request <-mxcmci_irq
/* (6) dma driver: receive dma irq (finish data transfer) related by request on step 1 */
         158.419853: mpc_dma_irq <-handle_irq_event_percpu
         158.420001: mpc_dma_irq_process <-mpc_dma_irq
         158.420004: mpc_dma_irq_process <-mpc_dma_irq
/* (7) dma driver: start dma tasklet to finish the dma irq handling */
         158.420008: mpc_dma_irq_process: mpc_dma_irq_process(): completed ch:31
/* (8) mxcmci driver: start next data transfer using dma */
         158.420174: mxcmci_request <-mmc_start_req
         158.420182: dma_direct_map_sg <-mxcmci_request
         158.420192: mpc_dma_prep_slave_sg <-mxcmci_request
/* (9) dma driver: schedule irq tasklet and execute mxcmci dma driver callback */
         158.420250: mpc_dma_tasklet <-tasklet_action
         158.420254: mpc_dma_process_completed <-tasklet_action
         158.420267: mxcmci_dma_callback <-mpc_dma_process_completed
/* ERROR!!! (10) mxcmci driver callback works on dma data related to the step 1
                 that is already finished */
         158.420271: mxcmci_data_done <-mpc_dma_process_completed
         158.420273: mxcmci_finish_data <-mxcmci_data_done
/* ERROR!!! (11) mxcmci driver: clear data that should be used by step 8 and
                 send an other mmc stop command (already sended on step 4) */
         158.420276: dma_direct_unmap_sg <-mxcmci_finish_data
         158.420279: mxcmci_swap_buffers.isra.24 <-mxcmci_finish_data
         158.420330: mxcmci_read_response <-mxcmci_data_done
         158.420333: mxcmci_start_cmd <-mxcmci_data_done
         158.420338: dma_run_dependencies <-mpc_dma_process_completed
...
...
...
         168.474223: mxcmci_watchdog <-call_timer_fn
         168.474236: mxcmci_watchdog: mxcmci_watchdog
         168.474397: mpc_dma_device_control <-mxcmci_watchdog

In accordance with the other drivers that using the dma engine,
fix it, leaving *only* to dma driver the complete control to
ending the read operation.

Removing STATUS_READ_OP_DONE event activation, has as effect
to force mxcmci driver to handle the finish data transfer only
by mxcmci dma callback.

Signed-off-by: Matteo Facchinetti <matteo.facchinetti@sirius-es.it>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:25 +01:00
Peter Guo
6380ea099c mmc: sdhci-pci-o2micro: Fix Dell E5440 issue
Fix Dell E5440 when reboot Linux, can't find o2micro sd host chip issue.

Fixes: 01acf6917a (mmc: sdhci-pci: add support of O2Micro/BayHubTech SD hosts)
Signed-off-by: Peter Guo <peter.guo@bayhubtech.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:25 +01:00
Baruch Siach
0031a98a85 mmc: block: add newline to sysfs display of force_ro
Make force_ro consistent with other sysfs entries.

Fixes: 371a689f64 ('mmc: MMC boot partitions support')
Cc: Andrei Warkentin <andrey.warkentin@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10 12:40:24 +01:00
Kristina Martsenko
a31b0c6c19 mmc: core: fix card detection regression
Since commit 89168b4899 ("mmc: core: restore detect line inversion
semantics"), the SD card on i.MX28 (and possibly other) devices isn't
detected and booting stops at:

[    4.120617] Waiting for root device /dev/mmcblk0p3...

This is caused by the MMC_CAP2_CD_ACTIVE_HIGH flag being set incorrectly
when the host controller doesn't use a GPIO for card detection (but
instead uses a dedicated pin). In this case mmc_gpiod_request_cd() will
return before assigning to the gpio_invert variable, leaving the
variable uninitialized. The variable then gets used to set the flag.
This patch fixes the issue by making sure gpio_invert is set to false
when a GPIO isn't used. After this patch, i.MX28 boots fine.

The MMC_CAP2_RO_ACTIVE_HIGH (write protect) flag is also set incorrectly
for the exact same reason (it uses the same uninitialized variable), so
this patch fixes that too.

Fixes: 89168b4899 ("mmc: core: restore detect line inversion semantics")
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Kristina Martšenko <kristina.martsenko@gmail.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-05 09:28:48 +01:00