Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled. So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS. This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS". But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.
To make both work, we introduce an offset define. This represents the
max number of hardware CS values that the SPI peripheral supports. If
the CS is below this limit, we know we can use the hardware CS. If it's
above, we treat it as a GPIO CS. This keeps the CS unique as seen by
the common code and prevents conflicts.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't. So drop this useless bit of memory.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current structure names are a bit confusing as to what they represent,
so use better names.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The chip ops should always be initialized, so having null fallback
functions are useless.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it. So punt all of the dead code considering it
makes up ~10% of the code size.
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CS helper functions were toggling both the Flag Enable and the Flag
Value bits, but the Flag Value bit is ignored if the corresponding Flag
Enable bit is cleared. So under high speed transactions, the CS sometimes
would not toggle properly.
Since it makes no sense to toggle the Flag Enable bit dynamically when we
actually want to control the Flag Value, do this when setting up the device
and then only handle toggling of the CS value during runtime.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current behavior in PIO mode is to poll the SPI status registers which
can obviously lead to higher latencies when doing a lot of SPI traffic.
There is a SPI interrupt which can be used instead to signal individual
completion of transactions.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We should make sure the SPI controller is in a sane state in case the
boot loader left it in a crappy state. Such as DMA pending which causes
interrupts to fire on us.
When setting a sane initial state, do not default to slave mode. If we
do, then the SPI peripheral may implicitly take over the SPISS pin which
other things might be using.
For example, the BF533-STAMP uses this pin as a GPIO to control switching
between ethernet and flash. If the SPI peripheral controls the output
state instead, the ethernet is no longer accessible.
URL: http://blackfin.uclinux.org/gf/tracker/5630
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Anomaly 05000119 states that the DMA_RUN bit with peripherals isn't
reliable. However, the way the driver is currently written (DMA IRQ
callback), we don't need the polling in the first place, so drop it.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Re-order setup() a bit so we don't leak memory/dma/gpio resources upon
errors. Also make sure we don't call kfree() twice on the same object.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds the OF hook to the spi core so that devices
can automatically be registered based on device tree data. This fixes
a problem with spi devices not binding to drivers after the cleanup of
the spi & i2c binding code.
Signed-off-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The SPI_MASTER_NO_TX bit (can't do buffer write) wasn't tested. This
code was introduced in commit 3c8e1a84 (spi/spi-gpio: add support for
controllers without MISO or MOSI pin). This patch fixes a bug in
choosing which transfer ops to use.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
It fixes an issue when sending-only or receiving-only more than
PAGE_SIZE bytes.
Signed-off-by: christophe leroy <christophe.leroy@c-s.fr>
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The PL022 SPI bus is sometimes used for early stuff like
regulators that need to be present at module_init() time, so
we move this to a subsys_initcall().
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With the introduction of an AMBA PrimeCell per-cell block clock,
the pclk was left on after probe() unless explicitly disabled.
This clock is wired to the same clock on PL022 causing it to stay
always on since.
Fix this up properly by clocking the pclk whenever we want to
write into any PL022 registers and clocking the external clock
whenever we want to transmit messages on the bus.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Tested-by : Kevin Wells <wellsk40@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
When using PIO we have a timeout for the TX and RX FIFOs to ensure that
the data actually gets transferred. Warn if we hit that timeout - it
should never happen, but this makes sure we'll find out if it does.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Instead of, wrongly, reusing the 'val' variable, use a dedicated
one for reading the status register.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Fix compilation warning by typecasting the tx_buf pointer.
[I'm not thrilled with resorting to a cast; but I cannot see a better
way to go about this. I don't want to drop the const from struct
spi_transfer ~~glikely]
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
commit 052dc7c45i "spi/dw_spi: conditional transfer mode change"
introduced cs_control code, which has a bug by using bit offset
for spi mode to set transfer mode in control register. Also it
forces devices who don't need cs_control to re-configure the
control registers for each spi transfer. This patch will fix them
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Allow interrupt sharing since exclusive interrupt line for
DW SPI controller is not provided on every platform.
Signed-off-by: Yong Wang <yong.y.wang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
For small transfers at high speeds the expected transfer time can easily
be well under 1ms, causing the delay in wait_for_xfer() to be only the
dead reckoning fudge factor of 5ms currently included. Experiments on
some of my systems shows that this is marginal for some transfers so
double it to 10ms.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Allow the use of the S3C64xx SPI controller with things like PMICs by
moving the init up to subsys_initcall().
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
introduced by 49dce689 ("spi doesn't need class_device") and bad-fixed
by 350d0076 ("spi: fix double-free on spi_unregister_master"),
spi_unregister_master would previously device_unregister all of the spi
master's siblings (instead of its children). hilarity ensues.
fix it to unregister children.
Signed-off-by: David Lamparter <equinox@diac24.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The S3C64xx SPI driver requires the machine to call s3c64xx_spi_set_info()
to select a few options, including the clock to use for the SPI controller.
If this is not done then a NULL will be passed as the clock name for
clk_get(), causing an obscure crash. Guard against this and other missing
configuration by validating that the clock name has been filled in in
the platform data that ets passed in.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Using the coldfire qspi driver, I get the following error:
drivers/spi/coldfire_qspi.c: In function 'mcfqspi_irq_handler':
drivers/spi/coldfire_qspi.c:166: error: 'TASK_NORMAL' undeclared (first use in this function)
drivers/spi/coldfire_qspi.c:166: error: (Each undeclared identifier is reported only once
It is solved by adding the following include to coldfire_sqpi.c:
#include <linux/sched.h>
Fix suggested by Jate Sujjavanich <jsujjavanich@syntech-fuelmaster.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6:
spi/amba_pl022: Fix probe and remove hook section annotations.
spi/mpc5121: change annotations for probe and remove functions
spi/bitbang: reinitialize transfer parameters for every message
spi/spi-gpio: add support for controllers without MISO or MOSI pin
spi/bitbang: add support for SPI_MASTER_NO_{TX, RX} modes
SPI100k: Fix 8-bit and RX-only transfers
spi/mmc_spi: mmc_spi adaptations for SPI bus locking API
spi/mmc_spi: SPI bus locking API, using mutex
Fix trivial conflict in drivers/spi/mpc512x_psc_spi.c due to 'struct
of_device' => 'struct platform_device' rename and __init/__exit to
__devinit/__devexit fix.
of_device is just an alias for platform_device, so remove it entirely. Also
replace to_of_device() with to_platform_device() and update comment blocks.
This patch was initially generated from the following semantic patch, and then
edited by hand to pick up the bits that coccinelle didn't catch.
@@
@@
-struct of_device
+struct platform_device
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: David S. Miller <davem@davemloft.net>
This patch moves the declaration of of_get_address(), of_get_pci_address(),
and of_pci_address_to_resource() out of arch code and into the common
linux/of_address header file.
This patch also fixes some of the asm/prom.h ordering issues. It still
includes some header files that it ideally shouldn't be, but at least the
ordering is consistent now so that of_* overrides work.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Probe and remove hooks belong in the __devinit and __devexit sections
respectively. This patch fixes incorrect annotations on the pl022 spi
driver.
Signed-off-by: Kevin Wells <wellsk40@gmail.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Move of_register_spi_devices() call from drivers to
spi_register_master(). Also change the function to use
the struct device_node pointer from master spi device
instead of passing it as function argument.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
spi_t was removed in commit 644b2a680c
("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
it appears that the struct is needed for micropatch code. So, let's
reintroduce the struct.
Fixes the following build issue:
CC arch/powerpc/sysdev/micropatch.o
micropatch.c: In function 'cpm_load_patch':
micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token
micropatch.c:629: error: 'spp' undeclared (first use in this function)
micropatch.c:629: error: (Each undeclared identifier is reported only once
micropatch.c:629: error: for each function it appears in.)
Reported-by: LEROY Christophe <christophe.leroy@c-s.fr>
Reported-by: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@kernel.org> [ .33, .34 ]
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Change annotations from __init/__exit to __devinit/__devexit
to get rid of section mismatch warning.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch fixes the setup_transfer logic to account for the case where
multiple messages to different SPI devices are in the queue simultaneously.
With the current logic, the second message in the queue will end up
using the transfer parameters for the previous message in the queue.
The fix is to reinitialize the transfer parameters for each message
rather than only once on the first message.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
There are some boards that do not strictly follow SPI standard and use
only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary
chips and controls them with GPIO based 'spi controller'. In this
configuration the MISO or MOSI line is missing (it is not required if the
chip does not transfer any data back to host or host only reads data from
chip).
This patch adds support for such non-standard configuration in GPIO-based
SPI controller. It has been tested in configuration without MISO pin.
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds a new flags argument to bitbang_txrx_be_cpha0 and
bitbang_txrx_be_cpha1 transfer functions. This enables support for
SPI_MASTER_NO_{TX,RX} transfer modes. The change should have no impact
on speed of the existing drivers. bitbank_txrx_* functions are usually
inlined into the drivers. When the argument is equal to constant zero,
the optimizer would be able to eliminate the dead code (flags checks)
easily. Tested on ARM and GCC 4.4.x and in all cases the checks were
eliminated in the inlined function.
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This change fixes 8-bit transfers and RX-only transfers. The
SPI100k framework requires minimum 16-bit words to be written, so 8-bit
transfers must be shited by 8 bits and sent out as a 16-bit word.
Additionally, receive-only transfers were failing due to the
perceived need to fill the TX buffer with something. This is in
fact not needed.
Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
SPI bus locking API to allow exclusive access to the SPI bus, especially, but
not limited to, for the mmc_spi driver.
Coded according to an outline from Grant Likely; here is his
specification (accidentally swapped function names corrected):
It requires 3 things to be added to struct spi_master.
- 1 Mutex
- 1 spin lock
- 1 flag.
The mutex protects spi_sync, and provides sleeping "for free"
The spinlock protects the atomic spi_async call.
The flag is set when the lock is obtained, and checked while holding
the spinlock in spi_async(). If the flag is checked, then spi_async()
must fail immediately.
The current runtime API looks like this:
spi_async(struct spi_device*, struct spi_message*);
spi_sync(struct spi_device*, struct spi_message*);
The API needs to be extended to this:
spi_async(struct spi_device*, struct spi_message*)
spi_sync(struct spi_device*, struct spi_message*)
spi_bus_lock(struct spi_master*) /* although struct spi_device* might
be easier */
spi_bus_unlock(struct spi_master*)
spi_async_locked(struct spi_device*, struct spi_message*)
spi_sync_locked(struct spi_device*, struct spi_message*)
Drivers can only call the last two if they already hold the spi_master_lock().
spi_bus_lock() obtains the mutex, obtains the spin lock, sets the
flag, and releases the spin lock before returning. It doesn't even
need to sleep while waiting for "in-flight" spi_transactions to
complete because its purpose is to guarantee no additional
transactions are added. It does not guarantee that the bus is idle.
spi_bus_unlock() clears the flag and releases the mutex, which will
wake up any waiters.
The difference between spi_async() and spi_async_locked() is that the
locked version bypasses the check of the lock flag. Both versions
need to obtain the spinlock.
The difference between spi_sync() and spi_sync_locked() is that
spi_sync() must hold the mutex while enqueuing a new transfer.
spi_sync_locked() doesn't because the mutex is already held. Note
however that spi_sync must *not* continue to hold the mutex while
waiting for the transfer to complete, otherwise only one transfer
could be queued up at a time!
Almost no code needs to be written. The current spi_async() and
spi_sync() can probably be renamed to __spi_async() and __spi_sync()
so that spi_async(), spi_sync(), spi_async_locked() and
spi_sync_locked() can just become wrappers around the common code.
spi_sync() is protected by a mutex because it can sleep
spi_async() needs to be protected with a flag and a spinlock because
it can be called atomically and must not sleep
Signed-off-by: Ernst Schwab <eschwab@online.de>
[grant.likely@secretlab.ca: use spin_lock_irqsave()]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: Matt Fleming <matt@console-pimps.org>
Tested-by: Antonio Ospite <ospite@studenti.unina.it>
Fixes build errors caused by the:
- OF device_node pointer being moved into struct device
- removal of the match_table field from struct of_platform_driver
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch fixes a build error caused by the OF device_node pointer
being moved into struct device.
Fixes bug introduced by commit 61c7a080a5
(of: Always use 'struct device.of_node' to get device node pointer)
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
CC: Sean MacLennan <smaclennan@pikatech.com>
CC: spi-devel-general@lists.sourceforge.net
CC: devicetree-discuss@lists.ozlabs.org
Commit 58f9b0b024, "of: eliminate
of_device->node and dev_archdata->{of,prom}_node" changed the location
of the device_node pointer. Most drivers were converted to the new
location, but the xilinx_spi_of driver was missed and now fails to
compile.
This patch fixes up the xilinx_spi_of driver to use the new location.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Computation of the clock prescaler value returned bogus results if
the requested SPI clock was impossible to set. It now sets either
the maximum or minimum clock frequency, as appropriate.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
