Commit Graph

18 Commits

Author SHA1 Message Date
Dong Aisheng
93fbd3c050 pinctrl: pinctrl-imx: add imx53 pinctrl driver
ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-20 21:00:18 +02:00
Shawn Guo
17723111e6 pinctrl: add pinctrl-mxs support
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:18:27 +02:00
Dong Aisheng
d8fe35727a pinctrl: pinctrl-imx: add imx6q pinctrl driver
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Dong Aisheng
ae75ff8145 pinctrl: pinctrl-imx: add imx pinctrl core driver
The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.

The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.

Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Linus Walleij
630e2d0494 pinctrl: mark non-EXPERIMENTAL
With the finalization of the external driver API and the device
tree support, this subsystem is now mature and can be promoted to
non-experimental status.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Linus Walleij
dc0b1aa3e2 pinctrl: support pinconfig on the U300
This adds pin configuration support for the U300 driver pair,
we can now read out the biasing and drive mode in debugfs and
configure it using the new configuration API.

ChangeLog v1->v2:
- Migrate to pin config and generic pin config changes.
ChangeLog v2->v3:
- Adjust to generic pin config changes in v7 patch set.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-12 22:49:03 +01:00
Linus Walleij
394349f778 pinctrl: introduce generic pin config
This is a split-off from the earlier patch set which adds generic
pin configuration for the pin controllers that want it. Since
we may have a system with mixed generic and custom pin controllers,
we pass a boolean in the pin controller ops vtable to indicate
if it is generic.

ChangeLog v1->v5:
- Follow parent patch versioning number system.
- Document the semantic meaning of return values from pin config
  get functions, so we can iterate over pins and check their
  properties from debugfs as part of the generic config code.
- Use proper cast functions in the generic debugfs pin config
  file.
- Expand generic config to optionally cover groups too.
ChangeLog v5->v6:
- Update to match underlying changes.
ChangeLog v6->v7:
- Drop DRIVE_OFF parameter, use bias high impedance for this
- Delete argument for drive modes push-pull, od and os. These
  are now just state transitions.
- Delete slew rate rising/falling due to discussions on on
  proper semantics
- Drop config wakeup, struct irq_chip does this for now, add
  back if need be.
- Set PIN_CONFIG_END to 0x7fff making room for custom config
  parameters from 0x8000 and up.
- Prefix accessor functions with pinconf_
2012-03-12 22:49:02 +01:00
Linus Walleij
a6c3b33f02 Merge branch 'pinctrl-tegra-for-next-diet' into for-next 2012-03-06 23:30:15 +01:00
Stephen Warren
971dac7123 pinctrl: add a driver for NVIDIA Tegra
This adds a driver for the Tegra pinmux, and required parameterization
data for Tegra20 and Tegra30.

The driver is initially added with driver name and device tree compatible
value that won't cause this driver to be used. A later change will switch
the pinctrl driver to use the correct values, switch the old pinmux
driver to be disabled, and update all code that uses the old pinmux APIs
to use the new pinctrl APIs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
[squashed "fix case of Tegra30's foo_groups[] arrays"]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-06 10:51:46 +01:00
Haojian Zhuang
f4e6698329 pinctrl: enable pinmux for mmp series
Support PXA168/PXA910/MMP2 pinmux. Now only support function switch.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
[Rebase and fix some whitespace issues]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-01 19:42:35 +01:00
Linus Walleij
3bece55aa5 pinctrl: rename U300 and SIRF pin controllers
For stringent order, rename the pinmux-* pin controllers to
pinctrl-* and also rename the Kconfig symbols and in-kernel
users.

Cc: Rongjun Ying <Rongjun.Ying@csr.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:08 +01:00
Linus Walleij
ae6b4d8588 pinctrl: add a pin config interface
This add per-pin and per-group pin config interfaces for biasing,
driving and other such electronic properties. The details of passed
configurations are passed in an opaque unsigned long which may be
dereferences to integer types, structs or lists on either side
of the configuration interface.

ChangeLog v1->v2:
- Clear split of terminology: we now have pin controllers, and
  those may support two interfaces using vtables: pin
  multiplexing and pin configuration.
- Break out pin configuration to its own C file, controllers may
  implement only config without mux, and vice versa, so keep each
  sub-functionality of pin controllers separate. Introduce
  CONFIG_PINCONF in Kconfig.
- Implement some core logic around pin configuration in the
  pinconf.c file.
- Remove UNKNOWN config states, these were just surplus baggage.
- Remove FLOAT config state - HIGH_IMPEDANCE should be enough for
  everyone.
- PIN_CONFIG_POWER_SOURCE added to handle switching the power
  supply for the pin logic between different sources
- Explicit DISABLE config enums to turn schmitt-trigger,
  wakeup etc OFF.
- Update documentation to reflect all the recent reasoning.
ChangeLog v2->v3:
- Twist API around to pass around arrays of config tuples instead
  of (param, value) pairs everywhere.
- Explicit drive strength semantics for push/pull and similar
  drive modes, this shall be the number of drive stages vs
  nominal load impedance, which should match the actual
  electronics used in push/pull CMOS or TTY totempoles.
- Drop load capacitance configuration - I probably don't know
  what I'm doing here so leave it out.
- Drop PIN_CONFIG_INPUT_SCHMITT_OFF, instead the argument zero to
  PIN_CONFIG_INPUT_SCHMITT turns schmitt trigger off.
- Drop PIN_CONFIG_NORMAL_POWER_MODE and have a well defined
  argument to PIN_CONFIG_LOW_POWER_MODE to get out of it instead.
- Drop PIN_CONFIG_WAKEUP_ENABLE/DISABLE and just use
  PIN_CONFIG_WAKEUP with defined value zero to turn wakeup off.
- Add PIN_CONFIG_INPUT_DEBOUNCE for configuring debounce time
  on input lines.
- Fix a bug when we tried to configure pins for pin controllers
  without pinconf support.
- Initialized debugfs properly so it works.
- Initialize the mutex properly and lock around config tampering
  sections.
- Check the return value from get_initial_config() properly.
ChangeLog v3->v4:
- Export the pin_config_get(), pin_config_set() and
  pin_config_group() functions.
- Drop the entire concept of just getting initial config and
  keeping track of pin states internally, instead ask the pins
  what state they are in. Previous idea was plain wrong, if the
  device cannot keep track of its state, the driver should do
  it.
- Drop the generic configuration layout, it seems this impose
  too much restriction on some pin controllers, so let them do
  things the way they want and split off support for generic
  config as an optional add-on.
ChangeLog v4->v5:
- Introduce two symmetric driver calls for group configuration,
  .pin_config_group_[get|set] and corresponding external calls.
- Remove generic semantic meanings of return values from config
  calls, these belong in the generic config patch. Just pass the
  return value through instead.
- Add a debugfs entry "pinconf-groups" to read status from group
  configuration only, also slam in a per-group debug callback in
  the pinconf_ops so custom drivers can display something
  meaningful for their pins.
- Fix some dangling newline.
- Drop dangling #else clause.
- Update documentation to match the above.
ChangeLog v5->v6:
- Change to using a pin name as parameter for the
  [get|set]_config() functions, as suggested by Stephen Warren.
  This is more natural as names will be what a developer has
  access to in written documentation etc.
ChangeLog v6->v7:
- Refactor out by-pin and by-name get/set functions, only expose
  the by-name functions externally, expose the by-pin functions
  internally.
- Show supported pin control functionality in the debugfs
  pinctrl-devices file.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:04 +01:00
Linus Walleij
b4e3ac74d5 pinctrl/coh901: driver to request its pins
This makes the COH 901 driver request muxing of its GPIO pins
from the pinmux-u300 driver using the standard API calls.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:04 +01:00
Linus Walleij
ca402d37dc pinctrl: move the U300 GPIO driver to pinctrl
This driver will be converted to a dual GPIO + pinctrl driver
since it supports biasing and driving control options. Hopefully
it can serve as an example.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:03 +01:00
Linus Walleij
45f034ef20 pinctrl: hide subsystem from the populace
Machines that have embedded pin controllers need to select them
explicitly, so why broadcast their config options to menuconfig.
We provide a helpful submenu for those machines that do select
it, making it possible to enable debugging for example.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-11-10 09:02:12 +01:00
Rongjun Ying
393daa814f pinctrl: add a driver for the CSR SiRFprimaII pinmux
This creates a pin controller driver for the SiRFprinaII
pin mux portions.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
[Fixup for changed function names and semantics in the v10 patch]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2011-10-13 12:57:46 +02:00
Linus Walleij
98da352953 pinctrl: add a driver for the U300 pinmux
This adds a driver for the U300 pinmux portions of the system
controller "SYSCON". It also serves as an example of how to use
the pinmux subsystem. This driver also houses the platform data
for the only supported platform.

This deletes the old U300 driver in arch/arm/mach-u300 and
replace it with a driver using the new subsystem.

The new driver is considerably fatter than the old one, but it
also registers all 467 pins of the system and adds the power
and EMIF pin groups and corresponding functions. The idea
is to use this driver as a a reference for other
implementation so it needs to be as complete and verbose
as possible.

Reviewed-by: Barry Song <21cnbao@gmail.com>
[Fixup for changed function names and semantics in the v10 patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-13 12:57:45 +02:00
Linus Walleij
2744e8afb3 drivers: create a pin control subsystem
This creates a subsystem for handling of pin control devices.
These are devices that control different aspects of package
pins.

Currently it handles pinmuxing, i.e. assigning electronic
functions to groups of pins on primarily PGA and BGA type of
chip packages which are common in embedded systems.

The plan is to also handle other I/O pin control aspects
such as biasing, driving, input properties such as
schmitt-triggering, load capacitance etc within this
subsystem, to remove a lot of ARM arch code as well as
feature-creepy GPIO drivers which are implementing the same
thing over and over again.

This is being done to depopulate the arch/arm/* directory
of such custom drivers and try to abstract the infrastructure
they all need. See the Documentation/pinctrl.txt file that is
part of this patch for more details.

ChangeLog v1->v2:

- Various minor fixes from Joe's and Stephens review comments
- Added a pinmux_config() that can invoke custom configuration
  with arbitrary data passed in or out to/from the pinmux driver

ChangeLog v2->v3:

- Renamed subsystem folder to "pinctrl" since we will likely
  want to keep other pin control such as biasing in this
  subsystem too, so let us keep to something generic even though
  we're mainly doing pinmux now.
- As a consequence, register pins as an abstract entity separate
  from the pinmux. The muxing functions will claim pins out of the
  pin pool and make sure they do not collide. Pins can now be
  named by the pinctrl core.
- Converted the pin lookup from a static array into a radix tree,
  I agreed with Grant Likely to try to avoid any static allocation
  (which is crap for device tree stuff) so I just rewrote this
  to be dynamic, just like irq number descriptors. The
  platform-wide definition of number of pins goes away - this is
  now just the sum total of the pins registered to the subsystem.
- Make sure mappings with only a function name and no device
  works properly.

ChangeLog v3->v4:

- Define a number space per controller instead of globally,
  Stephen and Grant requested the same thing so now maps need to
  define target controller, and the radix tree of pin descriptors
  is a property on each pin controller device.
- Add a compulsory pinctrl device entry to the pinctrl mapping
  table. This must match the pinctrl device, like "pinctrl.0"
- Split the file core.c in two: core.c and pinmux.c where the
  latter carry all pinmux stuff, the core is for generic pin
  control, and use local headers to access functionality between
  files. It is now possible to implement a "blank" pin controller
  without pinmux capabilities. This split will make new additions
  like pindrive.c, pinbias.c etc possible for combined drivers
  and chunks of functionality which is a GoodThing(TM).
- Rewrite the interaction with the GPIO subsystem - the pin
  controller descriptor now handles this by defining an offset
  into the GPIO numberspace for its handled pin range. This is
  used to look up the apropriate pin controller for a GPIO pin.
  Then that specific GPIO range is matched 1-1 for the target
  controller instance.
- Fixed a number of review comments from Joe Perches.
- Broke out a header file pinctrl.h for the core pin handling
  stuff that will be reused by other stuff than pinmux.
- Fixed some erroneous EXPORT() stuff.
- Remove mispatched U300 Kconfig and Makefile entries
- Fixed a number of review comments from Stephen Warren, not all
  of them - still WIP. But I think the new mapping that will
  specify which function goes to which pin mux controller address
  50% of your concerns (else beat me up).

ChangeLog v4->v5:

- Defined a "position" for each function, so the pin controller now
  tracks a function in a certain position, and the pinmux maps define
  what position you want the function in. (Feedback from Stephen
  Warren and Sascha Hauer).
- Since we now need to request a combined function+position from
  the machine mapping table that connect mux settings to drivers,
  it was extended with a position field and a name field. The
  name field is now used if you e.g. need to switch between two
  mux map settings at runtime.
- Switched from a class device to using struct bus_type for this
  subsystem. Verified sysfs functionality: seems to work fine.
  (Feedback from Arnd Bergmann and Greg Kroah-Hartman)
- Define a per pincontroller list of GPIO ranges from the GPIO
  pin space that can be handled by the pin controller. These can
  be added one by one at runtime. (Feedback from Barry Song)
- Expanded documentation of regulator_[get|enable|disable|put]
  semantics.
- Fixed a number of review comments from Barry Song. (Thanks!)

ChangeLog v5->v6:

- Create an abstract pin group concept that can sort pins into
  named and enumerated groups no matter what the use of these
  groups may be, one possible usecase is a group of pins being
  muxed in or so. The intention is however to also use these
  groups for other pin control activities.
- Make it compulsory for pinmux functions to associate with
  at least one group, so the abstract pin group concept is used
  to define the groups of pins affected by a pinmux function.
  The pinmux driver interface has been altered so as to enforce
  a function to list applicable groups per function.
- Provide an optional .group entry in the pinmux machine map
  so the map can select beteween different available groups
  to be used with a certain function.
- Consequent changes all over the place so that e.g. debugfs
  present reasonable information about the world.
- Drop the per-pin mux (*config) function in the pinmux_ops
  struct - I was afraid that this would start to be used for
  things totally unrelated to muxing, we can introduce that to
  the generic struct pinctrl_ops if needed. I want to keep
  muxing orthogonal to other pin control subjects and not mix
  these things up.

ChangeLog v6->v7:

- Make it possible to have several map entries matching the
  same device, pin controller and function, but using
  a different group, and alter the semantics so that
  pinmux_get() will pick all matching map entries, and
  store the associated groups in a list. The list will
  then be iterated over at pinmux_enable()/pinmux_disable()
  and corresponding driver functions called for each
  defined group. Notice that you're only allowed to map
  multiple *groups* to the same
  { device, pin controller, function } triplet, attempts
  to map the same device to multiple pin controllers will
  for example fail. This is hopefully the crucial feature
  requested by Stephen Warren.
- Add a pinmux hogging field to the pinmux mapping entries,
  and enable the pinmux core to hog pinmux map entries.
  This currently only works for pinmuxes without assigned
  devices as it looks now, but with device trees we can
  look up the corresponding struct device * entries when
  we register the pinmux driver, and have it hog each
  pinmux map in turn, for a simple approach to
  non-dynamic pin muxing. This addresses an issue from
  Grant Likely that the machine should take care of as
  much of the pinmux setup as possible, not the devices.
  By supplying a list of hogs, it can now instruct the
  core to take care of any static mappings.
- Switch pinmux group retrieveal function to grab an
  array of strings representing the groups rather than an
  array of unsigned and rewrite accordingly.
- Alter debugfs to show the grouplist handled by each
  pinmux. Also add a list of hogs.
- Dynamically allocate a struct pinmux at pinmux_get() and
  free it at pinmux_put(), then add these to the global
  list of pinmuxes active as we go along.
- Go over the list of pinmux maps at pinmux_get() time
  and repeatedly apply matches.
- Retrieve applicable groups per function from the driver
  as a string array rather than a unsigned array, then
  lookup the enumerators.
- Make the device to pinmux map a singleton - only allow the
  mapping table to be registered once and even tag the
  registration function with __init so it surely won't be
  abused.
- Create a separate debugfs file to view the pinmux map at
  runtime.
- Introduce a spin lock to the pin descriptor struct, lock it
  when modifying pin status entries. Reported by Stijn Devriendt.
- Fix up the documentation after review from Stephen Warren.
- Let the GPIO ranges give names as const char * instead of some
  fixed-length string.
- add a function to unregister GPIO ranges to mirror the
  registration function.
- Privatized the struct pinctrl_device and removed it from the
  <linux/pinctrl/pinctrl.h> API, the drivers do not need to know
  the members of this struct. It is now in the local header
  "core.h".
- Rename the concept of "anonymous" mux maps to "system" muxes
  and add convenience macros and documentation.

ChangeLog v7->v8:

- Delete the leftover pinmux_config() function from the
 <linux/pinctrl/pinmux.h> header.
- Fix a race condition found by Stijn Devriendt in pin_request()

ChangeLog v8->v9:

- Drop the bus_type and the sysfs attributes and all, we're not on
  the clear about how this should be used for e.g. userspace
  interfaces so let us save this for the future.
- Use the right name in MAINTAINERS, PIN CONTROL rather than
  PINMUX
- Don't kfree() the device state holder, let the .remove() callback
  handle this.
- Fix up numerous kerneldoc headers to have one line for the function
  description and more verbose documentation below the parameters

ChangeLog v9->v10:
- pinctrl: EXPORT_SYMBOL needs export.h, folded in a patch
  from Steven Rothwell
- fix pinctrl_register error handling, folded in a patch from
  Axel Lin
- Various fixes to documentation text so that it's consistent.
- Removed pointless comment from drivers/Kconfig
- Removed dependency on SYSFS since we removed the bus in
  v9.
- Renamed hopelessly abbreviated pctldev_* functions to the
  more verbose pinctrl_dev_*
- Drop mutex properly when looking up GPIO ranges
- Return NULL instead of ERR_PTR() errors on registration of
  pin controllers, using cast pointers is fragile. We can
  live without the detailed error codes for sure.

Cc: Stijn Devriendt <highguy@gmail.com>
Cc: Joe Perches <joe@perches.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Barry Song <21cnbao@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-13 12:49:17 +02:00