We call usb_phy_init() from dwc3_core_init() during
probe, so adding usb_phy_shutdown() to dwc3_core_exit()
while removing the device so we don't keep PHYs
turned on, consuming power, unnecessarily.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This resolves the merge problems with:
drivers/usb/dwc3/gadget.c
drivers/usb/musb/tusb6010.c
that had been seen in linux-next.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some much needed changes for our dwc3 driver. First there's a
rework on the ep0 handling due to some Silicon issue we uncovered
which affects all users of this IP core (there's a missing
XferNotReady(DATA) event in some conditions). This issue which
show up as a SETUP transfers which wouldn't complete ever and
we would fail TD 7.06 of the Link Layer Test from USB-IF and
Lecroy's USB3 Exerciser.
We also fix a long standing bug regarding EP0 enable sequencing
where we weren't setting a particular bit (Ignore Sequence
Number). Since we never saw any problems caused by that, it
didn't deserve being sent to stable tree.
On this pull request we also fix Burst Size initialization which
should be done only in SuperSpeed and we were mistakenly setting
Burst Size to the maximum value on non-SuperSpeed mode. Again,
since we never saw any problems caused by that, we're not sending
this patch to stable.
There's also a memory ordering fix regarding usage of bitmaps in
dwc3 driver.
You will also find some sparse warnings fix, a fix for missed
isochronous packets when the endpoint is already busy, and a
fix for synchronization delay on dwc3_stop_active_transfer().
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQThLOAAoJEIaOsuA1yqREPB0P/igbry8UxYEfFA6+ojRmeS3x
AztAUUixXsl44lQOLtl/VSuKqvhiIJ7VniBgL+nj1HdeJPMG6bdjBLwl2LjYBCQq
xZbv07isqHqg8ntiGwOADQztU7p4BPGpDztogsTlNjUhclCvUwE9ZTf4Moe7Cnk8
TePUypvt3WQceWBpZxMd9Zirpmls0UTUW287OgQ+ik6QccokzQXxfzD5z3tS0bwo
nRjWReihPJU68p5wcbILjo4VmhBsllYrRxB8CIatqxfjj6OssJ0ifcO6+jn7bnc5
T8OStPK8FigTLdNuV4sx3MCu9ItSY1+Y+gRnfXpdbkEqU303qI/rOC0jnmEhAhr1
/mS9llhCkfknpvL/DSlQnYzwfNA4wFjTLNoxOEDNkYNE84T+YAfZI1DGBvwJoYlZ
NELQTJB2enVADmMyOwQcXwx7wu2uW7Sb6FcbYpIsZyADZVJPqtjG1o09d19xL0z5
YdP23D/A6/I6SySvW8cDy9F3ouCQfrkeEd71KF2+4s7zHZhU9cqFA65xOZ7FRB++
nUsTHCn07doqp+5vsRLV0BKPk3YH9mEg0aVv4ClSE57wZFPFAqXU5GtEgJ9mBAnv
3poV22oTvGdWuG3vzAAk83pnQPyxxv4DgDLc3gaKZXhecLDRp0O4uucuHrmyV5tn
eynhmX9bDB5hLGN5KJtX
=Lqwl
-----END PGP SIGNATURE-----
Merge tag 'dwc3-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: dwc3: patches for v3.7 merge window
Some much needed changes for our dwc3 driver. First there's a
rework on the ep0 handling due to some Silicon issue we uncovered
which affects all users of this IP core (there's a missing
XferNotReady(DATA) event in some conditions). This issue which
show up as a SETUP transfers which wouldn't complete ever and
we would fail TD 7.06 of the Link Layer Test from USB-IF and
Lecroy's USB3 Exerciser.
We also fix a long standing bug regarding EP0 enable sequencing
where we weren't setting a particular bit (Ignore Sequence
Number). Since we never saw any problems caused by that, it
didn't deserve being sent to stable tree.
On this pull request we also fix Burst Size initialization which
should be done only in SuperSpeed and we were mistakenly setting
Burst Size to the maximum value on non-SuperSpeed mode. Again,
since we never saw any problems caused by that, we're not sending
this patch to stable.
There's also a memory ordering fix regarding usage of bitmaps in
dwc3 driver.
You will also find some sparse warnings fix, a fix for missed
isochronous packets when the endpoint is already busy, and a
fix for synchronization delay on dwc3_stop_active_transfer().
Populate the resources for xhci afresh instead of directly using the
*struct resource* of core. *resource* structure has parent, sibling,
child pointers which should be filled only by resource API's. By
directly using the *resource* pointer of core in xhci, these parent,
sibling, child pointers are already populated even before
*platform_device_add* causing side effects.
Cc: stable@vger.kernel.org # v3.4, v3.5
Reported-by: Ruchika Kharwar <ruchika@ti.com>
Tested-by: Moiz Sonasath <m-sonasath@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
As a bitmap is used for free/used. As a device freed
all memory operations must be scheduled before the bitmap
is manipulated.
Signed-off-by: Oliver Neukum <oneukum@suse.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Synopsys specification clearly states under section "Device Power-On or
Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow
what specification says.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The same event buffers will be reused when coming
out of hibernation, so we must reinitialize them
properly to avoid any mistakes.
While at that, also take dwc3_event_buffers_setup()
out of __devinit section.
Signed-off-by: Felipe Balbi <balbi@ti.com>
This pull request contains one workaround for a Silicon
Issue found on all RTL releases prior to 2.20a, which
would cause a metastability state on Run/Stop bit.
We also have some patches implementing a few extra Standard
requests introduced by USB3 spec (Set SEL and Set Isoch Delay),
as well as one patch, which has been pending for a long time,
implementing LPM support.
Last, but not least, we are splitting the host address space
out of the dwc3 core driver otherwise xHCI won't be able to
request_mem_region() its own address space. This patch is
only needed because we are (as we should) re-using the xHCI
driver, which is a completely separate module.
Together with these three big changes, come a few extra preparatory
patches which most move code around, define macros and so on, as
well as a fix for Isochronous transfers which hasn't been triggered
before.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPo7lXAAoJEIaOsuA1yqRESaIP/AgxZIfOAUbPx0GWLnhub3qr
SxaUplweFc9q4KXRLn0kGdY9QArPR3bqW9g8KOTiRCBYRtjpACyMjibAUaAht81h
+vLdPt87Slj2c14t1uguWFvgCUYQOCugkVvDIjRg9PCLIuTahm4cIBFqL3RJOHFf
9WCd8JjH9ahr85ZtoCBk9B5bDNn71nS+Yh6/8+Ab90AE4vZ6t8Xx3+wLTHy2CBYQ
UH1o61QZreAJ0J3OiUobjqrVbYwz6TM0dFYMjA6ko+OiPRhVOj8/C8aNl/U1whRm
+7jjJiWO9aHp+Tu2OAQOBF6ydc3ZLBEiCl9RiE+O9MppmtOykzkTHFm1ZXatCEY7
UUYOy43VXLNlHoz8nidNw6P25hAwwlSijzlyawpihKbIaE8le2MpE6I00AlciM2q
BEo4LpluC8Rr6CUUr5W9dPZUexRlzxdAL5nQSJUnJgfEPphpP3x7dWTxUZBaWjq6
akqjgGqVj1QKwMnqL4GILtRgdqWj6WYrw67fYVLHqj8QQla4cgXQ2sHp9/R0imvT
nmjiL5ZiuIWWr965DgVHZwqIkdvMpSQb99a1xmptw8lFDGkVJDCssPDdEErbBMwy
KmOSaqKeg/Yway05i+Pwo/NUKHQSZeiyuguzniMrF7iYFF1/2hVYRgfpH4V+95w/
Xrnz4uH2YJGQGPddf87P
=qgf/
-----END PGP SIGNATURE-----
Merge tag 'dwc3-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: dwc3: patches for v3.5 merge window
This pull request contains one workaround for a Silicon
Issue found on all RTL releases prior to 2.20a, which
would cause a metastability state on Run/Stop bit.
We also have some patches implementing a few extra Standard
requests introduced by USB3 spec (Set SEL and Set Isoch Delay),
as well as one patch, which has been pending for a long time,
implementing LPM support.
Last, but not least, we are splitting the host address space
out of the dwc3 core driver otherwise xHCI won't be able to
request_mem_region() its own address space. This patch is
only needed because we are (as we should) re-using the xHCI
driver, which is a completely separate module.
Together with these three big changes, come a few extra preparatory
patches which most move code around, define macros and so on, as
well as a fix for Isochronous transfers which hasn't been triggered
before.
[ resolved conflicts and build error in drivers/usb/dwc3/gadget.c - gregkh]
This fix prevents a problem with dwc3 and host mode where
we were requesting the entire memory region in dwc3/core.c,
thus preventing xhci-plat from ever ioremapping its own address space.
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Array should be freed together with event buffers, since it was
allocated dynamically.
Signed-off-by: Anton Tikhomirov <av.tikhomirov@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Define DWC3_GCTL_SCALEDOWN_MASK and use it in place of
DWC3_GCTL_SCALEDOWN(3).
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We always return zero instead of the id we found.
Cc: stable@vger.kernel.org
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc3/core.c and drivers/usb/dwc3/dwc3-omap.c
included 'linux/module.h' twice, remove the duplicates.
Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch enables to use devm_xxx functions during probing driver.
The devm_xxx series functions are able to release resource when the
driver is detatched. We can remove several codes to release resources
in the probe function.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We need to dynamically re-size TxFifos for the
cases where default values will not do.
While at that, we create a simple function which,
for now, will just allocate one full packet fifo
space for each of the enabled endpoints.
This can be improved later in order to allow for
better throughput by allocating more space for
endpoints which could make good use of that like
isochronous and bulk.
Signed-off-by: Felipe Balbi <balbi@ti.com>
All our revision macros are defined with the entire
32-bits which we read from GSNPSID register, so we
must cache all 32-bits properly rather than masking
the top 16-bits.
This will fix all revision checks we have on current
driver.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We mask the correct bits within the wrong register. The power
optimization mode is stored hwparam1 register and not in hwparam0.
Reported-by: Partha Basak <p-basak2@ti.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
A few inits like the scale value or the removal of the DISSCRAMBLE is
done in the gadget code however it touches a general register.
Move this piece to the core.c file since it is likely to be requied by
both, parts of the core (device and host).
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
There are two where need to set operational mode:
- during initialization while we decide to run in host,device or DRD
mode
- at runtime via the debugfs interface.
This patch provides a new function which sets the operational mode and
moves its initialiation to the mode switch instead in the gadget code
itself.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
hardware will tell us how many event buffers we
need to support, so let's allocate the array
dynamically too.
Signed-off-by: Felipe Balbi <balbi@ti.com>
if we want to support situations where we have
both SoC and PCIe versions of the IP on the same
platform, we need to have sequential numbers between
them, otherwise we will still have name collisions.
Because of that, we need to move dwc3_get/put_device_id()
to core.c and export that symbol to be used by glue
layers.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We can have three modules here: dwc3.ko, dwc3-omap.ko and dwc3-pci.ko.
The later have already ids-aliases for probing and is fine. The omap
module has alias for DT but lacks alias for the "native"
platform_device. Maybe we should get rid of it and stick to the DT name?
Both glue modules create a new device for which the dwc3.ko module is
responsible and that one lacks the platform alias.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The Designware USB3 IP can be configured with
an internal xHCI. If we're running on such a
version, let's start the xHCI stack.
Signed-off-by: Felipe Balbi <balbi@ti.com>
There's no need to add driver_data for something
we can fetch from HW.
This also makes our id_table unnecessary - at least
for now -, so we also remove it on the same patch.
Signed-off-by: Felipe Balbi <balbi@ti.com>
this is mainly for testing. In order to be able
to test if we're enumerating correctly on all
speeds, let that be controlled by a module
parameter.
Signed-off-by: Felipe Balbi <balbi@ti.com>
These files uses the full set of MODULE_ macros and so need to
include module.h directly.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
cache the contents of GHWPARAMS* registers in
our device structure for easy access.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Some people think that this line is not compatible with the GPL. The
statement was required due to the Buenos Aires Convention and is now
deprecated. I remove it because it is said that it is pointless nowdays.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
We read the DWC3_GSNPSID register to make sure we got the correct
register offset passed. One of the recent commits moved the soft reset
before this so in case of the wrong offset we end up with "reset timed
out". This patch moves the "id" check before the reset again.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.
Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.
The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.
More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.
While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.
[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
