Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
GPeeJrJaYQsDvTrO8wjU
=ZtPK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
A relatively small setup of cleanups this time around, and similar to last time
the bulk of it is removal of legacy board support:
- OMAP: removal of legacy (non-DT) booting for several platforms
- i.MX: remove some legacy board files
Conflicts: None
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RJAAoJEFk3GJrT+8ZlS78P/28n9U/KBoBkHWFhLmsgAUC/
X06CfjxcFuRndLoj96jxhWdaf65GwFsDPCsWfI270X7kYlu08dn2AlLOOHxNf1Ou
DvfqXz8dBl3z8pg0VHcZzUaV9CwfbvIHbalD2rLQ26sF6vRfHrF7AC+ITTi2TEpY
CMX7LF1igX8nnRRZpl0Oya8Uvr8vsjuuvSq6I2GFav/JhZpYhz19FqbVPtu13Kuw
+AZrwvgn5KwSxYw6cDjwWgbSBBuZi2m22LJxrs8z/ckRVA0ErpKLD83GZ5DeA+Ii
m+f0xv/EE59AnfCnlpnZizxeQQ7BSVAZbaSp4GuXgLtg+1zJZP9tsJ8gLGuSLIo4
TMMcB7K2VQMs4orAEvd0B7QB2WEtu4NDgKmD7k7tSy0uCMqxY/ItYDFVLpLRz9+r
cnB469H312MJuk+7eH324n62lWhlQ8h1D2zHXMDCo4kvgZg/Qcbl6joj34B6oTqz
Pa1RoJwrh4CsihDF/2aUt1IOZ+4mm0hhg4gocZEyqvf7Xdya2oFiyoUQCLnPQfbd
Vvw7JMxnIW9iQbYzu4eHlZin3TK53osmIepj7pnlrmdLcM046fLONDxsg9JovsrS
+TwHE00DZdAgpH/z1aUo8Ft4xO60FkPK2YcOCUvKZKi3mIHenvZZQo+s28suNni1
Q1dz9aZWNvaunmRl4EcH
=0zof
-----END PGP SIGNATURE-----
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Kevin Hilman:
"A relatively small setup of cleanups this time around, and similar to
last time the bulk of it is removal of legacy board support:
- OMAP: removal of legacy (non-DT) booting for several platforms
- i.MX: remove some legacy board files"
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: fix EFM32 build breakage caused by cpu_resume_arm
ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
ARM: v7 setup function should invalidate L1 cache
mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c
ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c
ARM: OMAP2+: Constify irq_domain_ops
ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers
ARM: at91: remove useless Makefile.boot
ARM: at91: remove at91rm9200_sdramc.h
ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
ARM: at91/pm: use the atmel-mc syscon defines
pcmcia: at91_cf: Use syscon to configure the MC/smc
ARM: at91: declare the at91rm9200 memory controller as a syscon
mfd: syscon: Add Atmel MC (Memory Controller) registers definition
ARM: at91: drop sam9_smc.c
ata: at91: use syscon to configure the smc
ARM: ux500: delete static resource defines
ARM: ux500: rename ux500_map_io
ARM: ux500: look up PRCMU resource from DT
ARM: ux500: kill off L2CC static map
...
* New APM X-Gene SoC EDAC driver (Loc Ho)
* AMD error injection module improvements (Aravind Gopalakrishnan)
* Altera Arria 10 support (Thor Thayer)
* misc fixes and cleanups all over the place
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJViuInAAoJEBLB8Bhh3lVKHT8QAKkHIMreO8obo09haxNJlfdF
BaG7SNEDhvcgQ1B76RsjnjkUpsivvUt+mCYMP+BxcAqFrTA33UZCCOK5tEhGb1wr
matRdR6+aezqAl2e/0/Ti25bWOkDxcOeazh2TyezuyIXtaJjOq1oZC7OaYGmxPun
NlZY+/uY1eiHlewKsK04y8G8J5i4wGoKnuxBvOyELT90+a+fLfAOshAp0D4r0piB
Znv0ydsHlu+Wx57slg1DktlsyswmcGS9WfWwwTlELOLulKgN8wEAVYzUB5pJzNbz
ehq0J4wYz95juXADC4M4tEjErHVJNl6PbyMqwt0+XUUJ1NSgOj7Q6iqwxDoZX8km
oxiLVydQBtoIzF1LojFKAVZDFnrMKHKwK3RaDaUJjTI90+tVzEU8xsBlUf6+EgD2
Ss2RH8Gfuf52RdtwHh9++T1ur5rM9YNCAm31msq06mcOf0bEtmDbhZ+fVC5mjhqB
fIb3hxnk0r2BVg+ZCN/boxGS6RzUtYVcCXaBPDMeHcg9BEEds70KCFEcsX7TvJIg
5/SHI+033MylqkX2zrgDQLj7CQk3R0jaotHVbdhLupyOldcM7r5uF+VO84drNWGN
GfM2lpyE/swZWnzKuotgYIGR1XvFjtJAVAyNGIvwP+ajjTsqXzEnLSLClY5LWfYd
nSSSMpCCqsEmhoWftOix
=Id4f
-----END PGP SIGNATURE-----
Merge tag 'edac_for_4.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
- New APM X-Gene SoC EDAC driver (Loc Ho)
- AMD error injection module improvements (Aravind Gopalakrishnan)
- Altera Arria 10 support (Thor Thayer)
- misc fixes and cleanups all over the place
* tag 'edac_for_4.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (28 commits)
EDAC: Update Documentation/edac.txt
EDAC: Fix typos in Documentation/edac.txt
EDAC, mce_amd_inj: Set MISCV on injection
EDAC, mce_amd_inj: Move bit preparations before the injection
EDAC, mce_amd_inj: Cleanup and simplify README
EDAC, altera: Do not allow suspend when EDAC is enabled
EDAC, mce_amd_inj: Make inj_type static
arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support
EDAC, altera: Add Arria10 EDAC support
EDAC, altera: Refactor for Altera CycloneV SoC
EDAC, altera: Generalize driver to use DT Memory size
EDAC, mce_amd_inj: Add README file
EDAC, mce_amd_inj: Add individual permissions field to dfs_node
EDAC, mce_amd_inj: Modify flags attribute to use string arguments
EDAC, mce_amd_inj: Read out number of MCE banks from the hardware
EDAC, mce_amd_inj: Use MCE_INJECT_GET macro for bank node too
EDAC, xgene: Fix cpuid abuse
EDAC, mpc85xx: Extend error address to 64 bit
EDAC, mpc8xxx: Adapt for FSL SoC
EDAC, edac_stub: Drop arch-specific include
...
* zte/soc:
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
Add initial dts file and document for ZX296702 and board ZX296702-AD1.
More peripherals will be added later.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- add failure(exception) handling
: of_iomap(), of_find_device_by_node() and kstrdup()
- add common poweroff to use PS_HOLD based for all of exynos SoCs
- add exnos_get/set_boot_addr() helper
- constify platform_device_id and irq_domain_ops
- get current parent clock for power domain on/off
- use core_initcall to register power domain driver
- make exynos_core_restart() less verbose
- add support coupled CPUidle for exynos3250
- fix exynos_boot_secondary() return value on timeout
- fix clk_enable() in s3c24xx adc
- fix missing of_node_put() for power domains
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVcdzXAAoJEA0Cl+kVi2xql4QP/3rDUfEGSifijucf8K2fssVa
mQ/a++UG//uXE6Pv9t5tymsEIwKceqxoBOMR5XgmHdftYHc7if7lwNOlTcllbUYj
W1a7W4rCJboh2hl7oChz5tDYedoFiEJUZLAaJ1yLF+5vm6nVZYplHOCiG4q6le36
4DzQ1f8ECUHrWvfGtowK61NE9GiiixJHoBJpBnFmtx67w10KeS8zVmRrhrYghyNF
QX3rveWpuZcAtBy1YzLsEtuMucG3iLtg+JJE+9j5Sqj/nZxlUWLpD1q8f65c77tW
QrJOCnDEFIOzai6XjCLMbD1euiRhAZze1Rqq7giqRjFyUbAJi+OUiTkt2yjy5hZR
G9INmY7qgHWFyBQmqLLmA4nPdh2kdPp9FH9r17fI9IDDwv10kktJ69n06tVoQLQX
L+m8LAzpx5ubgJe7/R8sFockDN1BE03F1GTVdXuGJFzjPat/JG0PddoPM9l+Quxk
+KSHexmdMYy9B7P2LqEQezyP4Y7en9ywUzUiQprKnz5wQSfTx6GA5l6j2rno4xte
h93MooUSt9GScubaaFRaQeU81gphc9cMMsU43On0DHbQ71CGnaBmxkGwC4FOdSkV
PaevURAT5hkeDQjbaHaYVTfh/qC1aQJFv3eDDwoaYpjqXPSnqeB3R/ZbAZpfthEG
jLQ1zkRIo435Sc7wCrce
=LybA
-----END PGP SIGNATURE-----
Merge tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Samsung updates for v4.2
- add failure(exception) handling
: of_iomap(), of_find_device_by_node() and kstrdup()
- add common poweroff to use PS_HOLD based for all of exynos SoCs
- add exnos_get/set_boot_addr() helper
- constify platform_device_id and irq_domain_ops
- get current parent clock for power domain on/off
- use core_initcall to register power domain driver
- make exynos_core_restart() less verbose
- add support coupled CPUidle for exynos3250
- fix exynos_boot_secondary() return value on timeout
- fix clk_enable() in s3c24xx adc
- fix missing of_node_put() for power domains
* tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (301 commits)
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
ARM: EXYNOS: Get current parent clock for power domain on/off
ARM: SAMSUNG: fix clk_enable() WARNing in S3C24XX ADC
ARM: EXYNOS: Add missing of_node_put() when parsing power domains
ARM: EXYNOS: Handle of_find_device_by_node() and kstrdup() failures
ARM: EXYNOS: Handle of of_iomap() failure
Linux 4.1-rc4
....
These options make it possible to overwrites the data and instruction
prefetching behavior of the arm pl310 cache controller.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Using a fixed (by DTS) parent for clocks when turning on the power
domain may introduce issues in other drivers. For example when such
driver changes the parent during runtime and expects that he is the
only place of such change.
Do not rely on DTS providing the fixed parent for such clocks. Instead
before switching domain off, grab a current parent of a clock with
clk_get_parent().
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon hi6220 SoC mobile platform.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This adds documentation of device tree bindings for the
ARM System timer.
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
- Document Snoop Control Unit (SCU) bindings
- Document Ux500 board bindings
- Define the backup RAM in the DBx500 device tree
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVbEwwAAoJEEEQszewGV1zw5IQAMgEalCaSArXm/a12eogltuE
rGzJtP6MRwqLA4dGe+rOnUEsw2+jX1uBpUsBt7akBRbl2prRUpm89SJxZg8E5YpG
u2c+ODrh1lp4sRpAtKiMrLVx+hIjR4YFEa2cW0/OAJKG+4h1RXeQlXW3bw9q0qov
dO+M+NlcmWHyaJU9bNHYPZNYtG+9rVYY8kEK/LFe1xiY/VYC8KIe+gikR/R9WHI1
PZgAi1rARLeKAC7eThUDA+XnhzpxwYyqsxHsLV92l0l/cfly6DKCmZ1Zn9jk7v4b
L24jZ8OpHhJX5s//vsBmLxSobisuL8aLJDHCkrBmIb+geRsphOYmYTwmKdRJ2YkB
CyuxmvjdpKNiBIb8SGEKplrRaAexRfjXxX1GdNZNzdvIDo7T1hrM3/Fzo5TXxP61
Tgtu3I2Cwa3luDxFKaGlgldihvhUVPcAoBQUXyF57teWIh4iwTcrGZ3Li9kxTY32
ZvunTP/z8XjWRKFHv5KFCnnpxoQLDB/aHuv36H94hol5Nf95MC0EjGvBRM582z+u
1znExgtfSUt0BfqaxFgTieIu8RrQK0bxGcwBK6Okmv+j2BjTnE10ZuoqZSCaurOQ
QEkO336JNyYSwSu9Bxcwcx5x/qB+X5yuZLvmzhOp8Ld0omUngOqSpBtxdQQNQBK5
9qwI0QJ0Unc3rSgkJ6Ho
=IRmr
-----END PGP SIGNATURE-----
Merge tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Device Tree changes for Ux500 and ARM SOC" from Linus Walleij:
- Document Snoop Control Unit (SCU) bindings
- Document Ux500 board bindings
- Define the backup RAM in the DBx500 device tree
* tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: define the backupram in the device tree
ARM: ux500: add board documentation
ARM: scu: document Snoop Control Unit DT bindings
CCI-500 provides 8 event counters which can count any of the
supported events independently. The PMU event id is a 9-bit
value made of two parts.
bits [8:5] - Source port
0x0-0x6 Slave Ports
0x8-0xD Master Ports
0xf Global Events to CCI
0x7,0xe Reserved
bits [0:4] - Event code (specific to each type of port)
The generic CCI-500 controlling interface remains the same with CCI-400.
However there are some differences in the PMU event counters.
- No cycle counter
- Upto 8 counters(4 in CCI-400)
- Each counter area is 64K(4K in CCI400)
- The counter0 starts at offset 0x10000 from the base of CCI
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This driver manages Qualcomm CoreSight Replicator device, which
resides on the AMBA bus. Replicator has been made programmable to
allow software to turn of the replicator branch to sink that is not
being used. This avoids trace traffic to the unused/non-current sink
from causing back pressure that results in overflows at the source.
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Put in a blurb in the device tree bindings indicating that
coresight blocks may have an optional ATCLK.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge "Documentation: bindings: Add DT bindings for ARM Juno boards" from Liviu Dudau:
* 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld:
Documentation: bindings: Add DT bindings for ARM Juno boards.
arm64: Add DT support for Juno r1 board.
arm64: Juno: Add GICv2m support in device tree.
arm64: Juno: Add memory mapped timer node
arm64: Juno: Split juno.dts into juno-base.dtsi and juno.dts.
arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.
- use syscon in the ata and cf drivers to configure the SMC and drop
sam9_smc.c
- switch the at91rm9200 memory controller to syscon
- remove last useless headers
- remove now useless Makefile.boot
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJVXkSpAAoJEKbNnwlvZCyzauwQAMw7hS1F13piSpN5JBlST6yx
I4ojH/wB5GzI+qvTTcBZQR0AGcDatU3cHuzIPzYypKTB76iLf5DaZPvPjN3S3EK0
2/4R2eJyz0pA/2liTQ17e0MjKSIR0Ui7kk/aWYnC92/p2KK8xpUsbxznAIkAdw8I
a1HgsM1IKPVnyyxgvrKNhNcsP7fCzfjgnRNmRiFe9iDIbLervE+jKpm7PTakWtQL
OeLqRoURVd7yOLeqhlrmgch0ut8MqdHPgD57M/xbgi11VSg1PwLWTpuUlbnbVFwD
nw8A7d24+rUYLgyhTj92RmSiPjFyztHL6S+rw4yzaDLHMIr4Vm/U4eS9xcRhXzhe
FaigePDKYQiDNZ3u3NCDwOJk3HLlTkpvlzmVd1nFn313afFOy4AtIwtyUgg51946
HkZQSU0JIcqd6y53EFjSMjdGxuDavyrYsV9KNDh3dFNHEKfe41LJBnYB9Q3mSYZC
H66sqs+5JVguwNdLJKXKvrehTF0dmsawvd0cjZgBDDj8JORjBPLIquU+IVJ1isYV
KDH4JjEWYqVk86j0Cpt0A+vCBOCAS21dn5wb6vi8dD4agoRr7HuQnSMbvzDhNLnY
93Ah82q5bQJjvWgb5FXYp2Ar9IhLBZ7sLqcnF1Fo5S7KCC6wMnd11/NeFYsnKfE/
N55fXpd/pPYDNg3XDs+q
=iSye
-----END PGP SIGNATURE-----
Merge tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/cleanup
Merge "First batch of cleanup for 4.2" from Alexandre Belloni:
- use syscon in the ata and cf drivers to configure the SMC and drop
sam9_smc.c
- switch the at91rm9200 memory controller to syscon
- remove last useless headers
- remove now useless Makefile.boot
* tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: remove useless Makefile.boot
ARM: at91: remove at91rm9200_sdramc.h
ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
ARM: at91/pm: use the atmel-mc syscon defines
pcmcia: at91_cf: Use syscon to configure the MC/smc
ARM: at91: declare the at91rm9200 memory controller as a syscon
mfd: syscon: Add Atmel MC (Memory Controller) registers definition
ARM: at91: drop sam9_smc.c
ata: at91: use syscon to configure the smc
This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores are used
simultaneously, orthogonal device tree's are required.
The boot CPU is dependent on the SoC variant. The available
boards use mostly variants where the Cortex-A5 is the primary
and hence the boot CPU. Booting the secondary Cortex-M4 CPU
needs SoC specific registers written. There is no in kernel
support for this right now, a external userspace utility
called "m4boot" can be used to boot the kernel:
m4boot xipImage initramfs.cpio.lzo vf610m4-colibri.dtb
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVWi8WAAoJEN2kpao7fSL4A/0P/AyWkBuASmgR2ubNndP2eNEo
gp/rXfLcSR4G9BVliwOm0y8HjXK9fmyzrHRxiKb4dmY49CFemmIwQ8/V4GOd2Xot
F8lC9ncMllNjiSBqMgNr2ByTkCR/nrPLWe8kmy5sJoffmdnwZvHouomokOgWWe3g
bhQJPr07h6Jbqp1i76pdM+e6l4LDCD5QjjDx6+B2dzz8ofnOFZmP2CNA6IMJ6jZW
t0mqc+fsB/zqW07p8BM3h3YkSEjzT26sy2C/o3rHcl51yCtCtYhbRhMpTJtjrV/o
mbgkAfSS/4F1Lj6IAm95Q3faNkU6Lab8eXloIe6DR0VMJTJXsYmzrR31Udim0Z2w
aw46wcPo7bK5hvCPHSP0SJl2MdWBxadhVEMDdxT0K4ieEQcoBryoALzI/v0S1Teo
lXVFfbz6MkCjP7OZZiaeT3Q5rQSlz5Etn/EkwTQhuixVNTTaH3g6en3Z+1cGISi5
V40aIv7nRLXxPhSNattfDfBPGefbE78cMNsErK/M8Kz4hqRA8PY/EO2KoqyCIVSt
1LGAKsqtEh+emdIrEIdbtQ1UkeNkx24pKayWmNoq0r2vLMzpCDwq8yOnowHwQAic
fPT2FDHkC1GsyoBt24uBHzde+K8uYrPabvN3Jh/f9i7tsLQCXUqbllsi4AUpIR4W
drilObi2VLSVB4kJknrn
=C6Wl
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Berlin DT changes for v4.2" from Sebastian Hesselbarth:
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
* tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin:
Documentation: bindings: update the berlin chip and system ctrl doc
Documentation: bindings: move the Berlin clock documentation
Documentation: bindings: move the Berlin pinctrl documentation
Documentation: bindings: move the Berlin reset documentation
Documentation: bindings: update the Berlin controllers documentation
Documentation: bindings: berlin: consider our dt bindings as unstable
ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11
The at91rm9200 memory controller is not simply an SDRAM controller. It also
controls the EBI (External Bus Interface), the SMC (Static Memory Controller)and
the Burst Flash Controller.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This documents the device tree bindings on the top level of
the Ux500 boards.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds device tree bindings for the ARM Cortex-A5 and
Cortex-A9 Snoop Control Units.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that the rework to have one sub-node per device in the chip and
system controllers is done, their dedicated compatible can be removed.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin clock documentation was part of the Marvell Berlin SoC
documentation because the Berlin clock configuration was inside the
chip controller. With the recent rework of the chip and system
controller handling (now all sub-devices of the soc and system
controller nodes are registred with simple-mfd, and each device has its
own sub-node), the documentation of the Berlin clock driver can be moved
to the generic clock documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin pinctrl documentation was part of the Marvell Berlin SoC
documentation because the Berlin pinctrl configuration was inside the
chip and the system controllers. With the recent rework of the chip and
system controller handling (now an MFD driver registers all sub-devices
of the two soc and system controller nodes and each device has its own
sub-node), the documentation of the Berlin pinctrl driver can be moved
to the generic pinctrl documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin reset documentation was part of the Marvell Berlin SoC
documentation because the Berlin reset configuration was inside the chip
controller. With the recent rework of the chip and system controller
handling (now an MFD driver registers all sub-devices of the two soc and
system controller nodes and each device has its own sub-node), the
documentation of the Berlin reset driver can be moved to the generic
reset documentation directory.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
We're moving from a single node for multiple devices to a node with one
sub-node per sub-device, registered by simple-mfd. Update the
documentation to reflect the changes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Because the support of Marvell Berlin SoCs is still a work in progress,
add a statement to explicitly consider our device tree files and
bindings as unstable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVVGaiAAoJEFGvii+H/Hdh+EgP/3TFK863t7j9r4UdN76dPogx
GUvaT0U1H6/zs3P9B0/L4FVVdkIhEXZ7NvkiEjGuMySpSoAAouWclaW40FQUysK4
Pr9A0Qssp0QjjIwBpT/cRWyCmTpP00qbYsDRlKWtDmMu4A134UCUTXY5008+S++2
EqVyP28hpkImAvPEt2jj14kFep/HroxVPvsD7/vWM0SP5BY3zXxHl5wSD/6XzmEa
/jJonhhNWVd+/Vkgu331360vEx6zvC66GhIqFLHlSz7dUI4cw008c4NtxcYjFUVl
0Jv9YXyxD3GC52S1cZ0MGrWaMXC9LBOq4/5THU/rU+7n3rrkIl/Wrj4zvyKy6IUo
E/XRzZ0EBRooSR+z/ptZ1QBZouhWRRi5iN8Ql+AqHhUg9QV03wXtauijpkRgKRnO
+eiPeuMvHnWzfWLrfHamQTgHAJdfD8o0+nBx/0mvy76JidamIsbYoRB1NSixKNEz
lZXeQoKQ7H+2Ojky+QQArBFnxH1z1OAga2lKh1MXaHs6mvNzHL1W1btcg66sIjFV
FJHqJjZgPgbelG+fqvYtegfOQKVAGVMDhnGUUeVA22bTPgHvdaLCCTiaCXdpsNC9
cuM0yykWZL0NcZiGXtWSs/2rA7Fw25TJkZ23i1lye15nNeyFLoEZIE1UbtcxylPt
edoYW47mgIS0Xdoi/wim
=KpAt
-----END PGP SIGNATURE-----
Merge tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt
Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones:
* tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
ARM: bcm2835: dt: Add the mailbox to the device tree
ARM: bcm2835: dt: Fix i2c0 node name
ARM: bcm2835: dt: Use pinctrl header
ARM: bcm2835: dt: Add header file for pinctrl constants
ARM: bcm2835: dt: Add root properties for Raspberry Pi
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Merge "Device Tree changes" from Florian Fainelli:
New devices:
- Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo
WZR-1750DHP
- Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U
New peripheral support:
- Brian adds Device Tree nodes for the Broadcom NAND controller found on
BCM7xxx, BCM63138 and Cygnus SoCs
- Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on
BCM7xxx
- I add the Device Tree nodes and bindings documents for bringing-up secondary
CPUs and timer/syscon-reboot on BCM63138
* tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Add DT for Asus RT-AC56U
ARM: BCM5301X: Add DT for Asus RT-AC68U
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
ARM: dts: brcmstb: add nodes for SATA controller and PHY
ARM: dts: cygnus: Enable NAND support for Cygnus
ARM: bcm63138: add NAND DT support
ARM: bcm7445: add NAND to DTS
ARM: BCM5301X: Add DT for SmartRG SR400ac
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
ARM: dts: BCM63xx: Add SMP nodes and required properties
Documentation: DT: Document SMP DT nodes and properties for BCM63138
ARM: dts: BCM63xx: Add PMB busses nodes
Documentation: DT: Add Broadcom BCM63138 PMB binding
This patch adds root compatible properties for the following boards:
- Raspberry Pi Model A
- Raspberry Pi Model A+
- Raspberry Pi Model B
- Raspberry Pi Model B (no P5)
- Raspberry Pi Model B rev2
- Raspberry Pi Model B+
- Raspberry Pi Compute Module
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
A timer node and a syscon-reboot node are required for software reboot
to work on BCM63138, document these two nodes in the platform binding.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add binding documentation for the additional nodes and properties
required to get the secondary CPU online on the BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This pull request contains only the changes needed to support the SMP on
the Allwinner A23.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUQFvAAoJEBx+YmzsjxAgzZEQAIvJbHSZKtuI7gVgD+74oa7A
yigsnhdoOTMtWlgWWZHuN56CjEZNSosZoa9NLJhEDBAPEbDr74SoegW7knW6/xkD
B6s/TV4zGCciZ6AWa7zJEwwvibzdhw+9fGTIWZ4ZLr5fiaPPOE4jN3+O2Cu/oydC
7kD0buhh2QJpQp9ryy8L0S9pafAp8iBaux2zP1xZElG0s52xyNKtZlKD7B8SywFH
UFhJmjhL0Fq7APi1SUtLbESyIZWmvgE7G8Oh9l/N7VXnkb6R4eiKb/Q3QO8FXpKh
qO26A0k5cPtnAwMCYbXWimGh/X/2bY+eY8YPa/yUj19Pz770kT6loZRhvGEmkhDy
aSbJFC49/sco9FIkgNMNNFyPi6rCsrmj4CGOI67cDqomARUCxiQmg3Lr71NS5rtN
m6drF/6B9EzDochK9k/P/uAW0I/HJtR9Lbh/TZYLEb0SbL+j+s4s7iFhHhI3S0zh
hB9mfWvbse+2vLyjyoyT58igZAf9gg/QJFnHWDFPAc3D15zxg9xQObGQ68d6CNDB
1OvjDUBCwQBOdRQgFW2YUl70lm7Sm/rDFvWR/cY6+9QSEBeDeEglP0ji+BdHynAl
QPdUiiTs5tuz6WtLDX3mRYGfocUCRbPxPQ2BNZtn9gpAx4N9eCDQQuX3f937Ur9F
zMhuV7zfQ3X87beuUMWx
=RNcV
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Merge "Allwinner core additions for 4.2" from Maxime Ripard:
This pull request contains only the changes needed to support the SMP on
the Allwinner A23.
* tag 'sunxi-core-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun8i: Add SMP support for the Allwinner A23
Use 'clock-controller' and 'power-controller' as node names in the
examples rather than the specific names of the units.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds the binding documentation for the apmixedsys, perisys and
infracfg controllers found on Mediatek SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:
1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
11 bits on OMAP5 as against 8 bits on OMAP4, with the master
NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
field.
2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
input sources on OMAP5. The common DEBUGSS source is at a
different input on each SoC.
Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The A23 is a dual Cortex-A7. Add the logic to use the IPs used to
control the CPU configuration and the CPU power so that we can
bring up secondary CPUs at boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- DT endianness specification bindings
- Big endian 8250 serial support
- DT overlay unittest updates
- Various DT doc updates
- Compile fixes for OF_IRQ=n
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVOG5kAAoJEMhvYp4jgsXihDgH/3pmPSjuRG1bhGssmnchHjWh
SU2eS2MZnlD60UqRt7jd3smCX2qL83tfwpFhOvCT9Mz775E7ggmYq9fS8pCYAbaD
x98mUrE2GzdUzlrL6RS8Z0ExjyGwbMoW3+cZtyPkmC6CsW0fwqEPmEyk7m+Hk8C3
w3pWG06o+G8UjiFmwbr8Pki2ykxvucr22NCzH4SS6bAD4QOrQO3v48QkUg7XFlVc
NHNzQbswL85uOJ7uuAbxg+s8TXkwcxUeMJEKldLrjuyppO3N1MjnOgCptnhVNOOb
zK+IsS378jMiNjAg2ui/BLH60N5yadkgk4+L4iPPy+y/yR61NCVXxRe11IQJxb0=
=rtv6
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull second batch of devicetree updates from Rob Herring:
"As Grant mentioned in the first devicetree pull request, here is the
2nd batch of DT changes for 4.1. The main remaining item here is the
endianness bindings and related 8250 driver support.
- DT endianness specification bindings
- big-endian 8250 serial support
- DT overlay unittest updates
- various DT doc updates
- compile fixes for OF_IRQ=n"
* tag 'devicetree-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
frv: add io{read,write}{16,32}be functions
mn10300: add io{read,write}{16,32}be functions
Documentation: DT bindings: add doc for Altera's SoCFPGA platform
of: base: improve of_get_next_child() kernel-doc
Doc: dt: arch_timer: discourage clock-frequency use
of: unittest: overlay: Keep track of created overlays
of/fdt: fix allocation size for device node path
serial: of_serial: Support big-endian register accesses
serial: 8250: Add support for big-endian MMIO accesses
of: Document {little,big,native}-endian bindings
of/fdt: Add endianness helper function for early init code
of: Add helper function to check MMIO register endianness
of/fdt: Remove "reg" data prints from early_init_dt_scan_memory
of: add vendor prefix for Artesyn
of: Add dummy of_irq_to_resource_table() for IRQ_OF=n
of: OF_IRQ should depend on IRQ_DOMAIN
We were expecting to sit on this branch through most of the merge window since
the contents was merged into our tree late, but we ended up sitting on all of
our contents so it can go in with the rest.
The contents here is:
- A large branch of cleanups of the CM/PRM blocks on OMAP.
- A couple of patches plumbing up CM/PRM on OMAP5 and DRA7.
- A branch with DT updates for Freescale i.MX. including some shuffling from
.dts to .dtsi (include) files that causes a little churn.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNy2KAAoJEIwa5zzehBx3mE4P/A+Wk2ElKl0FH6Kz4Wmt5MOY
GPbIyd6jXTN/zbyAQxdPEQM7VvBh6GfgGTmNmcmfv2kacGJveAc7+UV0GSfW0XEO
haOIwSRvfCIW1d2pyphrFlRqzQsDDzJkVuiRo1DkFwICyKEabXNqGu1zjNaLmN3j
zw1DiAhe9ymywxayT5GBMevKU2a16Jgbzie6UfKKI5YO8Nqug13YI1as7n9SKrU4
wdi5b7kecgcfVlmYUrN9iqKg3oKTqRNSZDk/WsGvO/L5Mks0Xoc9v/K6rifNUMdd
CoigEznE1xgDvwPbAeXn4JiF/+JLVnDTZorsINQFIIAzHa2cZM1fMjT3x56IT0Y0
iIU3uWh8B/L2/qTPsqEBDFd/lBX/E3cND7lCIWCU0vwGWRzAh/Q+vRwdFfLoMOXh
npcw0hGS4KEWJ0sEX0xU9EvBUa5fb/CXT2xWBPVMV1Wb1QZLcquBRxFFNgh+GK2X
nmoZFiqfJDQWrMoNySo+MGyBzIYLtwxkRF0rsUvJ47cW2/+KXSHflTgllvEpQ/38
Ew3QmzCPlFuP7G1xiim9zSGvKIYhWV1fRUix1+FIE+on2d0TmdhqISHzCVU6ePxB
MZC8GwUww57i0hXXgirgrlN6moKaUC1DN7AwNrHQsJIi8aFXuFWbZAufRrV36Kwg
zsADWvSeOSWwea04MtkL
=ssbK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late changes from Olof Johansson:
"We were expecting to sit on this branch through most of the merge
window since the contents was merged into our tree late, but we ended
up sitting on all of our contents so it can go in with the rest.
The contents here is:
- a large branch of cleanups of the CM/PRM blocks on OMAP.
- a couple of patches plumbing up CM/PRM on OMAP5 and DRA7.
- a branch with DT updates for Freescale i.MX. including some
shuffling from .dts to .dtsi (include) files that causes a little
churn"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON
ARM: OMAP4+: control: add support for initializing control module via DT
ARM: dts: dra7: add minimal l4 bus layout with control module support
ARM: dts: omap5: add minimal l4 bus layout with control module support
ARM: OMAP4+: control: remove support for legacy pad read/write
ARM: OMAP4: display: convert display to use syscon for dsi muxing
ARM: dts: omap4: add minimal l4 bus layout with control module support
ARM: dts: am4372: add minimal l4 bus layout with control module support
ARM: dts: am43xx-epos-evm: fix pinmux node layout
ARM: dts: am33xx: add minimal l4 bus layout with control module support
ARM: dts: omap3: add minimal l4 bus layout with control module support
ARM: dts: omap24xx: add minimal l4 bus layout with control module support
ARM: OMAP2+: control: add syscon support for register accesses
ARM: OMAP2+: id: cache omap_type value
ARM: OMAP2+: control: remove API for getting control module base address
ARM: OMAP2+: clock: add low-level support for regmap
ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init
ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags
ARM: OMAP2+: CM: move SoC specific init calls within a generic API
ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility
...
The changes here belong to two main platforms:
- Atmel At91 is flipping the bit and going multiplatform. This includes some
cleanups and removal of code, and the final flip of config dependencies
- Shmobile has several platforms that are going multiplatform, but this
branch also contains a bunch of cleanups that they weren't able to keep
separate in a good way. THere's also a removal of one of their SoCs and the
corresponding boards (sh7372 and mackerel).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNzfJAAoJEIwa5zzehBx3iRcP/1v9Rw2yk4NpUDaz5EUwhwN6
y5l29gW8jJmVuHWqLUqsgh61dsj5AEEAL7fEEbR8e8848s+RxsehjsGPIxFOkR74
KaKSRlrUgxKcsFN97Jo/WqT3seC83hg6zWQapwNypX33gBtrRLPhM9FEb05asYA8
6x7N29kFeH9M3A6lrabXGWz5tPRZSthwuBSmomHOfgqa5zbgkoaK59j867Yac0q+
Pemh0eJZHC3Pyrmh7ZcVaCaSvr1QO6ructmLopmHAXfls2Fi21wq3IN3641aiitC
G7hhb1/c961MpE3p+0dQyrXs645qIgYv/fDxp72T8YwA7FhjMmIscX/WiITXMlvC
Mg/fDJXqgRkTPWjvVM6xF8TKCSdvqfmErWtHt2dtgvbFWL0ffSeoYF35AF5BODVG
jp8RR6vQ/CHKFao5iJmTpm0ccjnzdS82FEb0PrhG0vY+u6uCsKMim5tn8wUBuBkM
QU2FipNt6STC5ZcCSb+p7r5ihod9rG+BlNL/eXJ+pBHuVnjSgltEaZBP9qIiFjZl
MLRjm7JaEY3LpAR/TVurtSrUnh0zC0RRSzptK4RekmFIwyL+mqq/I1yrksdnVjgf
upj1dZwFRsVtD5PcaU3LyTYCOLSI8L9+b6vVvfFH0Sq4V7TkaBkI/kxnhI2WfkBc
CJ+3vptpyphw6zHAngAN
=Vq4N
-----END PGP SIGNATURE-----
Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform code changes from Olof Johansson:
"The changes here belong to two main platforms:
- Atmel At91 is flipping the bit and going multiplatform. This
includes some cleanups and removal of code, and the final flip of
config dependencies
- Shmobile has several platforms that are going multiplatform, but
this branch also contains a bunch of cleanups that they weren't
able to keep separate in a good way. THere's also a removal of one
of their SoCs and the corresponding boards (sh7372 and mackerel)"
* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
ARM: at91/pm: move the standby functions to pm.c
ARM: at91: fix pm_suspend.S compilation when ARMv6 is selected
ARM: at91: add a Kconfig dependency on multi-platform
ARM: at91: drop AT91_TIMER_HZ
ARM: at91: remove hardware.h
ARM: at91: remove SoC headers
ARM: at91: remove useless mach/cpu.h
ARM: at91: remove unused headers
ARM: at91: switch at91_dt_defconfig to multiplatform
ARM: at91: switch to multiplatform
ARM: shmobile: r8a7778: enable multiplatform target
ARM: shmobile: bockw: add sound to DT
ARM: shmobile: r8a7778: add sound to DT
ARM: shmobile: bockw: add devices hooked up to i2c0 to DT
DT: i2c: add trivial binding for OKI ML86V7667 video decoder
ARM: shmobile: r8a7778: common clock framework CPG driver
ARM: shmobile: bockw dts: set extal clock frequency
ARM: shmobile: bockw dts: Move Ethernet node to BSC
ARM: shmobile: r8a73a4: Remove legacy code
...
Driver updates for v4.1. Some of these are for drivers/soc, where we find more
and more SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
The larger parts of this branch are:
- MediaTek support for their PMIC wrapper interface, a high-level interface
for talking to the system PMIC over a dedicated I2C interface.
- Qualcomm SCM driver has been moved to drivers/firmware. It's used for CPU
up/down and needs to be in a shared location for arm/arm64 common code.
- Cleanup of ARM-CCI PMU code.
- Anoter set of cleanusp to the OMAP GPMC code.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNzKYAAoJEIwa5zzehBx3UJ8P/37OA1Qc5vR/Kyc8WlhPlNFV
MRE7ajM+FMd/Islt4nVNKATK2o3peCTPrqcniDfdPmN2dM1l4LvdeIvkIhKpB09h
ovmYTZLI/AIbbkttWybGO4lVpFeATxX5N91XXBHvbqkMh6N6ppiYWZUYeJs9EhAw
2YKykfDCTjKykS+m4YThXw9SCF/6mkCvaBL2VAuKnoV0ygjQD109Fce/irKaAoyw
L2w4PXOimUk8RshTx3afKCgTotMS0e9JWjKjvDO5M2KAD8DHm7PDRMmRVzA2sSFG
E2BCfh2DTjzJjdfRYsTd1bYnWzvakX1CzLjiFv+Sb0ctanoZdiDtJIDpX+vSXZ+D
W7i0yhEWIrr2qaZOyXR8znw8BhzdVZhmT+O76N47HvzMb5JUkaZBhEUBfUyeDbk+
YhEwz1G+YxT+fg7bBrxa3vLzOJ2pUwVJPITNuPKr6eZJmaBqgx2M7xXs3KyIJX1Y
AV9eUs2uNCyonawO6xXRhlUKREKL1TftqNXfLj7MYg6AaoVqK0qNRfuCdhMFhMdN
88QCl/qpPtIDL6ZnxlOejs30+DCH1QPx6+GhxkUlVlF1j/2ZM0cK2cj3tggDbNvN
uSy/g5pYDp62Az8UCoNXmKdnb4UONigb7k49naZbW/9CGRp1rrmUdzPUAm0tHMBT
HsH7ms+nHAZHrAlNvvtP
=/sWo
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for v4.1. Some of these are for drivers/soc, where we
find more and more SoC-specific drivers these days. Some are for
other driver subsystems where we have received acks from the
appropriate maintainers.
The larger parts of this branch are:
- MediaTek support for their PMIC wrapper interface, a high-level
interface for talking to the system PMIC over a dedicated I2C
interface.
- Qualcomm SCM driver has been moved to drivers/firmware. It's used
for CPU up/down and needs to be in a shared location for arm/arm64
common code.
- cleanup of ARM-CCI PMU code.
- another set of cleanusp to the OMAP GPMC code"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
soc/mediatek: Remove unused variables
clocksource: atmel-st: select MFD_SYSCON
soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCs
arm-cci: Fix CCI PMU event validation
arm-cci: Split the code for PMU vs driver support
arm-cci: Get rid of secure transactions for PMU driver
arm-cci: Abstract the CCI400 PMU specific definitions
arm-cci: Rearrange code for splitting PMU vs driver code
drivers: cci: reject groups spanning multiple HW PMUs
ARM: at91: remove useless include
clocksource: atmel-st: remove mach/hardware dependency
clocksource: atmel-st: use syscon/regmap
ARM: at91: time: move the system timer driver to drivers/clocksource
ARM: at91: properly initialize timer
ARM: at91: at91rm9200: remove deprecated arm_pm_restart
watchdog: at91rm9200: implement restart handler
watchdog: at91rm9200: use the system timer syscon
mfd: syscon: Add atmel system timer registers definition
ARM: at91/dt: declare atmel,at91rm9200-st as a syscon
soc: qcom: gsbi: Add support for ADM CRCI muxing
...
As always, this tends to be one of our bigger branches. There are lots of
updates this release, but not that many jumps out as something that needs
more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- More graphics DT pieces falling into place on Exynos, bridges, clocks.
- Plenty of DT updates for Qualcomm platforms for various IP blocks
- Some churn on Tegra due to switch-over to tool-generated pinctrl data
- Misc fixes and updates for Atmel at91 platforms
- Various DT updates to add IP block support on Broadcom's Cygnus platforms
- More updates for Renesas platforms as DT support is added for various IP
blocks (IPMMU, display, audio, etc).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNzKFAAoJEIwa5zzehBx3JtEP/1g89CW7iZHAUyIiC+jtgqck
ASoplr13DLD0HWjjWITX3zm7J/iY57YjEv14tHH/xmrh5YCCZ+mRLqiD/Plnv0Zv
JdJRRJv/NMnMlu/tA1aBO326JOt2Vw+3YngmYayDpoRzVifx2YTJLbu2difa+6rM
vN6FpOE6U5jkvM16+gqxKxyx0tGIQz9cTn+9q2V1fDS++vZ2VvqfB5pTNul3BKAF
OVCNFJ/EUE9EPMPbmgDjYmNE/POj64kF32n7NBEQz2Z+nwDNxDAecfF356hV7o5g
JsFLNK+4c2QQqBL775xzCf5kK+n/V2cFEpDica+hU70AdWsjdAlUFrbOsWGUJLRi
4Blrv8GRxEKeOCs8AFKYCM+z3zf2ais7JMteD2VW26ywCwpUt+QEZTUVHRHU3NYQ
BMI7uyTGIH2GyLyS+Av3vikza8IbDIwlYuuDpXhCJSXXgKSnbzCrpjkhyGLccBJR
k3qgUwPJVw9hP1qaaNgvb7p9oNhTP2yLl3fQ68WqI7QWIupW0/s12INhzFFgt6zU
Nzcx010ku9yMeMMGtfiNgA3cMln+Ysfs1UIUOMQ36zP1PCtHJkZgwtZzTsBE4A04
KqmiLL/+7qsconEhEanmDzTpeXiNzERnOKSSqVN7Fwp89GEFJLrWpHSXI+8SBTHC
fB54LRTNYdlcoN0QshcT
=wqhB
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As always, this tends to be one of our bigger branches. There are
lots of updates this release, but not that many jumps out as something
that needs more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- more graphics DT pieces falling into place on Exynos, bridges,
clocks.
- plenty of DT updates for Qualcomm platforms for various IP blocks
- some churn on Tegra due to switch-over to tool-generated pinctrl
data
- misc fixes and updates for Atmel at91 platforms
- various DT updates to add IP block support on Broadcom's Cygnus
platforms
- more updates for Renesas platforms as DT support is added for
various IP blocks (IPMMU, display, audio, etc)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
ARM: dts: alpine: add internal pci
Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
ARM: dts: qcom: Add idle state device nodes for 8064
ARM: dts: qcom: Add idle states device nodes for 8084
ARM: dts: qcom: Add idle states device nodes for 8974/8074
ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
devicetree: bindings: Document qcom,idle-states
devicetree: bindings: Update qcom,saw2 node bindings
dt-bindings: Add #defines for MSM8916 clocks and resets
arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
arm: dts: qcom: Add LCC nodes
arm: dts: qcom: Add TCSR support for MSM8960
arm: dts: qcom: Add TCSR support for MSM8660
arm: dts: qcom: Add TCSR support for IPQ8064
...
Our SoC branch usually contains expanded support for new SoCs and other core
platform code. In this case, that includes:
- Support for the new Annapurna Labs "Alpine" platform
- A rework greatly simplifying adding new platform support to the MCPM
subsystem (Multi-cluster power management)
- Cpuidle and PM improvements for Exynos3250
- Misc updates for Renesas, OMAP, Meson, i.MX. Some of these could have
gone in other branches but ended up here for various reasons.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNzfWAAoJEIwa5zzehBx3idcP/Rt042tqb0bian/4M1Ud1aQ7
AMRd4oU5MfWAlzaGPeMBS+b1eo/eENj6wyWsvBQIByZN76ImlUXtxsx0U0frLrVg
mWVo9zOLRuoE6yyq329zZgg1IM1RtRIruS6zucKsHgKtq0DcjhYGGUH0ZVZk/rKI
RLtRK8U6Jr0lnpu1TDE5mii7GCCZlEl5dG+J3w5ewC9y7RLRlM09xjK/Zsj0QOqY
JvMOIaHuHMT6l7BQ6QajtVxTeGECOJ3YDqC6mDHCVD7f3v88+7H5C20xNGPK921w
tLfB5qOojnj+kKZRPhi8EGnRzKwrBq6/mE5CvvigTCGlAEUOzy7PFSY9oNE80QeL
6mUdPTuZuqz7ZEIF0kj8I0AkB6k8B+aYfqA9mqM5yGpa11HvZZGfP7CwI4izoe6+
sT++0OeDPwbsMyRxZjqNQLs4QYaKGYMP4NCgA17zz5ToRCQZy7e5hd2GYzaRouyi
kTpR9FbxwDcBIwTcA3F7oJ90BEMJ0tvGz/Al11UQpzPePhTwQt2yB5bRZyK/RYIU
x8k8RHArG3fmS89D4aOViL3sy/zoUBedx4UfAo6jVbrvoZGALQL23KHdqBqDiPmP
sMRj/sSr+0h9nJCVNM6I/OUD4/IrpFGaeX9V7rpEsHVe7j83eV7Q2wNRPyVTgxdn
jS8TS0FNAXIv8FO9EoNH
=tcGs
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. In this case, that includes:
- support for the new Annapurna Labs "Alpine" platform
- a rework greatly simplifying adding new platform support to the
MCPM subsystem (Multi-cluster power management)
- cpuidle and PM improvements for Exynos3250
- misc updates for Renesas, OMAP, Meson, i.MX. Some of these could
have gone in other branches but ended up here for various reasons"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
ARM: alpine: add support for generic pci
ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction
ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction
ARM: vexpress: DCSCB: tighten CPU validity assertion
ARM: vexpress: migrate TC2 to the new MCPM backend abstraction
ARM: MCPM: move the algorithmic complexity to the core code
ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
ARM: EXYNOS: add AFTR mode support for Exynos3250
ARM: EXYNOS: add code for setting/clearing boot flag
ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
ARM: cygnus: fix const declaration bcm_cygnus_dt_compat
ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4
ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
ARM: EXYNOS: Remove left over 'extra_save'
ARM: EXYNOS: Constify exynos_pm_data array
ARM: EXYNOS: use static in suspend.c
ARM: EXYNOS: Use platform device name as power domain name
ARM: EXYNOS: add support for async-bridge clocks for pm_domains
ARM: omap-device: add missed callback for suspend-to-disk
...
The watchdog has been reworked to use the same DT node as the timer.
This change is updating the device tree doc accordingly.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Here's the big char/misc driver patchset for 4.1-rc1.
Lots of different driver subsystem updates here, nothing major, full
details are in the shortlog below.
All of this has been in linux-next for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlU2IMEACgkQMUfUDdst+yloDQCfbyIRL23WVAn9ckQse/y8gbjB
OT4AoKTJbwndDP9Kb/lrj2tjd9QjNVrC
=xhen
-----END PGP SIGNATURE-----
Merge tag 'char-misc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here's the big char/misc driver patchset for 4.1-rc1.
Lots of different driver subsystem updates here, nothing major, full
details are in the shortlog.
All of this has been in linux-next for a while"
* tag 'char-misc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (133 commits)
mei: trace: remove unused TRACE_SYSTEM_STRING
DTS: ARM: OMAP3-N900: Add lis3lv02d support
Documentation: DT: lis302: update wakeup binding
lis3lv02d: DT: add wakeup unit 2 and wakeup threshold
lis3lv02d: DT: use s32 to support negative values
Drivers: hv: hv_balloon: correctly handle num_pages>INT_MAX case
Drivers: hv: hv_balloon: correctly handle val.freeram<num_pages case
mei: replace check for connection instead of transitioning
mei: use mei_cl_is_connected consistently
mei: fix mei_poll operation
hv_vmbus: Add gradually increased delay for retries in vmbus_post_msg()
Drivers: hv: hv_balloon: survive ballooning request with num_pages=0
Drivers: hv: hv_balloon: eliminate jumps in piecewiese linear floor function
Drivers: hv: hv_balloon: do not online pages in offline blocks
hv: remove the per-channel workqueue
hv: don't schedule new works in vmbus_onoffer()/vmbus_onoffer_rescind()
hv: run non-blocking message handlers in the dispatch tasklet
coresight: moving to new "hwtracing" directory
coresight-tmc: Adding a status interface to sysfs
coresight: remove the unnecessary configuration coresight-default-sink
...
devicetree changes queued up for v4.1. Here are the highlights:
- Lots of unittest cleanup from Frank Rowand
- Bugfixes and updates to the of_graph code
- Tighten up of_get_mac_address() code
- Documentation updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVMYiQAAoJEMWQL496c2LNyrcP/2acOKeyHk7zBVWxaYe6nO52
iwpDb+UDEdW+1Cx5e+OpF1gqoY7lJ2Q+Uvm65+z00a46Fnl0cWuSYFIV7e0wjE5/
3EAB4cQgiCzToDnbtCu4U6XlpNlQz/q85tV9X/EpYApHNb+BKN6RMzyIDm48lzJY
L6SG4fxFJVpeDxweZFGaWE9/Ildr4vOS+4GZpE0Az3iX2WDrQPioKjuOw8TeUHRO
xwvfv1TpyQFa2qHZLI4AmZSN8VJBw82OuAyZHAGsE4bekfafeqVFt0ZtYYoiAbIM
rw+dUCnWARc7gm8z2PaYnZGs8O++Flb03clDeFrdrvfZIewXWEkZ1TxrKIb9bLyP
A8tlSnbnCdXYSzyaFYH2TgUtc7gQosssfImuJjUq1qQkeEitLP6VzEsekN1h6sx7
axFiBdiCXPvn8ti+AlK9tYfSM0ZhAzvfpuLM0hpTAk3De3NfbJQiyp6eyXAInLne
cs9RGPXNPuKX0tISZ29vA8tmOSrDInfeEEW/Lqu4l+HedcLssWjReY0xVsZS3pbi
xGiD5/Ztdha9keTIQdW+7R0SE1YsZTpwZbQt0HeHcE+pzFPF/3TLIIIYhYRVSPsm
D+g5W+bVxht8NC380UEC8vpAyP1CYSnq/aVrDfJiXZVOS7b/dyZDk6Y6LSBOm9Em
9qLaPASncxVinaNcGlyj
=u6Zy
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux
Pull devicetree changes from Grant Likely:
"Here are the devicetree changes queued up for v4.1. Nothing really
exciting here. Rob has another few commits for big-endian attached
UARTs, but those will be sent in a separate merge request since they
haven't been as thoroughly tested as this batch.
Here are the highlights:
- lots of unittest cleanup from Frank Rowand
- bugfixes and updates to the of_graph code
- tighten up of_get_mac_address() code
- documentation updates"
* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Fix of_platform_depopulate test case
of/unittest: early return from test skips tests
of/unittest: breadcrumbs to reduce pain of future maintainers
of/unittest: reduce checkpatch noise - line after declarations
of/unittest: typo in error string
of/unittest: add const where needed
of_net: factor out repetitive code from of_get_mac_address()
drivers/of: Add empty ranges quirk for PA-Semi
of: Allow selection of OF_DYNAMIC and OF_OVERLAY if OF_UNITTEST
of: Empty node & property flag accessors when !OF
of: Explicitly include linux/types.h in of_graph.h
dt-bindings: brcm: rationalize Broadcom documentation naming
of/unittest: replace 'selftest' with 'unittest'
Documentation: rename of_selftest.txt to of_unittest.txt
Documentation: update the of_selftest.txt
dt: OF_UNITTEST make dependency broken
MAINTAINERS: Pantelis Antoniou device tree overlay maintainer
of: Add of_graph_get_port_by_id function
of: Add for_each_endpoint_of_node helper macro
of: Decrement refcount of previous endpoint in of_graph_get_next_endpoint
The main change here is a significant head.S rework that allows us to
boot on machines with physical memory at a really high address without
having to increase our mapped VA range. Other changes include:
- AES performance boost for Cortex-A57
- AArch32 (compat) userspace with 64k pages
- Cortex-A53 erratum workaround for #845719
- defconfig updates (new platforms, PCI, ...)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCgAGBQJVLnQpAAoJELescNyEwWM03RIH/iwcDc0MBZgkwfD5cnY+29p4
m89lMDo3SyGQT4NynHSw7P3R7c3zULmI+9hmJMw/yfjjjL6m7X+vVAF3xj1Am4Al
OzCqYLHyFnlRktzJ6dWeF1Ese7tWqPpxn+OCXgYNpz/r5MfF/HhlyX/qNzAQPKrw
ZpDvnt44DgUfweqjTbwQUg2wkyCRjmz57MQYxDcmJStdpHIu24jWOvDIo3OJGjyS
L49I9DU6DGUhkISZmmBE0T7vmKMD1BcgI7OIzX2WIqn521QT+GSLMhRxaHmK1s1V
A8gaMTwpo0xFhTAt7sbw/5+2663WmfRdZI+FtduvORsoxX6KdDn7DH1NQixIm8s=
=+F0I
-----END PGP SIGNATURE-----
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon:
"Here are the core arm64 updates for 4.1.
Highlights include a significant rework to head.S (allowing us to boot
on machines with physical memory at a really high address), an AES
performance boost on Cortex-A57 and the ability to run a 32-bit
userspace with 64k pages (although this requires said userspace to be
built with a recent binutils).
The head.S rework spilt over into KVM, so there are some changes under
arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer).
In particular, the linker script changes caused us some issues in
-next, so there are a few merge commits where we had to apply fixes on
top of a stable branch.
Other changes include:
- AES performance boost for Cortex-A57
- AArch32 (compat) userspace with 64k pages
- Cortex-A53 erratum workaround for #845719
- defconfig updates (new platforms, PCI, ...)"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits)
arm64: fix midr range for Cortex-A57 erratum 832075
arm64: errata: add workaround for cortex-a53 erratum #845719
arm64: Use bool function return values of true/false not 1/0
arm64: defconfig: updates for 4.1
arm64: Extract feature parsing code from cpu_errata.c
arm64: alternative: Allow immediate branch as alternative instruction
arm64: insn: Add aarch64_insn_decode_immediate
ARM: kvm: round HYP section to page size instead of log2 upper bound
ARM: kvm: assert on HYP section boundaries not actual code size
arm64: head.S: ensure idmap_t0sz is visible
arm64: pmu: add support for interrupt-affinity property
dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity
arm64: head.S: ensure visibility of page tables
arm64: KVM: use ID map with increased VA range if required
arm64: mm: increase VA range of identity map
ARM: kvm: implement replacement for ld's LOG2CEIL()
arm64: proc: remove unused cpu_get_pgd macro
arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol
arm64: remove __calc_phys_offset
arm64: merge __enable_mmu and __turn_mmu_on
...
The ARM Generic Timer (AKA the architected timer, arm_arch_timer)
features a CPU register (CNTFRQ) which firmware is intended to
initialize, and non-secure software can read to determine the frequency
of the timer. On CPUs with secure state, this register cannot be written
from non-secure states.
The firmware of early SoCs featuring the timer did not correctly
initialize CNTFRQ correctly on all CPUs, requiring the frequency to be
described in DT as a workaround. This workaround is not complete however
as it is exposed to all software in a privileged non-secure mode
(including guests running under a hypervisor). The firmware and DTs for
recent SoCs have followed the example set by these early SoCs.
This patch updates the arch timer binding documentation to make it
clearer that the use of the clock-frequency property is a poor
work-around. The MMIO generic timer binding is similarly updated, though
this is less of a concern as there is generally no need to expose the
MMIO timers to guest OSs.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Pull ARM updates from Russell King:
"Included in this update are both some long term fixes and some new
features.
Fixes:
- An integer overflow in the calculation of ELF_ET_DYN_BASE.
- Avoiding OOMs for high-order IOMMU allocations
- SMP requires the data cache to be enabled for synchronisation
primitives to work, so prevent the CPU_DCACHE_DISABLE option being
visible on SMP builds.
- A bug going back 10+ years in the noMMU ARM94* CPU support code,
where it corrupts registers. Found by folk getting Linux running
on their cameras.
- Versatile Express needs an errata workaround enabled for CPU
hot-unplug to work.
Features:
- Clean up module linker by handling out of range relocations
separately from relocation cases we don't handle.
- Fix a long term bug in the pci_mmap_page_range() code, which we
hope won't impact userspace (we hope there's no users of the
existing broken interface.)
- Don't map DMA coherent allocations when we don't have a MMU.
- Drop experimental status for SMP_ON_UP.
- Warn when DT doesn't specify ePAPR mandatory cache properties.
- Add documentation concerning how we find the start of physical
memory for AUTO_ZRELADDR kernels, detailing why we have chosen the
mask and the implications of changing it.
- Updates from Ard Biesheuvel to address some issues with large
kernels (such as allyesconfig) failing to link.
- Allow hibernation to work on modern (ARMv7) CPUs - this appears to
have never worked in the past on these CPUs.
- Enable IRQ_SHOW_LEVEL, which changes the /proc/interrupts output
format (hopefully without userspace breaking... let's hope that if
it causes someone a problem, they tell us.)
- Fix tegra-ahb DT offsets.
- Rework ARM errata 643719 code (and ARMv7 flush_cache_louis()/
flush_dcache_all()) code to be more efficient, and enable this
errata workaround by default for ARMv7+SMP CPUs. This complements
the Versatile Express fix above.
- Rework ARMv7 context code for errata 430973, so that only Cortex A8
CPUs are impacted by the branch target buffer flush when this
errata is enabled. Also update the help text to indicate that all
r1p* A8 CPUs are impacted.
- Switch ARM to the generic show_mem() implementation, it conveys all
the information which we were already reporting.
- Prevent slow timer sources being used for udelay() - timers running
at less than 1MHz are not useful for this, and can cause udelay()
to return immediately, without any wait. Using such a slow timer
is silly.
- VDSO support for 32-bit ARM, mainly for gettimeofday() using the
ARM architected timer.
- Perf support for Scorpion performance monitoring units"
vdso semantic conflict fixed up as per linux-next.
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (52 commits)
ARM: update errata 430973 documentation to cover Cortex A8 r1p*
ARM: ensure delay timer has sufficient accuracy for delays
ARM: switch to use the generic show_mem() implementation
ARM: proc-v7: avoid errata 430973 workaround for non-Cortex A8 CPUs
ARM: enable ARM errata 643719 workaround by default
ARM: cache-v7: optimise test for Cortex A9 r0pX devices
ARM: cache-v7: optimise branches in v7_flush_cache_louis
ARM: cache-v7: consolidate initialisation of cache level index
ARM: cache-v7: shift CLIDR to extract appropriate field before masking
ARM: cache-v7: use movw/movt instructions
ARM: allow 16-bit instructions in ALT_UP()
ARM: proc-arm94*.S: fix setup function
ARM: vexpress: fix CPU hotplug with CT9x4 tile.
ARM: 8276/1: Make CPU_DCACHE_DISABLE depend on !SMP
ARM: 8335/1: Documentation: DT bindings: Tegra AHB: document the legacy base address
ARM: 8334/1: amba: tegra-ahb: detect and correct bogus base address
ARM: 8333/1: amba: tegra-ahb: fix register offsets in the macros
ARM: 8339/1: Enable CONFIG_GENERIC_IRQ_SHOW_LEVEL
ARM: 8338/1: kexec: Relax SMP validation to improve DT compatibility
ARM: 8337/1: mm: Do not invoke OOM for higher order IOMMU DMA allocations
...
- Convert GPC controller to use stacked interrupt domains
- Add power domain descriptions for i.MX6 platforms
- Improve i.MX25 pin function defines
- Disable PWM devices in <soc>.dtsi by default and enable it at board
level dts where the device is actually available.
- Define labels for SNVS RTC device to ease the board description,
where an external RTC is available.
- Add dr_mode host setting to all i.MX host-only USB instances
- Support Miscellaneous System Control Module (MSCM) for VF610
- Add initial i.MX6SL WaRP Board support
- Add i.MX6SX SDB revision B board support
- A bunch of imx28-apf28dev board updates, including gpio polarity
correction and CAN, AUART device support.
- SolidRun iMX6 platform updates: dual-license of GPLv2/X11, PWM
setup, PCF8523 RTC, GPIO key and SGTL5000 audio support.
- A number of random device additions for boards: SPI and CAN for
vf-colibri, MAX7310 GPIO expander for imx6qdl-sabreauto and LCD
support for imx25-pdk.
Note: Branch imx/cleanup was merged as the base to solve conflict on
imx25 iomux header. Branch imx/soc was merged as the base to solve
conflict on arch/arm/mach-imx/gpc.c. And Jason Cooper's irqchip/vybrid
branch was pulled into the base as a run-time dependency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVGUnPAAoJEFBXWFqHsHzOfU4H/2YtayumlbwhySiP7pAD0fty
qmAUgJqZxvfS+Sxo1qnm5FEQrNS0bMswB1htWLKEJuPEe9kf+/iDw7g4SWXx3Ul0
W2Lkk5jJl32P+SWCg+8BQKk46Tp3FASOeiA4TTCcQmjFJ9h6W5z/cY8zaEH/J7eH
QRFC62A8NCvS3rlnyGumCpBtcDnWNV/LwSmGMtPOAmFrMmXpZOKRCArA3AoP50ml
L6wPI+ZYGnn4PimwX9Fea5mBgecNdLiTEziBQYTsqeiE8vtU5AAqnmjYXEwAvM/f
MeCxBcdDzwrsa5z/WfpOVw1ERMokMSBjJ/nYkRHIgMzDwRYTYW+M69mOIpyy+iM=
=gKJl
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/late
Pull "The i.MX device tree updates for 4.1" from Shawn Guo:
- Convert GPC controller to use stacked interrupt domains
- Add power domain descriptions for i.MX6 platforms
- Improve i.MX25 pin function defines
- Disable PWM devices in <soc>.dtsi by default and enable it at board
level dts where the device is actually available.
- Define labels for SNVS RTC device to ease the board description,
where an external RTC is available.
- Add dr_mode host setting to all i.MX host-only USB instances
- Support Miscellaneous System Control Module (MSCM) for VF610
- Add initial i.MX6SL WaRP Board support
- Add i.MX6SX SDB revision B board support
- A bunch of imx28-apf28dev board updates, including gpio polarity
correction and CAN, AUART device support.
- SolidRun iMX6 platform updates: dual-license of GPLv2/X11, PWM
setup, PCF8523 RTC, GPIO key and SGTL5000 audio support.
- A number of random device additions for boards: SPI and CAN for
vf-colibri, MAX7310 GPIO expander for imx6qdl-sabreauto and LCD
support for imx25-pdk.
Note: Branch imx/cleanup was merged as the base to solve conflict on
imx25 iomux header. Branch imx/soc was merged as the base to solve
conflict on arch/arm/mach-imx/gpc.c. And Jason Cooper's irqchip/vybrid
branch was pulled into the base as a run-time dependency.
* tag 'imx-dt-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
ARM: dts: hummingboard: add sgtl5000 support for Hummingboard Pro
ARM: dts: imx25-pinfunc: Add several pinfunctions
ARM: dts: vf610: fix missing irqs
ARM: dts: cubox: Map gpio-keys to gpio3 8
ARM: dts: hummingboard: Setup pwm lines
ARM: dts: hummingboard: enable PCF8523 RTC support
ARM: dts: Re-license SolidRun iMX6 platform DT GPL v2/X11
ARM: dts: imx28: add alternative pinmuxing for spi3
ARM: dts: imx6sx: Add label snvs_rtc
ARM: dts: imx6sl: Add label snvs_rtc
ARM: imx6: Warn when an old DT is detected
ARM: imx6: Allow GPC interrupts affinity to be changed
ARM: imx6qdl-sabreauto.dtsi: add max7310 support
ARM: dts: imx6sl-warp: Add BCM4330 support
ARM: dts: imx28-apf28dev: add wakeup function to user button
ARM: dts: imx28-apf28dev: fix user button polarity
ARM: dts: imx25-pinfunc: remove input values for pinfuncs without input register
ARM: dts: vf610: add Miscellaneous System Control Module (MSCM)
ARM: dts: imx6sl-warp: Pass 'bus-width' property
ARM: dts: imx6qdl: disable PWMs by default
...
- Purge the gic_arch_extn hacks and abuse by using the new stacked domains
NOTE: Due to the nature of these changes, patches crossing subsystems have
been kept together in their own branches.
- tegra
- Handle the LIC properly
- omap
- Convert crossbar to stacked domains
- kill arm,routable-irqs in GIC binding
- exynos
- Convert PMU wakeup to stacked domains
- shmobile, ux500, zynq (irq_set_wake branch)
- Switch from abusing gic_arch_extn to using gic_set_irqchip_flags
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJVKFhRAAoJEP45WPkGe8ZnYFcP/iBznjkMYG+OUwrxo7G4rTyu
JYj0dmg/D76ewFsxWFv24II9V+KJaqrEtFTHH4MVbeEbbrDIx7Am0i/Ip6rDRgxS
7Q/jGic8etfPGV8gW6x38zbTHOl1rfqQtoHcqBH5FnLITuMAuHPa51jpwhMik4ri
AbMwb6Whep6tEsxiEjspPxXWphEZoXluOkRjPLokTwuifo4rEo7bqU8WMizzSW5g
xEjf8eUvBYIMTA40FBQWHQwxf1jRySSW2A9u5JgT1ccZHoajEyDgQr22KUHpCAWU
hlZ/8uTqCUeecDQKFPr4zXhq9mbEVZ7lld5Gl82cxY6aI3Xj/bUI3tSYubPWEgx6
0VhbmvjqKPiFfdCrLq5ZTY5UHmW8khdttdycIPNz9LmUDVgIzJpmpAW+oyG7BN/N
QgGF4lzaN49mHQmjtXGfwY3iJTadxyVaWoZTBinjw8LyxpzUO/MNQGLumsxEtkxN
Nbbsc2k+ERpSx40ospB1WOslAzMsNi6eLwqLRfjGGfSYK1P6Mm7FhansJm08p1/D
8h6ymqA4heZrYdI1vrfuy7QuEqQgnVUf0TDTHxX+aNGrHnBSsPTTfYHBOHXUh4Cr
Ox3yLECAhWle4VlgInu3XLRmuUiYGk4JV4nbZUjpZvIaOZV4gLArcsQU7C/KTDT8
CqrybDOIxFkIbxfU+EE0
=IPgJ
-----END PGP SIGNATURE-----
Merge tag 'irqchip-core-4.1-3' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core change for v4.1 (round 3) from Jason Cooper
Purge the gic_arch_extn hacks and abuse by using the new stacked domains
NOTE: Due to the nature of these changes, patches crossing subsystems have
been kept together in their own branches.
- tegra
- Handle the LIC properly
- omap
- Convert crossbar to stacked domains
- kill arm,routable-irqs in GIC binding
- exynos
- Convert PMU wakeup to stacked domains
- shmobile, ux500, zynq (irq_set_wake branch)
- Switch from abusing gic_arch_extn to using gic_set_irqchip_flags
- for exynos3250
: add assigned clock parents for CMU nodes
- for exynos4412-odroid
: add eMMC reset line
- for exynos5250
: fixed typo for interrupt-cells
- for exynos5250-snow
: define stdout-path property
: represent bridge and panel connection
: enable wifi power-on and add cap-sdio-irq to wifi mmc node
- for exynos5250-spring
: define stdout-path property
- for exynos5420
: fixed typo for interrupt-cells
: add async-bridge clocks for gsc and disp1 PDs
- for exynos5420 boards
: Mux XMMCnDATA[0] pad correctly
- for exynos5420-odroidxu3
: add eMMC reset line
- for Peach boards
: add HS400 support and define stdout-path property
: add mclk entry and add WiFi module support
: represent bridge and panel connection
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVHDABAAoJEA0Cl+kVi2xqaasP/04A2twJLhYzqobi9fdNOv+U
E14Z1qWv5XBnkkD4LewVCDTShVx+T6LDCAesJoaEcgK+ox8ZgcH4TlEslQ8pQdR5
3TjT1Tf/Qeldtri0Lb8jX9k7G6A+ogT1ywhMNUXTqLP3GFTgnIj/36MPlt22zYWp
w006UXDwYLrjFkX99lQr1XpDhPnTv3H+72ZPdDlRk59wxFnymQ0gb4Ong8bbKd56
0/35bw/fhHMTAtSVjVl6j5yblDl4NSh3y+T7Ftt59TKBBfhD0JB7VaT3OXmNqX52
mdhnT5MAK+l0LjW6a2xkbq+xgNAqSFhpX1d4RWwKheSa9aF2usCZnWxwzqCkLioa
v4O20gMlOkpq7pXduX+neJPgq1j1fls0ZlWKCTtgckmXCJQxdBkRYvuLeAz/QfGK
JZu/awQMLo8ebs8UaH1+mkpGsUzVzW5aGBw0ROH8N27R8xCmqujxMr9k6g9TRDTO
kFxIJAAsP1B/zEbvoI6LsPFPISBJjjjdOXClU72qrwNWuESWYsG71iI5PU6m2/bZ
Eq2qWa1dkOh3Lp/FVW6zXEGk60I1+ghd7VBC3GhbzDb4L5RMqeuRtD41DHKp4i67
UhymfzXuzyC1FDzI8qwySm2GApGhwN2mJwXc4bdOkABznytLJ5GumE6jc13806+/
mnUb7ksYakVIJyjVCE88
=Sz8u
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.1" from Kukjin Kim:
- for exynos3250
: add assigned clock parents for CMU nodes
- for exynos4412-odroid
: add eMMC reset line
- for exynos5250
: fixed typo for interrupt-cells
- for exynos5250-snow
: define stdout-path property
: represent bridge and panel connection
: enable wifi power-on and add cap-sdio-irq to wifi mmc node
- for exynos5250-spring
: define stdout-path property
- for exynos5420
: fixed typo for interrupt-cells
: add async-bridge clocks for gsc and disp1 PDs
- for exynos5420 boards
: Mux XMMCnDATA[0] pad correctly
- for exynos5420-odroidxu3
: add eMMC reset line
- for Peach boards
: add HS400 support and define stdout-path property
: add mclk entry and add WiFi module support
: represent bridge and panel connection
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Fixed typo interrupt-cells for exynos5420 and exynos5250
ARM: dts: Add HS400 support for exynos5420 and exynos5800
ARM: dts: add async-bridge clocks to gsc power domain for exynos5420
ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420
dt-bindings: add asynchronous bridge clock for exynos
ARM: dts: Define stdout-path property for exynos5250-spring
ARM: dts: Define stdout-path property for exynos5250-snow
ARM: dts: Define stdout-path property for Peach boards
ARM: dts: Add assigned clock parents to CMU node for exynos3250
ARM: dts: Add mclk entry for Peach boards
ARM: dts: Add WiFi module support for Peach boards
ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards
ARM: dts: add eMMC reset line for exynos5422-odroidxu3
ARM: dts: add eMMC reset line for exynos4412-odroid-common
ARM: dts: represent bridge and panel connection for exynos5420-peach-pit
ARM: dts: represent bridge and panel connection for exynos5250-snow
ARM: dts: Add cap-sdio-irq to wifi mmc node for exynos5250-snow
ARM: dts: Enable wifi power-on for exynos5250-snow
Signed-off-by: Olof Johansson <olof@lixom.net>
A bunch of changes to improve support on the Nyan Big (Acer Chromebook
13). These enable the trackpad and make the WiFi card work. Changes to
the userspace-exposed name of the soundcard are required for a better
audio experience.
Support for Nyan Blaze (HP Chromebook 14) is added. It is very similar
to Nyan Big and therefore can enjoys many of the above improvements.
Since the EMC driver can now be used to scale the frequency at which
external memory is clocked, corresponding EMC frequency tables are added
for Jetson TK1 and the Nyan boards.
The Jetson TK1, Beaver and Nyan boards now also use generated pinmux
data, which makes it easier to keep it in sync with the data provided by
syseng.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVGSCcAAoJEN0jrNd/PrOhy3kP/j5j4AEYnSxIAPx52U3Yv7j4
HvqDpCx3vC3oJrRAFvHlv5v9FUx1EWpbV7GjyTP/kmbTAJdP6USRVFEs//+2p3tO
dzBhZFDpygkIZOzVlO7C2o4bW9OVUiPbYeuZi0T1AgTvOzylzhdk3U0sMI0XgNZp
QLha3gx4Kgs0j2GeTDZjy7iHgku1OwuBRgg0l2QdMl2fq3Cy7cJub5FkVR/T51yS
y6dJSypS+4gE/x1GRS67U5OADeGl0+Rmd1TI1Hxab292fG6jcE+gtLz+gFboay4e
9F+fOU42JSD1O+5w1byMYW1WqpzZ8stIvs4end6PBteVaMFLEj7uWHuCnMbjZr2J
YXbhFRT1lNJiEtPoLR3xPZsiGSG8Jf/ANkb/7fozposHke4zW/bEe8+lq94x0O0+
iqhY/0EdMsCiPTkXZ9OsG15nSvXzSAC9w9TzLyQzTL/+cCZGSEO5wpCL36ixSB7a
sE5VFDq1WLN25r3jrCKcESy2PxhaRciW99D92SomAqvJBmHpzZ0GsfG7Nt6VkQ/f
W+ilkULDzpeTesN6Ajx1G78yNUQXV+Gfm3WhsC7xsG7mf0Uo+0E8uAA5OzaVNkxP
+JJ/F4wsKbPnbPlFuh4/CPwZHk8Dd8Q7+aTzcTDQxcJncGzv/fW3jpdS1vg7jr5L
BXC55v7bM6a/d2gGhsO6
=yFLx
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.1-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Device tree changes for v4.1-rc1" from Thierry Reding:
A bunch of changes to improve support on the Nyan Big (Acer Chromebook
13). These enable the trackpad and make the WiFi card work. Changes to
the userspace-exposed name of the soundcard are required for a better
audio experience.
Support for Nyan Blaze (HP Chromebook 14) is added. It is very similar
to Nyan Big and therefore can enjoys many of the above improvements.
Since the EMC driver can now be used to scale the frequency at which
external memory is clocked, corresponding EMC frequency tables are added
for Jetson TK1 and the Nyan boards.
The Jetson TK1, Beaver and Nyan boards now also use generated pinmux
data, which makes it easier to keep it in sync with the data provided by
syseng.
* tag 'tegra-for-4.1-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add EMC timings to Nyan Blaze device tree
ARM: tegra: Add EMC timings to Nyan Big device tree
ARM: tegra: Add EMC timings to Jetson TK1 device tree
ARM: tegra: Add EMC to Tegra124 device tree
ARM: tegra: Add Tegra124 ACTMON support
of: Add binding for NVIDIA Tegra ACTMON node
ARM: tegra: nyan: The WiFi card is kept powered during suspend
ARM: tegra: nyan: Add gpio-restart node
ARM: tegra: nyan: Set maximum frequency for SPI flash
ARM: tegra: Use generated pinmux data for Nyan Big
ARM: tegra: Use pwrseq-simple for the wifi in Nyan
ARM: tegra: Add node for trackpad in Nyan boards
ARM: tegra: Add DTS for the nyan-blaze board
ARM: tegra: Move generic parts out of the nyan-big DT
ARM: tegra: Change model of sound card in Nyan Big
ARM: tegra: Use generated pinmux for Beaver board
ARM: tegra: Import latest Jetson TK1 pinmux
Signed-off-by: Olof Johansson <olof@lixom.net>
This series reworks some of the CCI-400 PMU code so that it can be used
on both ARM and ARM64-based systems, without the need to boot in secure
mode on the latter. This paves the way for CCI-500 support in future.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCgAGBQJVFWAiAAoJELescNyEwWM0pK8IALUinCT+Ec/Oi5WwGJaLgQgw
exlDFAcmml0xisxglGL7eHcvNBs/j4wFD37mqDUszrGW3jrM+Ex+/cvUzWIlEyZl
LjG99ZF2j51LFxDHMgpRwg1aD/NNQsQjwsuHHdCr+NHB5R2C0M4umsgX6Kt6/PE4
95LOnnjBOx4FkMOG9mZElzldUlqnhWd6drjQ9qZQar9VVVewfbR1LH/xQhjrCL0w
nwRzJwYj1LnLFO0hBVUAJSfvYltMF9PxBEx0FkyzN7QcuP1tLQ25NmGEvarHP6iZ
XpvTZ7akzButyUQbvz/kf6a0agPNUv1HHEqh7/Zddvgm//+p8nEBORuJ/cC6g1E=
=UHCi
-----END PGP SIGNATURE-----
Merge tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/drivers
Merge "arm-cci PMU updates for 4.1" from Will Deacon:
CCI-400 PMU updates
This series reworks some of the CCI-400 PMU code so that it can be used
on both ARM and ARM64-based systems, without the need to boot in secure
mode on the latter. This paves the way for CCI-500 support in future.
* tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
arm-cci: Fix CCI PMU event validation
arm-cci: Split the code for PMU vs driver support
arm-cci: Get rid of secure transactions for PMU driver
arm-cci: Abstract the CCI400 PMU specific definitions
arm-cci: Rearrange code for splitting PMU vs driver code
drivers: cci: reject groups spanning multiple HW PMUs
+ Linux 4.0-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
Document cpuidle states of QCOM cpus. In addition to arm-idle-state
compatible string, the ARM idle state definition must define one of the
following compatible strings -
"qcom,idle-state-ret",
"qcom,idle-state-spc",
"qcom,idle-state-pc",
The compatibles helps the SPM platform driver to use the correct idle
function when the index to the idle state is passed to the platform
driver.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Update qcom,saw2 node bindings with compatible strings to identify nodes
that provides cpuidle functionality for a particular SoC. Remove
unused compatible strings.
Update examples for different SAW nodes.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Document the Qualcomm MSM GICs implementation as compatible with the
ARM GIC standard.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
data instead of platform data from Eliad Peller <eliad@wizery.com>:
- Add device-tree support to the wlcore (wl12xx/wl18xx) driver.
- Update the current users to use the bindings instead of pdata-quirks.
- Finally, remove the deprecated wl12xx_platform_data struct
Note that da850 board file code that still uses the platform data,
but we have da850.dtsi that can be used instead. So it was decided
that we should try to remove the wl12xx support from the da850
board file as suggested by Sekhar Nori <nsekhar@ti.com>. As it's
the last patch in the series, the last patch can be simply reverted
if needed.
As this series touches quite a bit of arch code, it was suggested
by Kalle Valo <kvalo@codeaurora.org> that the whole series should
be merged via the arm-soc tree.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVEyqpAAoJEBvUPslcq6VzXFgP/2iNBoDmg3Zu+FR/waaVOD/k
iOUrT7ZU2Db4dWgprAwKTByiNg1PZ7cPVF3ekKR2j870YWNG8RTKrN1//t4tRCJv
gwSDNYJan8uCd54fgopi4mFC2/YhwzwH76ow1+DGw3+QoEBu9X0e/63uWNSQXTnE
ldNA+IiXp68DvCj5Xn649TdZTCNeNcAfQGt5MItwFuIAU+1hP9jIbEqFmC+HbFOb
xsn66ziTXTu8aLGR3Pkf2PTpJXEiKbuX11Un1BZfgJ5GJp+aSa8zAGX+rYXhTwv6
Cw+jtJffHbuA4RPdqLPPAWgPhmNfM4D+kLdu/N8iEi72Lsoq2VgLi2IgE5g60Bq9
7AxgAvZImvE3X8lSxeyyT4VfD7xVuRfzqbCXd/RJteZogRME7nxWrm2q32e/IDo9
EdWsOMTA2jNG7W0UN8ChX5aexb2n1LqxABLnKnEHuvV/qvw33O6QtMmFyzB+t2Pr
BpX7H2hwFFU2daF1xRTp/zAJIavsADAgnwco47NZlrBNfkyOH12b0YOuUgKOK8mi
/0zDi1NpCdU+nDgWynnlMBbpk3NMTVLE2IkHNDJ7pJ9Eagf6KDw/yJrhiRAJyJu8
CRTTdyEX1lBbPznYz7j95JD3Rw0g+TWg+pMlVpj6zaJQcWl0pWphXpoPYE1UZZTR
VJWeFrbVptL3mBXoKWyp
=Nr1k
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "wireless wl12xx and omap device tree changes for v4.1" from Tony
Lindgren:
Wireless and omap changes to make wl12xx driver to use device tree
data instead of platform data from Eliad Peller <eliad@wizery.com>:
- Add device-tree support to the wlcore (wl12xx/wl18xx) driver.
- Update the current users to use the bindings instead of pdata-quirks.
- Finally, remove the deprecated wl12xx_platform_data struct
Note that da850 board file code that still uses the platform data,
but we have da850.dtsi that can be used instead. So it was decided
that we should try to remove the wl12xx support from the da850
board file as suggested by Sekhar Nori <nsekhar@ti.com>. As it's
the last patch in the series, the last patch can be simply reverted
if needed.
As this series touches quite a bit of arch code, it was suggested
by Kalle Valo <kvalo@codeaurora.org> that the whole series should
be merged via the arm-soc tree.
* tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
wlcore: remove wl12xx_platform_data
ARM: dts: add wl12xx/wl18xx bindings
wlcore: add device-tree support
dt: bindings: add TI's wilink wireless device
wl12xx: use frequency instead of enumerations for pdata clocks
wlcore: set irq_trigger in board files instead of hiding behind a quirk
+ Linux 4.0-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
- add support for Performance Monitor Unit on most of mvebu SoCs
- add nas2big support
- add support for USB3 port On Armada 385 AP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlUL6VsACgkQCwYYjhRyO9Vm/wCfZNIo3l1U82ietdSE8zuVWq1U
A2gAmQHeLLV6izood0nm9/AvvcMHPpI5
=rtR1
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.1-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: dt changes for v4.1 (round 2)" from Gregory Clement:
mvebu dt changes for v4.1 (part #2)
- add support for Performance Monitor Unit on most of mvebu SoCs
- add nas2big support
- add support for USB3 port On Armada 385 AP
* tag 'mvebu-dt-4.1-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-385-ap: Enable USB3 port
ARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs
ARM: Kirkwood: add DT description for nas2big
Signed-off-by: Olof Johansson <olof@lixom.net>
The coresight-default-sink configuration option has been
removed from the framework. As such remove it from DT and bindings.
Signed-off-by: Kaixu Xia <xiakaixu@huawei.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation: DT bindings: Tegra AHB: require the legacy base address for existing chips
Per Stephen Warren, note in the Tegra AHB DT binding documentation
that we specifically deprecate any attempt to use the IP block's
actual hardware base address, and advocate the use of the legacy
"off-by-four" address in the 'regs' property, for Tegra chips with
existing upstream Linux DT files that include a Tegra AHB node. This
patch updates the documentation accordingly.
Changing the existing kernel DT data isn't under consideration because
Linux kernel DT data policy is to preserve compatibility between newer
DT data files and older kernels. However, this additional step of
changing the documentation should discourage others from sending
kernel patches to try to change the legacy kernel DT data.
Furthermore, for out-of-tree software (such as bootloaders or other
operating systems) that may rely on Linux kernel DT binding
documentation as an ABI (but not the Linux kernel DT data itself),
such a change may allow future convergence with the Linux kernel DT
data without additional code changes.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- reworked arch/arm/mach-at91/Kconfig and arch/arm/Kconfig to switch to
multi-platform
- updated at91_dt_defconfig
- continue the cleanup of unneeded files and code chunks
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJVCv+EAAoJEAf03oE53VmQRgQIALCEppiZCt7xzH8bbGToyiSh
A1lWqDFm5kvkUW9igaks1XenxcDmKg7TwLfjolyqny20CL6/rt1oap07Yt7eAIW1
6KdCKk7RML0vduX3F/wl+ZQe6ykob0vWzaeeUNI1RgBkD7hsZCb60Re1fj44pR99
dgj08EAme1yBvvFN2iA7IWUXJMPIuQ+uFzFUMiPVahgR49AbTG/TLfGHWM8i/H15
HF/ETeShV4k02lqipm4E8te0VAiDjYcrpc12NbQ0M1jFgD+1V+tY0IvrrtTcxHEe
53CCwN09nKJTRBZrPyCdKK7r4xrpPb64ZydBWXOHkVizS24jG1fc4aXG74qBooI=
=uyvg
-----END PGP SIGNATURE-----
Merge tag 'at91-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/multiplatform
Merge "at91: multiplatform for 4.1 #1" from Nicolas Ferre:
This is the multi-platform support for AT91:
- reworked arch/arm/mach-at91/Kconfig and arch/arm/Kconfig to switch to
multi-platform
- updated at91_dt_defconfig
- continue the cleanup of unneeded files and code chunks
* tag 'at91-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (61 commits)
ARM: at91: drop AT91_TIMER_HZ
ARM: at91: remove hardware.h
ARM: at91: remove SoC headers
ARM: at91: remove useless mach/cpu.h
ARM: at91: remove unused headers
ARM: at91: switch at91_dt_defconfig to multiplatform
ARM: at91: switch to multiplatform
ARM: at91: remove useless include
clocksource: atmel-st: remove mach/hardware dependency
clocksource: atmel-st: use syscon/regmap
ARM: at91: time: move the system timer driver to drivers/clocksource
ARM: at91: properly initialize timer
ARM: at91: at91rm9200: remove deprecated arm_pm_restart
watchdog: at91rm9200: implement restart handler
watchdog: at91rm9200: use the system timer syscon
mfd: syscon: Add atmel system timer registers definition
ARM: at91/dt: declare atmel,at91rm9200-st as a syscon
ARM: at91: remove old setup
ARM: at91: sama5d4: remove useless map_io
ARM: at91: sama5 use SoC detection infrastructure
...
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJU97BNAAoJENfPZGlqN0++sr8P/0GMFyARmTdVYVx/2OA3xc3k
4zJO2GtoT3vyPAYtjI4DX1ef3lVHnQd4J+Sh8gdYVGJ3iCz/kUNUgiFk7PrGqedr
BriF33vtKcjcMm5oN6tblaR0UEhUDrDBh5lOO9FwoLGtzf/kVhRNXwFdsl4DHt8j
a+Obw0Uj48dmbZaR0sTbPw4G4srqyFYpv3cZ/tlPplJfwOwOEOQFssnIrFAQ0JTI
1GNyYlGNH72Y7M+lNraqk5oO708nkm38paLk7E8mYGWD13IQCp8hi27vX0buUV4H
lmA5f6a8vKo7M0J1wrb6IieFYimSR/msUHHjqr2Ot1LpR+0BGhOVPfDyWrf1F3Gy
L+CkztggOz54WT8krGJW0mu1U0L5PmlOFzFieB6trLuhUDOq+3F2YUJeNom+MFoE
zngo8yppyQUD0q015Jvm127IFyYn2w+jBoOZvpJ1K+Bv1QoW59kSXMB83PN3cq6y
r5tvH6a/HGrga3sYLbcXZVu4wSVD1QvehIGteHcTVGR5WN4Go1EM+fCOv2VwzUA9
lyjmwEP/rBU5y7uKF3WLP1WTklsNIz+7P9NbdQXJHxUHyK8B4QeDTNG50MM0oHIS
GDS8WRjsdf4lkipB/nP50tYcEYzqYMl/mMFTv+hv5YFT7mlo+cO/2VZa8vWaFO9L
KhbTwk/Rtmdrxm5okb+g
=7DUP
-----END PGP SIGNATURE-----
Merge tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/multiplatform
Merge "Renesas ARM Based SoC sh73a0 Multiplatform Updates for v4.1" from Simon
Horman:
* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0
* tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
ARM: shmobile: sh73a0: Remove restart callback
ARM: shmobile: sh73a0 dtsi: Add PM domain support
ARM: shmobile: sh73a0: Remove unused sh73a0_add_standard_devices_dt()
ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
ARM: shmobile: kzm9g-reference: Remove board C code and DT file
ARM: shmobile: kzm9g dts: Move Ethernet node to BSC
ARM: shmobile: sh73a0 dtsi: Add Bus State Controller node
ARM: shmobile: kzm9g: Build DTS for Multiplatform
ARM: shmobile: kzm9g dts: Sync with kzm9g-reference dts
ARM: shmobile: sh73a0: Add Multiplatform support
ARM: shmobile: sh73a0: Introduce generic setup callback
ARM: shmobile: r8a7794: add SDHI DT support
ARM: shmobile: r8a7790: add ADSP clocks
ARM: shmobile: r8a7791: add ADSP clocks
ARM: shmobile: henninger: add CAN0 DT support
ARM: shmobile: r8a7791: add CAN DT support
ARM: shmobile: r8a7791: add CAN clocks
ARM: shmobile: r8a7790: add CAN DT support
ARM: shmobile: r8a7790: add CAN clocks
ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch creates the l4_cfg and l4_wkup interconnects for DRA7, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates the l4_cfg and l4_wkup interconnects for OMAP5, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tony Lindgren <tony@atomide.com>
This patch creates an l4_wkup interconnect for AM43xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM nodea as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates an l4_wkup interconnect for AM33xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tony Lindgren <tony@atomide.com>
This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430
SoCs, and moves some of the generic peripherals under it. System control
module nodes are moved under this new interconnect also, and the SCM
clock layout is changed to use the new SCM node as the clock provider.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This block gathers statistics about various counters and can be configured to
fire interrupts when thresholds are crossed.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
[treding@nvidia.com: rename document, minor cleanups]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Avoid secure transactions while probing the CCI PMU. The
existing code makes use of the Peripheral ID2 (PID2) register
to determine the revision of the CCI400, which requires a
secure transaction. This puts a limitation on the usage of the
driver on systems running non-secure Linux(e.g, ARM64).
Updated the device-tree binding for cci pmu node to add the explicit
revision number for the compatible field.
The supported strings are :
arm,cci-400-pmu,r0
arm,cci-400-pmu,r1
arm,cci-400-pmu - DEPRECATED. See NOTE below
NOTE: If the revision is not mentioned, we need to probe the cci revision,
which could be fatal on a platform running non-secure. We need a reliable way
to know if we can poke the CCI registers at runtime on ARM32. We depend on
'mcpm_is_available()' when it is available. mcpm_is_available() returns true
only when there is a registered driver for mcpm. Otherwise, we assume that we
don't have secure access, and skips probing the revision number(ARM64 case).
The MCPM should figure out if it is safe to access the CCI. Unfortunately
there isn't a reliable way to indicate the same via dtb. This patch doesn't
address/change the current situation. It only deals with the CCI-PMU, leaving
the assumptions about the secure access as it has been, prior to this patch.
Cc: devicetree@vger.kernel.org
Cc: Punit Agrawal <punit.agrawal@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This patchset attempts to standardize the naming of dt-bindings
documents based on the Broadcom vendor prefix of brcm.
Although there are no guidelines currently present for how to name
the dt-bindings document the "vendor,binding.txt" style is in use by
some of the other vendors.
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Rob Herring <robh@kernel.org>
These PRCM nodes were earlier added in patch 7800064ba5 ("ARM: dts: Add
basic dm816x device tree configuration"), but the documentation for
the same wasn't added. Fix this by adding the missing compatible strings
under the generic prcm.txt document.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
The current ARM PMU binding relies on the PMU interrupts being listed in
CPU logical order, which the device-tree author simply cannot know
anything about.
This patch introduces a new "interrupt-affinity" property, which makes
the relationship between the PMU interrupts and their corresponding
CPU explicit.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15 based interface
that extend the architected PMU events to include Scorpion CPU
and Venum VFP specific events. To use these events the user is
expected to program the lpm register with the event code shifted
into the group they care about and then point the PMNx event at
that region+group combo by writing a LPMn_GROUPx event. Add
support for this hardware.
Note: the raw event number is a pure software construct that
allows us to map the multi-dimensional number space of regions,
groups, and event codes into a flat event number space suitable
for use by the perf framework.
This is based on code originally written by Sheetal Sahasrabudhe,
Ashwin Chaugule, and Neil Leeder [1].
[1] https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/kernel/perf_event_msm.c?h=msm-3.4
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Neil Leeder <nleeder@codeaurora.org>
Cc: Ashwin Chaugule <ashwinc@codeaurora.org>
Cc: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The patch adds bindings for clocks required by async-bridges
present in the particular power domain.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The system timer register range is used to handle three different
functionalities: Periodic Interval Timer, Real Time Timer and watchdog. Declare
it as a syscon to be able to get a regmap.
Also declare it as a simple-mfd and its watchdog subnode.
Finally, document the watchdog compatible string.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
- Add support for a new SoC: Armada 39x
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlT9RvwACgkQCwYYjhRyO9UGwQCfXlE0v/h5zAG6j/LTAFuMLP3w
ZqoAmwZErUyIkfr00w9KyOgLxnYefTJ6
=q2zn
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc changes for v4.1 (part #1)" from Gregory CLEMENT:
- Add support for a new SoC: Armada 39x
* tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu:
Documentation: arm: update supported Marvell EBU processors
ARM: mvebu: add core support for Armada 39x
devicetree: bindings: add new SMP enable method for Marvell Armada 39x
devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family
This patch adds the DT description for the LaCie "2Big NAS" (nas2big).
This NAS is an hardware upgrade of the 2Big Network v2.
Chipset and device list:
- CPU Marvell 88F6282 1600Mhz
- SDRAM memory, 256MB DDR3 (2x128MB x8) 533Mhz
- 1 Ethernet Gigabit port (PHY Marvell 88E1518)
- Flash memory, NAND 256MB TSOP48
- I2C EEPROM, 512 bytes (AT24 type)
- PCIe SATA controller JMicron JMB360 (eSATA)
- I2C fan controller GMT G762 (with a separate alarm GPIO)
- 1 USB2 host port
- 1 push button
- 1 power switch
- 2 SATA LEDs (bi-color, blue and red)
- 1 power LED (bi-color, blue and red)
- CPLD for LEDs and start-up management (Altera Max EMP3064)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds support to STiH410 SoC.
Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add binding documentation for CPU configuration and interrupt router
submodule of the Miscellaneous System Control Module. The MSCM is
used in all variants of Freescale Vybrid SoC's.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Link: https://lkml.kernel.org/r/1425249689-32354-3-git-send-email-stefan@agner.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
PopMetal board is a rk3288 based board made by ChipSpark, this
add root compatible property for it
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
