Add the palette format support for LCCR4_PAL_FOR_3, and fix the
issue of LCCR4 being never assigned.
Also remove the useless pxafb_set_truecolor().
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
dma branching is enabled by extending the current setup_frame_dma()
function to allow a 2nd set of frame/palette dma descriptors to be
used.
As a result, pxafb_dma_buff.dma_desc[], pxafb_dma_buff.pal_desc[]
and pxafb_info.fdadr[] are doubled.
This allows maximum re-use of the current dma setup code, although
the pxafb_info.fdadr[xx] for FBRx register values looks a bit odd.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
The amount of video memory size is decided according to the following
order:
1. <xres> x <yres> x <bits_per_pixel> by default, which is the backward
compatible way
2. size specified in platform data
3. size specified in module parameter 'options' string or specified in
kernel boot command line (see updated Documentation/fb/pxafb.txt)
And now since the memory is allocated from system memory, the pxafb_mmap
can be removed and the default fb_mmap() should be working all right.
Also, since we now have introduced the 'struct pxafb_dma_buff' for DMA
descriptors and palettes, the allocation can be separated cleanly.
NOTE: the LCD DMA actually supports chained transfer (i.e. page-based
transfers), to simplify the logic and keep the performance (with less
TLB misses when accessing from memory mapped user space), the memory
is allocated by alloc_pages_*() to ensures it's physical contiguous.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
As Nicolas and Russell pointed out, CLOCK_TICK_RATE is no more
a constant on PXA when multiple processors and platforms are
selected, change TIMER_FREQ in rtc-sa1100.c into a variable.
Since the code to decide the clock tick rate is re-used from
timer.c, introduce a common get_clock_tick_rate() for this.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1429 commits)
net: Allow dependancies of FDDI & Tokenring to be modular.
igb: Fix build warning when DCA is disabled.
net: Fix warning fallout from recent NAPI interface changes.
gro: Fix potential use after free
sfc: If AN is enabled, always read speed/duplex from the AN advertising bits
sfc: When disabling the NIC, close the device rather than unregistering it
sfc: SFT9001: Add cable diagnostics
sfc: Add support for multiple PHY self-tests
sfc: Merge top-level functions for self-tests
sfc: Clean up PHY mode management in loopback self-test
sfc: Fix unreliable link detection in some loopback modes
sfc: Generate unique names for per-NIC workqueues
802.3ad: use standard ethhdr instead of ad_header
802.3ad: generalize out mac address initializer
802.3ad: initialize ports LACPDU from const initializer
802.3ad: remove typedef around ad_system
802.3ad: turn ports is_individual into a bool
802.3ad: turn ports is_enabled into a bool
802.3ad: make ntt bool
ixgbe: Fix set_ringparam in ixgbe to use the same memory pools.
...
Fixed trivial IPv4/6 address printing conflicts in fs/cifs/connect.c due
to the conversion to %pI (in this networking merge) and the addition of
doing IPv6 addresses (from the earlier merge of CIFS).
The patch is for w90p910 platform default config.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
When CONFIG_PM is selected, the VFP code does not have any handler
installed to deal with either saving the VFP state of the current
task, nor does it do anything to try and restore the VFP after a
resume.
On resume, the VFP will have been reset and the co-processor access
control registers are in an indeterminate state (very probably the
CP10 and CP11 the VFP uses will have been disabled by the ARM core
reset). When this happens, resume will break as soon as it tries to
unfreeze the tasks and restart scheduling.
Add a sys device to allow us to hook the suspend call to save the
current thread state if the thread is using VFP and a resume hook
which restores the CP10/CP11 access and ensures the VFP is disabled
so that the lazy swapping will take place on next access.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As per Russell King's last review comment, find and remove
all unnecessary includes of <linux/delay.h> in the files
that do not need them.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The commit 39263db7986bf15c753f6847699107bdf5a2e318 added
a default <mach/io.h> implementation which is shared if
needed between all the s3c implementations. Remove the
s3c24a0 version which is the same as this.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The changes for ARM highmem support have removed the need
for the __virt_to_bus and __bus_to_virt macros, so remove them
from this build.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the fourth UART definition for the S3C2443, and at the
same time fixup the problems caused by the enlarging of the
UART array in the previous commits.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the usage of CONFIG_SERIAL_SAMSUNG_UARTS in several places
in the kernel where it had been missed. This finishes fixing a
long standing issue where S3C2443 and S3C64XX could not use the
4th UART
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a missing call to local_irq_restore() and fixes some
compiler warnings about unused variables for MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add GPIO support to the SM501 on the Simtec Anubis,
and then add the necessary updates for allowing the
two gpio I2C busses to be used.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the name of the driver, as well as the fact we are not
passing the number of chipselects to the driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A common core driver for the S3C24XX ADC block so that
the touchscreen, hwmon and any other drivers can share
the resource.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Changes made as suggested by Eric Miao (including fix to map_io
silly mistake!).
Originally designed by Intel, now sold by Crossbow (www.xbow.com).
Very little actually on board. The patch includes sensors and
similar as found on commonly occurring daughter boards.
Some of the drivers are not in mainline as yet as they are either
part of the IIO subsystem or need a lot of work before submission.
What is the position wrt to putting them in i2c board configs etc?
Support for these boards has been maintained outside the kernel
for a long time, but now that there is a good da9030 pmic driver
available the last major hurdle no longer exists.
All comments welcomed.
The Imote2's big brother (stargate2) will follow once any problems
with this one have been cleaned up and a few bits and bobs have
been added to the da903x driver. Hopefully the cc2420 driver will
get cleaned up and submitted in the not too distant future as
well.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
I2C platform data setups.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Matrix and single key setups for all phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Pin configs for different generations and phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Our bootloader now supports ATAGS_MEM
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Some smart panel requires a delay between command sequences, while PXA
LCD controller didn't provide such one, let's emulate this by software.
A software delay marker can be inserted into the command sequence, once
pxafb_smart_queue() detects this, it flushes the previous commands and
delay for a specified number of milliseconds.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
For smart panels (LCD panel with internal framebuffer), the following
LCCR3 register bits have different meanings than the parallel one:
LCCR3_PCP - controls the L_PCLK_WR polarity
LCCR3_HSP - controls the L_LCLK_A0 polarity
LCCR3_VSP - controls the L_FCLK_RD polarity
To keep minimum change to the original parallel timing, the .lcd_conn
flags and 'pxafb_mode_info.sync' are re-used to reflect this:
LCD_PCLK_EDGE_{RISE,FALL} - configures LCCR3_PCP
sync & FB_SYNC_{HOR,VERT}_HIGH_ACT - configures LCCR3_{HSP,VSP}
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds MX1 architecture to platform MXC. It will supersede mach-imx
and let it die.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix GIUS register setup in the mxc_gpio_mode().
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Initial support for mx31moboard platfor with 3 serial ports
and NOR Flash
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pins definition for UART5 when used in alternate mode 2
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
UART2 pins when used in functionnal mode
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic support to the MX31PDK development board, also known
as MX31 3DS or MX31 3-stack board (http://www.freescale.com/imx31pdk).
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: sascha Hauer <s.hauer@pengutronix.de>
The pcm038 module (phyCORE-i.MX27) comes with a 512 KiB static RAM which
can be battery buffered. Add mtd_ram support and configure the chip select
line, to which the sram is attached.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_iomux_set_pad() is buggy on i.MX31 - it calculates the register and
the offset therein wrongly. Fix it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most
of them are unused, so simplify the function by removing the flags. Also,
instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function
having alloc in its name, add a mxc_gpio_release_multiple_pins function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EMMA (Enhanced Multimedia Engine) is divided into two parts, the
postprocessor and the preprocessor. Fix the base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This one updates DMA support on MX2 which got broken in:
[ARM] Hide ISA DMA API when ISA_DMA_API is unset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a configuration option to start the UART FIFOs during the
decompressions sequence to improve boot time when the bootloader
fails to enable the UART FIFOs.
For example, the SMDK6410 UBoot 1.1.6 leaves the FIFOs off.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Select the correct EINT configuration register when configuring
the external interrupt level/edge type.
Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: description improvement]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the initialisation of the fifo data in the uncompression serial
routines to ensure that if the FIFO is enabled, that the serial output
is not corrupted.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: edit description to add more detail]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX timer is running at the wrong rate due to the
assumptions made in the timer initialisation about the way
the pwm dividers work. This means that time on the S3C64XX
runs twice as fast as it should.
Fix the problem by moving to using the clk framework to setup
the pwm timer clock muxes, as the pwm-clock code has all the
necessary knowledge of how the timer clock inputs are routed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX series has a new TCFG divider setting to allow the clock
directly through, which means that we need to update the pwm-clock
code to cope with this.
Add <mach/pwm-clock.h> containing the specific code to deal with the
TCFG divider settings and provide any other per-arch data that the
pwm-clock driver needs to function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Provide the initial register definitions for the newer
style of framebuffer cores found in the Samsung SoCs
such as S3C2450, S3C64XX.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the compilation of the SDHCI configuration/setup
functions to depend on their respective configuration
variables.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The function s3c64xx_init_io was missing from <plat/cpu.h>
and was masked by the SMDK6410 having an local definition.
Fix by removing the SMDK6410 variant and adding it to the
relevant <plat/cpu.h> file.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the specific register definitions for the Samsung SDHCI
(HSMMC) block for the S3C2443 and S3C64XX series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_fout_epll clock wasn't registered as part of the initial clock
work, which can cause problems if it is used by one of the hardware
blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The gpiolib driver keeps its chip array to itself
and having a separate array for s3c-only gpios stops
any non-s3c gpio being used in one of the s3c specific
configuration calls.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the definition for the hsmmc device to plat-s3c
to be shared between the s3c24xx and s3c64xx platforms.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add definitions for the external interrupt groups which accompany
the original IRQ_EINT from the s3c24xx series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Discard the 'void *' from the pointers used for the
virtual addresses when setting up the .virtual fields
of the io map to avoid implicit cast warnings
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Index: linux.git/arch/arm/plat-s3c64xx/cpu.c
===================================================================
Some of the startup output can be reduced to
KERN_DEBUG from KERN_INFO as it is only really
useful when trying to debug kernel initialisation
problems.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.
Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The original arch/arm/include/asm/hardware/vic.h was
written for the PL190 ARM VIC implementation, and as
such does not have any information about the PL192
version.
Add details about the PL192 and PL190 specific registers
and any changes between the two units.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add demux handling for the UART interrupts
generated by the VIC into their seperate IRQs
that the serial driver can register.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the PLL clock initialisation and clock registration
and include the clocks sourced via CLKDIVx for most of
the on-chip peripherals.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial clocks definitions for the s3c6400
and s3c6410. Move the epll and ext clock from the
s3c2443 support into the common code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the physical to virtual memory mapping and the
necessary interrupt demuxing for the PWM timer blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The pwm-clock.c needs <mach/map.h> which is included
via other means on S3C24XX systems, so ensure it is
explicitly included.
Remove the includes of regs-clock.h and regs-gpio.h as
these are not needed by the build.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Initialise the basic physical to virtual mappings and
then detect the CPU that the system is being run on so
that the cpu code code can call the correct initialisation
code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the include for the interrupt entry macros needed
to be included by <mach/entry-macro.S> for the kernel
interrupt handler.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial header files for the S3C64XX support to satisfy the
minimal requirements to build a kernel. Some definitions will therefore
be placeholders or empty functions that will ensure that the system can
build and have base functionality. These will be filled in at a later
date.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Split the timer pending code out to a seperate per-machine
header so that when compiling for mach-s3c2410 or mach-s3c24a0
we can use the right timer code without having to #ifdef the
timer driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Initial architecture support for the S3C24A0 ARCH_S3C24A0.
We don't yet add an kconfig entry in the main arch/arm/Kconfig
file as the series is not complete, so that is left until enough
support is in to be useful.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Split the map.h definitions into common S3C24XX code by
adding arch/arm/plat-s3c24xx/include/plat/map.h and
altering the machine specific header for the S3C24A0.
As we add a new <plat/map.h> we move the original one
in arch/arm/plat-s3c include directory to be called
map-base.h to distinguish the two files.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add serial support for S3C24A0, based on current S3C2410
UART driver. It adds necessary new defines in regs-serial.h
for S3C24A0 and the code to support this device in
drivers/serial/s3c24a0.c
Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the necessary debug macros for the S3C24A0 to enable
kernel debugging, and fix a bug with selecting the wrong
default debug implementation from the base include.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The definition of S3C24XX_VA_GPIO used S3C2410_PA_GPIO
where it should have read S3C24XX_PA_GPIO.
Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The pwm-scaler0 and pwm-scaler1 clocks have their
.id field set to -1 as they are not referenced to
any specific device. However, parts of the pwm-clock
code used the .id field to identify which scaler
clock was being used.
Fix the problem by comparing against the pointer to
the clock to identify the scalers.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
All the s3c24xx gpiolib chips share the same get/set
calls and all but one bank shares the same calls for
.direction_input and .direction_output methods.
Change the initialisation process to use an new call
to register the chips that fills in any blank calls
with the default values to avoid having to fill them
in the structure initialisers.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a simple check when registering a clock on whether
the clock has already been added to the list.
Any attempt to re-register a clock will cause the
clock list to be come looped and thus produces silent
failures when looking up clocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the core clock registration and definitions
in arch/arm/plat-s3c24xx/clock.c to arch/arm/plat-s3c
to be shared with the S3C64XX implementations.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We cannot sleep if we have cpufreq pm enabled during some
of the clock operations, so change to use a spinlock to
protect the clock system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the PLL calculation code into it's own header
file for re-use with the other plat-s3c24xx based
systems such as the S3C24A0.
Note, we change the name of s3c2410_get_pll to the
more generically named s3c24xx_get_pll as well as
the related defintions.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Only certain boards need these clocks, and they are not
available on some CPUs (such as the S3C24A0) so remove
them from arch/arm/plat-s3c24xx/clock.c and into their
own file with appropriate Kconfig entries.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We need to add plat-s3c to the build to get the headers
that will go in here once moved from include/asm-arm so
we may as well put some useful common s3c code in here
to stop the errors generated form having nothing built.
The cpu setup is now passed the cpu idcode and the table
of supported cpus to s3c_init_cpu() to abstract the
cpu identification out of the initial io setup.
As well as moving the cpu initialisation code, we move the
map of the board specific items up to the calling code as
none of the map_io() functions actually do anything other
than pass this to iotable_init().
This patch does not rename any of the init functions that
will be common to s3c24xx and any other s3c architectures
as this can be done at a later date as it will touch all
the board support files which use functions such as
s3c24xx_init_clocks() and s3c24xx_init_uarts().
Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h
still has functions that are used by both the cpu and
board initialisation functions. This means that each board
has definitions specific to the cpu support included and
the vice-versa.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a default header for <mach/io.h> for systems
such as the S3C24A0 which do not need any of the
complex code that the S3C2410 uses.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
vmalloc.h is common across all the current s3c platforms,
so move it to arch/arm/plat-s3c/include/mach to be used
for all the targets.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move <mach/timex.h> to arch/arm/plat-s3c/include/mach/timex.h
so it can be the default for all S3C based architectures.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the S3C2410 base clock list to arch/arm/plat-s3c24xx
as this code is common to the S3C2410, S3C2440 and S3C2442
cpus.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This is the header file that defines the basic cpu frequency
scalling support for the Samsung S3C series of SoC.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a set of default pin configuration routines for
setting up the SPI gpio configuration when using the
hardware SPI driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patchset provides support for the TMIO based IO controller used in the
Toshiba e-series PDAs.
Signed-off-by: Ian Molton <spyro@f2s.com>
Acked-by: Samuel Ortiz <sameo@openedhand.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
As noted by Akinobu Mita in patch b1fceac2b9,
alloc_bootmem and related functions never return NULL and always return a
zeroed region of memory. Thus a NULL test or memset after calls to these
functions is unnecessary.
This was fixed using the following semantic patch.
(http://www.emn.fr/x-info/coccinelle/)
// <smpl>
@@
expression E;
statement S;
@@
E = \(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\|alloc_bootmem_node\|alloc_bootmem_low_pages_node\|alloc_bootmem_pages_node\)(...)
... when != E
(
- BUG_ON (E == NULL);
|
- if (E == NULL) S
)
@@
expression E,E1;
@@
E = \(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\|alloc_bootmem_node\|alloc_bootmem_low_pages_node\|alloc_bootmem_pages_node\)(...)
... when != E
- memset(E,0,E1);
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix kernel-doc notation to use correct syntax. Even though this should be
moved to where the function is actually implemented...
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Update the KS8695 defconfig to bring it up to modern config
standards and include the DSM320 and appropriate drivers for the
DSM320 (E.g. prism54).
Signed-off-by: Daniel Silverstone <dsilvers@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for the D-Link DSM-320 Wireless Media Player which is
based on the Micrel KS8695 SoC.
Signed-off-by: Daniel Silverstone <dsilvers@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch is as small a change as possible to the KS8695 GPIO layer
to use GPIOLIB to allow the generic GPIO expanders and the like to
be compiled.
As a side-effect, we also remove __init_or_module from several
functions which could be called by drivers such as i2c-gpio which
could plausibly be compiled into a non-modular kernel.
Signed-off-by: Daniel Silverstone <dsilvers@simtec.co.uk>
Signed-off-by: Vincent Sanders <vince@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The KS8695 device.c provides registration functionality for the
KS8695's various devices such as watchdog timers and ethernet
devices. Rather than predicating those on the config options for the
drivers, always register the platform devices so that a later built
module can hook on. Also, the ethernet used to register virtual
addresses in the platform data. This is wrong and so this patch
changes them to physical addresses and also passes in the
appropriate physical region for the PHY or Switch as appropriate.
Signed-off-by: Daniel Silverstone <dsilvers@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
If it is reasonable to apply PTR_ERR to the result of calling clk_get, then
that result should first be tested with IS_ERR, not with !.
The semantic patch that makes this change is as follows:
(http://www.emn.fr/x-info/coccinelle/)
// <smpl>
@@
expression E,E1;
@@
if (
- E == NULL
+ IS_ERR(E)
) { <+... when != E = E1
PTR_ERR(E)
...+> }
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Impact: change calling convention of existing clock_event APIs
struct clock_event_timer's cpumask field gets changed to take pointer,
as does the ->broadcast function.
Another single-patch change. For safety, we BUG_ON() in
clockevents_register_device() if it's not set.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@elte.hu>
Impact: change existing irq_chip API
Not much point with gentle transition here: the struct irq_chip's
setaffinity method signature needs to change.
Fortunately, not widely used code, but hits a few architectures.
Note: In irq_select_affinity() I save a temporary in by mangling
irq_desc[irq].affinity directly. Ingo, does this break anything?
(Folded in fix from KOSAKI Motohiro)
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Acked-by: Ingo Molnar <mingo@redhat.com>
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: jeremy@xensource.com
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Impact: cleanup
Each SMP arch defines these themselves. Move them to a central
location.
Twists:
1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
Those archs simply have phys_cpu_present_map replaced everywhere.
3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
so I just manipulate them both in sync.
4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
declarations.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Tested-by: Tony Luck <tony.luck@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Mike Travis <travis@sgi.com>
Cc: ink@jurassic.park.msu.ru
Cc: rmk@arm.linux.org.uk
Cc: starvik@axis.com
Cc: tony.luck@intel.com
Cc: takata@linux-m32r.org
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: paulus@samba.org
Cc: schwidefsky@de.ibm.com
Cc: lethal@linux-sh.org
Cc: wli@holomorphy.com
Cc: davem@davemloft.net
Cc: jdike@addtoit.com
Cc: mingo@redhat.com
drivers/built-in.o: In function `pci_set_consistent_dma_mask':
hid-quirks.c:(.text+0x2664): multiple definition of `pci_set_consistent_dma_mask'
drivers/built-in.o: In function `pci_set_dma_mask':
hid-quirks.c:(.text+0x42c4): multiple definition of `pci_set_dma_mask'
because drivers/pci/pci.c was not seeing the definition disabling these
functions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Include <linux/i2c.h> in all ep93xx platforms.
Patch "5311/1: add core support for built in i2c bus" will cause build errors due to the following in
arch/arm/mach-ep93xx/include/mach/platform.h:
+void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
The i2c.h header needs to be included in order to define struct i2c_board_info.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use EP93XX_*_PHYS_BASE and SZ_* defines in ep93xx platform inits.
The following patch changes the flash memory hard-coded resource
addresses and MACHINE_START boot_params to EP93XX_*_PHYS_BASE and
SZ_* defines to improve readability. Also some minor whitespace
cleanup resulting from previous patches.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The gpio setup for AM200 specific GPIO pins should be done in the AM200
code rather than in generic gumstix code.
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
dma_supported() is supposed to indicate whether the system can support
the DMA mask it was passed, which depends on the maximal address which
can be returned for DMA allocations. If the mask is smaller than that,
we are unable to guarantee that the driver can reliably obtain suitable
memory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Netwinder was using gpio_xxx names which could clash with the GPIO
layer. Add a 'nw_' prefix to ensure that these remain separate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Thomas claims that irqs are disabled when set_next_event is called. But
David and Remy claim they saw irqs being enabled here. As both sides
don't seem to have time to investigate here, start with a warning that
might trigger if the problem still exists.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-By: David Brownell <dbrownell@users.sourceforge.net>
Cc: Bill Gatliff <bgat@billgatliff.com>
Acked-By: Remy Bohmer <linux@bohmer.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Since May 8 2007 the symbols RTC_INTF_PROC, RTC_INTF_SYSFS and
RTC_INTF_DEV are not tristate anymore. This fixes the following
warnings:
arch/arm/configs/picotux200_defconfig:1072:warning: symbol value 'm' invalid for RTC_INTF_SYSFS
arch/arm/configs/picotux200_defconfig:1073:warning: symbol value 'm' invalid for RTC_INTF_PROC
arch/arm/configs/picotux200_defconfig:1074:warning: symbol value 'm' invalid for RTC_INTF_DEV
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Robert Schwebel <r.schwebel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Simon Richter <Simon.Richter@kleinhenz.com>
Cc: Andrew Victor <linux@maxim.org.za>
Compilation for the Feroceon core should use -mtune=marvell-f. This is
available in Code Sourcery's 2008Q3 release at the moment. Otherwise
fall back to -mtune-=xscale.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
On newer versions of the RD88F6281 board, the WAN port is connected to
its own ethernet port on the CPU, via a separate PHY, whereas on older
versions of the board, it is connected to one of the PHYs in the
ethernet switch. In the RD8F6281 setup code, detect which version of
the board we are running on, and instantiate the ethernet ports and
switch driver accordingly.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports.
Add the platform glue that will allow board support files to
instantiate the second ethernet port.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
The 88F5182 found in the DNS-323 rev B1 (and some other devices, such
as the CH3SNAS) require different initialisation of the SATA
controller and MPP registers.
Tested on a DNS-323 rev B1.
Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
Based on similar code from the tsx09 series of machines, just rips the MAC
address out of flash and stuffs it into the NIC. Tested on a DNS323 rev B1.
It's possible (though unlikely) that an A1 will have the MAC in a different
location in flash.
Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
... as it is defined with memcpy, therefore no copy_page symbol to
export.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The bootloader may leave the MMC in a state which prevents hitting
retention. Even when MMC is not compiled in, each MMC module needs to
be forced into reset.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add low-level initialization for hsmmc controller. Merged into
this patch patch are various improvments and board support by
Grazvydas Ignotas and David Brownell.
Also change wire4 to be wires, as some newer controllers support
8 data lines.
Cc: Pierre Ossman <drzeus-mmc@drzeus.cx>
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This will simplify the MMC low-level init, and make it more
flexible to add support for a newer MMC controller in the
following patches.
The patch rearranges platform data and gets rid of slot vs
controller confusion in the old data structures. Also fix
device id numbering in the clock code.
Some code snippets are based on an earlier patch by
Russell King <linux@arm.linux.org.uk>.
Cc: Pierre Ossman <drzeus-mmc@drzeus.cx>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Most of the omap1 MMC boards got broken by an earlier patch
138ab9f832. If you look closely,
the MMC init funtions are pretty much just stubs.
Remove broken init code to make room for cleaner MMC init code.
Cc: Pierre Ossman <drzeus-mmc@drzeus.cx>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds some new pin multiplexing options
for McBSP and McSPI from Arun KS. Also add two more
GPIOs from David Brownell.
Also mark omap24xx_cfg_reg() static.
Signed-off-by: Arun KS <arunks@mistralsolutions.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds support for basic features: uarts, i2c,
and rtc. Also includes defconfig.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SDMA channel is not disabled after transaction error. So explicitly disable it.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked By : Nishant kamat <nskamat@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In the case of spurious interrupt, the handler for previous interrupt
handler needs to flush posted writes with a read back of the interrupt
ack register. Warn about handlers that need to flush posted writes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The GPTIMER TLDR register does not need to be written if the GPTIMER
is not in autoreload mode. This is the usual case for dynamic tick-enabled
kernels.
Simulation data indicate that skipping the read that occurs as part of
the write should save at least 300-320 ns for each GPTIMER1 timer
reprogram. (This assumes L4-Wakeup is at 19MHz and GPTIMER write
posting is enabled.) Skipping the write itself probably won't have
much impact since it should be posted on the OCP interconnect.
Tested on 2430SDP and 3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap_dm_timer_write_reg() already waits for pending writes to complete,
so the extra wait in omap_dm_timer_set_load() is superfluous.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Declare the two 1Kbit EEPROMs included in the H4 board stack.
One is on the CPU card; the other is on the mainboard.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
system_rev is meant for board revision, this patch changes
all relevant instances to use the new omap_rev() function
liberating system_rev to be used with ATAG_REVISION as it
has been designed.
Signed-off-by: Lauri Leukkunen <lauri.leukkunen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
At some point omap2 changed the bits for GET_OMAP_CLASS, which
broke 15xx detection on 730 as noticed by Russell King.
This patch fixes omap2 cpu detection to respect the original
GET_OMAP_CLASS, and simplifies the detection for 34xx.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rename omap2_check_revision to omap24xx_check_revision.
Then next patch will split if further and add omap34xx_check_revision.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Help OSK work better with root-on-CF, by having one of the LEDs
use the "ide-disk" trigger (to kick in during CF I/O).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
List the 4 Kbit I2C EEPROM included on the Mistral board.
Also add a comment about the hardware workaround needed to
properly support the WAKE button. More info at
http://elinux.org/OSK_Mistral_wakeup_button_mod
Still no support for the (optional) camera sensor.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Minor GPIO fixes:
- If get_gpio_bank() fails, then BUG() out.
- In omap_set_gpio_debounce():
* protect the read/modify/write with the relevant spinlock
* make the omap3 clock ops pass "sparse" checking
Except for the spinlock problem, these were reported through "make".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
