Commit Graph

45 Commits

Author SHA1 Message Date
Ben Skeggs
7ff5441e55 drm/nva3: implement support for copy engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:48 +10:00
Ben Skeggs
a82dd49f14 drm/nouveau: remove remnants of nouveau_pgraph_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:45 +10:00
Ben Skeggs
2703c21a82 drm/nv50/gr: move to exec engine interfaces
This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:06 +10:00
Ben Skeggs
4ea52f8974 drm/nouveau: move engine object creation into per-engine hooks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:52 +10:00
Emil Velikov
0b89a072f9 drm/nouveau: Fix missing whitespace checkpatch.pl errors.
This patch fixes messages such as
ERROR: space required after that ','
ERROR: spaces required around that '='

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:25 +10:00
Emil Velikov
f9ec8f6c8d drm/nouveau: Fix brace placement checkpatch.pl errors.
Fix 'ERROR: that open brace { should be on the previous line'
Fix 'ERROR: else should follow close brace }'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:19 +10:00
Ben Skeggs
2b4cebe4e1 drm/nv50: use "nv86" tlb flush method on everything except 0x50/0xac
It has been reported that this greatly improves (and possibly fixes
completely) the stability of NVA3+ chipsets.  In traces of my NVA8,
NVIDIA now appear to be doing this too.

The most recent traces of 0x50 and 0xac I could find don't show NVIDIA
checking PGRAPH status on these flushes, so for now, we won't either.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-04-05 11:38:02 +10:00
Ben Skeggs
6fdb383e81 drm/nv50: check for vm traps on every gr irq
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-03-14 16:32:30 +10:00
Ben Skeggs
bb9b18a390 drm/nouveau: add nouveau_enum_find() util function
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-03-14 16:31:50 +10:00
Ben Skeggs
562af10c67 drm/nv50: flesh out ZCULL init and match nvidia on later chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:46:10 +10:00
Marcin Slusarz
4dcf905c84 drm/nv50: fix typos in CCACHE error reporting
The code was supposed to print registers around 0x405018 (which is read
earlier), not 0x405818.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:45:23 +10:00
Ben Skeggs
d7117e0d4e drm/nv50: enable page flipping
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:45:17 +10:00
Francisco Jerez
34311c7301 drm/nv50: Fix race with PFIFO during PGRAPH context destruction.
Reported-by: Xavier Chantry <chantry.xavier@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-25 11:04:53 +10:00
Ben Skeggs
6effe39364 drm/nv50: sync up gr data error names with rnn, use for nvc0 also
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-30 11:48:03 +10:00
Ben Skeggs
4c13614298 drm/nv50: implement global channel address space on new VM code
As of this commit, it's guaranteed that if an object is in VRAM that its
GPU virtual address will be constant.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:13 +10:00
Ben Skeggs
a11c3198c9 drm/nv50: import new vm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:10 +10:00
Ben Skeggs
274fec93cd drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c files
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:41 +10:00
Ben Skeggs
a169f09b96 drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:27 +10:00
Ben Skeggs
aa2c2e8039 drm/nv50: fix compute object class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:25 +10:00
Francisco Jerez
1f6d2de2c5 drm/nv50: Keep track of the head a channel is vsync'ing to.
In a multihead setup vblank interrupts may end up enabled in both
heads. In that case we want to ignore the vblank interrupts coming
from the wrong CRTC to avoid tearing and unbalanced calls to
drm_vblank_get/put (fdo bug 31074).

Reported-by: Felix Leimbach <felix.leimbach@gmx.net>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:16 +10:00
Francisco Jerez
332b242f47 drm/nouveau: Implement the pageflip ioctl.
nv0x-nv4x should be mostly fine, nv50 doesn't work yet.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:12 +10:00
Francisco Jerez
042206c0cd drm/nouveau: Implement the vblank DRM hooks.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:11 +10:00
Ben Skeggs
97e2000f75 drm/nv50: improve evo error handler when more than just channel 0 active
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:10:58 +10:00
Ben Skeggs
3052be2cea drm/nv50: remove excessive alignment of graph/crypt contexts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:07:00 +10:00
Ben Skeggs
b8c157d3a9 drm/nouveau: only expose the object classes that are supported by the chipset
We previously added all the available classes for the entire generation,
even though the objects wouldn't work on the hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:56 +10:00
Ben Skeggs
50536946fa drm/nouveau: store engine type in gpuobj class structs
We will eventually want to address hw engines other than PGRAPH.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:52 +10:00
Francisco Jerez
3945e47543 drm/nouveau: Refactor context destruction to avoid a lock ordering issue.
The destroy_context() engine hooks call gpuobj management functions to
release the channel resources, these functions use HARDIRQ-unsafe locks
whereas destroy_context() is called with the HARDIRQ-safe
context_switch_lock held, that's a lock ordering violation.

Push the engine-specific channel destruction logic into destroy_context()
and let the hardware-specific code lock and unlock when it's actually
needed. Change the engine destruction order to avoid a race in the small
gap between pgraph and pfifo context uninitialization.

Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:35 +10:00
Ben Skeggs
cff5c13324 drm/nouveau: add more fine-grained locking to channel list + structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:05:18 +10:00
Ben Skeggs
56ac747535 drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hang
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-11-18 14:38:45 +10:00
Francisco Jerez
4b5c152a79 drm/nouveau: Remove implicit argument from nv_wait().
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:25:36 +10:00
Ben Skeggs
a8eaebc6c5 drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanity
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:20:14 +10:00
Ben Skeggs
b3beb167af drm/nouveau: modify object accessors, offset in bytes rather than dwords
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:20:00 +10:00
Ben Skeggs
ac94a343c7 drm/nv50: cleanup nv50_fifo.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13 10:13:49 +10:00
Ben Skeggs
ec91db269e drm/nouveau: remove ability to use external firmware
This was always really a developer option, and if it's really necessary we
can hack this in ourselves.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13 10:13:43 +10:00
Ben Skeggs
f56cb86f9a drm/nouveau: add instmem flush() hook
This removes the previous prepare_access() and finish_access() hooks, and
replaces it with a much simpler flush() hook.

All the chipset-specific code before nv50 has its use removed completely,
as it's not required there at all.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13 10:13:40 +10:00
Francisco Jerez
6e86e04194 drm/nouveau: Fix a couple of sparse warnings.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13 10:13:23 +10:00
Marcin Kościelnicki
d327dd4e77 drm/nv50: Allow using the NVA3 new compute class.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-04-09 10:15:37 +10:00
Marcin Kościelnicki
304424e17d drm/nv50: Improve PGRAPH interrupt handling.
This makes nouveau recognise and report more kinds of PGRAPH errors, as
well as prevent GPU lockups resulting from some of them.

Lots of guesswork was involved and some part of this is probably
incorrect. Some potential-lockuop situations are handled by just
resetting a whole PGRAPH subunit, which doesn't sound like a "proper"
solution, but seems to work just fine... for now.

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10 16:07:02 +10:00
Marcin Kościelnicki
37000d2757 drm/nv50: Remove redundant/incorrect ctxvals initialisation.
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised
earlier anyway by both our ctxprog generator and blob ctxvals. It's
actually incorrect with the generator, since we use different layout
on pre-NVA0.

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10 16:06:40 +10:00
Marcin Kościelnicki
d5f3c90d4f drm/nv50: Implement ctxprog/state generation.
This removes dependence on external firmware for NV50 generation cards.
If the generated ctxprogs don't work for you for some reason, please
report it.

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-25 15:09:38 +10:00
Maarten Maathuis
a51a3bf50d drm/nv50: avoid unloading pgraph context when ctxprog is running
- We need to disable pgraph fifo access before checking the current channel,
  otherwise we could still hit a running ctxprog.
- The writes to 0x400500 are already handled by pgraph->fifo_access and are
  therefore redundant, moreover pgraph fifo access should not be reenabled
  before current context is set as invalid. So remove them altogether.

Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-10 08:19:36 +10:00
Marcin Kościelnicki
716abaa8e5 drm/nv50: Fix typo in PGRAPH initialisation.
This enables streamout functionality.

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14 18:49:05 +10:00
Maarten Maathuis
0a90dc51aa drm/nv50: wait for pgraph to idle before unloading the context
This should fix the problem with gpu hangs people have had when closing
channels.

Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14 18:48:21 +10:00
Ben Skeggs
054b93e444 drm/nv40: implement ctxprog/state generation
The context programs are *very* simple compared to the ones used by
the binary driver.  There's notes in nv40_grctx.c explaining most of
the things we don't implement.  If we discover if/why any of it is
required further down the track, we'll handle it then.

The PGRAPH state generated for each chipset should match what NVIDIA
do almost exactly (there's a couple of exceptions).  If someone has
a lot of time on their hands, they could figure out the mapping of
object/method to PGRAPH register and demagic the initial state a little,
it's not terribly important however.

At time of commit, confirmed to be working at least well enough for
accelerated X (and where tested, for 3D apps) on NV40, NV43, NV44, NV46,
NV49, NV4A, NV4B and NV4E.

A module option has been added to force the use of external firmware
blobs if it becomes required.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-12-16 17:05:39 +10:00
Ben Skeggs
6ee738610f drm/nouveau: Add DRM driver for NVIDIA GPUs
This adds a drm/kms staging non-API stable driver for GPUs from NVIDIA.

This driver is a KMS-based driver and requires a compatible nouveau
userspace libdrm and nouveau X.org driver.

This driver requires firmware files not available in this kernel tree,
interested parties can find them via the nouveau project git archive.

This driver is reverse engineered, and is in no way supported by nVidia.

Support for nearly the complete range of nvidia hw from nv04->g80 (nv50)
is available, and the kms driver should support driving nearly all
output types (displayport is under development still) along with supporting
suspend/resume.

This work is all from the upstream nouveau project found at
nouveau.freedesktop.org.

The original authors list from nouveau git tree is:
Anssi Hannula <anssi.hannula@iki.fi>
Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez <currojerez@riseup.net>
Maarten Maathuis <madman2003@gmail.com>
Marcin Kościelnicki <koriakin@0x04.net>
Matthew Garrett <mjg@redhat.com>
Matt Parnell <mparnell@gmail.com>
Patrice Mandin <patmandin@gmail.com>
Pekka Paalanen <pq@iki.fi>
Xavier Chantry <shiningxc@gmail.com>
along with project founder Stephane Marchesin <marchesin@icps.u-strasbg.fr>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-12-11 21:29:34 +10:00