Commit Graph

31 Commits

Author SHA1 Message Date
Rob Herring
da2ef6663b xtensa: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Chris Zankel <chris@zankel.net>
Cc: linux-xtensa@linux-xtensa.org
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-09-28 16:40:21 -05:00
Max Filippov
994fa1c83d xtensa: move PLATFORM_NR_IRQS to Kconfig
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-08-20 12:28:04 -07:00
Max Filippov
aea731c81f xtensa: rework {CONFIG,PLATFORM}_DEFAULT_MEM_START
Drop PLATFORM_DEFAULT_MEM_START from the platform/hardware.h headers.
Provide definition of CONFIG_DEFAULT_MEM_START always, allow changing it
only in noMMU configurations when PLATFORM_WANT_DEFAULT_MEM is selected.
Change prompt and description so that it's clear that it controls
PAGE_OFFSET and PHYS_OFFSET.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-08-20 12:28:03 -07:00
Max Filippov
f79e4d5f92 xtensa: drop unused {CONFIG,PLATFORM}_DEFAULT_MEM_SIZE
Now that noMMU cache attributes are set up separately drop no longer
used macro PLATFORM_DEFAULT_MEM_SIZE and config symbol
CONFIG_DEFAULT_MEM_SIZE used for setting it.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-08-20 12:27:52 -07:00
Mark Rutland
6aa7de0591 locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.

For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.

However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:

----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()

// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch

virtual patch

@ depends on patch @
expression E1, E2;
@@

- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)

@ depends on patch @
expression E;
@@

- ACCESS_ONCE(E)
+ READ_ONCE(E)
----

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-10-25 11:01:08 +02:00
Max Filippov
e5c86679d5 xtensa: don't use linux IRQ #0
Linux IRQ #0 is reserved for error reporting and may not be used.
Increase NR_IRQS for one additional slot and increase
irq_domain_add_legacy parameter first_irq value to 1, so that linux
IRQ #0 is not associated with hardware IRQ #0 in legacy IRQ domains.
Introduce macro XTENSA_PIC_LINUX_IRQ for static translation of xtensa
PIC hardware IRQ # to linux IRQ #. Use this macro in XTFPGA platform
data definitions.

This fixes inability to use hardware IRQ #0 in configurations that don't
use device tree and allows for non-identity mapping between linux IRQ #
and hardware IRQ #.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-06-05 16:53:10 -07:00
Max Filippov
70feca7199 xtensa: xtfpga: group platform_* functions together
Group platform_* functions together and turn two separate #ifdef/#ifndef
blocks into single #ifdef/#else. No functional changes.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-20 18:52:59 -07:00
Max Filippov
205ad548a7 xtensa: rearrange CCOUNT calibration
DT-enabled kernel should have a CPU node connected to a clock. This clock
is the CCOUNT clock. Use old platform_calibrate_ccount call as a fallback
when CPU node cannot be found or has no clock and in non-DT-enabled
configurations.

Drop no longer needed code that updates CPU clock-frequency property in
the DT; drop DT-related code from the platform_calibrate_ccount too.

Move of_clk_init to the top of time_init, so that clocks are initialized
before CCOUNT calibration is attempted.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-20 18:52:59 -07:00
Max Filippov
58c3e3ac7a xtensa: xtfpga: use clock provider, don't update DT
Instead of querying hardcoded FPGA frequency register and then updating
clock-frequency property in specificly named DT nodes in machine setup
code register a clock provider that returns fixed-rate clock, configured
by register specified in DT. This way we have less magic/hardcoded names
and use more existing common clock framework code.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
2016-09-20 18:52:51 -07:00
Max Filippov
4f2056873f xtensa: extract common CPU reset code into separate function
platform_restart implementatations do the same thing to reset CPU.
Don't duplicate that code, move it to a function and call it from
platform_restart.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-11 23:53:22 -07:00
Max Filippov
d99434e176 xtensa: xtfpga: fix ethernet controller endianness
Ethernet controller is attached to XTFPGA boards as native endian device,
mark it as such in DTS and pass correct endianness in platform data.
This makes network functional on big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:31 +00:00
Max Filippov
abfbd89595 xtensa: xtfpga: fix serial port register width and endianness
Serial port is attached to XTFPGA boards as native endian device, mark
it as such in DTS and pass correct endianness in platform data.
Set register width in DTS to 4, this way it matches the platform data
and works correctly on big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:31 +00:00
Max Filippov
b85d459479 xtensa: xtfpga: fix integer overflow in TASK_SIZE
This fixes the following warning when default memory region crosses
0x80000000:

  arch/xtensa/include/asm/processor.h:40:47: warning:
    integer overflow in expression [-Woverflow]
    #define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
                                               ^
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-02 18:02:55 +03:00
Max Filippov
5029615e25 xtensa: fixes for configs without loop option
Build-time fixes:
- make lbeg/lend/lcount save/restore conditional on kernel entry;
- don't clear lcount in platform_restart functions unconditionally.

Run-time fixes:
- use correct end of range register in __endla paired with __loopt, not
  the unused temporary register. This fixes .bss zero-initialization.
  Update comments in asmmacro.h;
- don't clobber a10 in the usercopy that leads to access to unmapped
  memory.

Cc: <stable@vger.kernel.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-02 18:02:47 +03:00
Chris Zankel
2ba9268dd6 Xtensa improvements for 4.1:
- fix locking issues in ISS network driver;
 - document PIC and MX interrupt distributor device tree bindings;
 - add CY7C67300 USB controller support to XTFPGA.
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Merge tag 'xtensa-for-next-20150413' of git://github.com/jcmvbkbc/linux-xtensa into for_next

Xtensa improvements for 4.1:

- fix locking issues in ISS network driver;
- document PIC and MX interrupt distributor device tree bindings;
- add CY7C67300 USB controller support to XTFPGA.

Signed-off-by: Chris Zankel <chris@zankel.net>
2015-04-14 04:47:53 +00:00
Max Filippov
e0bf6c5ca2 xtensa: xtfpga: add CY7C67300 USB controller support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-04-13 09:34:37 +03:00
Max Filippov
4949009eb8 xtensa: xtfpga: fix hardware lockup caused by LCD driver
LCD driver is always built for the XTFPGA platform, but its base address
is not configurable, and is wrong for ML605/KC705. Its initialization
locks up KC705 board hardware.

Make the whole driver optional, and its base address and bus width
configurable. Implement 4-bit bus access method.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-02-27 07:55:29 +03:00
Max Filippov
3932b9ca55 xtensa: make PLATFORM_DEFAULT_MEM parameters configurable
This allows using xtfpga platform with both MMU and noMMU cores.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-10-21 13:28:59 +04:00
Max Filippov
2bc2fde638 xtensa: xtfpga: set ethoc clock frequency
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-21 21:33:44 +04:00
Max Filippov
cdc9af7ccf xtensa: xtfpga: use common clock framework
With this change the board needs to set up single clock object, users of
this clock will get correct frequency automatically.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-21 21:33:43 +04:00
Max Filippov
a558d99263 xtensa: xtfpga: fix definitions of platform devices
Remove __initdata attribute, as the devices may be used after init
sections are freed.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-15 00:21:25 +04:00
Baruch Siach
42beb7628e xtensa: standardize devicetree cpu compatible strings
The recommended compatible string format, according to the ePAPR v1.1 standard,
is "manufacturer,model". Change the xtensa cpu compatible strings to
"cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way.

The pic compatible string will be dealt with in a separate patch.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-15 00:21:25 +04:00
Max Filippov
f615136c06 xtensa: add SMP support
This is largely based on SMP code from the xtensa-2.6.29-smp tree by
Piet Delaney, Marc Gauthier, Joe Taylor, Christian Zankel (and possibly
other Tensilica folks).

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-14 10:19:58 -08:00
Max Filippov
c4ee0af3fa xtensa: remove NO_IRQ definitions
These definitions (-1) were correct when used as a hardware IRQ number,
but are incorrect as a mapped IRQ number.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-14 10:19:52 -08:00
Baruch Siach
e504c4b607 xtensa: cleanup ccount frequency tracking
Remove unused nsec_per_ccount, and rename ccount_per_jiffy to ccount_preq.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08 01:11:37 -07:00
Baruch Siach
54c0af9f1a xtensa: xtfpga: fix section mismatch
platform_calibrate_ccount() calls update_clock_frequency() which is in .init
section. However, platform_calibrate_ccount() itself is only called from .init
(i.e., time_init()).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-06-05 10:14:20 -07:00
Max Filippov
d83ff0bb82 xtensa: fix ibreakenable register update
Only set the register when there is at least one ibreak register,
otherwise the build fails:
	arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable'
	for 'wsr' instruction
	arch/xtensa/platforms/iss/setup.c:67: Error: invalid register
	'ibreakenable' for 'wsr' instruction

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Max Filippov
127bc79e30 xtensa: rename prom_update_property to of_update_property
This rename happened in 79d1c71 powerpc+of: Rename the drivers/of prom_*
functions to of_*.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23 19:12:51 -08:00
Chris Zankel
33c760fbb7 xtensa: set the correct ethernet address for xtfpga
The last byte of the mac address is determined by a DIP switch, so
update the OF property with that address.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:26 -08:00
Wei Yongjun
90e3bc798b Use for_each_compatible_node() macro.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
0d456bad36 xtensa: add support for the XTFPGA boards
The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with
an Xtensa processor and an OpenCores Ethernet device.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:24 -08:00