On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped
IO, by reserving a chunk of virtual address space starting at PCI_IOBASE
and by mapping the PCI host bridges memory address space driving PCI IO
cycles to it.
PCI host bridge drivers that enable downstream PCI IO cycles map the host
bridge memory address responding to PCI IO cycles to the fixed virtual
address space through the pci_remap_iospace() API.
This means that if the pci_remap_iospace() function fails, the
corresponding host bridge PCI IO resource must be considered invalid, in
that there is no way for the kernel to actually drive PCI IO transactions
if the memory addresses responding to PCI IO cycles cannot be mapped into
the CPU virtual address space.
The PCI rcar host bridge driver does not remove the PCI IO resource from
the host bridge resource windows if the pci_remap_iospace() call fails;
this is an actual bug in that the PCI host bridge would consider the PCI IO
resource valid (and possibly assign it to downstream devices) even if the
kernel was not able to map the PCI host bridge memory address driving IO
cycle to the CPU virtual address space (ie pci_remap_iospace() failures).
Fix the PCI host bridge driver pci_remap_iospace() failure path, by
destroying the PCI host bridge PCI IO resources retrieved through firmware
when the pci_remap_iospace() function call fails, therefore preventing the
kernel from adding the respective PCI IO resource to the list of PCI host
bridge valid resources, fixing the issue.
Fixes: 5d2917d469 ("PCI: rcar: Convert to DT resource parsing API")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Phil Edworthy <phil.edworthy@renesas.com>
CC: Simon Horman <horms+renesas@verge.net.au>
On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped
IO, by reserving a chunk of virtual address space starting at PCI_IOBASE
and by mapping the PCI host bridges memory address space driving PCI IO
cycles to it.
PCI host bridge drivers that enable downstream PCI IO cycles map the host
bridge memory address responding to PCI IO cycles to the fixed virtual
address space through the pci_remap_iospace() API.
This means that if the pci_remap_iospace() function fails, the
corresponding host bridge PCI IO resource must be considered invalid, in
that there is no way for the kernel to actually drive PCI IO transactions
if the memory addresses responding to PCI IO cycles cannot be mapped into
the CPU virtual address space.
The PCI versatile host bridge driver does not remove the PCI IO resource
from the host bridge resource windows if the pci_remap_iospace() call
fails; this is an actual bug in that the PCI host bridge would consider the
PCI IO resource valid (and possibly assign it to downstream devices) even
if the kernel was not able to map the PCI host bridge memory address
driving IO cycle to the CPU virtual address space (ie pci_remap_iospace()
failures).
Fix the PCI host bridge driver pci_remap_iospace() failure path, by
destroying the PCI host bridge PCI IO resources retrieved through firmware
when the pci_remap_iospace() function call fails, therefore preventing the
kernel from adding the respective PCI IO resource to the list of PCI host
bridge valid resources, fixing the issue.
Fixes: b7e78170ef ("PCI: versatile: Add DT-based ARM Versatile PB PCIe host driver")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Rob Herring <robh@kernel.org>
On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped
IO, by reserving a chunk of virtual address space starting at PCI_IOBASE
and by mapping the PCI host bridges memory address space driving PCI IO
cycles to it.
PCI host bridge drivers that enable downstream PCI IO cycles map the host
bridge memory address responding to PCI IO cycles to the fixed virtual
address space through the pci_remap_iospace() API.
This means that if the pci_remap_iospace() function fails, the
corresponding host bridge PCI IO resource must be considered invalid, in
that there is no way for the kernel to actually drive PCI IO transactions
if the memory addresses responding to PCI IO cycles cannot be mapped into
the CPU virtual address space.
The PCI designware host bridge driver does not remove the PCI IO resource
from the host bridge resource windows if the pci_remap_iospace() call
fails; this is an actual bug in that the PCI host bridge would consider the
PCI IO resource valid (and possibly assign it to downstream devices) even
if the kernel was not able to map the PCI host bridge memory address
driving IO cycle to the CPU virtual address space (ie pci_remap_iospace()
failures).
Fix the PCI host bridge driver pci_remap_iospace() failure path, by
destroying the PCI host bridge PCI IO resources retrieved through firmware
when the pci_remap_iospace() function call fails, therefore preventing the
kernel from adding the respective PCI IO resource to the list of PCI host
bridge valid resources, fixing the issue.
Fixes: cbce790059 ("PCI: designware: Make driver arch-agnostic")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Jingoo Han <jingoohan1@gmail.com>
CC: Pratyush Anand <pratyush.anand@gmail.com>
On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped
IO, by reserving a chunk of virtual address space starting at PCI_IOBASE
and by mapping the PCI host bridge's memory address space driving PCI IO
cycles to it.
PCI host bridge drivers that enable downstream PCI IO cycles map the host
bridge memory address responding to PCI IO cycles to the fixed virtual
address space through the pci_remap_iospace() API.
This means that if the pci_remap_iospace() function fails, the
corresponding host bridge PCI IO resource must be considered invalid, in
that there is no way for the kernel to actually drive PCI IO transactions
if the memory addresses responding to PCI IO cycles cannot be mapped into
the CPU virtual address space.
The PCI aardvark host bridge driver does not remove the PCI IO resource
from the host bridge resource windows if the pci_remap_iospace() call
fails; this is an actual bug in that the PCI host bridge would consider the
PCI IO resource valid (and possibly assign it to downstream devices) even
if the kernel was not able to map the PCI host bridge memory address
driving IO cycle to the CPU virtual address space (ie pci_remap_iospace()
failures).
Fix the PCI host bridge driver pci_remap_iospace() failure path, by
destroying the PCI host bridge PCI IO resources retrieved through firmware
when the pci_remap_iospace() function call fails, therefore preventing the
kernel from adding the respective PCI IO resource to the list of PCI host
bridge valid resources, fixing the issue.
Fixes: 8c39d71036 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* pci/host-aardvark:
arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700
PCI: aardvark: Add Aardvark PCI host controller driver
dt-bindings: add DT binding for the Aardvark PCIe controller
* pci/host-altera:
PCI: altera: Poll for link up status after retraining the link
PCI: altera: Check link status before retrain link
PCI: altera: Reorder read/write functions
* pci/host-dra7xx:
PCI: dra7xx: Fix return value in case of error
* pci/host-hv:
PCI: hv: Fix interrupt cleanup path
PCI: hv: Handle all pending messages in hv_pci_onchannelcallback()
PCI: hv: Don't leak buffer in hv_pci_onchannelcallback()
* pci/host-vmd:
x86/PCI: VMD: Separate MSI and MSI-X vector sharing
x86/PCI: VMD: Use x86_vector_domain as parent domain
x86/PCI: VMD: Use lock save/restore in interrupt enable path
x86/PCI: VMD: Initialize list item in IRQ disable
x86/PCI: VMD: Select device dma ops to override
* pci/host-xilinx:
PCI: xilinx: Fix return value in case of error
Manually apply changes from pci/demodularize-hosts and
pci/host-request-windows to drivers/pci/host/pci-aardvark.c
* pci/host-tegra:
PCI: tegra: Program PADS_REFCLK_CFG* registers with per-SoC values
PCI: tegra: Program PADS_REFCLK_CFG* always, not just on legacy SoCs
PCI: tegra: Stop setting pcibios_min_mem
PCI: tegra: Use generic pci_remap_iospace() rather than ARM32-specific one
PCI: tegra: Use lower-case hex consistently for register definitions
Conflicts:
drivers/pci/host/pci-tegra.c
Drop stray pci_ioremap_io() per Thierry Reding <treding@nvidia.com>;
removal tested by Jon Hunter <jonathanh@nvidia.com>.
* pci/resource:
unicore32/PCI: Remove pci=firmware command line parameter handling
ARM/PCI: Remove arch-specific pcibios_enable_device()
ARM64/PCI: Remove arch-specific pcibios_enable_device()
MIPS/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
ARM/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
PCI: generic: Claim bus resources on PCI_PROBE_ONLY set-ups
PCI: Add generic pci_bus_claim_resources()
alx: Use pci_(request|release)_mem_regions
ethernet/intel: Use pci_(request|release)_mem_regions
GenWQE: Use pci_(request|release)_mem_regions
lpfc: Use pci_(request|release)_mem_regions
NVMe: Use pci_(request|release)_mem_regions
PCI: Add helpers to request/release memory and I/O regions
PCI: Extending pci=resource_alignment to specify device/vendor IDs
sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
powerpc/pci: Implement pci_resource_to_user() with pcibios_resource_to_bus()
microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
PCI: Unify pci_resource_to_user() declarations
microblaze/PCI: Remove useless __pci_mmap_set_pgprot()
powerpc/pci: Remove __pci_mmap_set_pgprot()
PCI: Ignore write combining when mapping I/O port space
* pci/aspm:
PCI/ASPM: Remove redundant check of pcie_set_clkpm
* pci/dpc:
PCI: Remove DPC tristate module option
PCI: Bind DPC to Root Ports as well as Downstream Ports
PCI: Fix whitespace in struct dpc_dev
PCI: Convert Downstream Port Containment driver to use devm_* functions
* pci/hotplug:
PCI: Allow additional bus numbers for hotplug bridges
* pci/misc:
PCI: Include <asm/dma.h> for isa_dma_bridge_buggy
PCI: Make bus_attr_resource_alignment static
MAINTAINERS: Add file patterns for PCI device tree bindings
PCI: Fix comment typo
* pci/msi:
PCI/MSI: irqchip: Fix PCI_MSI dependencies
* pci/pm:
PCI: pciehp: Ignore interrupts during D3cold
PCI: Document connection between pci_power_t and hardware PM capability
PCI: Add runtime PM support for PCIe ports
ACPI / hotplug / PCI: Runtime resume bridge before rescan
PCI: Power on bridges before scanning new devices
PCI: Put PCIe ports into D3 during suspend
PCI: Don't clear d3cold_allowed for PCIe ports
PCI / PM: Enforce type casting for pci_power_t
* pci/virtualization:
PCI: Add ACS quirk for Solarflare SFC9220
PCI: Add DMA alias quirk for Adaptec 3805
PCI: Mark Atheros AR9485 and QCA9882 to avoid bus reset
PCI: Add function 1 DMA alias quirk for Marvell 88SE9182
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_XGENE
drivers/pci/host/Kconfig: bool "X-Gene PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Tanmay Inamdar <tinamdar@apm.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_HOST_THUNDER_PEM
drivers/pci/host/Kconfig: bool "Cavium Thunder PCIe controller to off-chip devices"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: David Daney <david.daney@cavium.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_HOST_THUNDER_ECAM
drivers/pci/host/Kconfig: bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: David Daney <david.daney@cavium.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_TEGRA
drivers/pci/host/Kconfig: bool "NVIDIA Tegra PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-tegra@vger.kernel.org
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_RCAR_GEN2
drivers/pci/host/Kconfig: bool "Renesas R-Car Gen2 Internal PCI controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog, remove "Module" from author comment]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
CC: Valentine Barshak <valentine.barshak@cogentembedded.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_RCAR_GEN2_PCIE
drivers/pci/host/Kconfig: bool "Renesas R-Car PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog, remove "Module" from author comment]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_MVEBU
drivers/pci/host/Kconfig: bool "Marvell EBU PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog, remove "Module" from author comment]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
CC: Jason Cooper <jason@lakedaemon.net>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_LAYERSCAPE
drivers/pci/host/Kconfig: bool "Freescale Layerscape PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Minghuan Lian <minghuan.Lian@freescale.com>
CC: Mingkai Hu <mingkai.hu@freescale.com>
CC: Roy Zang <tie-fei.zang@freescale.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_KEYSTONE
drivers/pci/host/Kconfig: bool "TI Keystone PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-By: Murali Karicheri <m-karicheri2@ti.com>
This code is not being built as a module by anyone:
host/Kconfig:config PCI_HISI
host/Kconfig: bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Zhou Wang <wangzhou1@hisilicon.com>
CC: Dacai Zhu <zhudacai@hisilicon.com>
CC: Gabriele Paoloni <gabriele.paoloni@huawei.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCI_HOST_GENERIC
drivers/pci/host/Kconfig: bool "Generic PCI host controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Will Deacon <will.deacon@arm.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCIE_DW_PLAT
drivers/pci/host/Kconfig: bool "Platform bus based DesignWare PCIe Controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
CC: Jingoo Han <jingoohan1@gmail.com>
CC: Pratyush Anand <pratyush.anand@gmail.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCIE_ARTPEC6
drivers/pci/host/Kconfig: bool "Axis ARTPEC-6 PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog, add "Author" comment]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Niklas Cassel <niklas.cassel@axis.com>
CC: Jesper Nilsson <jesper.nilsson@axis.com>
This code is not being built as a module by anyone:
drivers/pci/host/Kconfig:config PCIE_ARMADA_8K
drivers/pci/host/Kconfig: bool "Marvell Armada-8K PCIe controller"
Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.
Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.
Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
[bhelgaas: changelog]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The DesignWare PCIe driver requires MSI support, so we get a warning for
the artpec6 glue driver if that is not enabled:
warning: (PCIE_ARTPEC6) selects PCIE_DW which has unmet direct dependencies (PCI && PCI_MSI_IRQ_DOMAIN)
Add the same dependency that all other such drivers have.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Niklas Cassel <niklas.cassel@axis.com>
Add a driver for the Aardvark PCIe controller used on the Marvell Armada
3700 ARM64 SoC.
Based on work done by Hezi Shahmoon <hezi.shahmoon@marvell.com> and Marcin
Wojtas <mw@semihalf.com>.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.
For reference, the values are all documented in NV bug 1771116 comment 20.
The ASIC team has validated all these values, except for the Tegra20 value
which is simply left unchanged in this patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
tegra_pcie_phy_power_on() calls tegra_pcie_phy_enable() only for legacy
SoCs. However, part of tegra_pcie_phy_enable() needs to happen in all
cases. Move that code up one level into tegra_pcie_phy_power_on().
[bhelgaas: changelog]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pcibios_min_mem only exists on 32-bit ARM, so using it in pci-tegra.c
prevents the driver from being used on other arches.
In __pci_assign_resource(), we clip the available area based on
PCIBIOS_MIN_MEM. On 32-bit ARM, this is pcibios_min_mem, with a default
value of 0x01000000. For Tegra, we discover the space available for PCI
resource allocation from the device tree, and the lowest address that will
ever be available is 0x12000000 (on Tegra124).
The Tegra windows are always higher than the default pcibios_min_mem, so
the __pci_assign_resource() has no effect, so there's no need to adjust
pcibios_min_mem here.
[bhelgaas: changelog]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use the pci_remap_iospace() function provided by the PCI core, rather
than the 32-bit ARM-specific pci_ioremap_io().
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Most of the register definitions use lowercase hexadecimal values, with a
few exceptions using uppercase. Convert the latter to be more in line with
the former.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
SR-IOV disabled from the host causes a memory leak. pci-hyperv usually
first receives a PCI_EJECT notification and then proceeds to delete the
hpdev list entry in hv_eject_device_work(). Later in hv_msi_free() since
the device is no longer on the device list hpdev is NULL and hv_msi_free
returns without freeing int_desc as part of hv_int_desc_free().
Signed-off-by: Cathy Avery <cavery@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jake Oshins <jakeo@microsoft.com>
In dra7xx_pcie_init_irq_domain(), the pattern used to check and return
error is:
if (!var) {
dev_err(...);
return PTR_ERR(var);
}
So the returned value in case of error is always 0, which means 'success'.
Change it to return -ENODEV instead.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
In xilinx_pcie_init_irq_domain(), the pattern used to check and return
error is:
if (!var) {
dev_err(...);
return PTR_ERR(var);
}
So the returned value in case of error is always 0, which means 'success'.
Change it to return -ENODEV instead.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Some PCIe devices take a long time to reach link up state after retrain.
Poll for link up status after retraining the link. This is to make sure
the link is up before we access configuration space.
[bhelgaas: changelog]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Check the link status before retraining. If the link is not up, don't
bother trying to retrain it.
[bhelgaas: split code move to separate patch, changelog]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Move cra_writel(), cra_readl(), and altera_pcie_link_is_up() so a future
patch can use them in altera_pcie_retrain(). No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Simplify
checking for the required non-prefetchable memory aperture.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
41534e5378 ("PCI: tegra: Implement a proper resource hierarchy") did two
things:
1) It added a top-level resource that encloses all resources declared in
the DT description, including registers and bridge apertures, and
2) It requested the bridge apertures, which means the PCI core can track
the resources used by PCI devices below the bridge.
The latter is necessary, but the former is questionable because there's no
guarantee that the bridge registers and the apertures are contiguous. In
this example:
# cat /proc/iomem
00000000-3fffffff : /pcie-controller@00003000
00000000-00000fff : /pcie-controller@00003000/pci@1,0
00003000-000037ff : pads
00003800-000039ff : afi
10000000-1fffffff : cs
the resource tree claims that [mem 0x00003a00-0x0fffffff] is consumed by
/pcie-controller@00003000, but it's not mentioned in the DT, and it might
actually be used by other devices.
Remove the top-level resource so we don't claim more than the device
actually consumes.
This reintroduces the problem that we can't match the resources, e.g.,
"pads", "afi", "cs", etc., to the DT device. I think this should be solved
by having the DT core request all resources of all devices in the DT (it
does not do that today). If a driver claims the device, it can request the
resources it uses. For example:
# cat /proc/iomem
00000000-00000fff : /pcie-controller@00003000
00000000-00000fff : /pcie-controller@00003000/pci@1,0
00003000-000037ff : /pcie-controller@00003000
00003000-000037ff : pads
00003800-000039ff : /pcie-controller@00003000
00003800-000039ff : afi
10000000-1fffffff : /pcie-controller@00003000
10000000-1fffffff : cs
...
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary cases and "continue" statements in the switch.
Inline rcar_pcie_release_of_pci_ranges(), which is only called once.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Previously we added a dummy I/O port region even though the R-Car
controller doesn't support PCI port I/O. This resulted in bogus root bus
resources like this:
pci_bus 0000:00: root bus resource [io 0xee080000-0xee0810ff]
pci_bus 0000:00: root bus resource [mem 0xee080000-0xee0810ff]
Drop the unused dummy I/O port region and set struct hw_pci.io_optional so
the ARM PCI code doesn't add a default one for us.
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We claim PCI BAR and bridge window resources in pci_bus_assign_resources(),
but when PCI_PROBE_ONLY is set, we treat those resources as immutable and
don't call pci_bus_assign_resources(), so the resources aren't put in the
resource tree.
When the resources aren't in the tree, they don't show up in /proc/iomem,
we can't detect conflicts, and we need special cases elsewhere for
PCI_PROBE_ONLY or resources without a parent pointer.
Claim all PCI BAR and window resources in the PCI_PROBE_ONLY case.
If a PCI_PROBE_ONLY platform assigns conflicting resources, Linux can't fix
the conflicts. Previously we didn't notice the conflicts, but now we will,
which may expose new failures.
[bhelgaas: changelog, summarize comment]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: David Daney <david.daney@cavium.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Remove
unnecessary "goto" statements and label. Simplify checking for the
required non-prefetchable memory aperture.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Simplify
checking for the required non-prefetchable memory aperture. Inline
altera_pcie_release_of_pci_ranges(), which is only called once.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
