Commit Graph

31 Commits

Author SHA1 Message Date
Nicolas Ferre
738a0fd752 ARM: at91: fix external interrupts in non-DT case
Management of external interrupts has changed but the
non-DT code has not integrated these changes.
Add a mask to pass external irq specification from SoC
specific code to the at91_aic_init() function.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: stable <stable@vger.kernel.org> [v3.6]
2012-10-24 18:08:40 +02:00
Ivan Shugov
3d9a0183dd ARM: at91: at91sam9g10: fix SOC type detection
Newer at91sam9g10 SoC revision can't be detected, so the kernel can't boot with
this kind of kernel panic:
"AT91: Impossible to detect the SOC type"

CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Atmel AT91SAM9G10-EK
Ignoring tag cmdline (using the default kernel command line)
bootconsole [earlycon0] enabled
Memory policy: ECC disabled, Data cache writeback
Kernel panic - not syncing: AT91: Impossible to detect the SOC type
[<c00133d4>] (unwind_backtrace+0x0/0xe0) from [<c02366dc>] (panic+0x78/0x1cc)
[<c02366dc>] (panic+0x78/0x1cc) from [<c02fa35c>] (at91_map_io+0x90/0xc8)
[<c02fa35c>] (at91_map_io+0x90/0xc8) from [<c02f9860>] (paging_init+0x564/0x6d0)
[<c02f9860>] (paging_init+0x564/0x6d0) from [<c02f7914>] (setup_arch+0x464/0x704)
[<c02f7914>] (setup_arch+0x464/0x704) from [<c02f44f8>] (start_kernel+0x6c/0x2d4)
[<c02f44f8>] (start_kernel+0x6c/0x2d4) from [<20008040>] (0x20008040)

The reason for this is that the Debug Unit Chip ID Register has changed between
Engineering Sample and definitive revision of the SoC. Changing the check of
cidr to socid will address the problem. We do not integrate this check to the
list just above because we also have to make sure that the extended id is
disregarded.

Signed-off-by: Ivan Shugov <ivan.shugov@gmail.com>
[nicolas.ferre@atmel.com: change commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: stable <stable@vger.kernel.org> [v3.1] # since commit 8c3583b6
2012-10-24 18:04:16 +02:00
Olof Johansson
0b33162ec5 Merge branch 'late/fixes' into fixes
This is a series from Arnd that fixes a number of compiler warnings
when building defconfigs on ARM.

* late/fixes:
  ARM: footbridge: nw_gpio_lock is raw_spin_lock
  ARM: mv78xx0: correct addr_map_cfg __initdata annotation
  ARM: footbridge: remove RTC_IRQ definition
  ARM: soc: dependency warnings for errata
  ARM: ks8695: __arch_virt_to_dma type handling
  ARM: rpc: check device_register return code in ecard_probe
  ARM: davinci: don't mark da850_register_cpufreq as __init
  ARM: iop13xx: fix iq81340sc_atux_map_irq prototype
  ARM: iop13xx: mark iop13xx_scan_bus as __devinit
  ARM: mv78xx0: mark mv78xx0_timer_init as __init_refok
  ARM: s3c24xx: fix multiple section mismatch warnings
  ARM: at91: unused variable in at91_pm_verify_clocks
  ARM: at91: skip at91_io_desc definition for NOMMU
  ARM: pxa: work around duplicate definition of GPIO24_SSP1_SFRM
  ARM: pxa: remove sharpsl_fatal_check function
  ARM: pxa: define palmte2_pxa_keys conditionally
  ARM: pxa: Wunused-result warning in viper board file
  ARM: shark: fix shark_pci_init return code

Fixed trivial conflicts in arch/arm/mach-at91/setup.c.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-10-07 07:22:32 -07:00
Arnd Bergmann
ac09281a02 ARM: at91: skip at91_io_desc definition for NOMMU
On NOMMU systems, we do cannot remap the MMIO space, so the
definition of at91_io_desc is unused.

Without this patch, building at91x40_defconfig results in:

arch/arm/mach-at91/setup.c:90:24: warning: 'at91_io_desc' defined but not used [-Wunused-variable]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
2012-10-04 10:21:29 +02:00
Arnd Bergmann
dca4ba4121 ARM: at91: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-18 10:15:11 +02:00
Arnd Bergmann
87c35c56f4 Merge branch 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/newsoc
From: Linus Walleij <linus.walleij@linaro.org>:
  Core support for the U9540 after finalized review

* 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits)
  ARM: ux500: ioremap differences for DB9540
  ARM: ux500: core U9540 support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-02 17:21:21 +02:00
Hong Xu
74db4fb93e ARM: at91: Add machine files for AT91SAM9N12 SoC
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-28 01:40:11 +08:00
Joachim Eastwood
ac8c411c83 ARM: at91: Export at91_matrix_base
at91_matrix_* macro's are used by at91_udc usb gadget driver,
which can be built as module, therefore we need to export the
variable containing matrix base address.

Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-04-16 11:08:24 +02:00
Joachim Eastwood
9268c6c6fa ARM: at91: Export at91_ramc_base
After commit f363c40 (ARM: at91: make sdram/ddr register base soc independent)
building at91_cf as a module fails with:
  ERROR: "at91_ramc_base" [drivers/pcmcia/at91_cf.ko] undefined!
  make[1]: *** [__modpost] Error 1
  make: *** [modules] Error 2

Export at91_ramc_base symbol to allow drivers using at91_ramc_*
functions to be built as modules again.

Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com>
[nicolas.ferre@atmel.com: modify slightly commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-04-16 11:08:24 +02:00
Olof Johansson
86dfe446c2 ARM: fix builds due to missing <asm/system_misc.h> includes
This does a sweeping change fixing up all the missing system_misc.h and
system_info.h includes from the system.h split-up change. These were the
ones I came across when building all defconfigs in arch/arm/configs, there
might be more but they lack adequate build coverage to be easily caught.

I'm expecting to get a lot of these piecemeal by each maintainer, so we
might just as well do one sweeping change to get them all at once.

Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-30 15:44:40 -07:00
Jean-Christophe PLAGNIOL-VILLARD
82015c4eae ARM: at91: add Shutdown Controller (SHDWC) DT support
Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:38:02 +08:00
Jean-Christophe PLAGNIOL-VILLARD
a7776ec625 ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:37:56 +08:00
Jean-Christophe PLAGNIOL-VILLARD
c8082d344a ARM: at91: add RSTC (Reset Controller) dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:22 +08:00
Jean-Christophe PLAGNIOL-VILLARD
eb5e76ffd4 ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:14 +08:00
Jean-Christophe PLAGNIOL-VILLARD
2b11ea5bf2 ARM: at91/dt: add specific DT soc init
This will allow to have static Device mapping and DT probe mapping for the
System Controller.

Temporary keep the call to ioremap_registers() until we have the binding
for the SDRAM/DDR Controller.

Temporary keep the main clock hardcoded to 12MHz until we have the binding
for the PMC.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:30:05 +08:00
Jean-Christophe PLAGNIOL-VILLARD
4342d6479e ARM: at91: make matrix register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
Cc: linux-usb@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-23 09:24:46 +01:00
Jean-Christophe PLAGNIOL-VILLARD
9918ceafd4 ARM: at91: code removal of CAP9 SoC
Following removal announce and addition to feature-removal-schedule.txt,
here is the actual source code deletion for Atmel CAP9 family.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03 13:33:05 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e9f68b5cc6 ARM: at91: make rstc soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:22:38 +01:00
Nicolas Ferre
3e90772f76 ARM: at91: fix at91rm9200 soc subtype handling
Currently setting it to PQFP changes subtype to BGA as subtypes are
swapped in at91rm9200_set_type().

Wrong subtype causes GPIO bank D not to work at all.

After this fix, subtype is still set as unknown. But board code should
fill it in with proper value. Another information is thus printed.

Bug discovery and first implementation made by Veli-Pekka Peltola.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: stable <stable@vger.kernel.org>
2012-01-20 14:58:13 +01:00
Olof Johansson
844e8a16f2 Merge branch 'picoxcell/cleanup' into next/cleanup
* picoxcell/cleanup: (4 commits)
  MAINTAINERS: add maintainer entry for Picochip picoxcell
  ARM: picoxcell: move io mappings to common.c
  ARM: picoxcell: don't reserve irq_descs
  ARM: picoxcell: remove mach/memory.h

Conflicts:
	arch/arm/mach-at91/setup.c
2011-12-19 21:13:41 -08:00
Jean-Christophe PLAGNIOL-VILLARD
13079a7333 ARM: at91: make DBGU soc independent
we will select now the DBGU used by the soc at Kconfig level

For the DEBUG_LL and early_printk this will allow to select which DBGU to use
this will also allow to select them when multiple SOC are enabled

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:39 +08:00
Jean-Christophe PLAGNIOL-VILLARD
f22deee523 ARM: at91: make shutdown controler soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
cfa5a1fe7e ARM: at91: add ioremap_registers entry point to soc setup
this will allow to ioremap the register of the PIT, PMC and others
and make the code soc independent

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Nicolas Pitre
cf48c02e3b ARM: mach-at91: remove arch specific special handling for ioremap
A generic version should replace this later.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-11-15 22:30:39 -05:00
Jean-Christophe PLAGNIOL-VILLARD
fb149f9e28 at91: add arch specific ioremap support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:09:26 +00:00
Jean-Christophe PLAGNIOL-VILLARD
f0051d82a6 at91: factorize sram init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:29 +00:00
Jean-Christophe PLAGNIOL-VILLARD
51ddec7617 at91: move register clocks to soc generic init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:29 +00:00
Jean-Christophe PLAGNIOL-VILLARD
465393749d at91: move clock subsystem init to soc generic init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:29 +00:00
Jean-Christophe PLAGNIOL-VILLARD
8c3583b634 at91: use structure to store the current soc
instead of reading the registers everytime

the current implementation respect the following constrain:
 - allow 1 to n soc to be enabled
 - allow to have a virtual cpu type and subtype
 - always detect the cpu type and subtype and report it
 - detect if the soc support is enabled
 - prepare for sysfs export support
 - drop soc specific code via compiler when the soc not enabled
   (via cpu_is_xxx)

Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too

with the new implementation we just need to check the soc subtype

this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.

this implementation is inspired by the SH cpu detection support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:28 +00:00
Jean-Christophe PLAGNIOL-VILLARD
92100c12ca at91: factorize at91 interrupts init to soc
they are the same except the default priority

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:28 +00:00
Jean-Christophe PLAGNIOL-VILLARD
21d08b9d55 at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.

On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000

This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:28 +00:00