Commit Graph

18 Commits

Author SHA1 Message Date
Josh Cartwright
ef6ca1a84a ARM: zynq: Drop use of slcr_unlock in zynq_slcr_system_restart
The SLCR is unconditionally unlocked early on boot in zynq_slcr_init()
and not ever re-locked. As such, it is not necessary to explicitly unlock in
the restart codepath.

Signed-off-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-18 14:46:37 +02:00
Josh Cartwright
64e6861760 ARM: zynq: Use restart_handler mechanism for slcr reset
By making use of the restart_handler chain mechanism, the SLCR-based
reset mechanism can be prioritized amongst other mechanisms available on
a particular board.

Choose a default high-ish priority of 192 for this restart mechanism.

Signed-off-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-18 14:46:36 +02:00
Michal Simek
3329659df0 ARM: zynq: Simplify SLCR initialization
Based on
"mfd: syscon: Decouple syscon interface from platform devices"
(sha1: bdb0066df9)
SLCR driver can use syscon/regmap drivers directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-29 15:38:17 +01:00
Soren Brinkmann
50c7960a45 ARM: zynq: Synchronise zynq_cpu_die/kill
Avoid races and add synchronisation between the arch specific
kill and die routines.

The same synchronisation issue was fixed on IMX platform
by this commit:
"ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill"
(sha1: 2f3edfd7e2)

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16 12:55:09 +02:00
Michal Simek
00f7dc6363 ARM: zynq: Add support for SOC_BUS
Provide information through SOC_BUS to user space.
Silicon revision is provided through devcfg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 16:13:48 +02:00
Michal Simek
568800731a ARM: zynq: Introduce zynq_slcr_unlock()
Call special function for unlocking SLCR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:45 +01:00
Michal Simek
871c6971ec ARM: zynq: Add and use zynq_slcr_read/write() helper functions
Use zynq_slcr_read/write helper functions for reg access
instead of readl/writel.
Also use regmap when it is ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:22 +01:00
Steffen Trumtrar
7b274efef7 ARM: zynq: Make zynq_slcr_base static
The pointer doesn't need to be passed around any more.
Make it static.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:19 +01:00
Steffen Trumtrar
5e21828034 ARM: zynq: Hang iomapped slcr address on device_node
For later usage by zynq clk driver.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:06 +01:00
Michal Simek
016f4dcae8 ARM: zynq: Split slcr in two parts
Split the slcr into an early part for unlocking and cpu starting
and a later syscon driver.
Also add "syscon" compatible property for slcr.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:20:54 +01:00
Steffen Trumtrar
6f69c7f21c ARM: zynq: Move clock_init from slcr to common
Preparation step for next changes.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-05 15:57:00 +01:00
Soren Brinkmann
3db9e86029 arm: zynq: slcr: Use read-modify-write for register writes
zynq_slcr_cpu_start/stop() ignored the current register state when
writing to a register. Fixing this by implementing proper
read-modify-write.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-07-26 14:14:41 +02:00
Soren Brinkmann
b5f177ff30 arm: zynq: slcr: Clean up #defines
Use a common naming scheme for register offset #defines:
Some of those used a '_OFFSET' suffix to distinguish them from others.
This scheme is used for all register offsets now.

Separate the register offset #defines from others and sort them in
increasing order.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-07-26 14:14:39 +02:00
Soren Brinkmann
c323f2a188 arm: zynq: slcr: Remove redundant header #includes
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-07-26 14:14:38 +02:00
Soren Brinkmann
30e1e28598 arm: zynq: Migrate platform to clock controller
Migrate the Zynq platform and its drivers to use the new clock
controller driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:22 +02:00
Michal Simek
aa7eb2bb4e arm: zynq: Add smp support
Zynq is dual core Cortex A9 which starts always
at zero. Using simple trampoline ensure long jump
to secondary_startup code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2013-04-04 09:24:00 +02:00
Michal Simek
96790f0a28 arm: zynq: Add support for system reset
Do system reset via slcr registers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00
Michal Simek
64b889b39e arm: zynq: Move slcr initialization to separate file
Create separate slcr driver instead of polluting common code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00