ds1672_get_datetime and ds1672_set_mmss are only used after casting dev
to an i2c_client. Remove that useless indirection.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Remove the control sysfs file as it is not documented, read only and was
only used to provide the oscillator state.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Return -EINVAL when trying to read an invalid time instead of just probe
because this is a useful information for userspace.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The ds1672 is a 32bit seconds counter.
Also remove erroneous comment claiming that epoch is set to 2000, it was
not.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The mentioned function pointer is long gone since early 2011. Remove the
reference in the comment and reword it slightly.
Fixes: 51ba60c5bb ("RTC: Cleanup rtc_class_ops->update_irq_enable()")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Remove the unused "depends on I2C" as the config options are already
guarded by if I2C.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Allow reading the oscillator status bit. Also allow clearing it even if
that makes little sense and can't be done in a race free way.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The PCF850363 has an offset correction with two modes:
With mode 0, the correction is triggered once every two hours and then
correction pulses are applied once per minute until the programmed
correction values have been implemented. This gives a step of 4.34 ppm.
With mode 1, the correction is triggered once every four minutes and then
correction pulses are applied once per second up to a maximum of 60 pulses.
When correction values greater than 60 pulses are used, additional
correction pulses are made in the 59 th second. This gives a step of 4.069
ppm.
Use the correction closest to the requested value.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The Micro Crystal RV8263 has the same IC as the pcf85063 but has an on
board crystal. This means that the CAP_SEL bit has to be cleared so the
correct capacitance is selected for the crystal.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add support for the alarms. The match on the weekday is not used as it it
not necessarily properly set.
The tested RTC shows a behaviour where setting an alarm on the second right
after an alarm that fired is not working, probably because of the circuit
that ensures an alarm only fires once. This is why uie_unsupported is set.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
As stated in a comment pcf85063a and pcf85063tp don't have the same number
of registers. Especially, pcf85063tp doesn't have alarm support.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Switch to regmap to simplify register accesses and remove the need for
pcf85063_stop_clock/pcf85063_start_clock.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Only smbus reads and write are done in the driver, plain i2c functionality
is not required.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
With calling dev_pm_set_wake_irq() to set SNVS RTC as wakeup
source for suspend, generic wake irq mechanism will automatically
enable it as wakeup source when suspend, then the suspend/resume
callback which are ONLY for enabling/disabling irq wake can be
removed, it simplifies the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Read and writes the time to the non-battery backed RTC in the ASPEED BMC
system on chip families.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Call the 64bit version of rtc_time_to_tm as the range is enforced by the
core.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The IRQ mapping was changed to not being created in the rtc-mt6397
driver, so the irq_dispose_mapping is no longer needed.
Also the dev_id passed to free_irq should be the same as the last
argument passed to request_threaded_irq.
This prevents a "Trying to free already-free IRQ 274" warning when
unbinding the driver.
Fixes: e695d3a0b3 ("mfd: mt6397: Create irq mappings in mfd core driver")
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Fix sparse warning:
drivers/rtc/rtc-opal.c:227:5:
warning: symbol 'opal_tpo_alarm_irq_enable' was not declared. Should it be static?
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use SPDX-License-Identifier instead of a verbose license text.
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Call the 64bit versions of rtc_tm time conversion now that the range is
enforced by the core.
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
There is no specific handling in the error path of wm831x_rtc_probe, remove
the unnecessary goto and label.
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The wm831x has a 32bit second counter.
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Call the 64bit versions of rtc_tm time conversion now that the range is
enforced by the core.
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The DA9062 and DA9063 have a year register that can go up to 0x3F.
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use SPDX-License-Identifier to be clearer on the license. Choose the v2
only as this is the default Linux license.
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The Sun4v Hypervisor Core API Specification states:
Time is described by a single unsigned 64-bit word equivalent to a time_t
for the POSIX time(2) system call. The word contains the time since the
Epoch (00:00:00 UTC, January 1, 1970), measured in seconds.
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Call the 64bit versions of rtc_tm time conversion as the hypervisor handles
64bit values.
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The PS3 has a 64bit second counter from 2000. While this exceeds the 64bit
UNIX timestamp, there is not doubt that non of them will still be working
by then.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use SPDX-License-Identifier instead of a verbose license text
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Call the 64bit versions of rtc_tm time conversion as the range is enforced
by the core.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The AT91 RTT is a 32bit second counter that is saved in a 32bit global
purpose register.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This allows further improvement of the driver.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
ARCH_AT91 is DT only for a while, drop platform data support.
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The SH RTC is a BCD RTC with some version having 4 digits for the year.
The range for the RTCs with only 2 digits for the year was unfortunately
shifted to handle 1999 to 2098.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
