The system clock frequency for the bus connected to the PCIe controller
shall be used when calculating the frequency of the PWM, not the CAN
system clock frequency.
Signed-off-by: Christer Beskow <chbe@kvaser.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Remove including <linux/version.h> that don't need it.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
To set the duty cycle to zero (i.e. pwm_stop), the trigger value shall
be equal to the top value.
This is achieved by reading the value of the top bit field from the pwm
register and then writing back this value to the trigger and top bit
fields.
Addresses-Coverity: ("Logically dead code")
Reported-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Christer Beskow <chbe@kvaser.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch adds support for Kvaser PCIEcan devices. This includes
support for up to 4 CAN channels on a single card, depending on device.
Signed-off-by: Henning Colliander <henning.colliander@evidente.se>
Signed-off-by: Jimmy Assarsson <extja@kvaser.com>
Signed-off-by: Christer Beskow <chbe@kvaser.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
