Commit Graph

1463 Commits

Author SHA1 Message Date
Daniel Vetter
40ce657510 drm/i915/gtt: call chipset flush directly
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:44 +00:00
Daniel Vetter
23ed992a5e drm/i915|intel-gtt: consolidate intel-gtt.h headers
... and a few other defines.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:43 +00:00
Chris Wilson
e384eafc1c Merge branch 'drm-intel-fixes' into drm-intel-next 2010-11-23 20:13:13 +00:00
Chris Wilson
bcf50e2775 drm/i915: Handle pagefaults in execbuffer user relocations
Currently if we hit a pagefault when applying a user relocation for the
execbuffer, we bail and return EFAULT to the application. Instead, we
need to unwind, drop the dev->struct_mutex, copy all the relocation
entries to a vmalloc array (to avoid any potential circular deadlocks
when resolving the pagefault), retake the mutex and then apply the
relocations.  Afterwards, we need to again drop the lock and copy the
vmalloc array back to userspace.

v2: Incorporate feedback from Daniel Vetter.

Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2010-11-23 20:11:43 +00:00
Chris Wilson
faa60c4174 drm/i915: Contract the magic IPS constants into a direct LUT
... and no need to perform a linear search for the index.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:43:40 +00:00
Chris Wilson
c64f7ba5f1 agp/intel: Remove confusion of stolen entries not stolen memory
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:43:18 +00:00
Chris Wilson
fe669bf88e drm/i915: Compute physical addresses from base of stolen memory
The GATT is a write-only set of registers, reading from them in the
manner of i915_gtt_to_phys() is supposed to be undefined. However a
simple solution exists as we allocate linear memory from the stolen
area, we can simply add the block offset to the base register. As a
side-effect we recover all the unused stolen GTT entries and so enlarge
our aperture.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:42:56 +00:00
Chris Wilson
0b0b053a39 drm/i915/panel: Restore saved value of BLC_PWM_CTL
After a GPU reset, the backlight controller registers may be also reset
to 0. In that case we should restore those to the original values
programmed by the BIOS. Note that we still lack the code to handle the
case where the BIOS failed to program those registers at all...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 09:54:17 +00:00
Chris Wilson
3685092b71 drm/i915: Avoid oops when capturing NULL ring for inactive pinned buffers
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 08:49:38 +00:00
Chris Wilson
da79de97d2 drm/i915/sdvo: Only enable HDMI encodings only if the commandset is supported
As we conflated intel_sdvo->is_hdmi with both having HDMI support on the
ADD along with having HDMI support on the monitor, we would attempt to
use HDMI encodings even if the interface did not support those commands.

Reported-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
2010-11-22 13:27:29 +00:00
Keith Packard
5f75377db4 drm/i915: Fix restore of 965 fence regs since the register tracing change.
We were reading our 64-bit value in I915_READ64 and returning 32 bits
of it.  The restoration of fence regs at resume then had a zero end
value, and the fence had no effect.

Version 2: Split register access functions into per-size versions

Sharing code between different sizes seemed reasonable when we only
needed a single copy, but as 64-bit access requires its own version,
it makes sense to just split them out for each size.

Reported-by: Peter Clifton <pcjc2@cam.ac.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
[ickle: use a macro to create the various read/write routines]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 09:26:22 +00:00
Eric Anholt
cff458c210 drm/i915: Add support for GPU reset on gen6.
This has proven sufficient to recover from a hang of the GPU using the
gem_bad_blit test while at the KMS console then starting X.  When
attempting the same during an X session, the timer doesn't appear to
trigger.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 09:02:07 +00:00
Eric Anholt
75a6898ffd drm/i915: Also reinit the BSD and BLT rings after a GPU reset.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 09:01:55 +00:00
Eric Anholt
df9c204285 drm/i915: Correct a comment about the use of the workqueue.
It isn't used for the hangcheck, which does its work right from the
timer trigger, but hangcheck can lead to error state recording, which
is run off of the workqueue.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 08:58:01 +00:00
Chris Wilson
e624ae8e0d Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
2010-11-22 08:51:36 +00:00
Chris Wilson
c4a1d9e4dc drm/i915: Capture interesting display registers on error
When trying to diagnose mysterious errors on resume, capture the
display register contents as well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 08:08:19 +00:00
Chris Wilson
c724e8a940 drm/i915: Capture pinned buffers on error
The pinned buffers are useful for diagnosing errors in setting up state
for the chipset, which may not necessarily be 'active' at the time of
the error, e.g. the cursor buffer object.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-22 08:07:02 +00:00
Chris Wilson
f3c91c1dea drm/i915: Only save/restore cursor regs if !KMS
Under KMS, restoring the cursor is handled upon modeswitch in order to
avoid enabling an undefined set of registers. At the moment, the cursor
is restored before the aperture and modes are fully setup causing some
invalid access during resume, such as:

  PGTBL_ER: 0x00040000
    Invalid GTT entry during Cursor Fetch

Fix this by only performing cursor register save/restore under UMS where
it is done in the correct sequence.

Reported-by: Arkadiusz Miskiewicz <arekm@maven.pl>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-21 09:56:00 +00:00
Chris Wilson
d1d788302e drm/i915: Prevent integer overflow when validating the execbuffer
Commit 2549d6c2 removed the vmalloc used for temporary storage of the
relocation lists used during execbuffer. However, our use of vmalloc was
being protected by an integer overflow check which we do want to
preserve!

Reported-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-21 09:30:58 +00:00
Alex Shi
16c59ef33b drm/i915: Disable FBC on Ironlake to save 1W
Frame buffer compression is broken on Ironlake due to buggy hardware.
Currently it is disabled through chicken bits, but it still consumes
over 1W more than if we simply never attempt to enable the FBC code
paths.

Signed-off-by: Alex Shi <alex.shi@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-11-19 09:36:21 +00:00
Keith Packard
e7dbb2f2f8 drm/i915: Take advantage of auto-polling CRT hotplug detection on PCH hardware
Both IBX and CPT have an automatic hotplug detection mode which appears to work reliably enough
that we can dispense with the manual force hotplug trigger stuff. This means that
hotplug detection is as simple as reading the current hotplug register values.

The first time the hotplug detection is activated, the code synchronously waits for a hotplug
sequence in case the hardware hasn't bothered to do a detection cycle since being initialized.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-19 09:30:28 +00:00
Chris Wilson
c9a1c4cded drm/i915/crt: Introduce struct intel_crt
We will use this structure in future patches to store CRT specific
information on the encoder.

Split out and tweaked from a patch by Keith Packard.

Signed-off-by: Keith Packard <keithp@kithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-19 09:30:28 +00:00
Chris Wilson
51311d0a5c drm/i915: Do not hold mutex when faulting in user addresses
Linus Torvalds found that it was rather trivial to trigger a system
freeze:

  In fact, with lockdep, I don't even need to do the sysrq-d thing: it
  shows the bug as it happens. It's the X server taking the same lock
  recursively.

  Here's the problem:

    =============================================
    [ INFO: possible recursive locking detected ]
    2.6.37-rc2-00012-gbdbd01a #7
    ---------------------------------------------
    Xorg/2816 is trying to acquire lock:
     (&dev->struct_mutex){+.+.+.}, at: [<ffffffff812c626c>] i915_gem_fault+0x50/0x17e

    but task is already holding lock:
     (&dev->struct_mutex){+.+.+.}, at: [<ffffffff812c403b>] i915_mutex_lock_interruptible+0x28/0x4a

    other info that might help us debug this:
    2 locks held by Xorg/2816:
     #0:  (&dev->struct_mutex){+.+.+.}, at: [<ffffffff812c403b>] i915_mutex_lock_interruptible+0x28/0x4a
     #1:  (&mm->mmap_sem){++++++}, at: [<ffffffff81022d4f>] page_fault+0x156/0x37b

This recursion was introduced by rearranging the locking to avoid the
double locking on the fast path (4f27b5d and fbd5a26d) and the
introduction of the prefault to encourage the fast paths (b5e4f2b). In
order to undo the problem, we rearrange the code to perform the access
validation upfront, attempt to prefault and then fight for control of the
mutex.  the best case scenario where the mutex is uncontended the
prefaulting is not wasted.

Reported-and-tested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-19 09:30:15 +00:00
Chris Wilson
3143a2bf18 drm/i915: Convert (void)I915_READ to POSTING_READ
... and so hide the flushes from tracing.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-16 15:55:10 +00:00
Chris Wilson
c94f28c383 Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
	drivers/gpu/drm/i915/intel_ringbuffer.c
2010-11-15 06:49:30 +00:00
Chris Wilson
df15315899 drm/i915: Fix current tiling check for relaxed fencing
As we may bind an object with the correct alignment, but with an invalid
size, it may pass the current checks on whether the object may be reused
with a fence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-15 06:48:46 +00:00
Chris Wilson
1bb95834bb Merge remote branch 'airlied/drm-fixes' into drm-intel-fixes 2010-11-15 06:33:11 +00:00
Daniel Vetter
5e78330126 drm/i915: fix relaxed tiling for gen <= 3 && !g33
g33/pineview doesn't have any alignment constrains for unfenced tiled
buffers. But older chips have. Fix this.

Problem introduced in a00b10c360.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2010-11-15 05:22:16 +00:00
Chris Wilson
85345517fe drm/i915: Retire any pending operations on the old scanout when switching
An old and oft reported bug, is that of the GPU hanging on a
MI_WAIT_FOR_EVENT following a mode switch. The cause is that the GPU is
waiting on a scanline counter on an inactive pipe, and so waits for a
very long time until eventually the user reboots his machine.

We can prevent this either by moving the WAIT into the kernel and
thereby incurring considerable cost on every swapbuffers, or by waiting
for the GPU to retire the last batch that accesses the framebuffer
before installing a new one. As mode switches are much rarer than swap
buffers, this looks like an easy choice.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28964
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29252
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-11-13 09:49:11 +00:00
Chris Wilson
8168bd48bb drm/i915: Remove the definitions for Primary Ring Buffer
We only ever used the PRB0, neglecting the secondary ring buffers, and
now with the advent of multiple engines with separate ring buffers we
need to excise the anachronisms from our code (and be explicit about
which ring we mean where). This is doubly important in light of the
FORCEWAKE required to read ring buffer registers on SandyBridge.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-11 17:54:52 +00:00
Chris Wilson
e74cfed521 Revert "drm/i915/ringbuffer: Ignore failure to setup the ring on Sandybridge"
This reverts commit 629e894173.
2010-11-11 17:46:00 +00:00
Zou Nan hai
cae5852dca drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring register
Before reading ring register, set FORCE_WAKE bit to prevent GT core
power down to low power state, otherwise we may read stale values.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
[ickle: added a udelay which seemed to do the trick on my SNB]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-11 17:45:54 +00:00
Chris Wilson
527f9e907c drm/i915: Remove the global irq wait queue
... as it has been replaced by per-ring waiters.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-11 01:16:58 +00:00
Chris Wilson
5d97eb69bd drm/i915: Only add the lazy request if we end up waiting for it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-10 20:41:16 +00:00
Chris Wilson
33d2323711 drm/i915: Unconditionally get the fence reg when pinning scanout
We use i915_gem_object_get_fence_reg() to do LRU tracking of the fence
registers, so stop trying to be too clever when pinning the fb->obj.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-10 13:59:09 +00:00
Jean Delvare
69669455b0 drm/i915: Fix I2C adapter registration
Fix many small bugs in I2C adapter registration:
* Properly reject unsupported GPIO pin.
* Fix improper use of I2C_NAME_SIZE (which is the size of
  i2c_client.name, not i2c_adapter.name.)
* Prefix adapter names with "i915" so that the user knows what the
  I2C channel is connected to.
* Fix swapped characters in the string used to name the GPIO-based
  adapter.
* Add missing comma in gmbus name table.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09 23:04:52 +00:00
Joe Perches
fce7d61be0 drivers/gpu/drm: Update WARN uses
Coalesce long formats.
Align arguments.
Add missing newlines.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-11-09 13:37:15 +10:00
Chris Wilson
3f8ff0e72d drm/i915: Fix LVDS fixed-mode regression from 219adae1
Commit 219adae1 cached the EDID found during LVDS init, but in the
process prevented the init routine from discovering the preferred
fixed-mode for the panel. This was causing us to guess the correct mode,
which sometimes is wide of the mark.

Reported-and-tested-by: Jon Masters <jonathan@jonmasters.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09 00:59:32 +00:00
Chris Wilson
56e2ea346a drm/i915: Fix unload after failed initialisation
If modeset init failed we attempted to unload the module, before we
finished setting it up and so triggered various oopses.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 21:10:01 +00:00
Chris Wilson
374c479bef drm/i915: POSTING_READs are simply flushes and so irrelevant to tracing
As we use POSTING_READ to flush the write to the register before
proceeding, we do not care what the return value is and similar we do
not care for the read to be recorded whilst tracing register
read/writes.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 21:09:52 +00:00
Yuanhan Liu
db5e4172a0 drm/i915: filter out the read/write of GPIO registers from debug tracing
These registers are written very frequently, are timing sensitive, and
not particularly relevant to any debugging, so remove the tracepoints
from these.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:58:16 +00:00
Yuanhan Liu
65e5ecb066 drm/i915: Add untraced register read/write interface
This will be used later to hide the frequently written registers
from debug traces in order to increase the signal-to-noise.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:56:37 +00:00
Yuanhan Liu
ba4f01a304 drm/i915: trace down all the register write and read
Add two tracepoints at I915_WRITE/READ for tracing down all the
register write and read.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:36:48 +00:00
Chris Wilson
08deebf987 drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
My Sandybridge only reports 0 for the ring buffer registers, causing it
to hang as soon as we exhaust the available ring. As a workaround, take
advantage of our huge ring buffers and use the auto-reporting mechanism
to update the status page with the HEAD location every 64 KiB.

Cherry-picked from 6aa56062ea.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31404
Tested-by: Zhao Jian <jian.j.zhao@intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:21:47 +00:00
Eric Anholt
67e92af01c drm/i915: Apply display workaround required according to the B-Spec.
Not known to fix any current bugs.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:20:12 +00:00
Eric Anholt
de6e2eaf2c drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.
This is not known to fix any particular bugs we have, but the spec
says to do it, and the BIOS hadn't already set it up on my system.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:20:08 +00:00
Chris Wilson
b47b30ccda drm/i915: Avoid might_fault during pwrite whilst holding our mutex
... and so prevent a potential circular reference:

  [ INFO: possible circular locking dependency detected ]
  2.6.37-rc1-uwe1+ #4
  -------------------------------------------------------
  Xorg/1401 is trying to acquire lock:
   (&mm->mmap_sem){++++++}, at: [<c01e4ddb>] might_fault+0x4b/0xa0

  but task is already holding lock:
   (&dev->struct_mutex){+.+.+.}, at: [<f869c3ac>]
  i915_mutex_lock_interruptible+0x3c/0x60 [i915]

  which lock already depends on the new lock.

When the locking around the pwrite ioctl was simplified, I did not spot
that the phys path never took any locks and so we introduced this
potential circular reference.

Reported-by: Uwe Helm <uwe.helm@googlemail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-08 09:19:11 +00:00
Chris Wilson
629e894173 drm/i915/ringbuffer: Ignore failure to setup the ring on Sandybridge
The ring buffer registers return 0 whilst idle (for some values of idle)
on early Sandybridge hw. Persevere even when all appears hopeless...
Fortunately the head auto-reporting prevents most hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31370
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-07 13:19:40 +00:00
Chris Wilson
ae69b42a10 drm/i915/ringbuffer: Be consistent in use of ring->size when initialising
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-07 11:45:52 +00:00
Chris Wilson
045e769ab6 drm/i915: Handle GPU hangs during fault gracefully.
Instead of killing the process, just return no page found and reschedule
the process giving the GPU some time to (hopefully) recover.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-07 09:18:22 +00:00