Commit Graph

243 Commits

Author SHA1 Message Date
Ben Skeggs
27a4598737 drm/nouveau/dp: restructure link training code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:10:21 +10:00
Ben Skeggs
a002feceb7 drm/nouveau/dp: pass in required datarate to link training
Not used currently, but it will be used in preference to pre-determined
lane/bandwidth numbers at a later point.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:10:19 +10:00
Ben Skeggs
10b461e40a drm/nv50/backlight: take the sor into account when bashing regs
I'm sure that out there somewhere, someone will need this.  We currently
haven't seen an example of LVDS being on a non-0 SOR so far though.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:56 +10:00
Ben Skeggs
46959b7790 drm/nouveau/dp: remove reliance on vbios for native displayport
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:42 +10:00
Ben Skeggs
4372013388 drm/nouveau/dp: rewrite auxch transaction routines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:03 +10:00
Ben Skeggs
f2cbe46f14 drm/nouveau: determine timing crystal freq from straps
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:08:41 +10:00
Roy Spliet
2228c6fe04 drm/nouveau/pm: Document and expose CL and WR for 0x1002Cx
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20 16:08:28 +10:00
Roy Spliet
9a78248876 drm/nouveau/pm: add initial NV3x/NVCx memtiming support, improve other cards
NV30: Create framework for memtm
NV50: Improve reg creation,
NV50: Use P.version instead of card codename/stepping,
NVC0: Initial memtiming code for Fermi,
Renamed regs for consistency,
Overall redesign to improve readability,
Avoid kfree on null-pointer

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20 16:08:25 +10:00
Ben Skeggs
26f6d88b32 drm/nvd0/disp: very initial evo setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:54 +10:00
Ben Skeggs
02e4f5877d drm/nouveau/bios: allow passing in crtc to the init table parser
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:48 +10:00
Ben Skeggs
d7f8172ca9 drm/nvd0/gpio: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:36 +10:00
Ben Skeggs
03bc9675d3 drm/nouveau: allow modeset module option to select 'headless mode'
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:16 +10:00
Ben Skeggs
048a88595a drm/nouveau: make general drm modesetting init common
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:04 +10:00
Ben Skeggs
2e9733ff7d drm/nvd0: add a card_type for 0xdX chipsets
These are different enough from 0xcX to justify it, half fermi, half
kepler(??)..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:45 +10:00
Ben Skeggs
987eec10dd drm/nouveau: embed nouveau_mm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:56 +10:00
Ben Skeggs
323dcac552 drm/nouveau: rename nv40_mpeg to nv31_mpeg
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:38 +10:00
Ben Skeggs
9698b9a680 drm/nvc0/pm: more complete parsing of clock domains
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:34 +10:00
Ben Skeggs
78e2933d07 drm/nouveau: add function to wait until a callback returns true
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:50 +10:00
Ben Skeggs
4fd2847e9b drm/nva3/pm: parse/reclock vdec/41a0 clocks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:36 +10:00
Ben Skeggs
77e7da6814 drm/nouveau/pm: add hooks to get/set *all* clocks at once
This is probably better than having to tell the common code about all the
clocks that exist on every chipset.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:45 +10:00
Ben Skeggs
03ce8d9e63 drm/nouveau/pm: some fermi chipsets still use volt 0x30
Fun, fun.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:37 +10:00
Ben Skeggs
3b5565ddfd drm/nouveau/pm: add support for parsing perflvl voltage on fermi chips
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:14 +10:00
Ben Skeggs
c3450239c7 drm/nouveau/pm: store voltage in microvolts
Instead of 10s of millivolts, to match fermi vbios.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:02 +10:00
Ben Skeggs
6c320fef58 drm/nouveau: pass flag to engine fini() method on suspend
It may not be necessary to fail in certain cases (such as failing to idle)
on module unload, whereas on suspend it's important to ensure a consistent
state can be restored on resume.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25 09:43:22 +10:00
Ben Skeggs
70ad25ab73 drm/nouveau: replace nv04_graph_fifo_access() use with direct reg bashing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25 09:42:27 +10:00
Emil Velikov
40ce4279e1 drm/nouveau/temp: Fix signed/unsigned int logic
Many (all?) of the coefficients related to calculating the
correct temperature are signed integers

This patch correcly parses and stores those values
It also ensures that the default offset is 0 (previously 1)

Affected cards - the original nv50 and the nv40 family

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:04:39 +10:00
Ben Skeggs
24f246ac10 drm/nouveau: rework vram init/fini ordering a little
Commit "drm/nouveau: add some debug output if nouveau_mm busy at destroy time"
revealed an issue where vram mm takedown would actually fail due to there
still being nodes present, causing nouveau to leak a small amount of memory
on module unload.

This splits TTM/nouveau_mm a bit more cleanly and ensures nouveau_mm fini
isn't done until all gpuobjs are also destroyed.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:03:46 +10:00
Ben Skeggs
2fd3db6f14 drm/nouveau: remove implicit mapping of every bo into chan_vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:42 +10:00
Ben Skeggs
7375c95b34 drm/nouveau: remove 'chan' argument from nouveau_bo_new
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:37 +10:00
Ben Skeggs
3d483d575b drm/nvc0: explicitly map PDISP semaphore buffer into each channel's vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:27 +10:00
Ben Skeggs
d02836b4f5 drm/nv84-nvc0: explicitly map semaphore buffer into channel vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:17 +10:00
Ben Skeggs
ce163f6967 drm/nv50-nvc0: explicitly map pushbuf bo into channel vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:09 +10:00
Ben Skeggs
0b7187335f drm/nv50-nvc0: explicitly map notifier bo into channel vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:04 +10:00
Ben Skeggs
fd2871af3d drm/nouveau: initial changes to support multiple VMAs per buffer object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:53 +10:00
Ben Skeggs
d2f96666c5 drm/nouveau: create temp vmas for both src and dst of bo moves
Greatly simplifies a number of things, particularly once per-client GPU
address spaces are involved.

May add this back later once I know what things'll look like.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:34 +10:00
Ben Skeggs
f91bac5bf6 drm/nouveau: store bo's page size in nouveau_bo
Was previously assuming a page size of 4KiB unless a VMA was present to
override it.  Eventually, a buffer won't necessarily have a VMA at all at
some stages of its life, so we need to store this info elsewhere.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:27 +10:00
Ben Skeggs
6e32fedc8b drm/nouveau: will need to specify channel for vm-ful gpuobj allocations
Abuses existing gpuobj_new() chan argument for this, which in turn forces
all NVOBJ_FLAG_VM allocations to be done from the global heap, not
suballocated from the channel's private heap.  Not a problem though in
practise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:18 +10:00
Ben Skeggs
639212d011 drm/nouveau/gem: implement stub hooks for GEM object open/close
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:02 +10:00
Ben Skeggs
f6d4e62145 drm/nouveau: remove 'chan' argument from nouveau_gem_new
Userspace hasn't passed us a channel_hint for a long long time now, and
there isn't actually a need to do so anymore anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:56 +10:00
Ben Skeggs
fe32b16e79 drm/nv50-nvc0/vm: take client reference on shared channel vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:46 +10:00
Ben Skeggs
e8a863c10f drm/nouveau: store a per-client channel list
Removes the need to disable IRQs to lookup channel struct on every pushbuf
ioctl, among others.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:25 +10:00
Ben Skeggs
3f0a68d8f8 drm/nouveau: allocate structure to store per-client data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:15 +10:00
Ben Skeggs
0411de8548 drm/nvc0/gr: import and use our own fuc by default
The ability to use NVIDIA's fuc has been retained *temporarily* in order
to better debug any issues that may be lingering in our initial attempt
at writing this ucode.  Once I'm fairly confident we're okay, it'll be
removed.

There's a number of things not implemented by this fuc currently, but
most of it is sets of state that our context setup would not have used
anyway.  No doubt we'll find out what they're for at some point, and
implement it if required.

This has been tested on 0xc0/0xc4 thus far, and from what I could tell
it worked as well as NVIDIA's.  It's also been tested on 0xc1, but even
with NVIDIA's fuc that chipset doesn't work correctly with nouveau yet.

0xc3/0xc8/0xce should in theory be supported too, but I don't have the
hardware to check that.

There's no doubt numerous bugs to squash yet, please report any!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:57:38 +10:00
Ben Skeggs
f8522fc80f drm/nvc0: fix suspend/resume of PGRAPH/PCOPYn
We need the physical VRAM address in vinst, even for objects mapped into
a vm, as the gpuobj suspend/resume code uses PMEM to access the object.

Previously, vinst was overloaded to mean "VRAM address" for !VM objects,
and "VM address" for VM objects, causing the wrong data to be accessed
during suspend/resume.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:57:33 +10:00
Ben Skeggs
aba99a8400 drm/nouveau: default to noaccel on 0xc1/0xc8/0xce for now
Until we know these should work properly, would much rather default to
noaccel than risk giving people corruption/hangs out of the box..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:57:28 +10:00
Ben Skeggs
52eba8dd5e drm/nva3/clk: better pll calculation when no fractional fb div available
The core/mem/shader clocks don't support the fractional feedback divider,
causing our calculated clocks to be off by quite a lot in some cases.  To
solve this we will switch to a search-based algorithm when fN is NULL.

For my NVA8 at PL3, this actually generates identical cooefficients to
the binary driver.  Hopefully that's a good sign, and that does not
break VPLL calculation for someone..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:59 +10:00
Ben Skeggs
047d2df54c drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:47 +10:00
Martin Peres
e614b2e7ca drm/nouveau: Associate memtimings with performance levels on cards <= nv98
v2 (Ben Skeggs): fix ramcfg strap, and remove bogus handling of perf 0x40

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:30 +10:00
Ben Skeggs
93187450fa drm/nv50: rename nv84_mpeg to nv50_mpeg
In preparation for adding 0x50 support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:04 +10:00
Ben Skeggs
c0924326c8 drm/nv84: add support for PMPEG
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:59 +10:00