Commit Graph

191 Commits

Author SHA1 Message Date
Felipe Balbi
bfad65ee9b usb: dwc3: update documentation
No functional changes, just making sure we can use these for ReST docs
later.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-06-02 11:22:27 +03:00
William Wu
65db7a0c98 usb: dwc3: add disable u2mac linestate check quirk
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.

When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).

On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-05-17 14:16:57 +03:00
Roger Quadros
9840354ff4 usb: dwc3: Add dual-role support
If dr_mode is "otg" then support dual role mode of operation.
Currently this mode is only supported when an extcon handle is
present in the dwc3 device tree node. This is needed to
get the ID status events of the port.

We're using a workqueue to manage the dual-role state transitions
as the extcon notifier (dwc3_drd_notifier) is called in an atomic
context by extcon_sync() and this doesn't go well with
usb_del_gadget_udc() causing a lockdep and softirq warning.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:31 +03:00
Roger Quadros
41ce1456e1 usb: dwc3: core: make dwc3_set_mode() work properly
We can't have both Host and Peripheral roles active at the same time
because of one detail on DWC3: it shares the same memory area for both
Host and Peripheral registers.

When swapping roles we must reinitialize the new role every
time. Let's make sure this works for our debugfs interface.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:30 +03:00
Roger Quadros
6b3261a274 usb: dwc3: core: add current_dr_role member
We're going to use this member to track which role we're currently
playing, that way we can more easily implement dual-role swap in
upcoming patches.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:30 +03:00
Felipe Balbi
d6e5a549cc usb: dwc3: simplify ZLP handling
It's much simpler to just add one extra TRB chained to previous TRB to
handle ZLP. This helps us reduce pointless allocations and simplifies
the code a little bit.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:29 +03:00
Felipe Balbi
4199c5f8bc usb: dwc3: ep0: improve handling of unaligned OUT requests
Just like we did for all other endpoint types, let's rely on a chained
TRB pointing to ep0_bounce_addr in order to align transfer size. This
will make the code simpler.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:28 +03:00
Felipe Balbi
7d5e650a5f usb: dwc3: ep0: use immediate SETUP on TRB
If we pass TRB's own address on bpl/bph fields, we can get our SETUP
packet as immediate data on the TRB itself, without having to allocate
extra memory for it.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:28 +03:00
Roger Quadros
ff3f0789b3 usb: dwc3: use BIT() macro where possible
To avoid checkpatch warnings with new patches let's
start using the BIT() macro wherever possible.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:23 +03:00
Bryan O'Donoghue
47d3946ea2 usb: dwc3: refactor gadget endpoint count calculation
- DWC_USB3_NUM indicates the number of Device mode single directional
  endpoints, including OUT and IN endpoint 0.

- DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
  endpoints active at any time, including control endpoint 0.

It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
DWC_USB3_NUM_IN_EPS.

dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
endpoints as zero.

For example a from dwc3_core_num_eps() shows:
[    1.565000]  /usb0@f01d0000: found 8 IN and 0 OUT endpoints

This patch refactors the endpoint calculation down to one variable
dwc->num_eps taking care to maintain the current mapping of endpoints for
fixed FPGA configurations as described in Table 4-7 of version 2.60a of the
DWC USB3 databook.

The endpoint mapping will then be EP-OUT, EP-IN etc, up to DWC_USB3_NUM.
If DWC_USB3_NUM is odd then OUT will take the extra endpoint.

Suggested-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:18 +03:00
Roger Quadros
8261bd4e91 usb: dwc3: make macros safe to expression arguments
We must make sure that our macros are safe against expressions passed
as arguments. We have seen one problem where GTXFIFOSIZ(n) was failing
when passed the expression (epnum >> 1) as argument. The problem was
caused by operator precedence between >> and *.

To make sure macros are safe, we just wrap argument with () when using
it.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:18 +03:00
Felipe Balbi
1966b8657d usb: dwc3: make sure UX_EXIT_PX is cleared
This bit is only supposed to be used with known
buggy PHYs, however some platforms might erroneously
set it. In order to avoid it, let's make sure this
bit is always cleared. If some PHY needs this, we
will need to add a quirk flag.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-03-27 10:46:33 +03:00
Felipe Balbi
c6267a5163 usb: dwc3: gadget: align transfers to wMaxPacketSize
Instead of passing quirk_ep_out_aligned_size, we can use one extra TRB
to align transfer to wMaxPacketSize.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-24 11:04:13 +02:00
Felipe Balbi
905dc04ea7 usb: dwc3: gadget: allocate bounce buffer for unaligned xfers
Allocate a coherent buffer of 1024 bytes (size of a single superspeed
bulk packet) to serve as bounce buffer for an extra TRB needed to align
transfers to wMaxPacketSize.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-24 11:04:12 +02:00
Roger Quadros
9418ee15f7 usb: dwc3: gadget: Fix full speed mode
DCFG.DEVSPD == 0x3 is not valid and we need to set
DCFG.DEVSPD to 0x1 for full speed mode. Same goes for
DSTS.CONNECTSPD.

Old databooks had 0x3 for full speed in 48MHz mode for
USB1.1 transceivers which was never supported. Newer databooks
don't mention 0x3 at all.

Cc: John Youn <John.Youn@synopsys.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-03 14:33:48 +02:00
Felipe Balbi
e71d363d9c usb: dwc3: core: avoid Overflow events
Now that we're handling so many transfers at a time
and for some dwc3 revisions LPM events *must* be
enabled, we can fall into a situation where too many
events fire and we start receiving Overflow events.

Let's do what XHCI does and allocate a full page for
the Event Ring, this will avoid any future issues.

Cc: <stable@vger.kernel.org> # v4.9
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-02 10:55:28 +02:00
Arnd Bergmann
d64ff406e5 usb: dwc3: use bus->sysdev for DMA configuration
The dma ops for dwc3 devices are not set properly. So, use a
physical device sysdev, which will be inherited from parent,
to set the hardware / firmware parameters like dma.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:54 +02:00
John Youn
cf40b86b6e usb: dwc3: Implement interrupt moderation
Implement interrupt moderation which allows the interrupt rate to be
throttled. To enable this feature the dwc->imod_interval must be set to
1 or greater. This value specifies the minimum inter-interrupt interval,
in 250 ns increments. A value of 0 disables interrupt moderation.

This applies for DWC_usb3 version 3.00a and higher and for DWC_usb31
version 1.20a and higher.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:51 +02:00
John Youn
d9fa4c63f7 usb: dwc3: core: add a event buffer cache
This extra buffer will be used so we can copy
triggered events from our event buffer to this cache
and process all of them later in bottom half
handler.

We need this in order to implement a workaround for
a known erratum in recent DWC3 release.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:42 +02:00
John Youn
a987a906e9 usb: dwc3: Add a check for the DWC_usb3 core
Add a helper function to check if we are running on a DWC_usb3 core.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:20 +02:00
John Youn
39ebb05ca8 usb: dwc3: gadget: Remove descriptor arguments to ep_enable
The __dwc3_gadget_endpoint_enable() function has access to the endpoint
descriptors via the usb_ep. So we don't need to pass them in as
arguments. The descriptors should be set by the caller prior to calling
usb_ep_enable().

Signed-off-by: John Youn <johnyoun@synopsys.com>

[felipe.balbi@linux.intel.com : minor improvements]

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:16 +02:00
Felipe Balbi
e62c5bc573 usb: dwc3: gadget: tracking per-TRB remaining bytes
This will give us a simpler way of figuring out how
many bytes were left in each TRB. It's useful for
cases where we queue only part of an SG-list due to
amount of available TRBs at the time of kicking the
transfer.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:40 +02:00
Felipe Balbi
6cb2e4e3de usb: dwc3: gadget: cope with XferNotReady before usb_ep_queue()
If XferNotReady comes before usb_ep_queue() we will
set our PENDING request flag and wait for a
request. However, originally, we were assuming
usb_ep_queue() would always happen before our first
XferNotReady and that causes a corner case where we
could try to issue ENDTRANSFER command before
STARTTRANSFER.

Let's fix that by tracking endpoints which have been
started.

Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:40 +02:00
Baolin Wang
76a638f8ac usb: dwc3: gadget: wait for End Transfer to complete
Instead of just delaying for 100us, we should
actually wait for End Transfer Command Complete
interrupt before moving on. Note that this should
only be done if we're dealing with one of the core
revisions that actually require the interrupt before
moving on.

[ felipe.balbi@linux.intel.com: minor improvements ]

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:39 +02:00
Baolin Wang
bb01473648 usb: dwc3: gadget: don't clear RUN/STOP when it's invalid to do so
When we change the USB function with configfs dynamically, we possibly
met this situation: one core is doing the control transfer, another core
is trying to unregister the USB gadget from userspace, we must wait for
completing this control tranfer, or it will hang the controller to set
the DEVCTRLHLT flag.

[ felipe.balbi@linux.intel.com: several fixes to the patch
	- call complete() before starting following SETUP transfer
	- add a macro for ep0_in_setup's timeout
	- change commit subject slightly
	- break lines at 72 characters (git adds an 8-character tab)
	- avoid changes to dwc3_gadget_run_stop() ]

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:35 +02:00
John Youn
0bb39ca1ad usb: dwc3: Add support for device L1 exit
For the usb31 IP and from version 2.90a of the usb3 IP, the core
supports HW exit from L1 in HS. Enable it, otherwise the controller may
never exit from LPM to do a transfer.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:33 +02:00
Lu Baolu
f9d2f9228c usb: dwc3: remove unused struct member dwc3->mem
Member @mem in struct dwc3 is not used in any places. Clean up it.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:33 +02:00
Felipe Balbi
b9bd138e06 usb: dwc3: gadget: remove unused 'first_trb_index'
Recent changes have turned this field obsolete. Remove it.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:31 +02:00
Felipe Balbi
45a2af2f2b usb: dwc3: debug: decode control endpoint phase too
DWC3 can tell us which phase of a setup transfer
we're getting into. Let's decode it from the event
to make it easier to debug.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-10-31 11:15:36 +02:00
Felipe Balbi
5999914f22 usb: dwc3: gadget: properly check ep cmd
The cmd argument we pass to
dwc3_send_gadget_ep_cmd() could contain extra
arguments embedded. When checking for StartTransfer
command, we need to make sure to match only lower 4
bits which contain the actual command and ignore the
rest.

Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-10-31 11:15:34 +02:00
Thinh Nguyen
9d6173e125 usb: dwc3: Fix dr_mode validation
This patch follows the similar fix in dwc2. See
commit 5268ed9d2e ("usb: dwc2: Fix dr_mode validation")

Currently, the dr_mode is only checked against the module configuration.
It also needs to be checked against the hardware capablities.

The driver now checks if both the module configuration and hardware are
capable of the dr_mode value. If not, then it will issue a warning and
fall back to a supported value. If it is unable to fall back to a
suitable value, then the probe will fail.

Behavior summary:

      module          :  actual
 HW   config  dr_mode :  dr_mode
---------------------------------
 host  host   any     :  host
 host  dev    any     :  INVALID
 host  otg    any     :  host

 dev   host   any     :  INVALID
 dev   dev    any     :  dev
 dev   otg    any     :  dev

 otg   host   any     :  host
 otg   dev    any     :  dev
 otg   otg    any     :  dr_mode

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-09-07 13:29:20 +03:00
John Youn
06281d460f usb: dwc3: Add ENDXFER command polling
ENDXFER polling is available on version 3.10a and later of the
DWC_usb3 (USB 3.0) controller. With this feature, the software can poll
the CMDACT bit in the DEPCMD register after issuing an ENDXFER command.
This feature is enabled by writing GUCTL2[14].

This feature is NOT available on the DWC_usb31 (USB 3.1) IP.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:19 +03:00
John Youn
512e47572f usb: dwc3: Add revision numbers for the USB 3.0 IP
Add revision number constants for the 3.00a and 3.10a releases.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:18 +03:00
William Wu
00fe081dc3 usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
William Wu
32f2ed864d usb: dwc3: make usb2 phy utmi interface configurable
Support to configure the UTMI+ PHY with an 8- or 16-bit
interface via DT. The UTMI+ PHY interface is a hardware
capability, and it's platform dependent. Normally, the
PHYIF can be configured during coreconsultant.

But for some specific USB cores(e.g. rk3399 SoC DWC3),
the default PHYIF configuration value is false, so we
need to reconfigure it by software.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
William Wu
16199f3389 usb: dwc3: add dis_u2_freeclk_exists_quirk
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
Felipe Balbi
0b3e4af3c7 usb: dwc3: gadget: add sg and num_pending_sgs to dwc3_request
These two fields will be used in a follow-up patch
to track how many entries of request's sglist we
have already processed. The reason is that if a
gadget driver sends an sglist with more entries then
we can fit in the ring, we will have to continue
processing remaining afterwards.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-22 10:45:37 +03:00
Felipe Balbi
68d34c8a74 usb: dwc3: gadget: keep track of allocated and queued reqs
We will be using this information to change how we
figure out when we need LST bit. For now, just
update our counters.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:49 +03:00
William Wu
475c8beb35 usb: dwc3: add DWC3_GUCTL1 reg for debug
GUCTL1 reg has some useful functions which can be
written by user. For rockchip platform, we set
GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK (bit26, applicable
for the core is programmed to operate in 2.0 device
only) to 1 in bootrom, and after start the kernel,
we want to check whether this bit can be reset to
default 0 after the core reset. Dump GUCTL1 reg from
debugfs is more convenient for us.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:46 +03:00
John Youn
e77c561432 usb: dwc3: Fix DWC3_USB31_REVISION_110A definition
The DWC3_USB31_REVISION_110A macro uses an invalid constant name in its
definition. This is currently not used.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:46 +03:00
Felipe Balbi
74674cbf85 usb: dwc3: gadget: add a per-endpoint request queue lock
This will allow us to process several endpoints at a
time by making sure that we lock only shared
resources.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:38 +03:00
Felipe Balbi
fc8bb91bc8 usb: dwc3: implement runtime PM
this patch implements the most basic pm_runtime
support for dwc3. Whenever USB cable is dettached,
then we will allow core to runtime_suspend.

Runtime suspending will involve completely tearing
down event buffers and require a full soft-reset of
the IP.

Note that a further optimization could be
implemented once we decide to support hibernation,
which is to allow runtime_suspend with cable
connected when bus is in U3. That's subject to a
separate patch, however.

Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:38 +03:00
Felipe Balbi
3f308d17d7 usb: dwc3: gadget: hold gadget IRQ in dwc->irq_gadget
by holding gadget's IRQ number in dwc->irq_gadget,
it'll be simpler to free_irq() and disable the IRQ
in case an IRQ fires while we are runtime suspended.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:36 +03:00
Felipe Balbi
51f5d49ad6 usb: dwc3: core: simplify suspend/resume operations
now that we have re-factored dwc3_core_init() and
dwc3_core_exit() we can use them for suspend/resume
operations.

This will help us avoid some common mistakes when
patching code when we have duplicated pieces of code
doing the same thing.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:36 +03:00
Felipe Balbi
bcdb3272e8 usb: dwc3: core: move fladj to dwc3 structure
this patch is in preparation for some further
re-factoring in dwc3 initialization. No functional
changes.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:35 +03:00
Felipe Balbi
2eb8801650 usb: dwc3: gadget: add a pointer to endpoint registers
By adding a pointer to endpoint registers' base
address, we can avoid using our controller-wide
struct dwc3 pointer for everything. At some point
this will allow us to have per-endpoint locks which
will, in turn, let us queue requests to separate
endpoints in parallel.

Because of this change our debugfs interface and io
accessors need to be changed accordingly.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:35 +03:00
Felipe Balbi
2cd4718d0b usb: dwc3: gadget: pass dep as argument to endpoint command
In all call sites of dwc3_send_gadget_ep_cmd() we
already had a valid dep pointer, so instead of
passing dwc and dep->number, which would be used to
fetch the same pointer we already had, just pass dep
directly.

In other words, we're changing:

	struct dwc3_ep *dep = dwc[dep->number];

to just passing struct dwc3_ep *dep as argument.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:31 +03:00
Felipe Balbi
4e99472bc1 usb: dwc3: gadget: initialize NUMP based on RxFIFO Size
Instead of using burst size to configure NUMP, we
should be using RxFIFO Size instead. DWC3 is smart
enough to know that it shouldn't burst in case burst
size is 0.

Reported-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:30:07 +03:00
Felipe Balbi
9f8a67b65a usb: dwc3: gadget: fix gadget suspend/resume
Instead of trying hard to stay connected to the
host, it's best (and far easier) to disconnect from
the host already.

Anything relying on KEEP_CONNECT will just have that
ignored, but we don't have proper hibernation
implementation yet, so there are no regressions.

In any case, hibernation is only useful for runtime
PM, not system sleep.

While at that, also remove dwc3.dcfg which has been
rendered unnecessary.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:30:04 +03:00
John Youn
50c763f8c1 usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command
As of core revision 2.60a the recommended programming model is to set
the ClearPendIN bit when issuing a Clear Stall EP command for IN
endpoints. This is to prevent an issue where some (non-compliant) hosts
may not send ACK TPs for pending IN transfers due to a mishandled error
condition. Synopsys STAR 9000614252.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-01 09:53:42 +03:00