Commit Graph

12 Commits

Author SHA1 Message Date
Young-Gun Jang
9a8b607972 pinctrl: exynos: add exynos5260 SoC specific data
Adds pinctrl support for all platforms based on EXYNOS5260 SoC.

Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Young-Gun Jang <yg1004.jang@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-11 09:35:19 +01:00
Mateusz Krawczuk
608a26a7bc pinctrl: Add s5pv210 support to pinctrl-exynos
This patch implements pinctrl support and adds device tree bindings
for s5pv210.

Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28 15:56:06 +02:00
Linus Torvalds
42daabf62b ARM SoC late changes
These are changes that arrived a little late before the merge
 window or that have multiple dependencies on previous branches
 so they did not fit into one of the earlier ones. There
 are 10 branches merged here, a total of 39 non-merge commits.
 Contents are a mixed bag for the above reasons:
 
 * Two new SoC platforms: ST microelectronics stixxxx and
   the TI 'Nspire' graphing calculator. These should have
   been in the 'soc' branch but were a little late
 * Support for the Exynos 5420 variant in mach-exynos,
   which is based on the other exynos branches to avoid
   conflicts.
 * Various small changes for sh-mobile, ux500 and davinci
 * Common clk support for MSM
 
 Conflicts:
 * In Kconfig.debug, various additions trivially conflict,
   the list should be kept in alphabetical order when
   resolving.
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Merge tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late changes from Arnd Bergmann:
 "These are changes that arrived a little late before the merge window
  or that have multiple dependencies on previous branches so they did
  not fit into one of the earlier ones.  There are 10 branches merged
  here, a total of 39 non-merge commits.  Contents are a mixed bag for
  the above reasons:

   * Two new SoC platforms: ST microelectronics stixxxx and the TI
     'Nspire' graphing calculator.  These should have been in the 'soc'
     branch but were a little late
   * Support for the Exynos 5420 variant in mach-exynos, which is based
     on the other exynos branches to avoid conflicts.
   * Various small changes for sh-mobile, ux500 and davinci
   * Common clk support for MSM"

* tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  ARM: ux500: bail out on alien cpus
  ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins
  serial: sh-sci: Initialise variables before access in sci_set_termios()
  ARM: stih41x: Add B2020 board support
  ARM: stih41x: Add B2000 board support
  ARM: sti: Add DEBUG_LL console support
  ARM: sti: Add STiH416 SOC support
  ARM: sti: Add STiH415 SOC support
  ARM: msm: Migrate to common clock framework
  ARM: msm: Make proc_comm clock control into a platform driver
  ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
  ARM: msm: Remove clock-7x30.h include file
  ARM: msm: Remove custom clk_set_{max,min}_rate() API
  ARM: msm: Remove custom clk_set_flags() API
  msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
  msm: iommu: Convert to clk_prepare/unprepare
  msm_sdcc: Convert to clk_prepare/unprepare
  usb: otg: msm: Convert to clk_prepare/unprepare
  msm_serial: Use devm_clk_get() and properly return errors
  msm_serial: Convert to clk_prepare/unprepare
  ...
2013-07-02 14:42:51 -07:00
Arnd Bergmann
efe20b421f Merge branches 'samsung/exynos-dt2' and 'samsung/s3c24xx-dt2' into next/drivers
This is the merge base for samsung/common-clk-audio

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 22:27:21 +02:00
Leela Krishna Amudala
983dbeb35f pinctrl: exynos: add exynos5420 SoC specific data
Add Samsung EXYNOS5420 SoC specific data to enable pinctrl
support for all platforms based on EXYNOS5420.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by : Sunil Joshi <joshi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 22:19:08 +09:00
Leela Krishna Amudala
c91f2a03cf Documentation: Add examples to samsung-pinctrl device tree bindings documentation
This patch adds examples to samsung-pinctrl.txt documentaion file
on how to make gpio binding and gpio request

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18 06:58:48 +09:00
Heiko Stuebner
af99a75074 pinctrl: Add pinctrl-s3c24xx driver
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.

The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller instead. We solve this by forwarding the external
interrupt from the main controller into the irq domain of the pin bank.
The masking/acking of these interrupts is handled in the same way.

Furthermore the S3C2412/2413 SoCs contain another oddity in that they
keep the same 4 eints in the main interrupt controller and eintpend
register and requiring ack operations to happen in both. This is solved
by using different compatible properties for the wakeup eint node which
set a property accordingly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-05-21 00:56:13 +09:00
Tomasz Figa
61dd726131 pinctrl: Add pinctrl-s3c64xx driver
This patch adds pinctrl-s3c64xx driver which implements pin control
interface for Samsung S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:45:10 +02:00
Kukjin Kim
b533c8685b ARM: dts: fix compatible value for exynos pinctrl
Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.

Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-01-28 14:27:50 -08:00
Tomasz Figa
6edc794a5f pinctrl: samsung: Add support for EXYNOS4X12
This patch extends the driver with any necessary SoC-specific
definitions to support EXYNOS4X12 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-19 10:02:07 +09:00
Tomasz Figa
b33ef91f4b Documentation: Update samsung-pinctrl device tree bindings documentation
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:13 +02:00
Thomas Abraham
30574f0db1 pinctrl: add samsung pinctrl and gpiolib driver
Add a new device tree enabled pinctrl and gpiolib driver for Samsung
SoC's. This driver provides a common and extensible framework for all
Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
driver supports only device tree based instantiation and hence can be
used only on those Samsung platforms that have device tree enabled.

This driver is split into two parts: the pinctrl interface and the gpiolib
interface. The pinctrl interface registers pinctrl devices with the pinctrl
subsystem and gpiolib interface registers gpio chips with the gpiolib
subsystem. The information about the pins, pin groups, pin functions and
gpio chips, which are SoC specific, are parsed from device tree node.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07 06:07:19 +09:00