Commit Graph

18 Commits

Author SHA1 Message Date
Andy Shevchenko
6323f91668 pinctrl: microchip-sgpio: Correct the fwnode_irq_get() return value check
fwnode_irq_get() may return all possible signed values, such as Linux
error code. Fix the code to handle this properly.

Fixes: be2dc859ab ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220906115021.8661-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-08 10:34:27 +02:00
Andy Shevchenko
85437018eb pinctrl: microchip-sgpio: Switch to use fwnode instead of of_node
GPIO library now accepts fwnode as a firmware node, so
switch the driver to use it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220503151517.59115-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-09 13:47:49 +02:00
Michael Walle
646e321f33 pinctrl: microchip-sgpio: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

[    4.967050] gpio gpiochip1: (e2004190.gpio-input): not an immutable chip, please consider fixing it!

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220428111622.1395831-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-05 16:53:25 +02:00
Linus Torvalds
ff61bc81b3 Pin control bulk changes for the v5.18 kernel cycle
No core changes this time. Just new driver code and improvements!
 
 New drivers:
 
 - New driver for the Broadcom BCM4908 SoC.
 
 - New subdriver for Tesla FSD (Full Self Driving) SoC, a
   derivative of the Samsung Exynos pin control driver.
 
 - New driver for the Amlogic Meson S4 SoC.
 
 - New driver for the Sunplus SP7021 SoC.
 
 - New driver for the Microsemi Ocelot family ServalT SoC.
 
 - New subdriver for Intel Alder Lake-M SoC.
 
 - New subdriver for Intel Ice Lake-N SoC, including PCH support.
 
 - New subdriver for Renesas R8A779F0 SoC.
 
 - New subdriver for Mediatek MT8186 SoC.
 
 - New subdriver for NXP Freescale i.MX93 SoC.
 
 - New driver for Nuvoton WPCM450 SoC.
 
 - New driver for Qualcomm SC8280XP SoC.
 
 Improvements:
 
 - Wakeup support on Samsung Exynos850 and ExynosAutov9.
 
 - Serious and voluminous maintenance cleanup and refactoring in
   the Renesas drivers. Mainly sharing similar data between the
   different SoC subdrivers.
 
 - Qualcomm SM8450 EGPIO support.
 
 - Drive strength support on the Mediatek MT8195.
 
 - Add some missing groups and functions to the Ralink RT2880.
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Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time. Just new driver code and improvements!

  New drivers:

   - New driver for the Broadcom BCM4908 SoC.

   - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
     of the Samsung Exynos pin control driver.

   - New driver for the Amlogic Meson S4 SoC.

   - New driver for the Sunplus SP7021 SoC.

   - New driver for the Microsemi Ocelot family ServalT SoC.

   - New subdriver for Intel Alder Lake-M SoC.

   - New subdriver for Intel Ice Lake-N SoC, including PCH support.

   - New subdriver for Renesas R8A779F0 SoC.

   - New subdriver for Mediatek MT8186 SoC.

   - New subdriver for NXP Freescale i.MX93 SoC.

   - New driver for Nuvoton WPCM450 SoC.

   - New driver for Qualcomm SC8280XP SoC.

  Improvements:

   - Wakeup support on Samsung Exynos850 and ExynosAutov9.

   - Serious and voluminous maintenance cleanup and refactoring in the
     Renesas drivers. Mainly sharing similar data between the different
     SoC subdrivers.

   - Qualcomm SM8450 EGPIO support.

   - Drive strength support on the Mediatek MT8195.

   - Add some missing groups and functions to the Ralink RT2880"

* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
  pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
  pinctrl: nuvoton: wpcm450: Fix build error without OF
  pinctrl: qcom-pmic-gpio: Add support for pm8450
  dt-bindings: pinctrl: aspeed: Update gfx node in example
  dt-bindings: pinctrl: rt2880: add missing pin groups and functions
  pinctrl: ingenic: Fix regmap on X series SoCs
  pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
  pinctrl: nuvoton: Fix sparse warning
  pinctrl: mediatek: mt8186: Account for probe refactoring
  pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
  pinctrl: mediatek: common-v1: Commonize spec_pupd callback
  pinctrl: mediatek: common-v1: Use common probe function
  pinctrl: mediatek: common-v1: Add common probe function
  pinctrl: mediatek: paris: Unify probe function by using OF match data
  pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
  pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
  pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
  pinctrl: qcom: Introduce sc8280xp TLMM driver
  ...
2022-03-28 11:52:53 -07:00
Michael Walle
1f3c85c22d pinctrl: microchip-sgpio: wait until output is actually set
Right now, when a gpio value is set, the actual hardware pin gets set
asynchronously. When linux write the output register, it takes some time
until it is actually propagated to the output shift registers. If that
output port is connected to an I2C mux for example, the linux driver
assumes the I2C bus is already switched although it is not.

Fortunately, there is a single shot mode with a feedback: you can
trigger the single shot and the hardware will clear that bit once it has
finished the clocking and strobed the load signal of the shift
registers. This can take a considerable amount of time though.
Measuremens have shown that it takes up to a whole burst cycle gap which
is about 50ms on the largest setting. Therefore, we have to mark the
output bank as sleepable. To avoid unnecessary waiting, just trigger the
single shot if the value was actually changed.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220226204507.2511633-6-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:55:59 +01:00
Michael Walle
2560c68199 pinctrl: microchip-sgpio: return error in spgio_output_set()
Make sgpio_output_set() return an error value. Don't just ignore the
return value of any regmap access but propagate it to our callers. Even
if the accesses never fail, this is a preparation patch to add single
shot mode where we need to poll a bit and thus we might get -ETIMEDOUT.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220226204507.2511633-5-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:55:58 +01:00
Michael Walle
0e68328edb pinctrl: microchip-sgpio: use regmap_update_bits()
Convert sgpio_clrsetbits() to use regmap_update_bits() and drop the
spinlocks because regmap already takes care of the locking.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220226204507.2511633-4-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:55:58 +01:00
Michael Walle
cd8c48b4ef pinctrl: microchip-sgpio: don't do RMW for interrupt ack register
The interrupt ack register has the usual "write one to clear" semantics.
No read-modify-write is required here.

This is also a preparation patch to change the sgpio_clrsetbits() to use
regmap_update_bits() which don't write the value if it is not changed.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220226204507.2511633-3-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:55:58 +01:00
Michael Walle
7996c5f5ec pinctrl: microchip-sgpio: lock RMW access
Protect any RMW access to the registers by a spinlock.

Fixes: 7e5ea974e6 ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220226204507.2511633-2-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:55:58 +01:00
Horatiu Vultur
baf927a833 pinctrl: microchip-sgpio: Fix support for regmap
Initially the driver accessed the registers using u32 __iomem but then
in the blamed commit it changed it to use regmap. The problem is that now
the offset of the registers is not calculated anymore at word offset but
at byte offset. Therefore make sure to multiply the offset with word size.

Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Colin Foster <colin.foster@in-advantage.com>
Fixes: 2afbbab45c ("pinctrl: microchip-sgpio: update to support regmap")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220131085201.307031-1-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-31 12:07:31 +01:00
Colin Foster
2afbbab45c pinctrl: microchip-sgpio: update to support regmap
Adopt regmap instead of a direct memory map so that custom regmaps and
other interfaces can be supported.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
Link: https://lore.kernel.org/r/20211119195928.2498441-5-colin.foster@in-advantage.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-22 01:07:02 +01:00
Horatiu Vultur
0b90315af7 pinctrl: microchip sgpio: use reset driver
On lan966x platform when the switch gets reseted then also the sgpio
gets reseted. The fix for this is to extend also the sgpio driver to
call the reset driver which will be reseted only once by the first
driver that is probed.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20211018085754.1066056-3-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-24 23:03:26 +02:00
Marc Zyngier
a9cb09b7be pinctrl: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-08-12 11:39:39 +01:00
Andy Shevchenko
76b7f8fae3 pinctrl: microchip-sgpio: Put fwnode in error case during ->probe()
device_for_each_child_node() bumps a reference counting of a returned variable.
We have to balance it whenever we return to the caller.

Fixes: 7e5ea974e6 ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO")
Cc: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20210606191940.29312-1-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-18 11:17:47 +02:00
Lars Povlsen
5d5f291927 pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger
This patch fixes using a wrong register offset when configuring an IRQ
trigger type.

Fixes: be2dc859ab ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
Reported-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20210203123825.611576-1-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-10 14:41:24 +01:00
Lars Povlsen
be2dc859ab pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
This adds 'interrupt-controller' features for the signals available on
the Microchip SGPIO controller, however only for controller versions
on the Sparx5 platform (or later).

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20201209142753.683208-2-lars.povlsen@microchip.com
[Select GPIOLIB_IRQCHIP in Kconfig]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-11 23:48:52 +01:00
Zou Wei
d05b769190 pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
Fix the following sparse warnings:

drivers/pinctrl/pinctrl-microchip-sgpio.c:63:31: warning: symbol 'properties_luton' was not declared. Should it be static?
drivers/pinctrl/pinctrl-microchip-sgpio.c:68:31: warning: symbol 'properties_ocelot' was not declared. Should it be static?
drivers/pinctrl/pinctrl-microchip-sgpio.c:73:31: warning: symbol 'properties_sparx5' was not declared. Should it be static?

Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1606218173-3722-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-04 09:55:58 +01:00
Lars Povlsen
7e5ea974e6 pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO
(SGPIO) device used in various SoC's.

The driver is added as a pinctrl driver, albeit only having just GPIO
support currently. The hardware supports other functions that will be
added following.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20201113145151.68900-3-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-02 00:09:48 +01:00