Commit Graph

782 Commits

Author SHA1 Message Date
Adam Jackson
149c36a346 drm/i915: Be extra careful about A/D matching for multifunction SDVO
If we're both RGB and TMDS capable, we'll have set up one connector for
each.  When determining connectivity, require analog/digital state in
the EDID block to match analog/digital support in the connector.
Otherwise, both DVI and VGA will appear to be connected.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-10 13:38:30 -07:00
Adam Jackson
b1083333de drm/i915: Fix DDC bus selection for multifunction SDVO
Multifunction SDVO cards stopped working after 14571b4, and would report
something that looked remarkably like an ADD2 SPD ROM instead of EDID.
This appears to be because DDC bus selection was utterly horked by that
commit; controlled_output was no longer always a single bit, so
intel_sdvo_select_ddc_bus would pick bus 0, which is (unsurprisingly)
the SPD ROM bus, not a DDC bus.

So, instead of that, let's just use the DDC bus the child device table
tells us to use.  I'm guessing at the bitmask and shifting from VBIOS
dumps, but it can't possibly be worse.

cf. https://bugzilla.redhat.com/584229

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-10 13:38:28 -07:00
Eric Anholt
34dc4d4423 Merge remote branch 'origin/master' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/radeon/r300.c

The BSD ringbuffer support that is landing in this branch
significantly conflicts with the Ironlake PIPE_CONTROL fix on master,
and requires it to be tested successfully anyway.
2010-05-10 13:36:52 -07:00
Jesse Barnes
3d8620cc5f drm/i915: cleanup mode setting before unmapping registers
We'll turn off outputs etc at unload time, so don't unmap the registers
before doing it.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-07 13:59:30 -07:00
Adam Jackson
ee5382aedf drm/i915: Make fbc control wrapper functions
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-07 13:59:29 -07:00
Chris Wilson
1637ef413b drm/i915: Wait for the GPU whilst shrinking, if truly desperate.
By idling the GPU and discarding everything we can when under extreme
memory pressure, the number of OOM-killer events is dramatically
reduced. For instance, this makes it possible to run
firefox-planet-gnome.trace again on my swapless 512MiB i915.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-07 13:59:28 -07:00
Adam Jackson
0a31a44865 drm/i915: Use spatio-temporal dithering on PCH
Spatial dither is better than nothing, but ST is even better.

(from ajax's followup message:)
  I noticed this with:

  http://ajax.fedorapeople.org/YellowFlower.jpg

  set as my desktop background in Gnome on a 1280x800 machine (in
  particular, a Sony Vaio VPCB1 with 6-bit panel and a rather bright black
  level).  Easiest way to test this is by poking at PIPEACONF with
  intel_reg_write directly:

  % sudo intel_reg_write 0x70008 0xc0000040 # no dither
  % sudo intel_reg_write 0x70008 0xc0000050 # spatial
  % sudo intel_reg_write 0x70008 0xc0000054 # ST

  I notice it especially strongly in the relatively flat dark area in the
  top left.  Closer than about 18" I can see a noticeable checkerboard
  pattern with plain spatial dithering.  ST smooths that out; I can still
  tell that it's lacking color precision, but it's not offensive.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-07 13:59:26 -07:00
Jesse Barnes
1918ad77f7 drm/i915: fix non-Ironlake 965 class crashes
My PIPE_CONTROL fix (just sent via Eric's tree) was buggy; I was
testing a whole set of patches together and missed a conversion to the
new HAS_PIPE_CONTROL macro, which will cause breakage on non-Ironlake
965 class chips.  Fortunately, the fix is trivial and has been tested.

Be sure to use the HAS_PIPE_CONTROL macro in i915_get_gem_seqno, or
we'll end up reading the wrong graphics memory, likely causing hangs,
crashes, or worse.

Reported-by: Zdenek Kabelac <zdenek.kabelac@gmail.com>
Reported-by: Toralf Förster <toralf.foerster@gmx.de>
Tested-by: Toralf Förster <toralf.foerster@gmx.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-04-23 10:39:20 -07:00
Jesse Barnes
e552eb7038 drm/i915: use PIPE_CONTROL instruction on Ironlake and Sandy Bridge
Since 965, the hardware has supported the PIPE_CONTROL command, which
provides fine grained GPU cache flushing control.  On recent chipsets,
this instruction is required for reliable interrupt and sequence number
reporting in the driver.

So add support for this instruction, including workarounds, on Ironlake
and Sandy Bridge hardware.

https://bugs.freedesktop.org/show_bug.cgi?id=27108

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-22 14:48:55 -07:00
Jesse Barnes
20bf377e67 drm/i915: cleanup FBC buffers at unload time
This keeps the memory manager from complaining when we take it down.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-22 13:19:05 -07:00
Dave Airlie
d4b74bf078 Revert "drm/i915: Configure the TV sense state correctly on GM45 to make TV detection reliable"
Eric mentioned on irc this patch was bad, so revert it.

This reverts commit fb8b5a39b6.

Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 14:25:51 +10:00
Daniel Vetter
a8089e849a drm/i915: drop pointer to drm_gem_object
Luckily the change is quite a little bit less invasive than I've
feared.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 13:23:14 +10:00
Daniel Vetter
62b8b21515 drm/i915: don't use ->driver_private anymore
Thanks to the to_intel_bo helper, this change is rather trivial.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 13:22:56 +10:00
Daniel Vetter
c397b9084c drm/i915: embed the gem object into drm_i915_gem_object
Just embed it and adjust the pointers, No other changes (that's
for later patches).

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 13:22:45 +10:00
Daniel Vetter
ac52bc56de drm/i915: introduce i915_gem_alloc_object
Just preparation, no functional change.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 13:22:26 +10:00
Daniel Vetter
fd632aa34c drm: free core gem object from driver callbacks
When drivers embed the core gem object into their own structures,
they'll have to do this. Temporarily this results in an ugly

kfree(gem_obj);

in every gem driver.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 13:19:33 +10:00
Dave Airlie
7fff400be6 Merge branch 'drm-fbdev-cleanup' into drm-core-next
* drm-fbdev-cleanup:
  drm/fb: remove drm_fb_helper_setcolreg
  drm/kms/fb: use slow work mechanism for normal hotplug also.
  drm/kms/fb: add polling support for when nothing is connected.
  drm/kms/fb: provide a 1024x768 fbcon if no outputs found.
  drm/kms/fb: separate fbdev connector list from core drm connectors
  drm/kms/fb: move to using fb helper crtc grouping instead of core crtc list
  drm/fb: fix fbdev object model + cleanup properly.

Conflicts:
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/nouveau/nouveau_drv.h
2010-04-20 13:16:04 +10:00
Dave Airlie
97921a5b03 Merge remote branch 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next into drm-core-next
* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits)
  agp/intel-gtt: kill previous_size assignments
  agp/intel-gtt: kill intel_i830_tlbflush
  agp/intel: split out gmch/gtt probe, part 1
  agp/intel: kill mutli_gmch_chip
  agp/intel: uncoditionally reconfigure driver on resume
  agp/intel: split out the GTT support
  agp/intel: introduce intel-agp.h header file
  drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
  drm/i915/pch: Use minimal number of FDI lanes (v2)
  drm/i915: Add the support of memory self-refresh on Ironlake
  drm/i915: Move Pineview CxSR and watermark code into update_wm hook.
  drm/i915: Only save/restore FBC on the platform that supports FBC
  drm/i915: Fix the incorrect argument for SDVO SET_TV_format command
  drm/i915: Add support of SDVO on Ibexpeak PCH
  drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on).
  drm/i915: do not read uninitialized ->dev_private
  Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output."
  drm/i915: implement multifunction SDVO device support
  drm/i915: remove unused intel_pipe_get_connector()
  drm/i915: remove connector object in old output structure
  ...
2010-04-20 13:11:45 +10:00
Daniel Vetter
c36a2a6de5 drm/i915: fix tiling limits for i915 class hw v2
Current code is definitely crap: Largest pitch allowed spills into
the TILING_Y bit of the fence registers ... :(

I've rewritten the limits check under the assumption that 3rd gen hw
has a 3d pitch limit of 8kb (like 2nd gen). This is supported by an
otherwise totally misleading XXX comment.

This bug mostly resulted in tiling-corrupted pixmaps because the kernel
allowed too wide buffers to be tiled. Bug brought to the light by the
xf86-video-intel 2.11 release because that unconditionally enabled
tiling for pixmaps, relying on the kernel to check things. Tiling for
the framebuffer was not affected because the ddx does some additional
checks there ensure the buffer is within hw-limits.

v2: Instead of computing the value that would be written into the
hw fence registers and then checking the limits simply check whether
the stride is above the 8kb limit. To better document the hw, add
some WARN_ONs in i915_write_fence_reg like I've done for the i830
case (using the right limits).

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27449
Tested-by: Alexander Lam <lambchop468@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 17:58:24 -07:00
Karsten Wiese
6e0032f0ae drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
PORT_HOTPLUG_EN has allready been setup in i915_driver_irq_postinstall(),
when intel_dp_detect() runs.

Delete the DP[BCD]_HOTPLUG_INT_EN defines, they are not referenced anymore.

I found this while searching for a fix for
        https://bugzilla.redhat.com/show_bug.cgi?id=528312

Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 17:11:44 -07:00
Zhang Rui
3143751ff5 drm/i915: set DIDL using the ACPI video output device _ADR method return.
we used to set the DIDL in the output device detected order.
But some BIOSes requires it to be initialized in the ACPI device order.
e.g. the value of the first field in DIDL stands for the first
ACPI video output device in ACPI namespace.

Now we initialize the DIDL using the device id, i.e. _ADR return value,
of each ACPI video device, if it is not 0.
https://bugzilla.kernel.org/show_bug.cgi?id=15054

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 17:05:13 -07:00
Adam Jackson
77ffb5979d drm/i915/pch: Use minimal number of FDI lanes (v2)
This should be a small power savings. Tested on Lenovo T410 (Ironlake), LVDS
VGA and DisplayPort, up to 1920x1200R.

v2: Add Sandybridge support, fix obvious math error.

Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 16:57:44 -07:00
Adam Jackson
5ce8ba7c92 drm/i915: Fix 82854 PCI ID, and treat it like other 85X
pci.ids and the datasheet both say it's 358e, not 35e8.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 16:56:46 -07:00
Adam Jackson
8f4695ed1c drm/i915: Attempt to fix watermark setup on 85x (v2)
IS_MOBILE() catches 85x, so we'd always try to use the 9xx FIFO sizing;
since there's an explicit 85x version, this seems wrong.

v2: Handle 830m correctly too.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-18 16:52:56 -07:00
Linus Torvalds
13bd8e4673 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
  drm/i915: Ignore LVDS EDID when it is unavailabe or invalid
  drm/i915: Add no_lvds entry for the Clientron U800
  drm/i915: Rename many remaining uses of "output" to encoder or connector.
  drm/i915: Rename intel_output to intel_encoder.
  agp/intel: intel_845_driver is an agp driver!
  drm/i915: introduce to_intel_bo helper
  drm/i915: Disable FBC on 915GM and 945GM.
2010-04-17 14:28:50 -07:00
Zhenyu Wang
7f8a85698f drm/i915: Add the support of memory self-refresh on Ironlake
Update the self-refresh watermark for display plane/cursor and enable
the memory self-refresh on Ironlake. The watermark is also updated for
the active display plane.

More than 1W idle power is saved on one Ironlake laptop after enabling
memory self-refresh.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:30:43 -07:00
Zhao Yakui
d4294342fd drm/i915: Move Pineview CxSR and watermark code into update_wm hook.
Previously, after setting up the Pineview CxSR state, i9xx_update_wm would
get called and overwrite our state.

BTW: We will disable the self-refresh and never enable it any more if we
can't find the appropriate the latency on pineview plaftorm. In such case
the update_wm callback will be NULL.

The bitmask macro is also defined to access the corresponding fifo
watermark register.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:27:46 -07:00
Zhao Yakui
a2c459ee9a drm/i915: Only save/restore FBC on the platform that supports FBC
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:25:54 -07:00
Zhao Yakui
8a1837cef7 drm/i915: Fix the incorrect argument for SDVO SET_TV_format command
Otherwise it will cause that S-video output becomes black/white when
switching to other TV format.

http://bugs.freedesktop.org/show_bug.cgi?id=23916

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Arnold <arnold.erbsloeh@web.de>
Tested-by: Bazin <bazin.cz@gmail.com>
Tested-by: Nigel <nigel_tuck@eircom.net>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:25:33 -07:00
Zhao Yakui
461ed3caee drm/i915: Add support of SDVO on Ibexpeak PCH
SDVO on Ibexpeak PCH with Ironlake is multiplexed with
HDMIB port, and only has SDVOB port.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:24:11 -07:00
Carl Worth
cfecde435d drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on).
The existing code handling the DPMS ON event is much more careful to
ensure that these registers are enabled according to strict sequencing
requirements. Enabling these early in mode_set simply defeats that.

Signed-off-by: Carl Worth <cworth@cworth.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:24:01 -07:00
Luca Tettamanti
ea059a1ec4 drm/i915: do not read uninitialized ->dev_private
->dev_private at that point is NULL and is initialied only a few lines
later.

Signed-off-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:24:00 -07:00
Zhenyu Wang
a1f4b7ff23 Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output."
This reverts commit 6070a4a928.

The quirk for this SDVO device on IBM specific board is just a hack
in old code which showed the broken multifunction SDVO support in
the driver. Multifunction SDVO patch provided the right fix for it.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:59 -07:00
Zhenyu Wang
14571b4c1a drm/i915: implement multifunction SDVO device support
With new intel_encoder/intel_connector structure change, each supported
connector type on SDVO device will be created as a new 'intel_connector',
and all attached to one 'intel_encoder' for its SDVO port.

The SDVO encoder will handle SDVO protocol stuff, and each connector does
its own part of work now, like detection is only to check if current active
output is itself, etc.

Update since last submit:
- Fixed SDVO TV property creation failure by incorrect set target output call

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:57 -07:00
Zhenyu Wang
409608b391 drm/i915: remove unused intel_pipe_get_connector()
Added by original eDP support patch, not used any more.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:56 -07:00
Zhenyu Wang
1f254ec2f1 drm/i915: remove connector object in old output structure
As all display drivers have been converted, remove the left reference
for connector object in old structure.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:55 -07:00
Zhenyu Wang
0c41ee2be6 drm/i915: convert TV driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:54 -07:00
Zhenyu Wang
d2a82a6f1b drm/i915: convert SDVO driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-12 09:23:53 -07:00
Zhenyu Wang
599be16c6e drm/i915: convert DVO driver to new encoder/connector structure
Also remove old UMS copied code for get_crtc.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:52 -07:00
Zhenyu Wang
55f78c4359 drm/i915: convert DP/eDP driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:51 -07:00
Zhenyu Wang
674e2d0885 drm/i915: convert HDMI driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:50 -07:00
Zhenyu Wang
bb8a356088 drm/i915: convert LVDS driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:49 -07:00
Zhenyu Wang
454c1ca8be drm/i915: convert VGA driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:48 -07:00
Adam Jackson
9c9e792795 drm/i915: Set sync polarity correctly on DisplayPort
Probably only matters for format-converting dongles, but might as well
get it right all the time.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:47 -07:00
Adam Jackson
ab00a9ef8d drm/i915: Un-magic a DPCD register write
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:46 -07:00
Zhenyu Wang
e3421a1894 drm/i915: enable DP/eDP for Sandybridge/Cougarpoint
DP on Cougarpoint has new training pattern definitions, and
new transcoder DP control register is used to determine the mapping
for transcoder and DP digital output. And eDP for Sandybridge has
new voltage and pre-emphasis level definitions.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:44 -07:00
Zhenyu Wang
0f229062a1 drm/i915: enable HDMI on Cougarpoint
Fix transcoder select bit for HDMI on CPT.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:43 -07:00
Zhenyu Wang
b3b095b3b2 drm/i915: enable LVDS on Cougarpoint
Fix the transcoder select bit for LVDS on CPT.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:42 -07:00
Zhenyu Wang
a4a6b90150 drm/i915: Fix CRT force detect on Cougarpoint
To make CRT force detect reliable on Cougarpoint, we need to
disable DAC before force detect, and restore back when trigger
is completed.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:41 -07:00
Zhenyu Wang
8db9d77b1b drm/i915: Support for Cougarpoint PCH display pipeline
Cougarpoint is the new PCH for Sandybridge CPU. This one resolves the
chipset change for display pipeline compared to previous Ibexpeak PCH.

Sandybridge/Cougarpoint has different FDI training parameters, so this also
makes seperate FDI training functions for IBX and CPT. Other change includes
new transcoder DPLL select function to set which DPLL for transcoder to pick
up.

And with another new transcoder C introduced in Cougarpoint, each connector
has new transcoder select bits. This one adds that change to light up VGA.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-12 09:23:40 -07:00