7 Commits

Author	SHA1	Message	Date
Shawn Guo	32af7a830f	ARM: imx: add common clock support for clk busy ... Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2012-05-02 12:08:26 +02:00
Shawn Guo	a10bd67f19	ARM: imx: add common clock support for pfd ... Signed-off-by: Shawn Guo <shawn.guo@linaro.org>	2012-05-02 12:08:20 +02:00
Sascha Hauer	b75c015143	ARM i.MX: Add common clock support for 2bit gate ... This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2012-05-02 12:08:13 +02:00
Shawn Guo	a3f6b9dbf2	ARM: imx: add common clock support for pllv3 ... This PLL is found on i.MX6 SoCs Signed-off-by: Shawn Guo <shawn.guo@linaro.org>	2012-05-02 12:08:06 +02:00
Sascha Hauer	a547b816a8	ARM i.MX: Add common clock support for pllv2 ... This PLL is found on i.MX51 and i.MX53 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2012-05-02 12:07:59 +02:00
Sascha Hauer	2af9e6db14	ARM i.MX: Add common clock support for pllv1 ... The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2012-05-02 12:07:53 +02:00
Sascha Hauer	6c7b06850c	ARM i.MX: prepare for common clock framework ... - Add necessary #ifdefs for CONFIG_COMMON_CLOCK - Add a global spinlock to protect the CCM registers Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2012-04-25 17:03:46 +02:00