This patch enables USB HS working in FS mode on stm32f429-disco
with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch enables USB FS on stm32f469-disco with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch adds the USB pins and nodes for USB FS core.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
The kbuild test robot reported this build failure on a number
of architectures:
> make.cross ARCH=arm
> lib/lib.a(bug.o): In function `find_bug':
> >> lib/bug.c:135: undefined reference to `__start___bug_table'
> >> lib/bug.c:135: undefined reference to `__stop___bug_table'
Caused by:
19d436268d ("debug: Add _ONCE() logic to report_bug()")
Which moved the BUG_TABLE from RO_DATA_SECTION() to RW_DATA_SECTION(),
but a number of architectures don't use RW_DATA_SECTION(), so they
ended up with no __bug_table[] ...
Ideally all those would use RW_DATA_SECTION() in their linker scripts,
but that's for another day.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kbuild test robot <fengguang.wu@intel.com>
Cc: kbuild-all@01.org
Cc: tipbuild@zytor.com
Link: http://lkml.kernel.org/r/20170330154927.o6qmgfp4bdhrajbm@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Update the Alpine clock-frequency values with valid default values. The
bootloader can still update these values if needed, but at least we can
boot if it does not.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Cosmetic cleanup to have consistent node definitions. Add a space before
the node units which do not have one.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
At this time, most of changes are for ASoC, while we got one fix for
yet another race of ALSA sequencer core and a usual HD-audio quirk.
The ASoC changes are mostly small and device-specific fixes. A
slightly large volume is seen in sun8i-codec, which is a new code in
4.11, and we'd like to fix user-visible stuff before the official 4.1
release.
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Merge tag 'sound-4.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"At this time, most of changes are for ASoC, while we got one fix for
yet another race of ALSA sequencer core and a usual HD-audio quirk.
The ASoC changes are mostly small and device-specific fixes. A
slightly large volume is seen in sun8i-codec, which is a new code in
4.11, and we'd like to fix user-visible stuff before the official 4.1
release"
* tag 'sound-4.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (27 commits)
ALSA: hda - fix a problem for lineout on a Dell AIO machine
ASoC: simple-card: fix simple_dai clk lookup
ASoC: STI: Fix reader substream pointer set
ALSA: seq: Fix race during FIFO resize
ARM: dts: sun8i: Update audio-routing with renamed widgets
ASoC: sun8i-codec: Convert to use SND_SOC_DAPM_AIF_IN
ASoC: sun8i-codec: Fix space on audio-routing widget
ASoC: sun8i-codec: Update mixer to use SOC_DAPM_DOUBLE
ASoC: sun8i-codec: Remove analog "HP" widget
ASoC: rt5665: fix wrong shift rt5665_if2_1_adc_in_enum
ASoC: rt5665: fix define of RT5665_HP_DRIVER_5X
ASoC: rcar: dma: remove unnecessary "volatile"
ASoC: rcar: clear DE bit only in PDMACHCR when it stops
ASoC: rsnd: fix sound route path when using SRC6/SRC9
ASoC: don't dereference NULL pcm_{new,free}
ASoC: rt5665: CLKDET is also a power of ASRC
ASoC: rt5665: Vref3 is necessary for Mono Amp
ASoC: rt5665: increase LDO level
ASoC: rt5665: fix getting wrong work handler container
ASoC: atmel-classd: fix audio clock rate
...
Add a missing bracket at the end of Anti's email
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Merge at91_pm_set_standby() in at91_dt_ramc as this is the only callsite.
That moves it to the init section.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The PM initialization is now identical for all at91sam9. Merge the
functions.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The USB clocks mask (uhp_udp_mask) depends on the pmc. Tie it to the pmc id
instead of the SoC.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Instead of relying on the SoC type to select the memory controller type,
use the device tree ids as they are parsed anyway.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
As already explained for pm_suspend.S, the DDRSDR controller fails to put
LPDDR1 memories in self-refresh. Force the controller to think it has DDR2
memories during the self-refresh period, as the DDR2 self-refresh spec is
equivalent to LPDDR1, and is correctly implemented in the controller.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Since 2008, AT91_MC_SDRAMC_LPR is set to 0 at kernel initialization. There
is no use saving, changing and restoring it.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The number of register we can safely pass to at91_pm_suspend_in_sram is
limited. Instead, pass the address to the at91_pm_data structure.
The offsets are automatically generated to avoid hardcoding them.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Instead of having separate global variables to hold IP addresses, move them
to struct at91_pm_data.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Those macros are only used in pm.c, move them there so we can remove the
test on __ASSEMBLY__.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
These cause warnings in linux-next, as the symbols have become 'bool' there:
arch/arm/configs/multi_v7_defconfig:600:warning: symbol value 'm' invalid for ROCKCHIP_INNO_HDMI
arch/arm/configs/multi_v7_defconfig:599:warning: symbol value 'm' invalid for ROCKCHIP_DW_MIPI_DSI
arch/arm/configs/multi_v7_defconfig:598:warning: symbol value 'm' invalid for ROCKCHIP_DW_HDMI
arch/arm/configs/multi_v7_defconfig:597:warning: symbol value 'm' invalid for ROCKCHIP_ANALOGIX_DP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There was a little conflict between the v4.11 bugfixes and the new changes for 4.12,
this merges the fixes into the 4.12 branch to avoid having to resolve it again.
* Broadcom fixes in mainline
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
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Merge tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren:
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
* tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits)
ARM: dts: am335x-baltos: add LED support
ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator
ARM: dts: OMAP4460: Thermal: Add slope and offset values
ARM: dts: OMAP443x: Thermal: Add slope and offset values
ARM: dts: OMAP5: Thermal: Add slope and offset values
ARM: dts: DRA7: Thermal: Add slope and offset values
ARM: dts: omap3: Add cpu_thermal zone
ARM: dts: am437x-gp-evm: Add pinmux for uart0
ARM: dts: am335x-icev2: Add SPI based NOR
Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes
ARM: dts: dra7: Add updated operating-points-v2 table for cpu
ARM: dts: am4372: Update operating-points-v2 table for cpu
ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
ARM: dts: dm8168-evm: add SATA node
ARM: dts: dm8168-evm: add the external reference clock for SATA
ARM: dts: N9/N950: add bluetooth
ARM: dts: N900: Add bluetooth
ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed
ARM: dts: motorola-cpcap-mapphone: add LEDs
...
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
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Merge tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner:
Contains one new board, the Tinkerboard from Asus based on the rk3288,
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
* tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188
ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs
ARM: dts: rockchip: add rk322x dw-mmc resets
ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets
ARM: dts: rockchip: add rk3036 dw-mmc resets
ARM: dts: rockchip: add rk3288 dw-mmc resets
ARM: dts: rockchip: add dts for RK3288-Tinker board
dt-bindings: add rk3288-based Asus Tinker board
ARM: dts: rockchip: fix the MiQi board's LED definition
ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
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Merge tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij:
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
* tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add PCI to the Gemini device trees
ARM: dts: augment Gemini GPIO nodes
ARM: dts: add power controller to the Gemini DTS
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
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Merge tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree updates for
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
* tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux: (27 commits)
ARM: dts: bcm: fix msi-controller name and unit address
ARM: dts: BCM53573: Specify serial console parameters
ARM: dts: BCM5301X: Specify serial console params in dtsi files
ARM: dts: NSP: Add crypto (SPU) to dtsi
ARM: dts: NSP: Add mailbox (PDC) to NSP
ARM: dts: BCM953012HR: Add ethernet aliases
ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2
ARM: dts: NSP: disable i2c DT entry by default
ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree
ARM: dts: BCM5301X: Add I2C support to the DT
ARM: dts: BCM5301X: Add TWD WD Support to DT
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: bcm2835: add sdhost controller to devicetree
ARM: dts: bcm283x: Add HDMI audio related properties
ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys
ARM: dts: BCM5301X: Relicense DTS files I created to the ISC
ARM: dts: bcm2835: Add the DSI module nodes and clocks.
ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED
...
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
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Merge tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.12 (part 1)" from Gregory CLEMENT:
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
* tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: linksys: enable buffer manager support
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
ARM: dts: mvebu: Move mv98dx3236 clock bindings
ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236
ARM: dts: armada-xp-98dx3236: combine dfx server nodes
ARM: dts: armada: Add default trigger for sata led
ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x
ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby)
ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS
ARM: dts: armada-38x add node labels
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
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Merge tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DT updates for v4.12" from Sekhar Nori:
DaVinci device tree updates to enable
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
* tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: add the output port to the vpif node
ARM: dts: da850-evm: add IO expander node on UI card
ARM: dts: da850: add vpif video display pins
ARM: dts: da850-evm: fix whitespace errors
ARM: da850-lego-ev3: Add device tree node for sound
ARM: da850-lego-ev3: Add device tree node for A/DC
The Moxa ART GPIO is a Faraday FTGPIO010. Augment the DTS node
to indicate both compatible values for the SoC and the IP part.
Also increase the register range to 0x100, it has at least 0x48
bytes of registers, and a few extra will not hurt.
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
please pull the following:
- Gerd enables the BCM2835 MMC driver which yields better performance than the
default one (iProc)
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Merge tag 'arm-soc/for-4.12/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig
Pull "Broadcom defconfig changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs defconfig updates for 4.12,
please pull the following:
- Gerd enables the BCM2835 MMC driver which yields better performance than the
default one (iProc)
* tag 'arm-soc/for-4.12/defconfig' of http://github.com/Broadcom/stblinux:
arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and multi_v7_defconfig
ARM: bcm2835: Enable missing CMA settings for VC4 driver
4.12, please pull the following:
- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
addresses > 32-bit. This is only required when ARM_LPAE is enabled
- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
default.
- Florian adds support for a new 28nm generation chip: 7260 by updating the
runtime detection UART debuggin stub used for DEBUG_LL.
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Merge tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Kconfig/platform changes for
4.12, please pull the following:
- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
addresses > 32-bit. This is only required when ARM_LPAE is enabled
- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
default.
- Florian adds support for a new 28nm generation chip: 7260 by updating the
runtime detection UART debuggin stub used for DEBUG_LL.
* tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Add entry for 7260
ARM: brcmstb: Enable ARCH_HAS_HOLES_MEMORYMODEL
ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals
Add the new hdmi phandle to exynos4.dtsi. This phandle is needed by the
s5p-cec driver to initialize the CEC notifier framework.
Tested with my Odroid U3.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Wire up the generic support for exposing CPU feature bits via the
modalias in /sys/device/system/cpu. This allows udev to automatically
load modules for things like crypto algorithms that are implemented
using optional instructions.
Since it is non-trivial to transparantly support both HWCAP and HWCAP2
capabilities in the cpu_feature() macro (which allows a module's hwcap
dependency and init routine to be declared using a single invocation of
module_cpu_feature_match()), support only HWCAP2 for now, which covers
the capabilities that are most likely to be useful in this manner.
Module dependencies on HWCAP will need to be declared explicitly via a
MODULE_DEVICE_TABLE(cpu, ...) declaration.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
A relatively large pile of fixes for mainline, the first since the merge
window. The biggest block of changes here by volume is the sun8i-codec
set, the driver was newly added in the merge window but it was realized
that renaming some of the user visible controls was required so these
are being pushed for v4.11 to avoid the original code appearing in a
release. Otherwise it's all fairly standard bugfix stuff.
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Merge tag 'asoc-fix-v4.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v4.11
A relatively large pile of fixes for mainline, the first since the merge
window. The biggest block of changes here by volume is the sun8i-codec
set, the driver was newly added in the merge window but it was realized
that renaming some of the user visible controls was required so these
are being pushed for v4.11 to avoid the original code appearing in a
release. Otherwise it's all fairly standard bugfix stuff.
Video capture and display on DA850 and
an ADC driver thats used by Lego EV3.
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Merge tag 'davinci-for-v4.12/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
Pull "DaVinci defconfig updates for v4.12" from Sekhar Nori:
DaVinci defconfig updates for enabling
Video capture and display on DA850 and
an ADC driver thats used by Lego EV3.
* tag 'davinci-for-v4.12/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable TI ADS7950
ARM: davinci_all_defconfig: enable IRQ support for pca953x
ARM: davinci_all_defconfig: enable VPIF display modules
In many of clk_disable() implementations, it is a no-op for a NULL
pointer input, but this is one of the exceptions.
Making it treewide consistent will allow clock consumers to call
clk_disable() without NULL pointer check.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In many of clk_disable() implementations, it is a no-op for a NULL
pointer input, but this is one of the exceptions.
Making it treewide consistent will allow clock consumers to call
clk_disable() without NULL pointer check.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Wan Zongshun <mcuos.com@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
stm32_defconfig is used for several STM32 MCU: STM32F429, STM32F469,
STM32F746 and now STM32H743. Each of MCU listed have different interrupts
number mapped on NVIC. STM32F429: 81, STM32F469: 92, STM32F746: 97 and
STM32H743: 149. I could set CPU_V7M_NUM_IRQ to 149 but in order to avoid
forgetting to update this value for next STM32 MCU I prefer to set it to
max value: 240.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Keep the clearfog DTS file ordered alphabetically - Florian placed the
MDIO entry after pinctrl, which mis-orders the file.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Board code cannot call mdiobus_register_board_info() when phylib
or mdio_device is a loadable module:
arch/arm/plat-orion/common.o: In function `orion_ge00_switch_init':
:(.init.text+0x474): undefined reference to `mdiobus_register_board_info'
I had a number of ideas for how this could be solved, but after the MDIO
code got split out from PHYLIB it has gotten too hard, so I'm basically
giving up, and only call the mdiobus_register_board_info() function
if the MDIO layer is built-in to avoid the link error. This is similar
to how we handle PHY registration on other ARM platforms.
Fixes: 90eff9096c ("net: phy: Allow splitting MDIO bus/device support from PHYs")
Fixes: 648ea01340 ("net: phy: Allow pre-declaration of MDIO devices")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
- Select the poweroff driver so the system can properly shut down.
This driver is merged in the power tree.
- Select the right Faraday GPIO block (we renamed it).
- Do not select SERIAL_OF_PLATFORM that just create Kconfig
warnings on us. We'll put that into the defconfig instead.
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Merge tag 'gemini-multiplat-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/soc
Pull "Gemini multiplatform updates" from Linus Walleij:
- Select the poweroff driver so the system can properly shut down.
This driver is merged in the power tree.
- Select the right Faraday GPIO block (we renamed it).
- Do not select SERIAL_OF_PLATFORM that just create Kconfig
warnings on us. We'll put that into the defconfig instead.
* tag 'gemini-multiplat-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: gemini: don't select SERIAL_OF_PLATFORM
ARM: gemini: select the right GPIO block
ARM: gemini: select gemini poweroff
- Drop PM_SUSPEND_STANDBY
- Clean up hwmod code in preparation to eventually dynamically
allocating hwmod data based on device tree data
- Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent
clockdomain from entering HW_AUTO
- Configure clockdomain and hwmod for dm81xx SATA
- Mark omap_init_rng as __init
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Merge tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "SoC changes for omaps for v4.12 merge window" from Tony Lindgren:
- Drop PM_SUSPEND_STANDBY
- Clean up hwmod code in preparation to eventually dynamically
allocating hwmod data based on device tree data
- Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent
clockdomain from entering HW_AUTO
- Configure clockdomain and hwmod for dm81xx SATA
- Mark omap_init_rng as __init
* tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: mark omap_init_rng as __init
ARM: OMAP2+: dm81xx: Add clkdm and hwmod for SATA
ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss
ARM: DRA7: hwmod: Fix DCAN1 stuck in transition
ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO
ARM: OMAP2+: omap_hwmod: provide space for more hwmod flags
ARM: OMAP2+: Make hwmod clkdm_name const
ARM: OMAP2+: Remove unused CLOCKACT_TEST_ICLK
ARM: OMAP2+: Use list_for_each_entry for hwmod slave_ports
ARM: OMAP2+: Remove mostly unused hwmod linkspace
ARM: OMAP: PM: Drop useless checks for PM_SUSPEND_STANDBY
to make video capture and display work on da850.
VPIF driver which supports video capture and display on
da850 is a legacy driver. It does not have DT equavalents
for all things that are used on platform data.
Attempts were made to pass data via DT[1], but linux-media
does not yet have a good way of describing subdevices in
device tree. This is work in progress. As soon as bindings
are defined and implementation is available, we can shift
to using that. For now we are stuck with using pdata.
The pull request also has some clean-up for PM, and a fix
for pdata quirks mechanism.
[1] https://marc.info/?l=devicetree&m=147982998517384
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Merge tag 'davinci-for-v4.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Pull "DaVinci SoC updates for v4.12" from Sekhar Nori:
v4.12 SoC updates for DaVinci include necessary pdata-quirks
to make video capture and display work on da850.
VPIF driver which supports video capture and display on
da850 is a legacy driver. It does not have DT equavalents
for all things that are used on platform data.
Attempts were made to pass data via DT[1], but linux-media
does not yet have a good way of describing subdevices in
device tree. This is work in progress. As soon as bindings
are defined and implementation is available, we can shift
to using that. For now we are stuck with using pdata.
The pull request also has some clean-up for PM, and a fix
for pdata quirks mechanism.
[1] https://marc.info/?l=devicetree&m=147982998517384
* tag 'davinci-for-v4.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: add pdata-quirks for da850-evm vpif display
ARM: da850-evm: add a fixed regulator for the UI board IO expander
ARM: davinci: da8xx: add pdata-quirks for VPIF capture
ARM: davinci: da8xx: add OF_DEV_AUXDATA() for vpif
ARM: davinci: board-da850-evm: add I2C ID for VPIF
ARM: davinci: allow having multiple pdata-quirks
ARM: davinci: PM: Drop useless check for PM_SUSPEND_STANDBY
The imx6sl-evk board has a LAN8720A ethernet phy supported by SMSC_PHY.
Add this driver to the default imx config since the device is present on
one of the evaluation boards.
This used to work mostly fine with the generic phy driver until
commit 0878fff1f4 ("net: phy: Do not perform software reset for
Generic PHY"). The fact that soft reset is no longer performed
apparently causes RX to sometimes failes which can cause netboot to
timeout on DHCP. This is eventually retried and it works after link
up/down but can takes 90 seconds to reach the login prompt.
This was generated with "make savedefconfig" and it includes a few
additional minor cleanups.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This moves the spi0_cs3_pin pinconf node from the LEGO EV3 file to the
common DA850 include file. This node is applicable to any board, and
therefore belongs in the common file.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers. This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:
* testing efforts are divided between two subsystems
* having duplicate drivers for same hardware confuses users
This patch converts davinci_all_defconfig to use libata PATA
drivers.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[b.zolnierkie: split from bigger patch + added patch description]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
This adds the memory domain (on non-LPAE) to the PMD and PTE dumps. This
isn't in the regular PMD bits because I couldn't find a clean way to
fall back to retain some of the PMD bits when reporting PTE. So this is
special-cased currently.
New output example:
---[ Modules ]---
0x7f000000-0x7f001000 4K KERNEL ro x SHD MEM/CACHED/WBWA
0x7f001000-0x7f002000 4K KERNEL ro NX SHD MEM/CACHED/WBWA
0x7f002000-0x7f004000 8K KERNEL RW NX SHD MEM/CACHED/WBWA
---[ Kernel Mapping ]---
0x80000000-0x80100000 1M KERNEL RW NX SHD
0x80100000-0x80800000 7M KERNEL ro x SHD
0x80800000-0x80b00000 3M KERNEL ro NX SHD
0x80b00000-0xa0000000 501M KERNEL RW NX SHD
...
---[ Vectors ]---
0xffff0000-0xffff1000 4K VECTORS USR ro x SHD MEM/CACHED/WBWA
0xffff1000-0xffff2000 4K VECTORS ro x SHD MEM/CACHED/WBWA
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Greg upon trying to boot no-MMU Kernel on ARM926EJ reported boot
failure. He root caused it to ID_PFR1 access introduced by the
commit mentioned in the fixes tag below.
All CP15 processors need not have processor feature registers, only
for architectures defined by CPUID scheme would have it. Hence check
for it before accessing processor feature register, ID_PFR1.
Fixes: f8300a0b5d ("ARM: 8647/2: nommu: dynamic exception base address setting")
Reported-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
dma_get_sgtable() tries to create a scatterlist table containing valid
struct page pointers for the coherent memory allocation passed in to it.
However, memory can be declared via dma_declare_coherent_memory(), or
via other reservation schemes which means that coherent memory is not
guaranteed to be backed by struct pages. In such cases, the resulting
scatterlist table contains pointers to invalid pages, which causes
kernel oops later.
This patch adds detection of such memory, and refuses to create a
scatterlist table for such memory.
Reported-by: Shuah Khan <shuahkhan@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The two st231-rproc nodes have the same name; Due to that it was
impossible to distinguish them in remoteproc sysfs and debugfs
interface.
This patch provides them a name related to their functionality.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
The display backend on sun5i shares the same interrupt line as the
display frontend. Add it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
An adsp-pil node is present in at least the MSM8974 SoC. Simply enable
all Qualcomm remoteproc drivers to avoid more work in the future.
The SMP2P driver is required for adsp-pil to initialize correctly.
Enable the SMSM driver at Bjorn Andersson's request: "We also need
CONFIG_QCOM_SMSM=y here, its currently used to signal state of the ring
buffers for WiFi."
CONFIG_QCOM_WCNSS_CTRL is required to load firmware/configuration data
into the WCNSS core, which handles WiFi and Bluetooth.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
I found this section mismatch when building with an older
compiler release:
WARNING: vmlinux.o(.text+0x3051c): Section mismatch in reference from the
function omap_init_rng() to the function .init.text:omap_device_build()
Obviously this one function should be __init as well. Normally
we don't get a warning as the function gets inlined into its
caller.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[tony@atomide.com: formatted error message a bit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the SATA clockdomain (part of CM_DEFAULT) and a hwmod for the SATA
block on dm81xx.
Tested on DM8168 EVM.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[Bartosz: removed an unused define]
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.
Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.
We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add HWMOD_CLKDM_NOAUTO flag to DCAN1 module.
Without this DCAN1 module remains stuck in transition
after the CAN interface is brought down. This is also suggested
in Errata i893 "DCAN Initialization Sequence".
Add the HWMOD_CLKDM_NOAUTO to DCAN2 module as well
as it is mentioned in Errata i893.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the RPM Clock Controller DT node for msm8974-based platforms, so that
drivers can use the clocks provided by the RPM processor.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The DTS referred to SDC5 when it meant SDC1.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
To make the picture complete, add DTS entries also for the
second and fourth MMC/SD blocks on the MSM8660. SDC2 is
an 8-bit interface and SDC4 is a 4-bit interface.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Without this patch (and with CONFIG_QCOM_ADSP_PIL), I get this error:
[ 0.711529] qcom_adsp_pil adsp-pil: failed to get xo clock
[ 0.711540] remoteproc remoteproc0: releasing adsp-pil
With this patch, adsp-pil can initialize correctly.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial set of CoreSight components found on Qualcomm
msm8974 and apq8074 based platforms, including the APQ8074
Dragonboard board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Rock 2 square board has a USB -> SATA converter hooked up to its usb
host1 connection. Enable the usb controller and always turn on the power
on the 5V sata power connector (controlled by gpio).
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This driver is now used only on platforms which support device tree, so
it is safe to remove legacy platform data based initialization code.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
For plat-samsung:
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
All three devices provide GPIO based LEDs named power,
wlan and app.
Place LEDs definition into a separate dtsi file as not all
devices including am335x-baltos.dtsi have the same LED layout.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There's a typo, it should be GPIO176 and not GPIO106.
And it seems I messed up the regulators at some point while trying
to figure out what devices the regulators are used. The correct
regulator for MMC1 is vwlan2.
Fixes: 0d4cb3ccee ("ARM: dts: Configure regulators for droid 4")
Reported-by: Sebastian Reichel <sre@kernel.org>
Reviewed-by: Sebastian Reichel <sre@kernel.org>
Tested-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix to return error code -ENODEV from the of_find_compatible_node()
error handling case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 84e734f497 ("ARM: dts: silk: add DU DT support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 876e7fb9f4 ("ARM: shmobile: r8a7794: alt: Enable VGA port")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 46c4f13d04 ("ARM: shmobile: r8a7794: Add DU node to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the missing module clock for the second channel of the display unit.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 3251885285 ("ARM: OMAP4+: Reset CPU1 properly for kexec") started
unconditionally resetting CPU1 because of a kexec boot issue I was seeing
earlier on omap4 when doing kexec boot between two different kernel
versions.
This caused issues on some systems. We should only reset CPU1 as a last
resort option, and try to avoid it where possible. Doing an unconditional
CPU1 reset causes issues for example when booting a bootloader configured
secure OS running on CPU1 as reported by Andrew F. Davis <afd@ti.com>.
We can't completely remove the reset of CPU1 as it would break kexec
booting from older kernels. But we can limit the CPU1 reset to cases
where CPU1 is wrongly parked within the memory area used by the booting
kernel. Then later on we can add support for parking CPU1 for kexec out
of the SDRAM back to bootrom.
So let's first fix the regression reported by Andrew by making CPU1 reset
conditional. To do this, we need to:
1. Save configured AUX_CORE_BOOT_1 for later
2. Modify AUX_CORE_BOOT_0 reading code to for HS SoCs to return
the whole register instead of the CPU mask
3. Check if CPU1 is wrongly parked into the booting kernel by the
previous kernel and reset if needed
Fixes: 3251885285 ("ARM: OMAP4+: Reset CPU1 properly for kexec")
Reported-by: Andrew F. Davis <afd@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Tested-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
mmc2 used for wl12xx was missing the keep-power-in suspend
parameter. As a result the board couldn't reach suspend state.
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Orange Pi Zero board features a USB OTG port, which has a ID pin, and
can be used to power up the board. However, even if the board is powered
via +5V pin in GPIO/expansion headers, the VBUS in the OTG port cannot
be powered up, thus it's impossible to use it in host mode with simple
OTG cables.
Add support for it in peripheral mode.
If someone really want to use it in host mode, the mode of PHY can be
switch via sysfs, then use a powered USB OTG cable or powered USB HUB to
power up external USB devices.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Orange Pi One features a MicroUSB port that can work in both host mode
and peripheral mode.
When in host mode, its VBUS is controlled via a GPIO; when in peripheral
mode, its VBUS cannot be used to power up the board.
Add support for this port.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.
Add device nodes for these controllers.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the
Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller
updated. So we should really share almost the whole .dtsi.
In preparation for that move the peripheral parts of the existing
sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi.
The actual sun8i-h3.dtsi then includes that and defines the H3 specific
parts on top of it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Icenowy: also split out mmc and gic, as well as pio and ccu's
compatible, and make drop of skeleton into a seperated patch]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
According to the datasheets provided by Allwinner, both Allwinner H3 and
H5 use GIC-400 as their interrupt controller.
For better device tree reusing, correct the GIC compatible in H3 DTSI to
"arm,gic-400", thus this node can be reused in H5.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
After converting to generic pinconf binding, pinctrl-a10.h is now not
used at all.
Drop its inclusion for H3 DTSI.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The skeleton.dtsi file is now deprecated, and do not exist in ARM64
environment.
Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64
chip, drop skeleton.dtsi inclusion now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit makes use of the axp209.dtsi file to define the
AXP209 PMIC. While here, define the rails that are enabled on
this board.
Tested checking the regulator voltage varies according to the
CPU frequency.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The SinA31s has a coaxial SPDIF output. Enable it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds the cpu-supply DT property to the cpu0 DT node needed by
the board to adapt the regulator voltage depending on the currently used
OPP.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds almost all operating points allowed for the A33 as defined by
fex files available at:
https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33
There are more possible frequencies in this patch than there are in the
fex files because the fex files only give an interval of possible
frequencies for a given voltage. All supported frequencies are defined
in the original driver code in Allwinner vendor tree.
There are two missing frequencies though: 1104MHz and 1200MHz which
require the CPU to have 1.32V supplied, which is higher than the default
voltage.
Without all A33 boards defining the CPU regulator, we cannot have these
two frequencies as it would cause the CPU to try to run a higher
frequency without "overvolting" which is very likely to crash the CPU.
Therefore, these two frequencies must be enabled on a per-board basis.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The NextThing Co. CHIP has an AXP209 PMIC and can be power-supplied by
ACIN via the CHG-IN pin.
This enables the ACIN power supply subnode in the DT.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Sinlinx SinA33 has an AXP223 PMIC and an ACIN connector, thus, we
enable the ACIN power supply in its Device Tree.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The X-Powers AXP22X PMIC exposes the status of AC power supply.
This adds the AC power supply subnode for the AXP22X PMIC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The X-Powers AXP20X PMIC exposes the status of AC power supply, the
current current and voltage supplied to the board by the AC power
supply.
This adds the AC power supply subnode for AXP20X PMIC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.
Remove the #include entry with the following command:
sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \
arch/arm/boot/dts/sun?i*.*
arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra
empty line.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The old sunxi specific pinctrl bindings are deprecated, in favor of
the new generic pinconf bindings. Also, we are moving towards handling
GPIO pinmux settings that don't require extra bias or drive strength
settings to use the GPIO bindings only.
This patch removes the last instance of the sunxi specific pinctrl
bindings that use the pinctrl header by dropping the pinmux setting
for the audio codec's PA (external amplifier) control GPIO. The pin
is pulled down externally.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- A couple of OMAP 4.11 regression fixes, including a boot regression for
SmartReflex, hypervisor mode in thumb2 mode, and reference counting of
device nodes
- A fix for cpu_idle on at91
- Minor DT fixes on across several platforms:
sunxi, bcm53xx, at91, nsp, ns2, ux500, omap
- A fix to correct an API change in the reset controllers
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
- a couple of OMAP 4.11 regression fixes, including a boot regression
for SmartReflex, hypervisor mode in thumb2 mode, and reference
counting of device nodes
- a fix for cpu_idle on at91
- minor DT fixes on across several platforms: sunxi, bcm53xx, at91,
nsp, ns2, ux500, omap
- a fix to correct an API change in the reset controllers
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
arm64: dts: NS2: Add dma-coherent to relevant DT entries
reset: fix optional reset_control_get stubs to return NULL
ARM: sun8i: a23/a33: drop bl_en_pin GPIO pinmux in reference design DTSI
ARM: dts: sun7i: lamobo-r1: Fix CPU port RGMII settings
ARM: dts: NSP: GPIO reboot open-source
ARM: at91: pm: cpu_idle: switch DDR to power-down mode
ARM: dts: add the AB8500 clocks to the device tree
ARM: dts: imx6sx-udoo-neo: Fix reboot hang
ARM: sun8i: Fix the mali clock rate
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Revert "ARM: at91/dt: sama5d2: Use new compatible for ohci node"
ARM: OMAP2+: Release device node after it is no longer needed.
ARM: OMAP2+: Fix device node reference counts
ARM: OMAP2+: Remove legacy gpmc-nand.c
ARM: OMAP2+: gpmc-onenand: propagate error on initialization failure
ARM: dts: am335x-pcm953: Fix legacy wakeup source binding
ARM: omap2plus_defconfig: Enable INPUT_MOUSEDEV as loadable modules
ARM: dts: am57xx-idk: tpic2810 is on I2C bus, not SPI
...
We cannot select the option when SERIAL_8250 is not also set:
warning: (ARCH_GEMINI) selects SERIAL_OF_PLATFORM which has unmet direct dependencies (TTY && HAS_IOMEM && SERIAL_8250 && OF)
This removes the 'select' statement, requiring that users enable the
option manually. Alternatively, we could make it a conditional
'select SERIAL_OF_PLATFORM if SERIAL_8250' or also select a handful
of other symbols that it depends on.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
PCIe bridges should have a node name of 'pcie'.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
The Cortina Gemini has an internal PCI root bus, add this to
the device tree, and add interrupt mapping (swizzling) to the
relevant systems device trees.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Feng-Hsin Chiang <john453@faraday-tech.com>
Cc: Greentime Hu <green.hu@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Raspberry Pi, and nodes to describe the DSI and SDHOST hardware
modules (which are still disabled by default).
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Merge tag 'bcm2835-dt-next-2017-03-21' into devicetree/next
This pull request brings in the DT nodes for enabling HDMI audio on
Raspberry Pi, and nodes to describe the DSI and SDHOST hardware
modules (which are still disabled by default).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
please pull the following:
- Jon fixes a reboot issue on most Northstar Plus platforms by adding the
"open-source" property to the "gpio-restart" Device Tree nodes
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Merge tag 'arm-soc/for-4.11/devicetree-fixes-2' of http://github.com/Broadcom/stblinux into fixes
Pull "Broadcom arm Device Tree fixes for 4.11 (part 2)" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 4.11,
please pull the following:
- Jon fixes a reboot issue on most Northstar Plus platforms by adding the
"open-source" property to the "gpio-restart" Device Tree nodes
* tag 'arm-soc/for-4.11/devicetree-fixes-2' of http://github.com/Broadcom/stblinux:
ARM: dts: NSP: GPIO reboot open-source
Currently the slope and offset values for calculating the
hot spot temperature of a particular thermal zone is part
of driver data. Pass them here instead and obtain the values
while of node parsing.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently the slope and offset values for calculating the
hot spot temperature of a particular thermal zone is part
of driver data. Pass them here instead and obtain the values
while of node parsing.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently the slope and offset values for calculating the
hot spot temperature of a particular thermal zone is part
of driver data. Pass them here instead and obtain the values
while of node parsing.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently the slope and offset values for calculating the
hot spot temperature of a particular thermal zone is part
of driver data. Pass them here instead and obtain the values
while of node parsing.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add basic support for STM32H743 MCU and his eval board.
The STMicrolectornics's STM32H743 MCU is based on Cortex-M7 core
running up to @400MHz with 2MB internal flash and 1MB internal RAM.
For more details see:
Documentation/arm/stm32/stm32h743-overview.txt
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch introduces the MACH_STM32H743 to make possible to only select
STM32H743 pinctrl driver
By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Add pinmux for rx,tx,cts and rts lines of uart0. This will enable uart0
to use hardware flow control.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable support for W25Q64CVSSIG which is a Winbond 64 Mbit SPI NOR.
At boot you will see the following message:
m25p80 spi1.0: found s25fl064k, expected w25q64
This is because the JEDEC ID for this chip is the same as s25fl064k.
However, this should be harmless since both chips are essentially the
same.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in dra7.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.
As we now need to define voltage ranges for each OPP, we define the
minimum and maximum voltage to match the ranges possible for AVS class0
voltage as defined by the DRA7/AM57 Data Manual, with the exception of
using a range for OPP_OD based on historical data to ensure that SoCs
from older lots still continue to boot, even though more optimal voltages
are now the standard. Once an AVS Class0 driver is in place it will be
possible for these OPP voltages to be adjusted to any voltage within the
provided range.
Information from SPRS953, Revised December 2015.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
eviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The operatings-points-v2 table for am4372 was merged before any user of
it was present in the kernel and before the binding had been finalized.
The new ti-cpufreq driver and binding expects the platform specific
properties to be part of the operating-points-v2 table rather than the
cpu node so let's move them there as the only user is the ti-cpufreq
driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
eviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
Beaglebone Blacks may have PG2.0 silicon populated and these particular
parts are guaranteed to support the OPP, so enable it for PG2.0 on
am335x-boneblack only.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
eviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.
Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
eviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the SATA controller node to the dm8168-evm device tree.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This board has an external oscillator supplying the reference clock
signal for SATA. Its rate is fixed at 100Mhz. Add a corresponding
device tree node.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is now supported on the dm8168-evm board, so enable it in
the defconfig for omap2+.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Introduce HWMOD_CLKDM_NOAUTO flag that allows the hwmod's
clockdomain to be prevented from HW_AUTO while the hwmod is active.
This is needed to workaround some modules which don't function
correctly with HW_AUTO. e.g. DCAN on DRA7.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: rebased to v4.9 kernel]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
'flags' member of omap_hwmod structure is fast running
out of space with 16 different flags already defined.
Make flags a 32-bit entity so as to allow for more flags.
This results is a ~2.3K data section size increase with
omap2plus_defconfig on v4.11-rc2.
before:
text data bss dec hex filename
8186930 3082444 8252992 19522366 129e33e vmlinux
after:
text data bss dec hex filename
8186922 3084812 8252992 19524726 129ec76 vmlinux
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Though cpsw doesn't support EEE feature, Atheros 8035 provides
automatic EEE support that is enabled by default. This causes
occasional link drops when link partner also announces EEE support.
These link drops occur on both 100Mbit/s and 1000Mbit/s speeds.
So disable EEE advertising completely.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The manufacturing information is stored in the EEPROM. This chip
is an AT24C64 not not (nor has it ever been) 24C02. This patch will
correctly address the EEPROM to read the entire contents and not just
256 bytes (of 0xff).
Fixes: 5e3447a29a ("ARM: dts: LogicPD Torpedo: Add AT24 EEPROM Support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch enables clocks for STM32F746 MCU.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Add appropriate properties to devices in the Linksys WRT AC Series for the
mvneta driver to use hardware buffer management.
Also update "soc" ranges property and set the status of bm and bm-bppi
to "okay" (SRAM).
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[adapted rk1108 dtsi to keep bisectability]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Nokia N950 and N9 have a wl1271 (with nokia bootloader) bluetooth
module connected to second UART.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add bcm2048 node and its system clock to the N900 device tree file.
Apart from that a reference to the new clock has been added to
wl1251 (which uses it, too).
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The unit address for the msi controller is not valid as there is no reg
property, so remove it. Also, msi-controller is the preferred node name.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds baud rate, parity & number of data bits. It's required to get
serial working correctly.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
So far every Northstar device we have seen was using the same serial
console params (115200n8). It probably make the most sense to put it in
some proper dtsi files instead of repeating over and over for every
single device. As different boards may use different bootloaders it
seems the safest idea is to use board specific dtsi files.
Just in case some vendor decides to use different UART (parameters) this
can be always easily overwritten.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Droid 4 has two modems, mdm6600 and w3glte. Both are on the HCI USB
controller.
Let's add a configuration for the HCI so the modems can be enabled.
Note that the modems still need additional GPIO based configuration.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-by: Sebastian Reichel <sre@kernel.org>
[tony@atomide.com: left out url]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LCD panel on droid 4 is a command mode LCD. The binding follows
the standard omapdrm binding and the changes needed for omapdrm command
mode panels are posted separately.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can get HDMI working as long as the 5V regulator is on. There is
probably an encoder chip there too, but so far no idea what it might be.
Let's keep the 5V HDMI regulator always enabled for now as otherwise we
cannot detect the monitor properly.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add tmp105 sensor for droid 4. This can be used with modprobe
lm75.ko and running sensors from lm-sensors package. Note that
the lm75.c driver does not yet support alert interrupt but
droid 4 seems to be wired for it.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Droid 4 has a GPIO line that we can use with CONFIG_POWER_RESET_GPIO.
It is probably connected to the CPCAP PMIC, and seems to power down
the whole device taking power consumption to zero based on what
I measured.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TI LMU driver has not yet been merged, but the device
tree binding for TI LMU drivers has been acked already
earlier by Rob Herring <robh+dt@kernel.org>. So it should
be safe to apply to cut down the number of pending patches.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Milo Kim <milo.kim@ti.com>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit enable DMA-based transfers for SD/eMMC card adapters
and reduce number of interrupts produced by SD-card/eMMC-card
adapters.
Sometimes interrupts from SD-card/eMMC-card adapters running in
PIO mode blocks execution of hrtimers and I2S DMA callbacks for
a long periods (100 ms or more).
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
[moved dma properties to rk3xxx.dtsi and added sdio dma]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The vpif display driver uses a static i2c adapter ID of 1 but on the
da850-evm board in DT boot mode the i2c adapter ID is actually 0.
Make the adapter ID configurable like it already is for vpif capture.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
We want to select the GPIO_FTGPIO010 symbol for the generic
Faraday FTGPIO010 driver, not the old driver.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The binding should state "cortina,gemini-gpio", "faraday,ftgpio010"
stating the full name of the IP part.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
According to [0] pointed out by Marc Zyngier in a report about a
similar error message, PPIs 11 and 13 are edge triggered on
Cortex-A9 socs including the rk3066 and rk3188 which currently
mark them as level triggered.
Until some time ago the gic did not care but commit 992345a58e
("irqchip/gic: WARN if setting the interrupt type for a PPI fails")
introduced a warning for that case.
Fix the warning on these socs by describing the interrupts correctly
and also using the binding constants for easier reading in the future.
[0] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/CCHEIGIC.html
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The OPP are declared as shared but no operating points are declared for
cpu1, 2 and 3. Thus, the following error happens during the boot:
cpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.
This patch applies the operating points to each cpu of the A33.
Fixes: 03749eb88e ("ARM: dts: sun8i: add opp-v2 table for A33")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
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Merge tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
* tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: dts: silk: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r7s72100: Add watchdog timer
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix USB host for sama5d2
- Fix cpuidle on sama5
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Merge tag 'at91-ab-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into fixes
Fixes for 4.11:
- Fix USB host for sama5d2
- Fix cpuidle on sama5
* tag 'at91-ab-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: pm: cpu_idle: switch DDR to power-down mode
Revert "ARM: at91/dt: sama5d2: Use new compatible for ohci node"
Signed-off-by: Olof Johansson <olof@lixom.net>
A bunch of device tree fixes for various boards / SoCs.
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Merge tag 'sunxi-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.11
A bunch of device tree fixes for various boards / SoCs.
* tag 'sunxi-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun8i: a23/a33: drop bl_en_pin GPIO pinmux in reference design DTSI
ARM: dts: sun7i: lamobo-r1: Fix CPU port RGMII settings
ARM: sun8i: Fix the mali clock rate
Signed-off-by: Olof Johansson <olof@lixom.net>
- A fix to reboot hang seen on imx6sx-udoo-neo board, by removing
arm-supply and soc-supply and using LDO enabled mode.
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Merge tag 'imx-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.11:
- A fix to reboot hang seen on imx6sx-udoo-neo board, by removing
arm-supply and soc-supply and using LDO enabled mode.
* tag 'imx-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx-udoo-neo: Fix reboot hang
Signed-off-by: Olof Johansson <olof@lixom.net>
The moxart interrupt line flags were not respected in previous
driver: instead of assigning them per-consumer, a fixes mask
was set in the controller.
With the migration to a standard Faraday driver we need to
set up and handle the consumer flags correctly. Also remove
the Moxart-specific flags when switching to using real consumer
flags.
Extend the register window to 0x100 bytes as we may have a few
more registers in there and it doesn't hurt.
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Allow including of dtsi files in an architecture-independent manner.
Some dtsi files may be shared between architectures and one suggestion
was to have symlinks and let these includes get accessed via a
#include <arm64/foo.dtsi>
So add the necessary symlinks for arm32.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
kprobes test cases need to have a stack that is aligned to an 8-byte
boundary because they call other functions (and the ARM ABI mandates
that alignment) and because test cases include 64-bit accesses to the
stack. Unfortunately, GCC doesn't ensure this alignment for inline
assembler and for the code in question seems to always misalign it by
pushing just the LR register onto the stack. We therefore need to
explicitly perform stack alignment at the start of each test case.
Without this fix, some test cases will generate alignment faults on
systems where alignment is enforced. Even if the kernel is configured to
handle these faults in software, triggering them is ugly. It also
exposes limitations in the fault handling code which doesn't cope with
writes to the stack. E.g. when handling this instruction
strd r6, [sp, #-64]!
the fault handling code will write to a stack location below the SP
value at the point the fault occurred, which coincides with where the
exception handler has pushed the saved register context. This results in
corruption of those registers.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Kprobes/arm skips single-stepping (moreover handling the event)
if the conditional instruction must not be executed. This
also apply the rule when we hit the recursing kprobe, so
that kprobe does not count nmissed up in that case.
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This is arm port of commit 6a5022a56a ("kprobes/x86: Allow to
handle reentered kprobe on single-stepping")
Since the FIQ handlers can interrupt in the single stepping
(or preparing the single stepping, do_debug etc.), we should
consider a kprobe is hit in the NMI handler. Even in that
case, the kprobe is allowed to be reentered as same as the
kprobes hit in kprobe handlers
(KPROBE_HIT_ACTIVE or KPROBE_HIT_SSDONE).
The real issue will happen when a kprobe hit while another
reentered kprobe is processing (KPROBE_REENTER), because
we already consumed a saved-area for the previous kprobe.
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
The highest supported frequency (1.2GHz) requires to "overvolt" the CPU.
However, some boards still do not have the cpu-supply DT property in the
cpu DT node which means that the CPU will always run with the same input
voltage but try to run at 1.2GHz frequency. This is the source of
(experienced) CPU crashes.
Remove the OPP which requires overvolting the CPU until all boards have
a cpu-supply property.
Fixes: 03749eb88e ("ARM: dts: sun8i: add opp-v2 table for A33")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The digital AIF interfaces has been renamed in the sun8i audio codec
driver so the audio-routing in the device tree must be renamed too.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The KBUILD_IMAGE variable is used by the rpm and deb-pkg targets, which
expect it to point to the image file in the build directory. The
builddeb script has a workaround for architectures which only provide
the basename, but let's provide a clean interface for packaging tools.
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Michal Marek <mmarek@suse.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
We don't hold the mmap_sem while searching for VMAs (via find_vma), in
kvm_arch_prepare_memory_region, which can end up in expected failures.
Fixes: commit 8eef91239e ("arm/arm64: KVM: map MMIO regions at creation time")
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Auger <eric.auger@rehat.com>
Cc: stable@vger.kernel.org # v3.18+
Reviewed-by: Christoffer Dall <cdall@linaro.org>
[ Handle dirty page logging failure case ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We don't hold the mmap_sem while searching for the VMAs when
we try to unmap each memslot for a VM. Fix this properly to
avoid unexpected results.
Fixes: commit 957db105c9 ("arm/arm64: KVM: Introduce stage2_unmap_vm")
Cc: stable@vger.kernel.org # v3.19+
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The bl_en_pin GPIO pinmux is configured as "gpio_in", which makes it
conflicts with the real GPIO usage (out), and makes the backlight not
usable.
Drop the GPIO pinmux for it, thus this GPIO can be correctly used.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CPU port of the BCM53125 is configured with RGMII (no delays) but
this should actually be RGMII with transmit delay (rgmii-txid) because
STMMAC takes care of inserting the transmitter delay. This fixes
occasional packet loss encountered.
Fixes: d7b9eaff5f ("ARM: dts: sun7i: Add BCM53125 switch nodes to the lamobo-r1 board")
Reported-by: Hartmut Knaack <knaack.h@gmx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some platform based configuration setup of spi-imx SPI devices does
not set the "chip_select" to the actual hardware chip select used.
This works because the cs_gpio mapping that is associated with this
platform setup maps the chip_select offset used to the appropriate
hardware chip select. The spi-imx driver uses the chip_select as an
index into the cs_gpio array and ultimately gets the correct hardware
chip select for its hardware setup.
The motivation is to be able to eventually modify the spi-imx code to
use the "chip_select" directly for harwdare setup instead of indirectly
via the cs_gpio mapping array.
This change only affects platforms using the hardware chip select
addressing method for their SPI devices (sometimes called native chip
select). The majority of devices using the spi-imx driver use the GPIO
addressing method.
The change to use the correct "chip_select" is strait forward. But the
cs_gpio mapping arrary also needs to be modifed to match that change. In
simple terms the cs_gpio mapping should always have the hardware chip
select number at its same index offset.
There is no functional change with these patches. The three affected
platforms should work exactly as before. However I don't have any of
these platforms (or access to them) and so I can't test them. So this
patch is compile tested only.
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It's especially annoying if the system cannot be properly
powered down so select the poweroff driver from the Kconfig.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Gemini power controller to the SoC DTSI
file.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Adds crypto hardware (SPU) to Northstar Plus device tree file.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adds mailbox / PDC to NSP device tree. Needs new compatibility string
to differentiate from NS2 version.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adding ethernet aliases. These are used, for example, by bootloaders,
to modify the MAC addresses in the device tree.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is BCM47081A0 based home router with BCM43217 and BCM4352 wireless
chipsets.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The i2c device tree entry should be disabled by default to match the
current convention in other device tree files. Similarily, enable it on
the XMC board, where it is being used.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the EHCI and OHCI entries to the Northstar Plus device tree files.
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
GIC_PPI flags were misconfigured for the timers, resulting in errors
like:
[ 0.000000] GIC: PPI11 is secure or misconfigured
Changing them to being edge triggered corrects the issue
Suggested-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
We need to enable this controller so that we can switch the SD card's
pinmux over to it by default, which will improve storage performance.
Read access (dd with 64k blocks on rpi2):
CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s
CONFIG_MMC_BCM2835: 19-20 MB/s
Differences on write access are pretty much in the noise.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Pull ARM fix from Russell King:
"Just one change to add the statx syscall this time around"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: wire up statx syscall
Add OneNAND node for IGEP and leave it disabled by default. It is up
to bootloader to enable proper node. Timing just works, but values are
copied over from N900 as I was unable to find chip datasheet.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit 35fa91eed8 ("ARM: kernel: merge core and init PLTs"),
the ARM module PLT code allocates all PLT entries in a single core
section, since the overhead of having a separate init PLT section is
not justified by the small number of PLT entries usually required for
init code.
However, the core and init module regions are allocated independently,
and there is a corner case where the core region may be allocated from
the VMALLOC region if the dedicated module region is exhausted, but the
init region, being much smaller, can still be allocated from the module
region. This puts the PLT entries out of reach of the relocated branch
instructions, defeating the whole purpose of PLTs.
So split the core and init PLT regions, and name the latter ".init.plt"
so it gets allocated along with (and sufficiently close to) the .init
sections that it serves. Also, given that init PLT entries may need to
be emitted for branches that target the core module, modify the logic
that disregards defined symbols to only disregard symbols that are
defined in the same section.
Fixes: 35fa91eed8 ("ARM: kernel: merge core and init PLTs")
Cc: <stable@vger.kernel.org> # v4.9+
Reported-by: Angus Clark <angus@angusclark.org>
Tested-by: Angus Clark <angus@angusclark.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Note that early-bresp-disable and full-line-zero-disable are required
because the sideband signals between the CPU and L2C were not connected
in this SoC.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Even though L2C is specified in the DT, you still need to add the aux
settings in the machine_desc.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
If a PL310 is added to a system, but the sideband signals are not
connected, some Cortex A9 optimizations cannot be used. In particular,
enabling Full Line of Zeros in the CA9 without sidebands connected will
crash the system since the CA9 will expect the L2C to perform operations,
yet the L2C never gets the commands. Early BRESP also does not work
without sideband signals.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Register the TS-7300 FPGA manager device drivers which allows us to load
bitstreams into the on-board Altera Cyclone II FPGA.
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The libgpio code pre-sets the GPIO values for the gpio-reset in the
device tree. This results in the device being reset during bringup.
To prevent this pre-setting, use the "open-source" flag in the device
tree.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: b1aaf88 ("ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file")
Fixes: 10baed1 ("ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file")
Fixes: 088e3148 ("ARM: dts: NSP: Add new DT file for bcm958522er")
Fixes: e3227c1 ("ARM: dts: NSP: Add new DT file for bcm958525er")
Fixes: 2f8bc00 ("ARM: dts: NSP: Add new DT file for bcm958622hr")
Fixes: d454c37 ("ARM: dts: NSP: Add new DT file for bcm958623hr")
Fixes: f27eacf ("ARM: dts: NSP: Add new DT file for bcm988312hr")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Currently bcm2835_defconfig has CMA disabled which makes the
HDMI output on a Raspberry Pi 1 stop working during boot:
fb: switching to vc4drmfb from simple
Console: switching to colour dummy device 80x30
[drm] Initialized vc4 0.0.0 20140616 for soc:gpu on minor 0
[drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[drm] Driver supports precise vblank timestamp query.
vc4-drm soc:gpu: failed to allocate buffer with size 9216000
vc4-drm soc:gpu: Failed to set initial hw configuration.
So enable CMA and DMA_CMA in bcm2835_defconfig.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: 4400d9ac05 ("ARM: bcm2835: Enable the VC4 graphics driver in the defconfig")
Reviewed-by: Eric Anholt <eric@anholt.net>
Add the dmas and dma-names properties to support HDMI audio.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This patch enables Altera TSE support in socfpga_defconfig
Signed-off-by: Jia Jie Ho <ho.jia.jie@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add the Altera Arria10 System Resource Reset Controller to the MFD
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2 change commit header to ARM: dts: socfpga.
dw-mmc got its reset-properties specified, so add the softresets
for it in rk3228/rk3229.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviwed-by: Shawn Lin <shawn.lin@rock-chips.com>
dw-mmc got its reset-properties specified, so add the softresets
for it in rk3066/rk3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviwed-by: Shawn Lin <shawn.lin@rock-chips.com>
dw-mmc got its reset-properties specified, so add the softresets
for it in rk3036.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviwed-by: Shawn Lin <shawn.lin@rock-chips.com>
dw-mmc got its reset-properties specified, so add the softresets
for it in rk3288.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviwed-by: Shawn Lin <shawn.lin@rock-chips.com>
Select CONFIG_HID_MULTITOUCH so that we can have multi touchscreen
funtionality via USB by default on Engicam i.CoreM6 Quad with
OpenFrame Cap 10.1 display boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Select CONFIG_TOUCHSCREEN_MAX11801 so that we can have touchscreen
funtionality by default on Engicam i.CoreM6 Quad boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The best place to register the CPU cooling device is from the cpufreq
driver as we would know if all the resources are already available or
not. That's what is done for the cpufreq-dt.c driver as well.
The cpu-cooling driver for dbx500 platform was just (un)registering
with the thermal framework and that can be handled easily by the cpufreq
driver as well and in proper sequence as well.
Get rid of the cooling driver and its its users and manage everything
from the cpufreq driver instead.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
BCM7260 has the same UART base address as 7268, order the entries by
ascending chip number and alias the 7268 definition to the 7260
definition.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Due to the brcmstb SoC's memory map, we may have holes in the memory if
we don't populate the maximum amount of memory supported by e.g: the
first memory controller which spans either the first 1GiB or first 2GiB
of memory.
We need to select ARCH_HAS_HOLES_MEMORYMODEL in order to enable
CONFIG_HAVE_ARCH_PFN_VALID on platforms that have CONFIG_SPARSEMEM
enabled.
Signed-off-by: Danesh Petigara <danesh.petigara@broadcom.com>
[florian: Detailed commit message]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Some Host Controller hardware blocks, like the OHCI, EHCI and SDIO
controllers, have hardware blocks that are not capable of doing 64 bit
DMA. These host controllers fail on boards with >3GB of memory because
the memory above 3GB is located physically >= 0x100000000 and can only
be accessed using 64 DMA. The way Linux is currently configured for
BRCMSTB systems, the memory given to drivers for DMA through functions
like dma_alloc_coherent() comes from CMA memory and CMA memory is taken
from the top of physical memory. When these drivers get a DMA buffer
with an address >=0x100000000, they end up dropping the upper 32 bit of
the address causing the hardware to DMA to incorrect memory, typically
BMEM (custom memory carveout). This issue was discovered on a
BCM97449SSV_DDR4 system with 4GB or memory.
The fix is to enable CONFIG_ZONE_DMA. On ARM systems this makes sure
that all DMA memory is located within the first 32 bits of address
space.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
We want to be able to dynamically allocate struct omap_hwmod_ocp_if and
struct omap_hwmod at device driver probe time based on .dts data.
Current setup with the linkspace using memblock_virt_alloc() makes
this tricky, so let's get rid of struct linkspace and directly set up
struct omap_hwmod_ocp_if as the master and slave lists.
As we are currently not using the master_ports either, let's remove it
too. And let's add the struct omap_hwmod_ocp_if node directly to the
slave_ports list.
Signed-off-by: Tony Lindgren <tony@atomide.com>
On some DDR controllers, compatible with the sama5d3 one,
the sequence to enter/exit/re-enter the self-refresh mode adds
more constrains than what is currently written in the at91_idle
driver. An actual access to the DDR chip is needed between exit
and re-enter of this mode which is somehow difficult to implement.
This sequence can completely hang the SoC. It is particularly
experienced on parts which embed a L2 cache if the code run
between IDLE calls fits in it...
Moreover, as the intention is to enter and exit pretty rapidly
from IDLE, the power-down mode is a good candidate.
So now we use power-down instead of self-refresh. As we can
simplify the code for sama5d3 compatible DDR controllers,
we instantiate a new sama5d3_ddr_standby() function.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # v4.1+
Fixes: 017b5522d5 ("ARM: at91: Add new binding for sama5d3-ddramc")
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
- Bindings for the platform.
- Device trees for everything that was available as board
files previously.
- New device tree for my target system SQ201.
- Device tree bindings for the watchdog. The driver was merged
to the watchdog subsystem so this was probably just missed
by the maintainer, and it is ACKed by Rob Herring.
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Merge tag 'gemini-dts-base' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Base patches for Gemini device trees:
- Bindings for the platform.
- Device trees for everything that was available as board
files previously.
- New device tree for my target system SQ201.
- Device tree bindings for the watchdog. The driver was merged
to the watchdog subsystem so this was probably just missed
by the maintainer, and it is ACKed by Rob Herring.
* tag 'gemini-dts-base' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add watchdog to the Gemini
watchdog: add DT bindings for Cortina Gemini
ARM: dts: add a devicetree for Wiliboard WBD-222
ARM: dts: add a devicetree for Wiliboard WBD-111
ARM: dts: add a devicetree for Teltonika RUT1xx
ARM: dts: add a devicetree for Raidsonic NAS IB-4220-B
ARM: dts: add device tree for Gemini SoC and SQ201
ARM: dts: add top-level DT bindings for Cortina Gemini
Signed-off-by: Olof Johansson <olof@lixom.net>
- Converts the Gemini platform to device tree.
- Deletes all the board files.
- Fixes the prerequisities for a multiplatform boot and
switches to multiplatform.
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Merge tag 'gemini-multiplat-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/soc
This patchset:
- Converts the Gemini platform to device tree.
- Deletes all the board files.
- Fixes the prerequisities for a multiplatform boot and
switches to multiplatform.
* tag 'gemini-multiplat-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: gemini: convert to ARMv4 multiplatform
ARM: gemini: select ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR
ARM: gemini: switch to sparse IRQs
ARM: gemini: delete all boardfiles
ARM: gemini: DT for the Cortina Gemini SoC platforms
ARM: gemini: convert to MULTI_IRQ_HANDLER
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix smartreflex platform data regression where I accidentally
removed legacy platform data still in use
- Fix hypervisor mode for thumb2 kernel
- Fix misplaced tpic2810 to move it to right bus
- Enable INPUT_MOUSEDEV as a loadable module have mice working
- Fix use of gpio-key,wakeup and use wakeup-source instead as
this accidentally sneaked in during the merge window
- Fix error handling for onenand to properly return error
- Remove legacy gpmc-nand.c that's now dead code, this
also removes dependency to the MTD tree for further driver
changes
- Fix device node reference count errors for omap3 and
related to it also release device nodes after no longer
needed
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Merge tag 'omap-for-v4.11/fixes-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.11-rc cycle:
- Fix smartreflex platform data regression where I accidentally
removed legacy platform data still in use
- Fix hypervisor mode for thumb2 kernel
- Fix misplaced tpic2810 to move it to right bus
- Enable INPUT_MOUSEDEV as a loadable module have mice working
- Fix use of gpio-key,wakeup and use wakeup-source instead as
this accidentally sneaked in during the merge window
- Fix error handling for onenand to properly return error
- Remove legacy gpmc-nand.c that's now dead code, this
also removes dependency to the MTD tree for further driver
changes
- Fix device node reference count errors for omap3 and
related to it also release device nodes after no longer
needed
* tag 'omap-for-v4.11/fixes-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Release device node after it is no longer needed.
ARM: OMAP2+: Fix device node reference counts
ARM: OMAP2+: Remove legacy gpmc-nand.c
ARM: OMAP2+: gpmc-onenand: propagate error on initialization failure
ARM: dts: am335x-pcm953: Fix legacy wakeup source binding
ARM: omap2plus_defconfig: Enable INPUT_MOUSEDEV as loadable modules
ARM: dts: am57xx-idk: tpic2810 is on I2C bus, not SPI
ARM: OMAP5 / DRA7: Fix HYP mode boot for thumb2 build
ARM: OMAP3: Fix smartreflex platform data regression
Signed-off-by: Olof Johansson <olof@lixom.net>
please pull the following:
- Jon fixes the UART output on the Broadcom bcm953012k reference board by
using the proper clock reference instead of hard-coding the baud rate
- Jon also fixes the memory map on the bcm953012k reference board by using
the appropriate physical RAM start address
- Jon finally fixes the interrupt type for the Cortex A9 global and local
timers found in the BCM5301X SoC (Norsthar).
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Merge tag 'arm-soc/for-4.11/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoC Device Tree fixes for 4.11,
please pull the following:
- Jon fixes the UART output on the Broadcom bcm953012k reference board by
using the proper clock reference instead of hard-coding the baud rate
- Jon also fixes the memory map on the bcm953012k reference board by using
the appropriate physical RAM start address
- Jon finally fixes the interrupt type for the Cortex A9 global and local
timers found in the BCM5301X SoC (Norsthar).
* tag 'arm-soc/for-4.11/devicetree-fixes' of http://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the AB8500 clocks to the device tree using the new
bindings from the clk subsystem, making audio work again.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Watchdog module does not have external dependencies so it can be safely
enabled in exynos4.dtsi thus making it available for all Exynos4-based
boards.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Watchdog module does not have external dependencies so it can be safely
enabled in s3c64xx.dtsi thus making it available for all S3C64xx-based
boards.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
The Exynos4412 has the same watchdog as newer SoCs (e.g. Exynos5250).
Just like the others, for working it requires additional steps in Power
Management Unit: unmasking the reset request and enabling the system
reset. Without these additional steps in PMU, the watchdog will not be
able to reset the system on expiration event.
Change the compatible of Exynos4412 watchdog device node to
samsung,exynos5250-wdt which includes the additional PMU steps.
This will also fix infinite watchdog interrupt in soft mode (lack of
interrupt clear) because it is also included in samsung,exynos5250-wdt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk device node is already enabled in r8a7794.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk device node is already enabled in r8a7793.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The pcie_bus_clk device node is already enabled in r8a7791.dtsi, so
there is no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk and pcie_bus_clk device nodes are already enabled in
r8a7791.dtsi, so there is no need to update their statuses again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk device node is already enabled in r8a7790.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk device node is already enabled in r8a7779.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The scif_clk device node is already enabled in r8a7778.dtsi, so there is
no need to update its status again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While status "ok" does work, the canonical form is "okay", so update the
few places that used the former.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This converts the Gemini platform to ARMv4 multiplatform, deleting
the local <mach/*> include directory, moving an idiomatic local
idling function into the .machine_init() call and getting rid of
the Makefile.boot finally.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This platform survives physical to virtual patching
without any hickups, and can use AUTO_ZRELADDR.
We still need to keep Makefile.boot but it is now empty.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is no boardfiles or anything else using the fixed IRQs
anymore, switch the platform to use sparse IRQs and delete
the <mach/irqs.h> header.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Delete the Gemini boardfiles: we have corresponding, fully-featured
device trees for all these boards. Delete the referenced include
files. Delete the local config symbols, especially one for
"swapped memory", as all supported boards have swapped memory, and
would a new board be supported this is likely not the right way
to achieve it anyways. Only the Kconfig options in the central
arch/arm/Kconfig remains.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds initial and compulsory device tree support to the
Gemini ARMv4 platform.
We are selecting a bunch of "absolute minimals" for getting a working
system up with just device tree:
- We select USE_OF for natural reasons or nothing works.
- We select CLKSRC_OF and GEMINI_TIMER so we get timekeeping from
the clocksource.
- We select GPIO_GEMINI because these are used as irqchips, and
for a generic driver it is not reasonable for those to have to
select every possible irqchip in the world to work, the platform
should simply provide the available irqchips.
- We select a UART that can be exprected to work with
SERIAL_OF_PLATFORM which is the name for an 8250 OF-probed
serial port.
- We select the syscon-based reset controller: it's not fun when
"reboot" doesn't work because of Kconfig, so we just select
POWER_RESET and POWER_RESET_SYSCON.
- We perhaps a bit controversiallt select ARM_APPENDED_DTB, because
this platform is using the ancient RedBoot, and can *NOT* be
expected to upgrade its bootloaders. Appended device tree is
simply how these devices have to work with device tree.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In order to enable device tree boot on this machine we must first
convert it to runtime-manage its irq handler, so do this.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This devicetree is simply based on the board file in
arch/arm/mach-gemini/board-wbd222.c and contain the
equivalent platform data, mainly just moving the GPIOs
from the global numberspace to explicitly reference their
parent GPIO.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This devicetree is simply based on the board file in
arch/arm/mach-gemini/board-wbd111.c and contain the
equivalent platform data, mainly just moving the GPIOs
from the global numberspace to explicitly reference their
parent GPIO.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This devicetree is simply based on the board file in
arch/arm/mach-gemini/board-rut1xx.c and contain the
equivalent platform data, mainly just moving the GPIOs
from the global numberspace to explicitly reference their
parent GPIO.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This devicetree is simply based on the board file in
arch/arm/mach-gemini/board-nas4220b.c and contain the
equivalent platform data, mainly just moving the GPIOs
from the global numberspace to explicitly reference &gpio1.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree for the Gemini SoC and the ITian
Square One SQ201 board that has been my testing target
for Gemini device tree support.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM updates from Marc Zyngier:
"vgic updates:
- Honour disabling the ITS
- Don't deadlock when deactivating own interrupts via MMIO
- Correctly expose the lact of IRQ/FIQ bypass on GICv3
I/O virtualization:
- Make KVM_CAP_NR_MEMSLOTS big enough for large guests with
many PCIe devices
General bug fixes:
- Gracefully handle exception generated with syndroms that
the host doesn't understand
- Properly invalidate TLBs on VHE systems"
x86:
- improvements in emulation of VMCLEAR, VMX MSR bitmaps, and VCPU reset
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM updates from Marc Zyngier:
- vgic updates:
- Honour disabling the ITS
- Don't deadlock when deactivating own interrupts via MMIO
- Correctly expose the lact of IRQ/FIQ bypass on GICv3
- I/O virtualization:
- Make KVM_CAP_NR_MEMSLOTS big enough for large guests with many
PCIe devices
- General bug fixes:
- Gracefully handle exception generated with syndroms that the host
doesn't understand
- Properly invalidate TLBs on VHE systems
x86:
- improvements in emulation of VMCLEAR, VMX MSR bitmaps, and VCPU
reset
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: nVMX: do not warn when MSR bitmap address is not backed
KVM: arm64: Increase number of user memslots to 512
KVM: arm/arm64: Remove KVM_PRIVATE_MEM_SLOTS definition that are unused
KVM: arm/arm64: Enable KVM_CAP_NR_MEMSLOTS on arm/arm64
KVM: Add documentation for KVM_CAP_NR_MEMSLOTS
KVM: arm/arm64: VGIC: Fix command handling while ITS being disabled
arm64: KVM: Survive unknown traps from guests
arm: KVM: Survive unknown traps from guests
KVM: arm/arm64: Let vcpu thread modify its own active state
KVM: nVMX: reset nested_run_pending if the vCPU is going to be reset
kvm: nVMX: VMCLEAR should not cause the vCPU to shut down
KVM: arm/arm64: vgic-v3: Don't pretend to support IRQ/FIQ bypass
arm64: KVM: VHE: Clear HCR_TGE when invalidating guest TLBs
The eMMC devices on UniPhier boards are generally used in the 8-bit
mode. So, DAT4-7 pins should be controlled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These UniPhier DT files are fine as long as they are compiled in the
Linux build system. It is true that Linux is the biggest user of
DT, but DT is project neutral from its concept. DT files are often
re-used for other projects. Especially for the UniPhier platform,
these DT files are re-used for U-Boot as well.
If I feed these DT files to the FDTGREP tool in U-Boot, it complains
about the node order.
FDTGREP spl/u-boot-spl.dtb
Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT
/aliases node must come before all other nodes
Given that DT is not very sensitive to the order of nodes, this is a
problem of FDTGREP. I filed a bug report a year ago, but it has not
been fixed yet.
Differentiating DT is painful. So, I am up-streaming the requirement
from the down-stream project.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add watchdog timer support for RZ/A1.
For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
is useful even if you don't need the watchdog functionality.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Such a trigger doesn't exist in Linux and is not needed as LED is being
turned off by default. This could cause errors in LEDs core code when
trying to set default trigger.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Such a trigger doesn't exist in Linux and is not needed as LED is being
turned off by default. This could cause errors in LEDs core code when
trying to set default trigger.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
If an architecture uses 4level-fixup.h we don't need to do anything as
it includes 5level-fixup.h.
If an architecture uses pgtable-nop*d.h, define __ARCH_USE_5LEVEL_HACK
before inclusion of the header. It makes asm-generic code to use
5level-fixup.h.
If an architecture has 4-level paging or folds levels on its own,
include 5level-fixup.h directly.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add support for an extra config parameter for perf commands:
axi_id, which will be written in the MMDC's MADPCR1 register,
to filter memory usage profiling (see i.MX6 reference manual,
chapter 44.7 MMDC Profiling for AXI id usage).
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Acked-by: Frank Li <Frank.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fixed an error in the "write-accesses" event definition.
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Acked-by: Frank Li <Frank.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently, the bit sliced NEON AES code for ARM has a link time
dependency on the scalar ARM asm implementation, which it uses as a
fallback to perform CBC encryption and the encryption of the initial
XTS tweak.
The bit sliced NEON code is both fast and time invariant, which makes
it a reasonable default on hardware that supports it. However, the
ARM asm code it pulls in is not time invariant, and due to the way it
is linked in, cannot be overridden by the new generic time invariant
driver. In fact, it will not be used at all, given that the ARM asm
code registers itself as a cipher with a priority that exceeds the
priority of the fixed time cipher.
So remove the link time dependency, and allocate the fallback cipher
via the crypto API. Note that this requires this driver's module_init
call to be replaced with late_initcall, so that the (possibly generic)
fallback cipher is guaranteed to be available when the builtin test
is performed at registration time.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Return KVM_USER_MEM_SLOTS for userspace capability query on
NR_MEMSLOTS.
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch updates the Duckbill device tree and synchronize it with
the vendor distributed file. The changes in mostly pin-muxing stuff,
but also some minor fixes. In detail:
- enable SPI pins
- enable I2C pins
- enable UART pins
- enable LRADC pin
- adjust USB DR mode
- add default triggers for LEDs
- get rid of regulators simple-bus container
- adjust phy reset duration
According to phy datasheet, 25ms are sufficient. This also reduces
the time to boot the system.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch renames mmc2_sck_cfg in order to prepare for an alternative
muxing setup.
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Quoting Philipp Zabel:
"Since this regulator is used as the TVDAC analog power supply, this
range should at least be limited to the analog power supply range of the
TVDAC, listed in Table 74-9. of the i.MX53 reference manual (2.5-2.75V).
But since the nominal voltage is 2.75V, which was used to determine the
analog gain that is supposed to result in the necessary 0.7V
peak-to-peak amplitude on the VGA output, I'd say we should just fix the
voltage to 2750000 here."
, so limit the TVDAC analog power supply as suggested.
Suggested-by: Lucas Stach <l.stach@pengutronix.de>
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The cm-fx6 module has an onboard Wolfson wm8731 codec which is muxed
to the ssi2 controller. Unlike most (all?) supported i.MX6 board/codec
combinations the wm8731 is operated in slave mode and the clock setup
is static.
Add support for it.
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
[christopher.spinrath@rwth-aachen.de: enhanced commit message, ported
to upstream and some cleanup]
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
After issuing a 'reboot' command the imx6sx-udoo-neo board does not
reboot as expected and it just hangs instead.
In mainline kernel only LDO enabled mode is supported. Do not provide
arm-supply/soc-supply nodes in the device tree, so that the board operates
in LDO enabled mode and can then successfully reboot via watchdog.
Fixes: 76e691fc76 ("ARM: dts: imx6sx: Add UDOO Neo support")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently, TI clock driver uses an encapsulated struct that is cast into
a void pointer to store all register addresses. This can be considered
as rather nasty hackery, and prevents from expanding the register
address field also. Instead, replace all the code to use proper struct
in place for this, which contains all the previously used data.
This patch is rather large as it is touching multiple files, but this
can't be split up as we need to avoid any boot breakage.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This is not needed outside the driver, so move it inside it and remove
the prototype from the public header also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This will be needed to move some additional clockdomain functionality
under clock driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
This is an almost complete re-write of the previous GPC power gating control
code found in the IMX architecture code. It supports both the old and the new
DT binding, allowing more domains to be added later and generally makes the
driver easier to extend, while keeping compatibility with existing DTBs.
As the result, all functionality regarding the power gating controller
gets removed from the IMX architecture GPC driver. It keeps only the
IRQ controller code in the architecture, as this is closely coupled to
the CPU idle implementation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Previously the coreclk binding for the 98dx3236 SoC was inherited from
the armada-370/xp. This block is present in as much as it is possible to
read from the register location without causing any harm. However the
actual sampled at reset values are reflected in the DFX block.
Moving the binding to the DFX block enables support for different clock
strapping options in hardware.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Marvell datasheets refer to the integrated CPU as "Armada-XP". In
reality there are a number of differences to the actual Armada-XP so
rather than including armada-xp.dtsi and disabling many of the IP
blocks. Include armada-370-xp.dtsi and add the required nodes.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Rather than having a separate node for the dfx server add a reg property
to the parent node. This give some compatibility with the Marvell
supplied SDK.
As no upstream driver currently exists for this block and support for
this SoC is still quite fresh in the kernel it should not be necessary
to retain a backwards compatible binding.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In others board we have the sata led set to function
with the sata led trigger by default.
This patch makes the same for these board that have sata
led but get disabled by not associating it to any trigger.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mbus binding had been extended more than two years ago, but the
device tree files for Armada 38x didn't change.
Adding this third entry will allow the mbus going to suspend which was
the last thing preventing the SoC going to standby mode
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Linksys WRT1900ACS (Shelby) is another Armada 385 based router in
the Linksys WRT AC Series which got released in October 2015.
The file armada-385-linksys-shelby.dts is taken from OpenWrt as-is and
originally authored by Imre Kaloz.
URL: 8466384db1/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-shelby.dts
CC: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add the burst and esc clock frequency properties to the parent (DSI node).
Currently the clock is parsed from the port node, while it should be
taken from the dsi node.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
In Odroid XU3 Lite board, the temperature levels reported for thermal
zone 0 were weird. In warm room:
/sys/class/thermal/thermal_zone0/temp:32000
/sys/class/thermal/thermal_zone1/temp:51000
/sys/class/thermal/thermal_zone2/temp:55000
/sys/class/thermal/thermal_zone3/temp:54000
/sys/class/thermal/thermal_zone4/temp:51000
Sometimes after booting the value was even equal to ambient temperature
which is highly unlikely to be a real temperature of sensor in SoC.
The thermal sensor's calibration (trimming) is based on fused values.
In case of the board above, the fused values are: 35, 52, 43, 58 and 43
(corresponding to each TMU device). However driver defined a minimum value
for fused data as 40 and for smaller values it was using a hard-coded 55
instead. This lead to mapping data from sensor to wrong temperatures
for thermal zone 0.
Various vendor 3.10 trees (Hardkernel's based on Samsung LSI, Artik 10)
do not impose any limits on fused values. Since we do not have any
knowledge about these limits, use 0 as a minimum accepted fused value.
This should essentially allow accepting any reasonable fused value thus
behaving like vendor driver.
The exynos5420-tmu-sensor-conf.dtsi is copied directly from existing
exynos4412 with one change - the samsung,tmu_min_efuse_value.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Add pcie-phy node to phy-exynos-pcie along with some changes to other
nodes:
1. Remove the configuration space from "ranges" property because this
was the old way of getting it. Preferred is to use "config" reg.
2. Use the reg-names as "elbi" and "config" so the purpose of addresses
will be easily known.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Current CMA size of 64 Mbytes is right on the edge of being small when
several drivers need to allocate large CMA buffers.
For example, if the s5p-mfc driver needs to pre-allocate CMA memory to
decode a H.264 1080p video, then there won't be enough CMA memory left
for other drivers, such as the exynos-drm driver that may need to
allocate GEM buffers for the display manager.
Increasing CMA size to 96 Mbytes in exynos_defconfig addresses use-cases
such as these.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
DYNAMIC_DEBUG is quite useful for debugging kernels and should not cause
noticeable performance regressions. It makes the kernel bigger (around 4%)
but this difference should not impact typical developer and reference
usage of this defconfig.
Sizes:
zImage-old: 4641496 bytes
zImage-new: 4811384 bytes
text data bss dec hex filename
7031229 2570916 327016 9929161 9781c9 vmlinux-old
7205921 2800052 327016 10332989 9dab3d vmlinux-new
Additionally, remove the EXT3_FS symbol because it is entirely replaced
by EXT4_FS.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Pull swiotlb updates from Konrad Rzeszutek Wilk:
"Two tiny implementations of the DMA API for callback in ARM (for Xen)"
* 'stable/for-linus-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb:
swiotlb-xen: implement xen_swiotlb_get_sgtable callback
swiotlb-xen: implement xen_swiotlb_dma_mmap callback
This commit adds the device tree description for the Synology DS116 NAS.
It is a one-bay NAS powered by a Marvell Armada 385 at 1.866 GHz. The
device features the following items :
- 1 GB DDR3 RAM
- a 8MB SPI flash
- 2 USB3 ports, power-controlled via a GPIO for each
- 1 gigabit ethernet interface connected over SGMII to a 88e1514 phy
- a single SATA port, power-controlled via a GPIO
- a battery-powered RTC
- one UART connected to the serial console (2mm connector on board)
- the Tx line of the second UART connected to a PIC microcontroller
dealing with beep, reset, power-off and LED blinking (9600 Bps)
- some of the front-panel LEDs are connected to GPIOs, one is directly
connected to the SATA link to report disk activity.
- a GPIO-controlled fan (3 bits for 7 speeds and OFF)
With this DTS, my NAS is 100% functional starting with kernel 4.9.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As was done with Armada XP, add node labels to Armada 38x common and SoC
specific nodes to make them easier to reference in board device trees.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Currently we BUG() if we see a HSR.EC value we don't recognise. As
configurable disables/enables are added to the architecture (controlled
by RES1/RES0 bits respectively), with associated synchronous exceptions,
it may be possible for a guest to trigger exceptions with classes that
we don't recognise.
While we can't service these exceptions in a manner useful to the guest,
we can avoid bringing down the host. Per ARM DDI 0406C.c, all currently
unallocated HSR EC encodings are reserved, and per ARM DDI
0487A.k_iss10775, page G6-4395, EC values within the range 0x00 - 0x2c
are reserved for future use with synchronous exceptions, and EC values
within the range 0x2d - 0x3f may be used for either synchronous or
asynchronous exceptions.
The patch makes KVM handle any unknown EC by injecting an UNDEFINED
exception into the guest, with a corresponding (ratelimited) warning in
the host dmesg. We could later improve on this with with a new (opt-in)
exit to the host userspace.
Cc: Dave Martin <dave.martin@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Leave pca953x P06,P07 pins on b850v3 platform and P06 pin on
b450v3/b650v3 unconfigured in the kernel space since they could be
configured as DP1_RST and DP2_RST by the applications for the DP FW
update support.
Signed-off-by: Ken Lin <ken.lin@advantech.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Extend the vpif node with an output port with a single channel.
NOTE: this is still mostly just hardware description - the actual
driver is registered using pdata-quirks. We need the node however
for correct pin control function selection.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We need the expander to be probed to allow the VPIF controller to
receive interrupts from the video decoder.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Similarly to vpif capture: we need to register the vpif display driver
and the corresponding adv7343 encoder in pdata-quirks as the DT
support is not complete - there isn't currently a way to define the
output_routing in the V4L2 drivers (c.f. s_routing) via DT.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Without this regulator the tca6416 GPIO expander on the UI board can't
be probed in board file mode and we're not getting VPIF IRQs.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
For da8xx DT platforms, use pdata-quirks to add legacy platform data for
vpif_capture driver.
Passing legacy platform_data is required until the V4L2 framework, and
subdevice drivers (such as the tvp514x) grow a way of selecting input
and output routing (c.f. V4L2 s_routing API)
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[Bartosz:
- removed unnecessary #ifdefs
- split the init function into two separate routines for the lcdk
and evm boards]
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This is needed for the driver to access the vpif clock.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[Bartosz: split the pdata-quirks patch in two with one
adding the OF_DEV_AUXDATA entry]
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
VPIF capture driver now has a way to specific I2C adapter ID (was
previously hard-coded.) Use the new interface.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We currently bail-out after applying a single quirk. We will want
to reuse the function doing the vpif capture registration so remove
the break; and continue iterating over the quirk array.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add a new pinctrl sub-node for vpif display pins. Move VP_CLKIN3 and
VP_CLKIN2 to the display node where they actually belong (vide section
36.2.2 of the OMAP-L138 technical reference manual).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The da850-evm dts file contains whitespace errors in the vpif node.
This patch fixes them.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This enables the TI ADS7950 IIO driver. This is used on LEGO MINDSTORMS
EV3. The other IIO configs removed in this patch are selected by
CONFIG_TI_ADS7950, so they are not actually being desabled.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds a device tree node for sound on LEGO MINDSTORMS EV3. The EV3
uses one of the SoC PWMs connected to an amplifier to create sound from
a speaker.
The PWM is passed through a low-pass filter, so it is actually possible
to do PCM playback, but there is no existing driver, so just using
pwm-beeper for now, since it is also a compatible mode of operation.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds a node for the TI ADS7957 analog/digital converter on LEGO
MINDSTORMS EV3 as well as a regulator node that is used by the A/DC node.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: 34ea4b4a82 ("ARM: dts: r8a7794: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: ad53f5f00b ("ARM: dts: r8a7793: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 6f9314ce25 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: 2c3de36700 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.
Fixes: c95360247b ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 34e8d993a6 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.
Fixes: b0da45c60d ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The dual Cortex-A9 MPCore inside socfpga has a standard PMU unit for
each core mapped in the DAP memory space. Add support for it!
Tested with perf on a Cyclone 5 SoC DK.
Reported-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Tested-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This makes it easier to reference the CPU nodes afterwards.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The skeleton.dtsi file is now deprecated as noted in commit 9c0da3cc61
("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). The SoCFPGA
device trees already contain the nodes that are defined in skeleton.dtsi
(#address-cells, #size-cells, chosen, aliases, memory).
Including skeleton.dtsi is useless and will produce the following
warning when compiled with W=1:
Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
GPIO LEDs in the Cyclone5 EBV SOCrates board have a unit name but no reg
property. Indeed, GPIO LEDs do not need such a property. They do not
need a unit name neither. This will trigger the following warnings when
compiled with W=1:
Node /gpio-leds/led@0 has a unit name, but no reg property
Node /gpio-leds/led@1 has a unit name, but no reg property
Node /gpio-leds/led@2 has a unit name, but no reg property
The solution is to remove the unit name. In order to have unique node
names, a rename is necessary. This should be harmless as all the LEDs
have a 'label' property, hence their name do not derive from the node
name and will stay the same after this patch.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The stmpe_touchscreen node in Cyclone5 MCV EVK has a reg property, but
this is not used by the driver. Moreover the binding documentation do
not define this property. Having a reg property without a unit name will
trigger the following warning when compiled with W=1:
Node /soc/i2c@ffc04000/stmpe811@41/stmpe_touchscreen has a reg or ranges
property, but no unit name
Remove the superfluous reg property.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Node eccmgr has a unit name, but do not have a reg property as only the
child nodes do have this property. Likewise the usbphy node do not have
a reg property. This will trigger the following warnings when compiled
with W=1:
Node /soc/eccmgr@ffd08140 has a unit name, but no reg property
Node /soc/usbphy@0 has a unit name, but no reg property
Remove the superfluous unit names.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name.
This will trigger several warnings like this one (when compiled with
W=1):
Node /memory has a reg or ranges property, but no unit name
Add the corresponding unit name to each node.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Most clock nodes in Arria5, Cyclone5 and Arria10 have a reg property but
does not have a unit name. This will trigger several warnings like this
one (when compiled with W=1):
Node /soc/clkmgr@ffd04000/clocks/periph_pll has a reg or ranges
property, but no unit name
Add the corresponding unit name to each node.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Fix warnings reported when built with W=1:
Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 9c0da3cc61 ("ARM: dts: explicitly mark skeleton.dtsi as
deprecated") declared that skeleton.dtsi was deprecated.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Added two WAN status LEDs and a GPIO key for brightness which were
missing.
Signed-off-by: Aditya Xavier <adityaxavier@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It's preferred to have DT source files licensed under BSD compatible
license. All new BCM5301X DTS files use ISC so let's also relicense old
ones to it.
Except for me only Hauke was ever touched these files in his commit
9faa5960ee ("ARM: BCM5301X: add NAND flash chip description") and
commit bb1d8fba19 ("ARM: BCM5301X: add NAND flash chip description for
Asus RT-AC87U").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
As OMAP uses the standard suspend_valid_only_mem() for its
platform_suspend_ops.valid() callback, its platform_suspend_ops.enter()
callback will never be called with state equal to PM_SUSPEND_STANDBY.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The modules stay disabled by default, and if you want to enable DSI
you'll need an overlay that connects a panel to it.
Signed-off-by: Eric Anholt <eric@anholt.net>
AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on
ti-cpufreq driver to enable proper OPPs for use with cpufreq, so
enable the same.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
