The patch adds asm macros for inc_preempt_count and dec_preempt_count_ti
(which also gets the current thread_info) instead of open-coding them in
arch/arm/vfp/*.S files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Arun KS <getarunks@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
asm/assembler.h is a better place for this macro since it is used by
asm files outside arch/arm/kernel/
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Arun KS <getarunks@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus,
pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(PJ4 and no-PJ4)
can use code.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The patch add cpu_is_pj4 at arch/arm/include/asm/cputype.h
PJ4 has some differences with V7, for example the coprocessor.
To disinguish this kind of situation. cpu_is_pj4 is needed.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arm_pm_restart(), arm_pm_idle() and soft_restart() are all declared in
system_misc.h, but this file is not included in process.c. Add this
missing include. Found via sparse:
arch/arm/kernel/process.c:98:6: warning: symbol 'soft_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:127:6: warning: symbol 'arm_pm_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:134:6: warning: symbol 'arm_pm_idle' was not declared. Should it be static?
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
virt_to_page() is incredibly inefficient when virt-to-phys patching is
enabled. This is because we end up with this calculation:
page = &mem_map[asm virt_to_phys(addr) >> 12 - __pv_phys_offset >> 12]
in assembly. The asm virt_to_phys() is equivalent this this operation:
addr - PAGE_OFFSET + __pv_phys_offset
and we can see that because this is assembly, the compiler has no chance
to optimise some of that away. This should reduce down to:
page = &mem_map[(addr - PAGE_OFFSET) >> 12]
for the common cases. Permit the compiler to make this optimisation by
giving it more of the information it needs - do this by providing a
virt_to_pfn() macro.
Another issue which makes this more complex is that __pv_phys_offset is
a 64-bit type on all platforms. This is needlessly wasteful - if we
store the physical offset as a PFN, we can save a lot of work having
to deal with 64-bit values, which sometimes ends up producing incredibly
horrid code:
a4c: e3009000 movw r9, #0
a4c: R_ARM_MOVW_ABS_NC __pv_phys_offset
a50: e3409000 movt r9, #0 ; r9 = &__pv_phys_offset
a50: R_ARM_MOVT_ABS __pv_phys_offset
a54: e3002000 movw r2, #0
a54: R_ARM_MOVW_ABS_NC __pv_phys_offset
a58: e3402000 movt r2, #0 ; r2 = &__pv_phys_offset
a58: R_ARM_MOVT_ABS __pv_phys_offset
a5c: e5999004 ldr r9, [r9, #4] ; r9 = high word of __pv_phys_offset
a60: e3001000 movw r1, #0
a60: R_ARM_MOVW_ABS_NC mem_map
a64: e592c000 ldr ip, [r2] ; ip = low word of __pv_phys_offset
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from arch/arm/mach-w90x900/time.c
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Acked-by: Wan zongshun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from arch/arm/mach-spear/time.c
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from arch/arm/mach-mmp/time.c
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from miscellaneous code in mach-xxx and plat-xxx
This flag is a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from arch/arm/mach-lpc32xx/timer.c
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from code in arch/arm/mach-ixp4xx
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
from arch/arm/mach-cns3xxx/core.c
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the use of the IRQF_DISABLED flag
in arch/arm/include/asm/floppy.h
It's a NOOP since 2.6.35 and it will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the IRQF_DISABLED flag from footbridge
code. It's a NOOP since 2.6.35.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
While unwinding backtrace, stack overflow is possible. This stack
overflow can sometimes lead to data abort in system if the area after
stack is not mapped to physical memory.
To prevent this problem from happening, execute the instructions that
can cause a data abort in separate helper functions, where a check for
feasibility is made before reading each word from the stack.
Signed-off-by: Anurag Aggarwal <a.anurag@samsung.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This allocates feature bits 0-4 in HWCAP2 for the crypto and CRC
extensions introduced in ARMv8.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This enables AT_HWCAP2 for ARM. The generic support for this
new ELF auxv entry was added in commit 2171364d1a (powerpc:
Add HWCAP2 aux entry)
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch moves bios32 over to using the generic code for enabling PCI
resources. Since the core code takes care of bridge resources too, we
can also drop the explicit IO and MEMORY enabling for them in the arch
code.
A side-effect of this change is that we no longer explicitly enable
devices when running in PCI_PROBE_ONLY mode. This stays closer to the
meaning of the option and prevents us from trying to enable devices
without any assigned resources (the core code refuses to enable
resources without parents).
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Tested-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Looking at perf profiles of multi-threaded hackbench runs, a significant
performance hit appears to manifest from the cmpxchg loop used to
implement the 32-bit atomic_add_unless function. This can be mitigated
by writing a direct implementation of __atomic_add_unless which doesn't
require iteration outside of the atomic operation.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Renames logical shift macros, 'push' and 'pull', defined in
arch/arm/include/asm/assembler.h, into 'lspush' and 'lspull'.
That eliminates name conflict between 'push' logical shift macro
and 'push' instruction mnemonic. That allows assembler.h to be
included in .S files that use 'push' instruction.
Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Delete ARM's asm/system.h. It's the last holdout and should be got rid of.
This builds for defconfig, lpc32xx_defconfig, exynos_defconfig + XEN, the
previous changed to a Gemini system and an omap3 config with TI_DAVINCI_EMAC.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The pte_accessible macro can be used to identify page table entries
capable of being cached by a TLB. In principle, this differs from
pte_present, since PROT_NONE mappings are mapped using invalid entries
identified as present and ptes designated as `old' can use either
invalid entries or those with the access flag cleared (guaranteed not to
be in the TLB). However, there is a race to take care of, as described
in 2084140594 ("mm: fix TLB flush race between migration, and
change_protection_range"), between a page being migrated and mprotected
at the same time. In this case, we can check whether a TLB invalidation
is pending for the mm and if so, temporarily consider PROT_NONE mappings
as valid.
This patch implements a quick pte_accessible macro for ARM by simply
checking if the pte is valid/present depending on the mm. For classic
MMU, these checks are identical and will generate some false positives
for PROT_NONE mappings, but this is better than the current asm-generic
definition of ((void)(pte),1).
Finally, pte_present_user is moved to use pte_valid (and renamed
appropriately) since we don't care about cache flushing for faulting
mappings.
Acked-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
After a bunch of benchmarking on the interaction between dmb and pldw,
it turns out that issuing the pldw *after* the dmb instruction can
give modest performance gains (~3% atomic_add_return improvement on a
dual A15).
This patch adds prefetchw invocations to our barriered atomic operations
including cmpxchg, test_and_xxx and futexes.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Coherant DMA allocator allocates pages of high order then splits
them up into smaller pages.
This splitting logic would run into problems if the allocator was
given compound pages. Thus the Coherant DMA allocator was originally
incompatible with compound pages existing and, by extension, huge
pages. A compile #error was put in place whenever huge pages were
enabled.
Compatibility with compound pages has since been introduced by the
following commit (which merely excludes GFP_COMP pages from being
requested by the coherant DMA allocator):
ea2e705 ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocations
When huge page support was introduced to ARM, the compile #error in
dma-mapping.c was replaced by a #warning when it should have been
removed instead.
This patch removes the compile #warning in dma-mapping.c when huge
pages are enabled.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The functions in mcpm_entry.c are mostly intended for use during
scary cache and coherency disabling sequences, or do other things
which confuse trace ... like powering a CPU down and not
returning. Similarly for the backend code.
For simplicity, this patch just makes whole files notrace.
There should be more than enough traceable points on the paths to
these functions, but we can be more fine-grained later if there is
a need for it.
Jon Medhurst:
Also added spc.o to the list of files as it contains functions used by
MCPM code which have comments comments like: "might be used in code
paths where normal cacheable locks are not working"
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CPU_32v6 currently selects CPU_USE_DOMAINS if CPU_V6 and MMU. This is
because ARM 1136 r0pX CPUs lack the v6k extensions, and therefore do
not have hardware thread registers. The lack of these registers requires
the kernel to update the vectors page at each context switch in order to
write a new TLS pointer. This write must be done via the userspace
mapping, since aliasing caches can lead to expensive flushing when using
kmap. Finally, this requires the vectors page to be mapped r/w for
kernel and r/o for user, which has implications for things like put_user
which must trigger CoW appropriately when targetting user pages.
The upshot of all this is that a v6/v7 kernel makes use of domains to
segregate kernel and user memory accesses. This has the nasty
side-effect of making device mappings executable, which has been
observed to cause subtle bugs on recent cores (e.g. Cortex-A15
performing a speculative instruction fetch from the GIC and acking an
interrupt in the process).
This patch solves this problem by removing the remaining domain support
from ARMv6. A new memory type is added specifically for the vectors page
which allows that page (and only that page) to be mapped as user r/o,
kernel r/w. All other user r/o pages are mapped also as kernel r/o.
Patch co-developed with Russell King.
Cc: <stable@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that we select HAVE_EFFICIENT_UNALIGNED_ACCESS for ARMv6+ CPUs,
replace the __LINUX_ARM_ARCH__ check in uaccess.h with the new symbol.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Booting on feroceon CPUS requires the L2 cache to be turned off. With
some kernel configurations (notably CONFIG_ARM_PATCH_PHYS_VIRT
disabled) the kernel will boot even if the L2 is turned on.
However there may be subtle breakage, and when PATCH_PHYS_VIRT is
enabled it is very likely that booting with L2 will crash at early
boot before any kernel diagnostic output.
The diagnostic message is intended to discourage people from shipping
bootloaders that leave the L2 turned on.
The issue on feroceon is that the L2 is bypassed when the L1 caches
are disabled. So the decompressor will place parts of the kernel image
into the L2 and the early cache-off boot code in head.S will write to
parts of the kernel image, bypassing the L2 and creating inconsistency.
Tested on ARM Kirkwood.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the trivial support necessary to get hardware breakpoints
working for GDB on ARMv8 simulators running in AArch32 mode.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The 32 bit sched_clock interface supports 64 bits since 3.13-rc1.
Upgrade to the 64 bit function to allow us to remove the 32 bit
registration interface.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The A12 behaves as the A7/A15 does with respect to setting the SMP bit, and
doesn't require TLB ops broadcasting to be explicitly enabled like the A9 does.
Note that as the ACTLR cannot (usually) be written from non-secure, it is the
responsibility of the bootloader/firmware to set this bit per core - it is
done here in Linux as last resort in case of bad firmware.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Here's a set of patches for (hopefully) -rc1. Some of them are fixes,
but a good number of them also do things such as enable new drivers in
the defconfigs for platforms that have such devices, increases coverage
of the multiplatform defconfig and some DTS changes that plumbs up some
of the devices that now have bindings and driver support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJS7VYsAAoJEIwa5zzehBx3FKIQAIVIkjlKAtvRpg+P/BYWigXq
6jG2xuBhwf1Yciu70ttvfRnR9bGJc+0o5w/qjr7ARSFp7GkDlWXtIwj+1EwGSEES
hB/f2GcBfNLJOI0rHvvudz+7HlpiyfB6iMj3U25hnpShrSTxbOHDC6pU6pYjUzBy
T1AYTmfa0vwuy9TNodOr4dVYlbJc3YA0V2sBTusXDFwm03XTdCd7E7RJIr/MRDEN
96PtaNrfstmxeTjN0NBuL2IdsZNR2mn/cgWTL1lVqVE8+z7QyvmPDqmWD5iCVQaM
+6mJbXL4jzM1CyB8Qf89sNtTaFVjwbgvbtuljPv/7q/jhf2rvixaMzywCv28FjB+
uJCaLh1r/HiR61tlw0yX3ixPdKFJqyWV9vF5+uuwmEQCCPpFWGzTcNaZ7NRiYzEt
yqt1ZRDhEAli8iHt96LxMwLIklaDGvuxLtHsv4a5djEoaO/yqRTNZXDjwIsIzkpD
N8vUwPf7Pnw+3/5iGVTQdZaPzmrNjqTOLwz0s7ys2avVsRsNNi68hMuIj+qrNlzu
/tJhhh0u9SONRM3c6D9mtrZPD7Gs8QgMbT9TyZ2/ILQKuo4wO9F1GDN93MjZI5oq
1rX/QUeYItWQamzHGmI8ZlAx4YlsxxB90eJ8CaG2F8sVtumklrFRb43Vf9NRsyo/
XDrjoS/cdi7PAO0wemkg
=ymAC
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's a set of patches for (hopefully) -rc1. Some of them are fixes,
but a good number of them also do things such as enable new drivers in
the defconfigs for platforms that have such devices, increases
coverage of the multiplatform defconfig and some DTS changes that
plumbs up some of the devices that now have bindings and driver
support.
The commit dates are recent; we've mostly collected these fixes in the
last few days but I also had to rebuild the branch yesterday to sort
out some internal conflicts which reset the timestamps. The changes
should have been tested by each platform maintainer already (and few
of them have cross-platform impact) so I'm personally not too
concerned by it at this time"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
ARM: multi_v7_defconfig: remove redundant entries and re-enable TI_EDMA
ARM: multi_v7_defconfig: add mvebu drivers
clocksource: kona: Add basic use of external clock
drivers: bus: fix CCI driver kcalloc call parameters swap
ARM: dts: bcm28155-ap: Fix Card Detection GPIO
ARM: multi_v7_defconfig: Select CONFIG_AT803X_PHY
ARM: keystone: config: fix build warning when CONFIG_DMADEVICES is not set
MAINTAINERS: ARM: SiRF: use regex patterns to involve all SiRF drivers
ARM: dts: zynq: Add SDHCI nodes
ARM: hisi: don't select SMP
ARM: tegra: rebuild tegra_defconfig to add DEBUG_FS
ARM: multi_v7: copy most options from tegra_defconfig
ARM: iop32x: fix power off handling for the EM7210 board
ARM: integrator: restore static map on the CP
ARM: msm_defconfig: Enable MSM clock drivers
ARM: dts: msm: Add clock controller nodes and hook into uart
ARM: OMAP4+: move errata initialization to omap4_pm_init_early
ARM: OMAP4460: cpuidle: Extend PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD on cpuidle
ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP)
ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference
...
TI_EDMA fell out of automatically selected options in the multi_v7
defconfig due to a select being removed from the davinci Kconfig entry. So
we need to re-enable explicitly to not regress some platforms.
The rest is just the result of running 'make multi_v7_defconfig + make
savedefconfig' to remove entries that are no longer needed due to changed
dependencies/selects or defaults.
Signed-off-by: Olof Johansson <olof@lixom.net>
Recent boot farm testing has highlighted some issues with mvebu and
multiplatform kernels. Increase the test coverage so we can discover
these issues earlier.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
The board schematic states that the "SD_CARD_DET_N gets pulled to GND
when card is inserted" so the polarity has been updated to active low.
Polarity is now specified with a GPIO define instead of a magic number.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Correct i2c clock references for r8a7790 (R-Car H2) SoC
The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
Reference clocks") which is queued up for v3.14.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJS4b3VAAoJENfPZGlqN0++soAP/33lDjmDES2ACWrgJ0EHX9h3
H0w36L6aOvL2vaTSZYmTnf0VrzuHUpiTmGCWZSboumxaiKZfcPYqKii+SV+OdHjW
Ua5Cz6v+F8uqlz/Ziw04rKneUpdg+EGYIrR2tjLP11BNAJCqSJ3bjcR8TbmUfeTN
yyzEiN7MqWoT+JiUub9PBZkI/yIylqHnDc/a4vcNjKMmN5Y5CTEKLNgwmt2Cpv5F
1XLNPcUwvwLOnKFCReoXey1OqJLODfDLhwsuyQInkF5U3FZNT91Ly6WG1KTJuBEE
Acx7AAppoOAdH2Y85TQv67qPIuY/tOeosSXtrV/F2lOIe2xccGPcrMNtYydrQdfg
u8pmz+Nwr3I4Vwg1fx/Jqdht0nqv53B4BKqgSGkemubdJAPFct78yt8LJuDfCiZD
TCETU/N0pO/LDF+SL81/kLNmVlogCQwZmeLg4v/vImZ08pyeriOeOJPCfHE+cUur
sUofqrJKZubVWQOrfojjOni2YDgM5p3CnrpLocLC1rtclYRIp6UpnbEGShQovW2Y
j+fBBz+APlIcLn6bBvaEVIkcnmwqH7jHUUn0/3R6sx8m+706FEqhYA2QRTDTCH2R
TQ58MNzzN7wlkXYa5RGbjiEoQfqlzFFzfx+6SfvOTmDLlia5M1vG+mXLR7EmLgnG
9ZRGxBwTIuTTOEttxep/
=UVOK
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Second Round of Renesas ARM Based SoC DT Fixes for v3.14
Correct i2c clock references for r8a7790 (R-Car H2) SoC
The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
Reference clocks") which is queued up for v3.14.
* tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference
Signed-off-by: Olof Johansson <olof@lixom.net>
Select CONFIG_AT803X_PHY so that we can boot hummingboard via NFS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Drop automatic selection of TI_EDMA from Keystone Kconfig file,
as it produces build warning in case if CONFIG_DMADEVICES is not set:
warning: (ARCH_KEYSTONE) selects TI_EDMA which has unmet direct dependencies (DMADEVICES && (ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE))
Instead enable TI EDMA support from defconfig.
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- allow building and booting DT and non-DT plat-orion SoCs
- catch proper return value for kirkwood_pm_init()
- properly check return of of_iomap to solve boot hangs (mirabox, others)
- remove a compile warning on Armada 370 with non-SMP.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJS5rNhAAoJEP45WPkGe8ZnuUEQALIAxdILNe7TuyybvCJeuAJY
NZW3TdM6t5pqls2lFrni8ackm7M/dwqrtgYHnyRuX22ZrKCUQcOKO4s4APcFiTQw
2N/fTcMjzbw/ShRrULeSXiY+h3RX7hz4GAVZq2rrQNS3OPcHntAm/HGpx2fwyexZ
FMfbZJ6e44prat+X+cKLwKxsVvQEuhQAsQC4zTAE7l3asxu+ScJvsINAiEUNoFvL
Zj1o2YyqoqVJBgc8AS77ZwqfHNPGPGSB3uxOpgpf4PTwE/Kp/vZfgCr7xEU25KQF
++oN8AS0UP0ugsg3bFuyrw4bOdAtKtO5CcAt6ljGKa81gHadZtGGsazIQdkMnCVP
lXlg/OFUrUCKUE7TU4Xw5oWa90eddFIdJMKRTbwRRYSK+oH0nq043fRmJD40Z6xL
b/XyDz4RHSOJfY+wdhLIltAPAdiPIugs0JTDLeu2Z7fujSwRLVi2TpESPHhuhRfO
45/llW4DM3gfSFuQTVZHIdBBFCQJ/lDLe4DyTTouy9r/kPQ0dq0SPEt5T0D8P5zX
aPyjKlJqEfN115R0CyckqMswO3ConKSBZn33OfRQcYBj4MHXfYIUEv91ztmCABch
SBqqBtjOAteaAjhPY53w5C2pVI3LHuqy/K0WeLxSVZln4Q3QcfQlCeXZzk9crDTp
QpVdjXqRHZucltXK+ajA
=mxq4
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for v3.13 (incremental #2)
- allow building and booting DT and non-DT plat-orion SoCs
- catch proper return value for kirkwood_pm_init()
- properly check return of of_iomap to solve boot hangs (mirabox, others)
- remove a compile warning on Armada 370 with non-SMP.
* tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP)
ARM: mvebu: Fix kernel hang in mvebu_soc_id_init() when of_iomap failed
ARM: kirkwood: kirkwood_pm_init() should return void
ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLER
Signed-off-by: Olof Johansson <olof@lixom.net>
Add nodes for the Arasan SDHCI controller to Zynq dts files.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
SMP is a user configurable option, not a hardware feature and should not
be selected.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
DEBUG_FS used to be selected by COMMON_CLK_DEBUG, which was enabled
by tegra_defconfig. However, this config option no longer exists, so
no longer selects DEBUG_FS, and nothing else selects it either. So,
"make tegra_defconfig" no longer enables DEBUG_FS in .config.
Rebuild tegra_defconfig on top of next-20140424, while manually
re-enabling DEBUG_FS.
Reasons for removed entries are:
- I2C_MUX: selected by MEDIA_SUBDRV_AUTOSELECT
- DRM_PANEL: selected by DRM_TEGRA
- NEW_LEDS: selected by many things; at least VT
- LEDS_CLASS: selected by many things; at least VT
- LEDS_TRIGGERS: selected by many things; at least VT
- COMMON_CLK_DEBUG: no longer exists
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
multi_v7_defconfig was missing a large number of options that were in
tegra_defconfig. This patch adds them. The changes fall into the
following categories:
* Enable more Tegra SoC options/drivers.
* Enable more drivers for Tegra boards.
* Enable more options that are useful for running distros.
The patch removes a few lines as well, simply because those options are
now selected by something else, and "make savedefconfig" removes them. I
verified that the options appear in .config after
"make multi_v7_defconfig".
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This board was missed when converting all the others to proper
abstracted GPIO handling. Fix it up the right way by requesting
and driving GPIO line 0 high through gpiolib to power off the
machine.
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 78d1632183 deleted the
static mappings of the core modules, but this static map is
still needed on the Integrator/CP (not the Integrator/AP).
Restore the static map on the Integrator/CP.
Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This allows us to probe the clock controller devices and boot to a
serial console on all DT enabled MSM platforms.
Cc: David Brown <davidb@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the necessary DT nodes to probe the clock controllers on MSM
devices as well as hook up the uart nodes to the clock
controllers. This should allow us to boot to a serial console on
all DT enabled MSM platforms.
Cc: David Brown <davidb@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Move all OMAP4 PM errata initializations to centralized location in
omap4_pm_init_early. This allows for users to utilize the erratas
in various submodules as needed.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The same workaround as ff999b8a09
"ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
need to be applied not only when system is booting, but when MPUSS hits
OSWR state through CPUIdle too. Without this WA the same issue is
reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
when CONFIG_CPU_IDLE is enabled.
After MPUSS has enterred OSWR and waken up:
- GIC distributor became disabled forever
- scheduling is not performed any more
Cc: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
