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Author | SHA1 | Message | Date | |
---|---|---|---|---|
Linus Torvalds
|
9f3a2ba62c |
The core framework gained a clk provider helper, a clk consumer helper, and
some unit tests for the assigned clk rates feature in DeviceTree. On the vendor driver side, we gained a whole pile of SoC driver support detailed below. The majority in the diffstat is Qualcomm, but there's also quite a few Samsung and Mediatek clk driver additions in here as well. The top vendors is quite common, but the sheer amount of new drivers is uncommon, so I'm anticipating a larger number of fixes for clk drivers this cycle. Core: - devm_clk_bulk_get_all_enabled() to return number of clks acquired - devm_clk_hw_register_gate_parent_hw() helper to modernize drivers - KUnit tests for clk-assigned-rates{,-u64} New Drivers: - Marvell PXA1908 SoC clks - Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver - TWL6030 clk driver - Nuvoton Arbel BMC NPCM8XX SoC clks - MediaTek MT6735 SoC clks - MediaTek MT7620, MT7628 and MT7688 MMC clks - Add a driver for gated fixed rate clocks - Global clock controllers for Qualcomm QCS8300 and IPQ5424 SoCs - Camera, display and video clock controllers for Qualcomm SA8775P SoCs - Global, display, GPU, TCSR, and RPMh clock controllers for Qualcomm SAR2130P - Global, camera, display, GPU, and video clock controllers for Qualcomm SM8475 SoCs - RTC power domain and Battery Backup Function (VBATTB) clock support for the Renesas RZ/G3S SoC - Qualcomm IPQ9574 alpha PLLs - Support for i.MX91 CCM in the i.MX93 driver - Microchip LAN969X SoC clks - Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock and reset on Renesas RZ/V2H(P) - Samsung ExynosAutov920 clk drivers for PERIC1, MISC, HSI0 and HSI1 - Samsung Exynos8895 clk drivers for FSYS0/1, PERIC0/1, PERIS and TOP Updates: - Convert more clk bindings to YAML - Various clk driver cleanups: NULL checks, add const, etc. - Remove END/NUM #defines that count number of clks in various binding headers - Continue moving reset drivers to drivers/reset via auxiliary bus -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmc/r1kRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSUlaw/+NkmTMPSpgKy8NfZi6KoCk3U5llaknXvj Y/Y2pB7UpOFDTsSCKRcFrZ6JWS6GIogE70W9w+zxIht4QA4Ekd9vKT7VRhMl+8t/ pz2i0c0Pm24hSye9LKM7JCVIVL8SNYonOs3wC1sfMVMDoUikVwupj6Bmj0nAYrBo hbJFBXtn/LbyYImJQ9hYqHnUtJKGp/N7hhpGu6kT/lbzcaWsBMp4lhH+s20DJz5e kdJVJGaLOELerAG/SHIxh9obtfznvex6x3itTB0o/d6/1DSDjjlxnZH8YV8eQWk0 kK+ORuewA+qCi3RiPReHCPBIfPI4HL0z3k5JFA5eI7eD4VZIis+YBOa/Y8bQR9bG wDg5qh5su0fdeWBUvkFB03igNoMdtH68iYd2q3YE0ka95FGulcyvbqoyxTJnjIxW 328PizYZV8LQ4+LGSdIFyp9f/SrjF0pAt7yTF8Dis3jq3ul/6ELX9G6OCNgtGKQz p0Hb01fKC4s7w48QI5OXQKfS382vS8G8a2NIwt2xxorc4+Dr2rjPvlDhErshCOAT nDEerIjGWr/0rQeTGxg+SLUx5ytq2aBkysg95/9WVe3b8kZeePiW9gEH4tgealY8 eHzFvbqXutlKer0xLOYiLd3hOeHhkCJNj48QS8jVXtRGGeLjZONw5F1mjTNskPpx 9jbKMcDjGyc= =FqLm -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The core framework gained a clk provider helper, a clk consumer helper, and some unit tests for the assigned clk rates feature in DeviceTree. On the vendor driver side, we gained a whole pile of SoC driver support detailed below. The majority in the diffstat is Qualcomm, but there's also quite a few Samsung and Mediatek clk driver additions in here as well. The top vendors is quite common, but the sheer amount of new drivers is uncommon, so I'm anticipating a larger number of fixes for clk drivers this cycle. Core: - devm_clk_bulk_get_all_enabled() to return number of clks acquired - devm_clk_hw_register_gate_parent_hw() helper to modernize drivers - KUnit tests for clk-assigned-rates{,-u64} New Drivers: - Marvell PXA1908 SoC clks - Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver - TWL6030 clk driver - Nuvoton Arbel BMC NPCM8XX SoC clks - MediaTek MT6735 SoC clks - MediaTek MT7620, MT7628 and MT7688 MMC clks - Add a driver for gated fixed rate clocks - Global clock controllers for Qualcomm QCS8300 and IPQ5424 SoCs - Camera, display and video clock controllers for Qualcomm SA8775P SoCs - Global, display, GPU, TCSR, and RPMh clock controllers for Qualcomm SAR2130P - Global, camera, display, GPU, and video clock controllers for Qualcomm SM8475 SoCs - RTC power domain and Battery Backup Function (VBATTB) clock support for the Renesas RZ/G3S SoC - Qualcomm IPQ9574 alpha PLLs - Support for i.MX91 CCM in the i.MX93 driver - Microchip LAN969X SoC clks - Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock and reset on Renesas RZ/V2H(P) - Samsung ExynosAutov920 clk drivers for PERIC1, MISC, HSI0 and HSI1 - Samsung Exynos8895 clk drivers for FSYS0/1, PERIC0/1, PERIS and TOP Updates: - Convert more clk bindings to YAML - Various clk driver cleanups: NULL checks, add const, etc. - Remove END/NUM #defines that count number of clks in various binding headers - Continue moving reset drivers to drivers/reset via auxiliary bus" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits) clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access clk: Fix invalid execution of clk_set_rate clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider clk: lan966x: make it selectable for ARCH_LAN969X clk: eyeq: add EyeQ6H west fixed factor clocks clk: eyeq: add EyeQ6H central fixed factor clocks clk: eyeq: add EyeQ5 fixed factor clocks clk: eyeq: add fixed factor clocks infrastructure clk: eyeq: require clock index with phandle in all cases clk: fixed-factor: add clk_hw_register_fixed_factor_index() function dt-bindings: clock: eyeq: add more Mobileye EyeQ5/EyeQ6H clocks dt-bindings: soc: mobileye: set `#clock-cells = <1>` for all compatibles clk: clk-axi-clkgen: make sure to enable the AXI bus clock dt-bindings: clock: axi-clkgen: include AXI clk clk: mmp: Add Marvell PXA1908 MPMU driver clk: mmp: Add Marvell PXA1908 APMU driver clk: mmp: Add Marvell PXA1908 APBCP driver clk: mmp: Add Marvell PXA1908 APBC driver dt-bindings: clock: Add Marvell PXA1908 clock bindings clk: mmp: Switch to use struct u32_fract instead of custom one ... |
||
Linus Torvalds
|
fcc79e1714 |
Networking changes for 6.13.
The most significant set of changes is the per netns RTNL. The new behavior is disabled by default, regression risk should be contained. Notably the new config knob PTP_1588_CLOCK_VMCLOCK will inherit its default value from PTP_1588_CLOCK_KVM, as the first is intended to be a more reliable replacement for the latter. Core ---- - Started a very large, in-progress, effort to make the RTNL lock scope per network-namespace, thus reducing the lock contention significantly in the containerized use-case, comprising: - RCU-ified some relevant slices of the FIB control path - introduce basic per netns locking helpers - namespacified the IPv4 address hash table - remove rtnl_register{,_module}() in favour of rtnl_register_many() - refactor rtnl_{new,del,set}link() moving as much validation as possible out of RTNL lock - convert all phonet doit() and dumpit() handlers to RCU - convert IPv4 addresses manipulation to per-netns RTNL - convert virtual interface creation to per-netns RTNL the per-netns lock infra is guarded by the CONFIG_DEBUG_NET_SMALL_RTNL knob, disabled by default ad interim. - Introduce NAPI suspension, to efficiently switching between busy polling (NAPI processing suspended) and normal processing. - Migrate the IPv4 routing input, output and control path from direct ToS usage to DSCP macros. This is a work in progress to make ECN handling consistent and reliable. - Add drop reasons support to the IPv4 rotue input path, allowing better introspection in case of packets drop. - Make FIB seqnum lockless, dropping RTNL protection for read access. - Make inet{,v6} addresses hashing less predicable. - Allow providing timestamp OPT_ID via cmsg, to correlate TX packets and timestamps Things we sprinkled into general kernel code -------------------------------------------- - Add small file operations for debugfs, to reduce the struct ops size. - Refactoring and optimization for the implementation of page_frag API, This is a preparatory work to consolidate the page_frag implementation. Netfilter --------- - Optimize set element transactions to reduce memory consumption - Extended netlink error reporting for attribute parser failure. - Make legacy xtables configs user selectable, giving users the option to configure iptables without enabling any other config. - Address a lot of false-positive RCU issues, pointed by recent CI improvements. BPF --- - Put xsk sockets on a struct diet and add various cleanups. Overall, this helps to bump performance by 12% for some workloads. - Extend BPF selftests to increase coverage of XDP features in combination with BPF cpumap. - Optimize and homogenize bpf_csum_diff helper for all archs and also add a batch of new BPF selftests for it. - Extend netkit with an option to delegate skb->{mark,priority} scrubbing to its BPF program. - Make the bpf_get_netns_cookie() helper available also to tc(x) BPF programs. Protocols --------- - Introduces 4-tuple hash for connected udp sockets, speeding-up significantly connected sockets lookup. - Add a fastpath for some TCP timers that usually expires after close, the socket lock contention. - Add inbound and outbound xfrm state caches to speed up state lookups. - Avoid sending MPTCP advertisements on stale subflows, reducing risks on loosing them. - Make neighbours table flushing more scalable, maintaining per device neigh lists. Driver API ---------- - Introduce a unified interface to configure transmission H/W shaping, and expose it to user-space via generic-netlink. - Add support for per-NAPI config via netlink. This makes napi configuration persistent across queues removal and re-creation. Requires driver updates, currently supported drivers are: nVidia/Mellanox mlx4 and mlx5, Broadcom brcm and Intel ice. - Add ethtool support for writing SFP / PHY firmware blocks. - Track RSS context allocation from ethtool core. - Implement support for mirroring to DSA CPU port, via TC mirror offload. - Consolidate FDB updates notification, to avoid duplicates on device-specific entries. - Expose DPLL clock quality level to the user-space. - Support master-slave PHY config via device tree. Tests and tooling ----------------- - forwarding: introduce deferred commands, to simplify the cleanup phase Drivers ------- - Updated several drivers - Amazon vNic, Google vNic, Microsoft vNic, Intel e1000e and Broadcom Tigon3 - to use netdev-genl to link the IRQs and queues to NAPI IDs, allowing busy polling and better introspection. - Ethernet high-speed NICs: - nVidia/Mellanox: - mlx5: - a large refactor to implement support for cross E-Switch scheduling - refactor H/W conter management to let it scale better - H/W GRO cleanups - Intel (100G, ice):: - adds support for ethtool reset - implement support for per TX queue H/W shaping - AMD/Solarflare: - implement per device queue stats support - Broadcom (bnxt): - improve wildcard l4proto on IPv4/IPv6 ntuple rules - Marvell Octeon: - Adds representor support for each Resource Virtualization Unit (RVU) device. - Hisilicon: - adds support for the BMC Gigabit Ethernet - IBM (EMAC): - driver cleanup and modernization - Cisco (VIC): - raise the queues number limit to 256 - Ethernet virtual: - Google vNIC: - implements page pool support - macsec: - inherit lower device's features and TSO limits when offloading - virtio_net: - enable premapped mode by default - support for XDP socket(AF_XDP) zerocopy TX - wireguard: - set the TSO max size to be GSO_MAX_SIZE, to aggregate larger packets. - Ethernet NICs embedded and virtual: - Broadcom ASP: - enable software timestamping - Freescale: - add enetc4 PF driver - MediaTek: Airoha SoC: - implement BQL support - RealTek r8169: - enable TSO by default on r8168/r8125 - implement extended ethtool stats - Renesas AVB: - enable TX checksum offload - Synopsys (stmmac): - support header splitting for vlan tagged packets - move common code for DWMAC4 and DWXGMAC into a separate FPE module. - Add the dwmac driver support for T-HEAD TH1520 SoC - Synopsys (xpcs): - driver refactor and cleanup - TI: - icssg_prueth: add VLAN offload support - Xilinx emaclite: - adds clock support - Ethernet switches: - Microchip: - implement support for the lan969x Ethernet switch family - add LAN9646 switch support to KSZ DSA driver - Ethernet PHYs: - Marvel: 88q2x: enable auto negotiation - Microchip: add support for LAN865X Rev B1 and LAN867X Rev C1/C2 - PTP: - Add support for the Amazon virtual clock device - Add PtP driver for s390 clocks - WiFi: - mac80211 - EHT 1024 aggregation size for transmissions - new operation to indicate that a new interface is to be added - support radio separation of multi-band devices - move wireless extension spy implementation to libiw - Broadcom: - brcmfmac: optional LPO clock support - Microchip: - add support for Atmel WILC3000 - Qualcomm (ath12k): - firmware coredump collection support - add debugfs support for a multitude of statistics - Qualcomm (ath5k): - Arcadyan ARV45XX AR2417 & Gigaset SX76[23] AR241[34]A support - Realtek: - rtw88: 8821au and 8812au USB adapters support - rtw89: add thermal protection - rtw89: fine tune BT-coexsitence to improve user experience - rtw89: firmware secure boot for WiFi 6 chip - Bluetooth - add Qualcomm WCN785x support for ids Foxconn 0xe0fc/0xe0f3 and 0x13d3:0x3623 - add Realtek RTL8852BE support for id Foxconn 0xe123 - add MediaTek MT7920 support for wireless module ids - btintel_pcie: add handshake between driver and firmware - btintel_pcie: add recovery mechanism - btnxpuart: add GPIO support to power save feature Signed-off-by: Paolo Abeni <pabeni@redhat.com> -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEg1AjqC77wbdLX2LbKSR5jcyPE6QFAmc8sukSHHBhYmVuaUBy ZWRoYXQuY29tAAoJECkkeY3MjxOkLEYQAIMM6Qjh0bh3Byr3gOS1xZzXG+APLjP4 9Jr0p3i+X53i90jvVqzeVO5FTc95MVHSKZ3kvPkDMXSLUaEJxocNHCI5Dzl/2/qL wWdpUB6/ou+jKB4Bn6Z8OvVODT7qrr0tVa9M2/fuKWrIsOU/ntIhG8EhnGddk5U/ vKPSf5PUIb81uNRnF58VusY3wrT1dEoh9VfJYxL+ST+inPxjEAMy6Y+lmlsjGaSX jrS+Pp9KYiUwl3Qt0AQs+cG4OHkJdjbnChrfosWwpkiyddO8klVq06+wX/TiSzfF b9VZtBfy/GZs3lkE1mQkcILdtX5pP3YHQdpsuxFfVI0JHVszx2ck7WdoRux/8F0v kKZsYcO7bH9I1wMFP66Ff9hIbdEQaeucK+KdDkXyPNMfP91Vzmfjii8IBxOC36Ie BbOeFUrXyTxxJ2u0vf/X9JtIq8bcrkNrSd1n1jlGPMqG3FVzsY95+Oi4qfsyeUbl lS1PlVTqPMPFdX54HnxM3y2rJjhd7iXhkvmtuXNjRFThXlOiK3maAPWlM1aZ3b8u Vjs4JFUsW0tleZG+RzANjsGjXbf7AiPUGLZt+acem0K+fcjG4i5aGIAJrxwa/ORx eG74IZRt5cOI371W7gNLGHjwnuge8tFPgOWcRP2eozNm7jvMYALBejYS7eWUTvaf THcvVM+bupEZ =GzPr -----END PGP SIGNATURE----- Merge tag 'net-next-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Paolo Abeni: "The most significant set of changes is the per netns RTNL. The new behavior is disabled by default, regression risk should be contained. Notably the new config knob PTP_1588_CLOCK_VMCLOCK will inherit its default value from PTP_1588_CLOCK_KVM, as the first is intended to be a more reliable replacement for the latter. Core: - Started a very large, in-progress, effort to make the RTNL lock scope per network-namespace, thus reducing the lock contention significantly in the containerized use-case, comprising: - RCU-ified some relevant slices of the FIB control path - introduce basic per netns locking helpers - namespacified the IPv4 address hash table - remove rtnl_register{,_module}() in favour of rtnl_register_many() - refactor rtnl_{new,del,set}link() moving as much validation as possible out of RTNL lock - convert all phonet doit() and dumpit() handlers to RCU - convert IPv4 addresses manipulation to per-netns RTNL - convert virtual interface creation to per-netns RTNL the per-netns lock infrastructure is guarded by the CONFIG_DEBUG_NET_SMALL_RTNL knob, disabled by default ad interim. - Introduce NAPI suspension, to efficiently switching between busy polling (NAPI processing suspended) and normal processing. - Migrate the IPv4 routing input, output and control path from direct ToS usage to DSCP macros. This is a work in progress to make ECN handling consistent and reliable. - Add drop reasons support to the IPv4 rotue input path, allowing better introspection in case of packets drop. - Make FIB seqnum lockless, dropping RTNL protection for read access. - Make inet{,v6} addresses hashing less predicable. - Allow providing timestamp OPT_ID via cmsg, to correlate TX packets and timestamps Things we sprinkled into general kernel code: - Add small file operations for debugfs, to reduce the struct ops size. - Refactoring and optimization for the implementation of page_frag API, This is a preparatory work to consolidate the page_frag implementation. Netfilter: - Optimize set element transactions to reduce memory consumption - Extended netlink error reporting for attribute parser failure. - Make legacy xtables configs user selectable, giving users the option to configure iptables without enabling any other config. - Address a lot of false-positive RCU issues, pointed by recent CI improvements. BPF: - Put xsk sockets on a struct diet and add various cleanups. Overall, this helps to bump performance by 12% for some workloads. - Extend BPF selftests to increase coverage of XDP features in combination with BPF cpumap. - Optimize and homogenize bpf_csum_diff helper for all archs and also add a batch of new BPF selftests for it. - Extend netkit with an option to delegate skb->{mark,priority} scrubbing to its BPF program. - Make the bpf_get_netns_cookie() helper available also to tc(x) BPF programs. Protocols: - Introduces 4-tuple hash for connected udp sockets, speeding-up significantly connected sockets lookup. - Add a fastpath for some TCP timers that usually expires after close, the socket lock contention. - Add inbound and outbound xfrm state caches to speed up state lookups. - Avoid sending MPTCP advertisements on stale subflows, reducing risks on loosing them. - Make neighbours table flushing more scalable, maintaining per device neigh lists. Driver API: - Introduce a unified interface to configure transmission H/W shaping, and expose it to user-space via generic-netlink. - Add support for per-NAPI config via netlink. This makes napi configuration persistent across queues removal and re-creation. Requires driver updates, currently supported drivers are: nVidia/Mellanox mlx4 and mlx5, Broadcom brcm and Intel ice. - Add ethtool support for writing SFP / PHY firmware blocks. - Track RSS context allocation from ethtool core. - Implement support for mirroring to DSA CPU port, via TC mirror offload. - Consolidate FDB updates notification, to avoid duplicates on device-specific entries. - Expose DPLL clock quality level to the user-space. - Support master-slave PHY config via device tree. Tests and tooling: - forwarding: introduce deferred commands, to simplify the cleanup phase Drivers: - Updated several drivers - Amazon vNic, Google vNic, Microsoft vNic, Intel e1000e and Broadcom Tigon3 - to use netdev-genl to link the IRQs and queues to NAPI IDs, allowing busy polling and better introspection. - Ethernet high-speed NICs: - nVidia/Mellanox: - mlx5: - a large refactor to implement support for cross E-Switch scheduling - refactor H/W conter management to let it scale better - H/W GRO cleanups - Intel (100G, ice):: - add support for ethtool reset - implement support for per TX queue H/W shaping - AMD/Solarflare: - implement per device queue stats support - Broadcom (bnxt): - improve wildcard l4proto on IPv4/IPv6 ntuple rules - Marvell Octeon: - Add representor support for each Resource Virtualization Unit (RVU) device. - Hisilicon: - add support for the BMC Gigabit Ethernet - IBM (EMAC): - driver cleanup and modernization - Cisco (VIC): - raise the queues number limit to 256 - Ethernet virtual: - Google vNIC: - implement page pool support - macsec: - inherit lower device's features and TSO limits when offloading - virtio_net: - enable premapped mode by default - support for XDP socket(AF_XDP) zerocopy TX - wireguard: - set the TSO max size to be GSO_MAX_SIZE, to aggregate larger packets. - Ethernet NICs embedded and virtual: - Broadcom ASP: - enable software timestamping - Freescale: - add enetc4 PF driver - MediaTek: Airoha SoC: - implement BQL support - RealTek r8169: - enable TSO by default on r8168/r8125 - implement extended ethtool stats - Renesas AVB: - enable TX checksum offload - Synopsys (stmmac): - support header splitting for vlan tagged packets - move common code for DWMAC4 and DWXGMAC into a separate FPE module. - add dwmac driver support for T-HEAD TH1520 SoC - Synopsys (xpcs): - driver refactor and cleanup - TI: - icssg_prueth: add VLAN offload support - Xilinx emaclite: - add clock support - Ethernet switches: - Microchip: - implement support for the lan969x Ethernet switch family - add LAN9646 switch support to KSZ DSA driver - Ethernet PHYs: - Marvel: 88q2x: enable auto negotiation - Microchip: add support for LAN865X Rev B1 and LAN867X Rev C1/C2 - PTP: - Add support for the Amazon virtual clock device - Add PtP driver for s390 clocks - WiFi: - mac80211 - EHT 1024 aggregation size for transmissions - new operation to indicate that a new interface is to be added - support radio separation of multi-band devices - move wireless extension spy implementation to libiw - Broadcom: - brcmfmac: optional LPO clock support - Microchip: - add support for Atmel WILC3000 - Qualcomm (ath12k): - firmware coredump collection support - add debugfs support for a multitude of statistics - Qualcomm (ath5k): - Arcadyan ARV45XX AR2417 & Gigaset SX76[23] AR241[34]A support - Realtek: - rtw88: 8821au and 8812au USB adapters support - rtw89: add thermal protection - rtw89: fine tune BT-coexsitence to improve user experience - rtw89: firmware secure boot for WiFi 6 chip - Bluetooth - add Qualcomm WCN785x support for ids Foxconn 0xe0fc/0xe0f3 and 0x13d3:0x3623 - add Realtek RTL8852BE support for id Foxconn 0xe123 - add MediaTek MT7920 support for wireless module ids - btintel_pcie: add handshake between driver and firmware - btintel_pcie: add recovery mechanism - btnxpuart: add GPIO support to power save feature" * tag 'net-next-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1475 commits) mm: page_frag: fix a compile error when kernel is not compiled Documentation: tipc: fix formatting issue in tipc.rst selftests: nic_performance: Add selftest for performance of NIC driver selftests: nic_link_layer: Add selftest case for speed and duplex states selftests: nic_link_layer: Add link layer selftest for NIC driver bnxt_en: Add FW trace coredump segments to the coredump bnxt_en: Add a new ethtool -W dump flag bnxt_en: Add 2 parameters to bnxt_fill_coredump_seg_hdr() bnxt_en: Add functions to copy host context memory bnxt_en: Do not free FW log context memory bnxt_en: Manage the FW trace context memory bnxt_en: Allocate backing store memory for FW trace logs bnxt_en: Add a 'force' parameter to bnxt_free_ctx_mem() bnxt_en: Refactor bnxt_free_ctx_mem() bnxt_en: Add mem_valid bit to struct bnxt_ctx_mem_type bnxt_en: Update firmware interface spec to 1.10.3.85 selftests/bpf: Add some tests with sockmap SK_PASS bpf: fix recursive lock when verdict program return SK_PASS wireguard: device: support big tcp GSO wireguard: selftests: load nf_conntrack if not present ... |
||
Stephen Boyd
|
0cf32b1f37 |
Merge branches 'clk-samsung', 'clk-microchip', 'clk-imx', 'clk-amlogic' and 'clk-allwinner' into clk-next
* clk-samsung: clk: samsung: Introduce Exynos8895 clock driver clk: samsung: clk-pll: Add support for pll_{1051x,1052x} dt-bindings: clock: samsung: Add Exynos8895 SoC clk: samsung: gs101: make all ufs related clocks critical clk: samsung: exynosautov920: add peric1, misc and hsi0/1 clock support dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions clk: samsung: Fix out-of-bound access of of_match_node() dt-bindings: clock: samsung: remove define with number of clocks for FSD clk: samsung: fsd: do not define number of clocks in bindings clk: samsung: Fix errors reported by checkpatch clk: samsung: Fix block comment style warnings reported by checkpatch * clk-microchip: clk: lan966x: add support for lan969x SoC clock driver clk: lan966x: prepare driver for lan969x support clk: lan966x: make clk_names const char * const dt-bindings: clock: add support for lan969x * clk-imx: clk: imx: imx8-acm: Fix return value check in clk_imx_acm_attach_pm_domains() clk: imx: lpcg-scu: Skip HDMI LPCG clock save/restore clk: imx: clk-scu: fix clk enable state save and restore clk: imx: fracn-gppll: fix pll power up clk: imx: fracn-gppll: correct PLL initialization flow clk: imx: lpcg-scu: SW workaround for errata (e10858) clk: imx: add i.MX91 clk dt-bindings: clock: Add i.MX91 clock support dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition clk: imx93: Move IMX93_CLK_END macro to clk driver clk: imx95-blk-ctl: Add one clock gate for HSIO block dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible string for i.MX95 HSIO BLK CTRL * clk-amlogic: clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX clk: amlogic: axg-audio: use the auxiliary reset driver reset: amlogic: Fix small whitespace issue reset: amlogic: add auxiliary reset driver support reset: amlogic: split the device core and platform probe reset: amlogic: move drivers to a dedicated directory reset: amlogic: add reset status support reset: amlogic: use reset number instead of register count reset: amlogic: add driver parameters reset: amlogic: make parameters unsigned reset: amlogic: use generic data matching function reset: amlogic: convert driver to regmap dt-bindings: clock: convert amlogic,meson8b-clkc.txt to dtschema clk: meson: meson8b: remove spinlock clk: meson: mpll: Delete a useless spinlock from the MPLL clk: meson: s4: pll: fix frac maximum value for hifi_pll clk: meson: c3: pll: fix frac maximum value for hifi_pll clk: meson: Support PLL with fixed fractional denominators clk: meson: s4: pll: hifi_pll support fractional multiplier * clk-allwinner: clk: sunxi-ng: Use of_property_present() for non-boolean properties clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset clk: sunxi-ng: Constify struct ccu_reset_map clk: sunxi-ng: h616: Add sigma-delta modulation settings for audio PLL |
||
Vladimir Oltean
|
a12fcef429 |
soc: fsl_qbman: use be16_to_cpu() in qm_sg_entry_get_off()
struct qm_sg_entry :: offset is a 13-bit field, declared as __be16. When using be32_to_cpu(), a wrong value will be calculated on little endian systems (Arm), because type promotion from 16-bit to 32-bit, which is done before the byte swap and always in the CPU native endianness, changes the value of the scatter/gather list entry offset in big-endian interpretation (adds two zero bytes in the LSB interpretation). The result of the byte swap is ANDed with GENMASK(12, 0), so the result is always zero, because only those bytes added by type promotion remain after the application of the bit mask. The impact of the bug is that scatter/gather frames with a non-zero offset into the buffer are treated by the driver as if they had a zero offset. This is all in theory, because in practice, qm_sg_entry_get_off() has a single caller, where the bug is inconsequential, because at that call site the buffer offset will always be zero, as will be explained in the subsequent change. Flagged by sparse: warning: cast to restricted __be32 warning: cast from restricted __be16 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Breno Leitao <leitao@debian.org> Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Link: https://patch.msgid.link/20241029164317.50182-2-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
||
Tomer Maimon
|
22823157d9 |
reset: npcm: register npcm8xx clock auxiliary bus device
Add NPCM8xx clock controller auxiliary bus device registration. The NPCM8xx clock controller is registered as an aux device because the reset and the clock controller share the same register region. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Tested-by: Benjamin Fair <benjaminfair@google.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20240912191038.981105-3-tmaimon77@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Jerome Brunet
|
fb4c31587a |
reset: amlogic: add auxiliary reset driver support
Add support for the reset controller present in the audio clock controller of the g12 and sm1 SoC families, using the auxiliary bus. This is expected to replace the driver currently present directly within the related clock driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-9-60be62635d3e@baylibre.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
Linus Torvalds
|
b8979c6b4d |
soc: driver updates for 6.12
The driver updates seem larger this time around, with changes is many of the SoC specific drivers, both the custom drivers/soc ones and the closely related subsystems (memory, bus, firmware, reset, ...). The at91 platform gains support for sam9x7 chips in the soc and power management code. This is the latest variant of one of the oldest still supported SoC families, using the ARM9 (ARMv5) core. As usual, the qualcomm snapdragon platform gets a ton of updates in many of their drivers to add more features and additional SoC support. Most of these are somewhat firmware related as the platform has a number of firmware based interfaces to the kernel. A notable addition here is the inclusion of trace events to two of these drivers. Herve Codina and Christophe Leroy are now sending updates for drivers/soc/fsl/ code through the SoC tree, this contains both PowerPC and Arm specific platforms and has previously been problematic to maintain. The first update here contains support for newer PowerPC variants and some cleanups. The turris mox firmware driver has a number of updates, mostly cleanups. The Arm SCMI firmware driver gets a major rework to modularize the existing code into separately loadable drivers for the various transports, the addition of custom NXP i.MX9 interfaces and a number of smaller updates. The Arm FF-A firmware driver gets a feature update to support the v1.2 version of the specification. The reset controller drivers have some smaller cleanups and a newly added driver for the Intel/Mobileye EyeQ5/EyeQ6 MIPS SoCs. The memory controller drivers get some cleanups and refactoring for Tegra, TI, Freescale/NXP and a couple more platforms. Finally there are lots of minor updates to firmware (raspberry pi, tegra, imx), bus (sunxi, omap, tegra) and soc (rockchips, tegra, amlogic, mediatek) drivers and their DT bindings. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmboJicACgkQYKtH/8kJ Uicc+RAAlc6lY0CKqZhAKzyGsjEHzPYcTN5axNf1WrTdgv3assF+yEeiQtkd+Re7 IIbtrWYWmLouOazRm5y7OjOUUy78FRThgRaVlZLPiCZze3rlZjIHj2XJx7R1hdjv aXBSe13i1KfmOsIDVNxAJbFa5UveeAvKKxRb6SJtSwl46KGhhgI3Jwq347sR7bYY QpiVMRVZTkH7++hlE9KE5qv+I6QVlbhneU1ErHjy0g4av+UycQe0eJFOtZV+Y5Aj 7k65D3GC33eOAK56iDCUH9OfYLFu7k3LF7V0zdLIhel1tFuoYUbjkC5iQr4VAMjc Ysw0vwXdnUoG3oDiGLOIK4u56flWqT7I8gSQwRhtp6Ikc47gdlA2zJLE4MNN/4Yh fMP9LUxzr0sJ67LUq4urtnRfVtgKRRZ44v6A+CHY0l3x6rqeNbkJd38mXeVMMIWo gW8cf/fJsEdNE+1neGXq7lRrUmCwvkYUAd7y3gt1BiUq/Abas6ityvzk9Xig87I2 uq3p5nASgrl+o8OlmIBT770BeS2jY8tAGJm1ocCtYN2ZWGh37LeES4Bo/58BPTGE tydBhlBK41h2dUCYQRZFNUt/2/xCELQ2X4mUiOaL2gqmiJq3Q6fdR1d+DAOB+4a5 KL1yt5yIrBl0XMQ76kir3VmqTeKNka7aS23yefgTZfQAVb+JDw4= =EauF -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "The driver updates seem larger this time around, with changes is many of the SoC specific drivers, both the custom drivers/soc ones and the closely related subsystems (memory, bus, firmware, reset, ...). The at91 platform gains support for sam9x7 chips in the soc and power management code. This is the latest variant of one of the oldest still supported SoC families, using the ARM9 (ARMv5) core. As usual, the qualcomm snapdragon platform gets a ton of updates in many of their drivers to add more features and additional SoC support. Most of these are somewhat firmware related as the platform has a number of firmware based interfaces to the kernel. A notable addition here is the inclusion of trace events to two of these drivers. Herve Codina and Christophe Leroy are now sending updates for drivers/soc/fsl/ code through the SoC tree, this contains both PowerPC and Arm specific platforms and has previously been problematic to maintain. The first update here contains support for newer PowerPC variants and some cleanups. The turris mox firmware driver has a number of updates, mostly cleanups. The Arm SCMI firmware driver gets a major rework to modularize the existing code into separately loadable drivers for the various transports, the addition of custom NXP i.MX9 interfaces and a number of smaller updates. The Arm FF-A firmware driver gets a feature update to support the v1.2 version of the specification. The reset controller drivers have some smaller cleanups and a newly added driver for the Intel/Mobileye EyeQ5/EyeQ6 MIPS SoCs. The memory controller drivers get some cleanups and refactoring for Tegra, TI, Freescale/NXP and a couple more platforms. Finally there are lots of minor updates to firmware (raspberry pi, tegra, imx), bus (sunxi, omap, tegra) and soc (rockchips, tegra, amlogic, mediatek) drivers and their DT bindings" * tag 'soc-drivers-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (212 commits) firmware: imx: remove duplicate scmi_imx_misc_ctrl_get() platform: cznic: turris-omnia-mcu: Fix error check in omnia_mcu_register_trng() bus: sunxi-rsb: Simplify code with dev_err_probe() soc: fsl: qe: ucc: Export ucc_mux_set_grant_tsa_bkpt soc: fsl: cpm1: qmc: Fix dependency on fsl_soc.h dt-bindings: arm: rockchip: Add rk3576 compatible string to pmu.yaml soc: fsl: qbman: Remove redundant warnings soc: fsl: qbman: Use iommu_paging_domain_alloc() MAINTAINERS: Add QE files related to the Freescale QMC controller soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation soc: fsl: qe: Add missing PUSHSCHED command soc: fsl: qe: Add resource-managed muram allocators soc: fsl: cpm1: qmc: Introduce qmc_version soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC soc: fsl: cpm1: qmc: Handle RPACK initialization soc: fsl: cpm1: qmc: Rename qmc_chan_command() soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version soc: fsl: cpm1: qmc: Re-order probe() operations ... |
||
Herve Codina
|
f68cd02d51 |
soc: fsl: qe: Add missing PUSHSCHED command
The PUSHSCHED command is missing in the QE header file. This command is supported on MPC8321 and is used to modify the start address for the task running on a given peripheral. It is needed for the QMC in order to perform the re-initialization procedure and so, ensure the correct UCC setup in that case. Simply add the missing command in the commands list available in the QE header file. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-34-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> |
||
Herve Codina
|
c6f39c7c16 |
soc: fsl: qe: Add resource-managed muram allocators
Introduce devm_cpm_muram_alloc() and devm_cpm_muram_alloc_fixed(), the resource-managed version of cpm_muram_alloc and cpm_muram_alloc_fixed(). These resource-managed versions simplify the user avoiding the need to call cpm_muram_free(). Indeed, the allocated area returned by these functions will be automatically freed on driver detach. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-33-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> |
||
Vladimir Oltean
|
36dd1141be |
net: mscc: ocelot: treat 802.1ad tagged traffic as 802.1Q-untagged
I was revisiting the topic of 802.1ad treatment in the Ocelot switch [0]
and realized that not only is its basic VLAN classification pipeline
improper for offloading vlan_protocol 802.1ad bridges, but also improper
for offloading regular 802.1Q bridges already.
Namely, 802.1ad-tagged traffic should be treated as VLAN-untagged by
bridged ports, but this switch treats it as if it was 802.1Q-tagged with
the same VID as in the 802.1ad header. This is markedly different to
what the Linux bridge expects; see the "other_tpid()" function in
tools/testing/selftests/net/forwarding/bridge_vlan_aware.sh.
An idea came to me that the VCAP IS1 TCAM is more powerful than I'm
giving it credit for, and that it actually overwrites the classified VID
before the VLAN Table lookup takes place. In other words, it can be
used even to save a packet from being dropped on ingress due to VLAN
membership.
Add a sophisticated TCAM rule hardcoded into the driver to force the
switch to behave like a Linux bridge with vlan_filtering 1 vlan_protocol
802.1Q.
Regarding the lifetime of the filter: eventually the bridge will
disappear, and vlan_filtering on the port will be restored to 0 for
standalone mode. Then the filter will be deleted.
[0]: https://lore.kernel.org/netdev/20201009122947.nvhye4hvcha3tljh@skbuf/
Fixes:
|
||
Vladimir Oltean
|
c5e12ac3be |
net: mscc: ocelot: serialize access to the injection/extraction groups
As explained by Horatiu Vultur in commit |
||
Vladimir Oltean
|
67c3ca2c5c |
net: mscc: ocelot: use ocelot_xmit_get_vlan_info() also for FDMA and register injection
Problem description ------------------- On an NXP LS1028A (felix DSA driver) with the following configuration: - ocelot-8021q tagging protocol - VLAN-aware bridge (with STP) spanning at least swp0 and swp1 - 8021q VLAN upper interfaces on swp0 and swp1: swp0.700, swp1.700 - ptp4l on swp0.700 and swp1.700 we see that the ptp4l instances do not see each other's traffic, and they all go to the grand master state due to the ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES condition. Jumping to the conclusion for the impatient ------------------------------------------- There is a zero-day bug in the ocelot switchdev driver in the way it handles VLAN-tagged packet injection. The correct logic already exists in the source code, in function ocelot_xmit_get_vlan_info() added by commit |
||
Linus Torvalds
|
12cc3d5389 |
sound updates for 6.11-rc1
Lots of changes in this cycle, but mostly for cleanups and refactoring. Significant amount of changes are about DT schema conversions for ASoC at this time while we see other usual suspects, too. Some highlights below: Core: - Re-introduction of PCM sync ID support API - MIDI2 time-base extension in ALSA sequencer API ASoC: - Syncing of features between simple-audio-card and the two audio-graph cards - Support for specifying the order of operations for components within cards to allow quirking for unusual systems - Lots of DT schema conversions - Continued SOF/Intel updates for topology, SoundWire, IPC3/4 - New support for Asahi Kasei AK4619, Cirrus Logic CS530x, Everest Semiconductors ES8311, NXP i.MX95 and LPC32xx, Qualcomm LPASS v2.5 and WCD937x, Realtek RT1318 and RT1320 and Texas Instruments PCM5242 HD-audio: - More quirks, Intel PantherLake support, senarytech codec support - Refactoring of Cirrus codec component-binding Others: - ALSA control kselftest improvements, and fixes for input value checks in various drivers -----BEGIN PGP SIGNATURE----- iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmaZNdoOHHRpd2FpQHN1 c2UuZGUACgkQLtJE4w1nLE/PWw//XYFQ2v+bc0x62LI1rIEt1/mSz6R1moHf85fK CjDOvHoGlZEkXuTmycK8b522/9tslHyE+8P97TZAy/6ph/yT44JgwQaadAvTZdWK eKrchogf+v6DaQar8+nmXp8409HBcfJdrSJth2xR5OhY741/kGBF1/YCBHZaIQan T87ag0tu1PVWQuLhdRlghkNYds+oaSX6wMaLRzVYI2TFYfHZOWYfVYd/NACb8KtO z66TqybOxOpq4xCi+umNaGn2TxdDvo427JgioAKzcGLodowRKmqNV+mXddfrhBEE Fwq4o8YGxgX+oaNn4aLQdrrREc1tuwQj0Kwpt/rkh4ESTgugcElq5hJCgPY8U3Ej 5+ih7ZeIojKnfjNivHuath7tXe1inqPEK3RBt3qMoUldIxNhJ8WfIF0RNzW/QRY2 g4JAI/4lswqPz6vYKULatDk+ZEW6PiV72kwW+4Vt7NxZnn9VFzP27qHuwkUHP5HM 0q4/NKrv+MFPedOLEeEm/1dmE7NRT4tRJuIV+RwMJ0cyP4l2jSCwyDpxfkFqGitc wB0AXK3YLwISlKjziCox1cAex8F2XhjCdpOyOV6hTc3Dv/DySMHysv+4Uf4/kvst 3GrqdkMHy4cEUYj/Sj+VunfColsX2KnQAN+e4Sonn+5nPsw7ypGkpM1Kf+wTQuNK EoxpzGo= =hn0h -----END PGP SIGNATURE----- Merge tag 'sound-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "Lots of changes in this cycle, but mostly for cleanups and refactoring. Significant amount of changes are about DT schema conversions for ASoC at this time while we see other usual suspects, too. Some highlights below: Core: - Re-introduction of PCM sync ID support API - MIDI2 time-base extension in ALSA sequencer API ASoC: - Syncing of features between simple-audio-card and the two audio-graph cards - Support for specifying the order of operations for components within cards to allow quirking for unusual systems - Lots of DT schema conversions - Continued SOF/Intel updates for topology, SoundWire, IPC3/4 - New support for Asahi Kasei AK4619, Cirrus Logic CS530x, Everest Semiconductors ES8311, NXP i.MX95 and LPC32xx, Qualcomm LPASS v2.5 and WCD937x, Realtek RT1318 and RT1320 and Texas Instruments PCM5242 HD-audio: - More quirks, Intel PantherLake support, senarytech codec support - Refactoring of Cirrus codec component-binding Others: - ALSA control kselftest improvements, and fixes for input value checks in various drivers" * tag 'sound-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (349 commits) kselftest/alsa: Log the PCM ID in pcm-test kselftest/alsa: Use card name rather than number in test names ALSA: hda/realtek: Fix the speaker output on Samsung Galaxy Book Pro 360 ALSA: hda/tas2781: Add new quirk for Lenovo Hera2 Laptop ALSA: seq: ump: Skip useless ports for static blocks ALSA: pcm_dmaengine: Don't synchronize DMA channel when DMA is paused ALSA: usb: Use BIT() for bit values ALSA: usb: Fix UBSAN warning in parse_audio_unit() ALSA: hda/realtek: Enable headset mic on Positivo SU C1400 ASoC: tas2781: Add new Kontrol to set tas2563 digital Volume ASoC: codecs: wcd937x: Remove separate handling for vdd-buck supply ASoC: codecs: wcd937x: Remove the string compare in MIC BIAS widget settings ASoC: codecs: wcd937x-sdw: Fix Unbalanced pm_runtime_enable ASoC: dt-bindings: cirrus,cs42xx8: Convert to dtschema ASoC: cs530x: Remove bclk from private structure ASoC: cs530x: Calculate proper bclk rate using TDM ASoC: dt-bindings: cirrus,cs4270: Convert to dtschema firmware: cs_dsp: Rename fw_ver to wmfw_ver firmware: cs_dsp: Clarify wmfw format version log message firmware: cs_dsp: Make wmfw and bin filename arguments const char * ... |
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Kory Maincent
|
2111375b85 |
net: Add struct kernel_ethtool_ts_info
In prevision to add new UAPI for hwtstamp we will be limited to the struct ethtool_ts_info that is currently passed in fixed binary format through the ETHTOOL_GET_TS_INFO ethtool ioctl. It would be good if new kernel code already started operating on an extensible kernel variant of that structure, similar in concept to struct kernel_hwtstamp_config vs struct hwtstamp_config. Since struct ethtool_ts_info is in include/uapi/linux/ethtool.h, here we introduce the kernel-only structure in include/linux/ethtool.h. The manual copy is then made in the function called by ETHTOOL_GET_TS_INFO. Acked-by: Shannon Nelson <shannon.nelson@amd.com> Acked-by: Alexandra Winter <wintera@linux.ibm.com> Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20240709-feature_ptp_netnext-v17-6-b5317f50df2a@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
||
Herve Codina
|
af8432b2e4
|
soc: fsl: cpm1: qmc: Introduce qmc_chan_count_phandles()
No function in the QMC API is available to get the number of phandles present in a phandle list. Fill this lack introducing qmc_chan_count_phandles(). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://patch.msgid.link/20240701113038.55144-9-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
Herve Codina
|
37797c605d
|
soc: fsl: cpm1: qmc: Introduce functions to get a channel from a phandle list
qmc_chan_get_byphandle() and the resource managed version retrieve a channel from a simple phandle. Extend the API and introduce qmc_chan_get_byphandles_index() and the resource managed version in order to retrieve a channel from a phandle list using the provided index to identify the phandle in the list. Also update qmc_chan_get_byphandle() and the resource managed version to use qmc_chan_get_byphandles_index() and so avoid code duplication. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://patch.msgid.link/20240701113038.55144-8-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
Linus Torvalds
|
619b92b9c8 |
I'm actually surprised this time. There aren't any new Qualcomm SoC clk
drivers. And there's zero diff in the core clk framework. Instead we have new clk drivers for STM and Sophgo, with Samsung^WGoogle in third for the diffstat because they introduced HSI0 and HSI2 clk drivers for Google's GS101 SoC (high speed interface things like PCIe, UFS, and MMC). Beyond those big diffs there's the usual updates to various clk drivers for incorrect parent descriptions or mising MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super interesting here. New Drivers: - STM32MP257 SoC clk driver - Airoha EN7581 SoC clk driver - Sophgo CV1800B, CV1812H and SG2000 SoC clk driver - Loongson-2k0500 and Loongson-2k2000 SoC clk driver - Add HSI0 and HSI2 clock controllers for Google GS101 - Add i.MX95 BLK CTL clock driver Updates: - Allocate clk_ops dynamically for SCMI clk driver - Add support in qcom RCG and RCG2 for multiple configurations for the same frequency - Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve issues - Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some boards - Cleanups and fixes for Qualcomm Stromer PLLs - Reduce max CPU frequency on Qualcomm APSS IPQ5018 - Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera clk drivers - Make Qualcomm MSM8998 Venus clocks functional - Cleanup downstream remnants related to DisplayPort across Qualcomm SM8450, SM6350, SM8550, and SM8650 - Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL - Use a specific Qualcomm QCS404 compatible for the otherwise generic HFPLL - Remove Qualcomm SM8150 CPUSS AHB clk as it is unused - Remove an unused field in the Qualcomm RPM clk driver - Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953 global clock controller drivers - Allow choice of manual or firmware-driven control over PLLs, needed to fully implement CPU clock controllers on Exynos850 - Correct PLL clock IDs on ExynosAutov9 - Propagate certain clock rates to allow setting proper SPI clock rates on Google GS101 - Mark certain Google GS101 clocks critical - Convert old S3C64xx clock controller bindings to DT schema - Add new PLL rate and missing mux on Rockchip rk3568 - Add missing reset line on Rockchip rk3588 - Removal of an unused field in struct rockchip_mmc_clock - Amlogic s4/a1: add regmap maximum register for proper debugfs dump - Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers - Amlogic pll driver: print clock name on lock error to help debug - Amlogic vclk: finish dsi clock path support - Amlogic license: fix occurence "GPL v2" as reported by checkpatch - Add PM runtime support to i.MX8MP Audiomix - Add DT schema for i.MX95 Display Master Block Control - Convert to platform remove callback returning void for i.MX8MP Audiomix - Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas R-Car V4M - Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five - Prepare power domain support for Renesas RZ/G2L family members, and add actual support on Renesas RZ/G3S SoC - Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas R-Car V4M - Add additional constraints to Allwinner A64 PLL MIPI clock - Fix autoloading sunxi-ng clocks when build as a module -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmZGs1MRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSW2Pw/+OciG7jQzlWQD09M9qTSzygVu/0+NF8ez ecvLnWzz3b05GSWqfeG3mm09RmaTtggwPcWx4ad5NBDxGfhn+rT72WWJt6EjA1ln i/eNUQIlFZmiDM7Xwx6S841hcRbPz9/RRIeXtmiDkMWjsysr6MHlTkWWVMNfGkiE 9jxM5BH6N04A4664k3a4qlcZkj2KNkOLeCyzMLtm5aIwBoL3fZ+Q3sqVTgp5imt1 rzJgpGfN1QhAnd8kV2oIPtJEs9woZtRjCtTtLrTnoGf518uq25ZJx7Mz3Dx+ubUv dtOLjjXdM+Q/ou7DM3h7HRjiZC8Mp8CprwwoxEbckBL4gBWYPyu8e6eZNBsF+3Ol 7WP3TZknDrWsUDxAcX37Euidd+hc8xtbXCQwm+QcugEee7ZXK4ElTgXwyH3FUqn2 GBI5D0+/3WyoBLqVQ7nTkMV0ps5dHrpBj6J1u/7ZfvC23/E7/5CzIxULXt1hTOcI F1cqS78HLAc8BK3gw/63e5TtTMA4cItJD7InBB0jemfeoy03nuWzFbRUqtAStkHd BKxmGSV3XXMdGtiN5SFy3tk7NlKeFMiVBiTzD++Vx9IL3mCdArtULu93OfUIOzXW B/ekJKi9OHkJx3mBrbio6k4rugQDZovzWN9U2pDJtGCIaAXgYgwKuP8S9UwKLIcx R6QarNE5Rsc= =YoVJ -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "I'm actually surprised this time. There aren't any new Qualcomm SoC clk drivers. And there's zero diff in the core clk framework. Instead we have new clk drivers for STM and Sophgo, with Samsung^WGoogle in third for the diffstat because they introduced HSI0 and HSI2 clk drivers for Google's GS101 SoC (high speed interface things like PCIe, UFS, and MMC). Beyond those big diffs there's the usual updates to various clk drivers for incorrect parent descriptions or mising MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super interesting here. New Drivers: - STM32MP257 SoC clk driver - Airoha EN7581 SoC clk driver - Sophgo CV1800B, CV1812H and SG2000 SoC clk driver - Loongson-2k0500 and Loongson-2k2000 SoC clk driver - Add HSI0 and HSI2 clock controllers for Google GS101 - Add i.MX95 BLK CTL clock driver Updates: - Allocate clk_ops dynamically for SCMI clk driver - Add support in qcom RCG and RCG2 for multiple configurations for the same frequency - Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve issues - Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some boards - Cleanups and fixes for Qualcomm Stromer PLLs - Reduce max CPU frequency on Qualcomm APSS IPQ5018 - Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera clk drivers - Make Qualcomm MSM8998 Venus clocks functional - Cleanup downstream remnants related to DisplayPort across Qualcomm SM8450, SM6350, SM8550, and SM8650 - Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL - Use a specific Qualcomm QCS404 compatible for the otherwise generic HFPLL - Remove Qualcomm SM8150 CPUSS AHB clk as it is unused - Remove an unused field in the Qualcomm RPM clk driver - Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953 global clock controller drivers - Allow choice of manual or firmware-driven control over PLLs, needed to fully implement CPU clock controllers on Exynos850 - Correct PLL clock IDs on ExynosAutov9 - Propagate certain clock rates to allow setting proper SPI clock rates on Google GS101 - Mark certain Google GS101 clocks critical - Convert old S3C64xx clock controller bindings to DT schema - Add new PLL rate and missing mux on Rockchip rk3568 - Add missing reset line on Rockchip rk3588 - Removal of an unused field in struct rockchip_mmc_clock - Amlogic s4/a1: add regmap maximum register for proper debugfs dump - Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers - Amlogic pll driver: print clock name on lock error to help debug - Amlogic vclk: finish dsi clock path support - Amlogic license: fix occurence "GPL v2" as reported by checkpatch - Add PM runtime support to i.MX8MP Audiomix - Add DT schema for i.MX95 Display Master Block Control - Convert to platform remove callback returning void for i.MX8MP Audiomix - Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas R-Car V4M - Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five - Prepare power domain support for Renesas RZ/G2L family members, and add actual support on Renesas RZ/G3S SoC - Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas R-Car V4M - Add additional constraints to Allwinner A64 PLL MIPI clock - Fix autoloading sunxi-ng clocks when build as a module" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (118 commits) clk: samsung: Don't register clkdev lookup for the fixed rate clocks clk, reset: microchip: mpfs: fix incorrect preprocessor conditions clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018 clk: qcom: Fix SM_GPUCC_8650 dependencies clk: qcom: Fix SC_CAMCC_8280XP dependencies dt-bindings: clocks: stm32mp25: add access-controllers description clock, reset: microchip: move all mpfs reset code to the reset subsystem clk: samsung: gs101: drop unused HSI2 clock parent data clk: rockchip: rk3568: Add PLL rate for 724 MHz clk: rockchip: Remove an unused field in struct rockchip_mmc_clock dt-bindings: clock: fixed: Define a preferred node name clk: meson: s4: fix module autoloading clk: samsung: gs101: mark some apm UASC and XIU clocks critical clk: imx: imx8mp: Convert to platform remove callback returning void clk: imx: imx8mp: Switch to RUNTIME_PM_OPS() clk: bcm: rpi: Assign ->num before accessing ->hws clk: bcm: dvp: Assign ->num before accessing ->hws clk: samsung: gs101: add support for cmu_hsi2 clk: samsung: gs101: add support for cmu_hsi0 ... |
||
Linus Torvalds
|
c024814828 |
Hi,
This is pull request for trusted keys subsystem containing a new key type for the Data Co-Processor (DCP), which is an IP core built into many NXP SoCs such as i.mx6ull. BR, Jarkko -----BEGIN PGP SIGNATURE----- iJYEABYKAD4WIQRE6pSOnaBC00OEHEIaerohdGur0gUCZjzswCAcamFya2tvLnNh a2tpbmVuQGxpbnV4LmludGVsLmNvbQAKCRAaerohdGur0iVQAP9lxVjTKjMHQB01 KFAXUogNU42JuJjzEiC5TaDxFPNHlAEAqVBYnPIZdP4VMF3UalVgIu/eRfvxTW/t klC+q7WiEwg= =+33z -----END PGP SIGNATURE----- Merge tag 'keys-trusted-next-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd Pull trusted keys updates from Jarkko Sakkinen: "This contains a new key type for the Data Co-Processor (DCP), which is an IP core built into many NXP SoCs such as i.mx6ull" * tag 'keys-trusted-next-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd: docs: trusted-encrypted: add DCP as new trust source docs: document DCP-backed trusted keys kernel params MAINTAINERS: add entry for DCP-based trusted keys KEYS: trusted: Introduce NXP DCP-backed trusted keys KEYS: trusted: improve scalability of trust source config crypto: mxs-dcp: Add support for hardware-bound keys |
||
David Gstir
|
3d16af0b4c |
crypto: mxs-dcp: Add support for hardware-bound keys
DCP (Data Co-Processor) is able to derive private keys for a fused random seed, which can be referenced by handle but not accessed by the CPU. Similarly, DCP is able to store arbitrary keys in four dedicated key slots located in its secure memory area (internal SRAM). These keys can be used to perform AES encryption. Expose these derived keys and key slots through the crypto API via their handle. The main purpose is to add DCP-backed trusted keys. Other use cases are possible too (see similar existing paes implementations), but these should carefully be evaluated as e.g. enabling AF_ALG will give userspace full access to use keys. In scenarios with untrustworthy userspace, this will enable en-/decryption oracles. Co-developed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Richard Weinberger <richard@nod.at> Co-developed-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at> Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at> Signed-off-by: David Gstir <david@sigma-star.at> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org> |
||
Conor Dooley
|
bc2da26599 |
clk, reset: microchip: mpfs: fix incorrect preprocessor conditions
While moving all the reset code in the PolarFire SoC clock driver to the
reset subsystem, I removed an `#if IS_ENABLED(RESET_CONTROLLER)` from
the driver and moved it to the header, however this was not the correct
thing to do. In the driver such a condition over-eagerly provided a
complete implementation for mpfs_reset_{read,write}() when the reset
subsystem was enabled without the PolarFire SoC reset driver, but in the
header it meant that when the subsystem was enabled and the driver was
not, no implementation for mpfs_reset_controller_register() was
provided. Fix the condition so that the stub implementation of
mpfs_reset_controller_register() is used when the reset driver is
disabled.
Fixes:
|
||
Conor Dooley
|
098c290a49 |
clock, reset: microchip: move all mpfs reset code to the reset subsystem
Stephen and Philipp, while reviewing patches, said that all of the aux device creation and the register read/write code could be moved to the reset subsystem, leaving the clock driver with no implementations of reset_* functions at all. Move them. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240424-strangle-sharpener-34755c5e6e3e@spud Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Maulik Shah
|
f592cc5794 |
soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request
Each RPMh VRM accelerator resource has 3 or 4 contiguous 4-byte aligned
addresses associated with it. These control voltage, enable state, mode,
and in legacy targets, voltage headroom. The current in-flight request
checking logic looks for exact address matches. Requests for different
addresses of the same RPMh resource as thus not detected as in-flight.
Add new cmd-db API cmd_db_match_resource_addr() to enhance the in-flight
request check for VRM requests by ignoring the address offset.
This ensures that only one request is allowed to be in-flight for a given
VRM resource. This is needed to avoid scenarios where request commands are
carried out by RPMh hardware out-of-order leading to LDO regulator
over-current protection triggering.
Fixes:
|
||
Linus Torvalds
|
bb41fe35dc |
Char/Misc and other driver subsystem updates for 6.9-rc1
Here is the big set of char/misc and a number of other driver subsystem updates for 6.9-rc1. Included in here are: - IIO driver updates, loads of new ones and evolution of existing ones - coresight driver updates - const cleanups for many driver subsystems - speakup driver additions - platform remove callback void cleanups - mei driver updates - mhi driver updates - cdx driver updates for MSI interrupt handling - nvmem driver updates - other smaller driver updates and cleanups, full details in the shortlog All of these have been in linux-next for a long time with no reported issue, other than a build warning with some older versions of gcc for a speakup driver, fix for that will come in a few days when I catch up with my pending patch queues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZfwuLg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynKVACgjvR1cD8NYk9PcGWc9ZaXAZ6zSnwAn260kMoe lLFtwszo7m0N6ZULBWBd =y3yz -----END PGP SIGNATURE----- Merge tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver subsystem updates from Greg KH: "Here is the big set of char/misc and a number of other driver subsystem updates for 6.9-rc1. Included in here are: - IIO driver updates, loads of new ones and evolution of existing ones - coresight driver updates - const cleanups for many driver subsystems - speakup driver additions - platform remove callback void cleanups - mei driver updates - mhi driver updates - cdx driver updates for MSI interrupt handling - nvmem driver updates - other smaller driver updates and cleanups, full details in the shortlog All of these have been in linux-next for a long time with no reported issue, other than a build warning for the speakup driver" The build warning hits clang and is a gcc (and C23) extension, and is fixed up in the merge. Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/ * tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits) binder: remove redundant variable page_addr uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion uio_pruss: UIO_MEM_DMA_COHERENT conversion cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT uio: introduce UIO_MEM_DMA_COHERENT type cdx: add MSI support for CDX bus pps: use cflags-y instead of EXTRA_CFLAGS speakup: Add /dev/synthu device speakup: Fix 8bit characters from direct synth parport: sunbpp: Convert to platform remove callback returning void parport: amiga: Convert to platform remove callback returning void char: xillybus: Convert to platform remove callback returning void vmw_balloon: change maintainership MAINTAINERS: change the maintainer for hpilo driver char: xilinx_hwicap: Fix NULL vs IS_ERR() bug hpet: remove hpets::hp_clocksource platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH char: xilinx_hwicap: drop casting to void in dev_set_drvdata greybus: move is_gb_* functions out of greybus.h greybus: Remove usage of the deprecated ida_simple_xx() API ... |
||
Arnd Bergmann
|
daa0987e1f |
Qualcomm driver updates for v6.9
This introduces the Qualcomm Programmable Boot Sequencer (PBS) driver. The Qualcomm SMEM no longer acquires the hwspinlock during the "get" operation, to improve the system behavior during the recovery of a remoteproc that crashed with the hwspinlock held. The Qualcomm Always On Subsystem (AOSS) message protocol driver gains tracepoints, printf annotation, and a debugfs interface is introduced for tweaking system properties during development and debugging. The Qualcomm socinfo driver gains data for SM8475, QCM8550 and QCS8550 platforms, and the PM2250 is renamed to PM4125. Support for controlling the voltage regulator in SPM/SAW2 is introduced. The gfx.lvl power-domain is dropped for SA8540P, as this resource was incorrectly inherited from SC8280XP. Additionally some code cleanup improvements is introduced across APR, LLCC, SMP2P and SPM. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmXarn0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FzZoP/2hYUMS+sR2kD7gZDGi8oV71C+dQ Vmo1MQIhGjYEb6HSHdrxp/11GPlLVU45xuk9/FFVqAPrxNQm2y9NC60Ye1TQNWZR XS+w5+YkIFdfZIbZ8GGmlPspeXDSnq2DGWQjht+cBNyASzhjO5ICP79WQ0jfHgjH l5pNw3YMamc7pwdX2oslxXV8HzDr4JxzpveV0+QbsVDU4J04mrxoBRmv2cdqv2Eb 5jNR4HjmCQkdI/bp/2frCmWmGP9bqP24C6XWCe4lXuCAsmNKAeEeuyABnsPNRYrO 5ELd2sPpXBLBUhR9w/0rY9ouIsJ500BD7U1yLrHocwGICL1Ro7dGjnyp6j/7Tm9X 1nx2mHK7ywH7E6BxVTcmDS3CtymcMknpUfUjANJ/yQrAmcqvKRA3F0ELiXywrndQ 0R97qjc9ixVaM5LU4kMgQG50NZCmsNPJ7a3smOihpmfJK+6Mmkc5XxFRYuJgL9Ag b1PwnVgzeBPQAs+Tx7i5bBfFOa49zVxHYIFfu+XY50DL80viiKCRAeXQNyWmJ0qM 3tKgMeIY2nXZJ0DvySFfro51AnZcXEMa3Bc5qNZlM4jaqXGPkDocAV9CYKntlXFU POnOnGo4liZalWqel3tTuDoBu3nVAq0q4+ooWl755TRGBtIvW1tWAOgldjg6v3Ef 6BgAWh8GrEHM0etB =T09a -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXl7kUACgkQYKtH/8kJ UidEfQ//eugpCwNrv6q1TdlSBJkwlVV/3VJLewh4SCdpckQNJ9ysxDt0hnbTVVz8 ykR0ilYLrpuinbWSaBIZp4oxypIHOEhXzQf1diyrAjM9T5mVnv+Ytdy3qDrQ1SOM yg8n64aaBCrJiCJk3vHitS2DxStbmikX8i0dzQNeG7YskplrkbKXqtXjQ8zmanAc 2Y4Ot1DMoTKjp4t6mC7yF5YXTEfCkg0eHaIdzMREarWRUU+g0qqR43T416AhayM5 4mNH42/0rxJtvN3+EeQkVBXMWu2hmHt9esdR216GZ22fS+J9HAVOGPM+oga1Td7c 947T2BB55AalfjiNxWbfabxNmHyEuVyYWaDAJO/qU0ZIE+539QAVaW9xrTxYeOFp PbctLehm3DUPmR453R4oUTGC6UD+OnZOj+ppy/vB08UbdF5bV0KRT/hviOR+bb6U VCYRbDIsfzY1fFFLJShZONogZADtciDjel7WATwhttw503NLH5DaebD+OjPbHVgq U4y7maUGPkbAPJT4YbYOcetqVOnYiFp8OG3J/JDTOr3+3RNtInPYao5TSb1QNjGh A7+4jKf0X8err26xpmGXfa2nG8hUNOPn/PYVNwxgWmq0P74KR2GwenB4ze+SME2J sc6ZQy4LAnU8KSAZpLVPrv78R9cbyCvCtWbQpKzY8l8PfzhaK24= =bPSM -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.9 This introduces the Qualcomm Programmable Boot Sequencer (PBS) driver. The Qualcomm SMEM no longer acquires the hwspinlock during the "get" operation, to improve the system behavior during the recovery of a remoteproc that crashed with the hwspinlock held. The Qualcomm Always On Subsystem (AOSS) message protocol driver gains tracepoints, printf annotation, and a debugfs interface is introduced for tweaking system properties during development and debugging. The Qualcomm socinfo driver gains data for SM8475, QCM8550 and QCS8550 platforms, and the PM2250 is renamed to PM4125. Support for controlling the voltage regulator in SPM/SAW2 is introduced. The gfx.lvl power-domain is dropped for SA8540P, as this resource was incorrectly inherited from SC8280XP. Additionally some code cleanup improvements is introduced across APR, LLCC, SMP2P and SPM. * tag 'qcom-drivers-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible soc: qcom: spm: add support for voltage regulator soc: qcom: spm: remove driver-internal structures from the driver API dt-bindings: soc: qcom: qcom,saw2: define optional regulator node dt-bindings: soc: qcom: qcom,saw2: add missing compatible strings dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml soc: qcom: llcc: Check return value on Broadcast_OR reg read soc: qcom: socinfo: Add Soc IDs for SM8475 family dt-bindings: arm: qcom,ids: Add IDs for SM8475 family soc: qcom: apr: make aprbus const dt-bindings: soc: qcom: qcom,pmic-glink: document X1E80100 compatible soc: qcom: add QCOM PBS driver dt-bindings: soc: qcom: Add qcom,pbs bindings pmdomain: qcom: rpmhpd: Drop SA8540P gfx.lvl soc: qcom: socinfo: rename PM2250 to PM4125 soc: qcom: aoss: Add tracepoints in qmp_send() soc: qcom: socinfo: add SoC Info support for QCM8550 and QCS8550 platform dt-bindings: arm: qcom,ids: add SoC ID for QCM8550 and QCS8550 soc: qcom: aoss: Add debugfs interface for sending messages soc: qcom: smem: remove hwspinlock from item get routine ... Link: https://lore.kernel.org/r/20240225030612.480241-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Krzysztof Kozlowski
|
0dc5b8abfa |
interconnect: constify of_phandle_args in xlate
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> # Tegra Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alim Akhtar <alim.akhtar@samsung.com> # Samsung Link: https://lore.kernel.org/r/20240220072213.35779-1-krzysztof.kozlowski@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
Dmitry Baryshkov
|
57e2b067f1 |
soc: qcom: spm: remove driver-internal structures from the driver API
Move internal SPM driver structures to the driver itself, removing them from the public API. The CPUidle driver doesn't use them at all. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-4-0472ec237f49@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
Kartik
|
8402074f30 |
soc/tegra: fuse: Add support for Tegra241
Add support for Tegra241 which use ACPI boot. Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
Christophe JAILLET
|
9863084dd9 |
soc/tegra: pmc: Remove some old and deprecated functions and constants
These TEGRA_IO_RAIL_... functions and constants have been deprecated in
commit
|
||
Dmitry Baryshkov
|
5155e48128 |
soc: qcom: socinfo: rename PM2250 to PM4125
It seems, the only actual mentions of PM2250 can be found are related to the Qualcomm RB1 platform. However even RB1 schematics use PM4125 as a PMIC name. Rename PM2250 to PM4125 to follow the documentation. Fixes: |
||
Linus Torvalds
|
2385018a4e |
- New Device Support
- Add support for Qualcomm PM8937 PMIC to QCOM SPMI PMIC - Fix-ups - Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations - Device Tree binding adaptions/conversions/creation - Improve error handling; return proper error values, simplify, avoid duplicates, etc - Continue work to remove superfluous platform .remove() call-backs - Move some exported symbols into private namespaces - Clean-up and staticify PM related operations - Trivial; spelling, whitespace, clean-ups, etc - Fix include lists; alphabetise, remove unused, explicitly add used - Bug Fixes - Use PLATFORM_DEVID_AUTO to ensure multiple duplicate devices can co-exist - Ensure debugfs register view is correctly presented - Fix ordering and value issues in current use of clk_register_fractional_divider() - Repair Kconfig based dependency lists -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmWmsH0ACgkQUa+KL4f8 d2HIpQ//TWvqbUtHFxK89b/g4soIo2LS8Odz6CnbMlAwlNnhjgrqqFXnPxifN+TP L6aZX9buij7kH6iPfIi/hFDKVMwxgLUax0rTHNIvzOgg++jw3UoR/x4CvLITJ8Yb FUVMGLF1lPbXrURS7G23LnZpM0WTWEgJvb+zOLVsL3J6HihGi9JO2EoNHwM/GwSl eTtZydwdRo0u7m+z+EjaZnoSamBF+5i8ZJUAg8eF9LZtCB0AXe/zMWjgtZNz1Pqn dAd7CbOdJQjaxYtBlRRpgdIuI6d29yotY91pGu5OEhmXPMZuZRUjtz0HnNDNcPvU +Mnz3L8tcci8ZUmQ0Zr8OBrYtw623074+h/TSeUj88Ce4LAzYkvIfprw21qxl9Wx h1VxHf0GsJRswi6lgOA4JItZEARhU37ePMPZ2zyT7e8IWh35KGbdYubUstLFittP zzwiPO0haGeprvSgX+pn2rxJofaFtSIpqiMB7LtSKqmiEl1DgdC06+wikLe8l9+y LnvyzQOECh1ANMHdvoQO2mqa97WxlzTBe9zg5mQQrOnyUJgYb0D5dDA8l/xvobUz XlMIsJ8ZCulwVkQWdXIHZFtfaoKs3jM4G3vJIy+vkQSf+U3y4pGhNhMJ67Cz33Ge W2riI+Vq/mmLMUDayCZENxTJ3WNUO6rqymvbtCPEuiHRSFnjBYU= =R7SR -----END PGP SIGNATURE----- Merge tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull mfd updates from Lee Jones: "New Device Support: - Add support for Qualcomm PM8937 PMIC to QCOM SPMI PMIC Fix-ups: - Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations - Device Tree binding adaptions/conversions/creation - Improve error handling; return proper error values, simplify, avoid duplicates, etc - Continue work to remove superfluous platform .remove() call-backs - Move some exported symbols into private namespaces - Clean-up and staticify PM related operations - Trivial; spelling, whitespace, clean-ups, etc - Fix include lists; alphabetise, remove unused, explicitly add used Bug Fixes: - Use PLATFORM_DEVID_AUTO to ensure multiple duplicate devices can co-exist - Ensure debugfs register view is correctly presented - Fix ordering and value issues in current use of clk_register_fractional_divider() - Repair Kconfig based dependency lists" * tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (50 commits) mfd: ti_am335x_tscadc: Fix TI SoC dependencies dt-bindings: mfd: sprd: Add support for UMS9620 mfd: ab8500-sysctrl: Drop ancient charger mfd: intel-lpss: Fix the fractional clock divider flags mfd: tps6594: Add null pointer check to tps6594_device_init() dt-bindings: mfd: pm8008: Clean up example node names dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Clean up example dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix regulator binding dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix up binding reference mfd: da9062: Simplify obtaining I2C match data mfd: syscon: Fix null pointer dereference in of_syscon_register() mfd: intel-lpss: Don't fail probe on success of pci_alloc_irq_vectors() mfd: twl6030-irq: Revert to use of_match_device() mfd: cs42l43: Correct order of include files to be alphabetical mfd: cs42l43: Correct SoundWire port list mfd: Fix a few spelling mistakes in PMIC header file comments mfd: intel-lpss: Provide Intel LPSS PM ops structure mfd: intel-lpss: Move exported symbols to INTEL_LPSS namespace mfd: intel-lpss: Adjust header inclusions mfd: intel-lpss: Use device_get_match_data() ... |
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Arnd Bergmann
|
8d446ff13a |
Memory controller drivers for v6.8
Few improvements for Tegra Memory Controller: Override the SID programming in the device, if firmware or bootloader left it in bypass mode, e.g. after resuming from suspend. Skip prorgamming the SID, if given Memory Controller client does not support it. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmV5S74QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD12mVD/4tj4NUiVuytvYTI5J9+z+u+69/Nbkr9xz8 C6APNPovUHFJTvy76J1sRzzJNL/MFSLMC271hcSEvpfQAkBNvdW4drq8seDsRJcx 5CbJPX0U+fxgSTubOJq1Q/vDe+29v6xhpt/LEauB3KvxJl3uJdVkPFnURzREvFHL +eEdQSq60td6I65me///D5QNBYr03Qjyfag7GTf05fbnfcc9zkXVV1rIEl/KlBpy 1cw5/8mxvRS0JUKLJxQ/2VHJDkadcGiFbS1DwtSY5ouXqiWDgNaXk7pvMKU8UBAQ 6kgKjNfnr+BkI1nbqGlB0bHIgoSeEGDeYMXsgETsliuOUKw8Hg5bFhy137e0gLOg A0/o3fDQUbsYAjp3NuN1habt5IqIdvm2a66gAOnYxgZHRuy4HZeUrxjPqFU70TRA uPTjms3SUmzb7IfV1i5nA9FFxH3vRk+NmjxCP9bDmsAMvSRZADORDKWFnWhWP4h3 +UB2pFAZVcM2x2qBPZUP5zB8BVhyRc4qMDT/Lnj+1/zBTdDEIkxXhLAqADU9EkZB 59JSp6n967MpWhYNUmjTYdnQ9ZLVEWjA/ZHJMgEfFtU0ackRct4sySiR7+oOyiJS bgynakMgK894k2TSAKWCStXwi8lfeKkgPb3oNqmE4WE8SgNGjIoCean8fNLOCc1f 28xZ1BHCKQ== =rulX -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFcoYACgkQYKtH/8kJ Uiff9hAAgPBABQIC9MfH3+H8dsyZ2Z+ylHmkWlkyjyFQYZz6RbNgwD4p1jCxXVJY EX3yT2KAJGaa0tHy2zo3vsFrD/jFlHYuqwJE9TTHvyl+bjJhi9iZWhIe+AmN+dk4 CFIK8CPzgKS/Dd2/4NpwE09RZz5qw2W+SppcdV6kgte7kmCcc4Cj9GWLZMAq5Me5 iIdwTIzUaWcmKP153p17/X3UKR8RcTIvKl8Ebf4NoD05wI7f7z60PNDjfiALSV5j yRwKKsgBTowmOrBb5G5LKT4qDynkRpPJAN+P8kmRXjnZFRrnT7eUfjm6zYKBsClb XpR3X6sId+OH7iXpww7IX/r1Htgksfa/Tsyoh5L0d8RiSSEC0E+ZoZfdn8c+TjPR ZxgfrdmOE1Qs6TufIb8FXzrJ22RAY8/2HfmI0aFeMX5HDWjSd8EmuFfINqADLTm8 v3wGZYUPH3PMcLvcPMtjBk2pQhWIGePY6bMH8oi9625fZxa4vmILxCF5VzIt0Xol wkqXQizhCSIIU90MzSilq0TIjK81pE1Lbq97KRqpAWl/+lAITNI2jEF70yjPxcn9 TPsJNMmbORli9lc2/Tmp43NJcMyor5ss63Yu+hJaz87I/Jx/mC4zR024sW2a/5+e Mi+k0ny5MpZRUCscr4NskzSKMAL4Z4uUoBbFqoEwhA7pIKo3VTE= =QWhm -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.8 Few improvements for Tegra Memory Controller: Override the SID programming in the device, if firmware or bootloader left it in bypass mode, e.g. after resuming from suspend. Skip prorgamming the SID, if given Memory Controller client does not support it. * tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra: Protect SID override call under CONFIG_IOMMU_API memory: tegra: Skip SID programming if SID registers aren't set memory: tegra: Add SID override programming for MC clients Link: https://lore.kernel.org/r/20231213061523.4803-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Arnd Bergmann
|
cd845dfd46 |
RISC-V SoC drivers for v6.8
There's only one set of changes here, the addition of "Auto Update" support for PolarFire SoC. Auto Update is one of the ways that the FPGA bitstream can be updated, and the only one suitable for use from Linux as it does not immediately initiate a reboot when started. The driver was not accepted in the FPGA manager subsystem as the update only occurs after a reboot and makes no use of the FPGA manager framework. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZYQwXQAKCRB4tDGHoIJi 0lieAQC6en0Y0TRDRF18NX0SqnmrxMaiwJxV0tGp+WGgykpmEwEA9vZliqRRG+zJ ZTMkk+zHVTtYgIXt2WFelDLKj5abHAE= =4VMq -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFcWgACgkQYKtH/8kJ UifdChAAjnUWNXC7jCfVqj5ALE/dGz8vPpXnY8FpNr90hZpbgAldMOvIkIGD1MlC eAglMXDDYnvuM5WUa6Pui/EHSSTbG4J8R6w36EUmG9mjzyCSsZ8fx4/hss6UI/hB pAHhpR3Er9v8eIg2Td0LE/hN+vVwJJiOgGkQgEYcr9ipmGDv+tXjUqDbtA7z933S lQO2zYZKcDA+WqfUnCKmN79MsZ/qo5Ve+VrJNyBhhQD1whRG/G0cFHvzA4oa2n5q UJ6KAAjLDDdG0zWd/Ig+KIXusDHHFyv65jaPMb0e9VLcMHhBl4uPZigVC64Q/SUA jrRT82PN2QA4hcDFwTmQ1xVzjXfsRfTCUvCVleYm/nU5tE7HAkIfwTDVTn3i7usd enoQmk08EDI6sM8fqq+vm0JuX8Lu/XzInQtegZswi4S8qR3dwwAxIVwabHc7CVse S2YIW+tWGaID2G1bFhHs5LnhqvlPsQD64o5Dft2orLkPGx0Rp7e2hfiBB3ghuloM Kk9lxtUa+Hw/gpQMuuk/X3jaBFQXEBa62P2vqqUicUH/Hj5y80MHbxtH/uQKrSVY FxnJY+D0PZ2ggnDXAkDv6+GGIO9WXVQ+KTGKoQHYJ6tCLUWN+1JiK61WyQ9ewdC1 jE2Tig88hGRdEmTCAKZjUmLVuoNqnU7knKHaslg7+2lSAj1jpCE= =yAyj -----END PGP SIGNATURE----- Merge tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC drivers for v6.8 There's only one set of changes here, the addition of "Auto Update" support for PolarFire SoC. Auto Update is one of the ways that the FPGA bitstream can be updated, and the only one suitable for use from Linux as it does not immediately initiate a reboot when started. The driver was not accepted in the FPGA manager subsystem as the update only occurs after a reboot and makes no use of the FPGA manager framework. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: add auto-update driver to mpfs entry firmware: microchip: Replace of_device.h with explicit include firmware: microchip: add PolarFire SoC Auto Update support soc: microchip: mpfs: add auto-update subdev to system controller soc: microchip: mpfs: print service status in warning message soc: microchip: mpfs: enable access to the system controller's flash dt-bindings: soc: microchip: add a property for system controller flash firmware_loader: Expand Firmware upload error codes with firmware invalid error Link: https://lore.kernel.org/r/20231221-droop-unblock-81e4fe14acee@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Herve Codina
|
7a2ee1576d |
soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime
Introduce qmc_chan_{get,set}_ts_info() function to allow timeslots modification at runtime. The modification is provided using qmc_chan_set_ts_info() and will be applied on next qmc_chan_start(). qmc_chan_set_ts_info() must be called with the channel rx and/or tx stopped. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-18-herve.codina@bootlin.com |
||
Herve Codina
|
ba3b7e4753 |
soc: fsl: cpm1: qmc: Add support for child devices
QMC child devices support is needed to avoid orphan DT nodes that use a simple DT phandle to reference a QMC channel. Allow to instantiate child devices and also extend the API to get the qmc_chan using a child device. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20231205152116.122512-7-herve.codina@bootlin.com |
||
Herve Codina
|
0e034aec5b |
soc: fsl: cpm1: qmc: Extend the API to provide Rx status
In HDLC mode, some status flags related to the data read transfer can be set by the hardware and need to be known by a QMC consumer for further analysis. Extend the API in order to provide these transfer status flags at the read complete() call. In TRANSPARENT mode, these flags have no meaning. Keep only one read complete() API and update the consumers working in transparent mode. In this case, the newly introduced flags parameter is simply unused. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-5-herve.codina@bootlin.com |
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Dang Huynh
|
4773d2f1a5 |
mfd: qcom-spmi-pmic: Add support for PM8937
Add the subtype and compatible strings for PM8937. The PM8937 is found in various SoCs, including MSM8917, MSM8937, MSM8940 and APQ variants. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Link: https://lore.kernel.org/r/20231121-pm8937-v2-1-b0171ab62075@riseup.net Signed-off-by: Lee Jones <lee@kernel.org> |
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Conor Dooley
|
742aa6c563 |
soc: microchip: mpfs: enable access to the system controller's flash
The system controller has a flash that contains images used to reprogram the FPGA using IAP (In-Application Programming). Introduce a function that allows a driver with a reference to the system controller to get one to a flash device attached to it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
Ashish Mhetre
|
fe3b082a6e |
memory: tegra: Add SID override programming for MC clients
For some devices the bootloader/firmware may set up the device in
bypass. Memory clients like display needs kernel to program SID after
resume because bootloader/firmware programs the SID of display device to
bypass. In order to make sure that kernel IOMMU mappings for these
devices work after resume, add SID override programming support for all
memory clients on memory controller resume.
This partially reverts 'commit
|
||
Linus Torvalds
|
4bbdb725a3 |
IOMMU Updates for Linux v6.7
Including: - Core changes: - Make default-domains mandatory for all IOMMU drivers - Remove group refcounting - Add generic_single_device_group() helper and consolidate drivers - Cleanup map/unmap ops - Scaling improvements for the IOVA rcache depot - Convert dart & iommufd to the new domain_alloc_paging() - ARM-SMMU: - Device-tree binding update: - Add qcom,sm7150-smmu-v2 for Adreno on SM7150 SoC - SMMUv2: - Support for Qualcomm SDM670 (MDSS) and SM7150 SoCs - SMMUv3: - Large refactoring of the context descriptor code to move the CD table into the master, paving the way for '->set_dev_pasid()' support on non-SVA domains - Minor cleanups to the SVA code - Intel VT-d: - Enable debugfs to dump domain attached to a pasid - Remove an unnecessary inline function. - AMD IOMMU: - Initial patches for SVA support (not complete yet) - S390 IOMMU: - DMA-API conversion and optimized IOTLB flushing - Some smaller fixes and improvements -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmVJFcEACgkQK/BELZcB GuMgDxAAsnYVQjQ7wRkwR0rHARuEaJ+Lz2vkLNH+uYXjBzhFe2bT+ykMcZysAkdK A5PMLOFT5Etf+PAqOM0CoIGQFOefAId6uGl7S61Fp9ZWDKhMrOBFWhxGOaufA1Du tNvt3i66hwPSDZa82kY3wRCluYtj0aBBzmM6ZTwBwFZdQ7LABMtE8OxisqncVvq0 H6vhV213fqvhCFSQJ6PnTAEiv70WvWBWygA+Z/gwYf9hypZQae91PNXdK9313a9z OvCzGBkL/R5/3KkJd88UhFwyYzyNGxq/DmH1etawYR5gYZ8UT/Z/sYpcx9hlO7qr eENPqeQc+YHZXpKqkaq66HBA1FSnXUqRZLl4cVaZahRRMe/yArsBM6R0W1AfkMAR rZxwHKoHUWeuHQLMVvmSDNL57h/GJJpTXjRc8HMxLZkVp+ScvnT5XCYHWWzRdCdx TcC/pJ1tet0FQ8rw09ovlwpGVA6eojWvcpVbLVLfGN8ZWViSVfvNFoPNb7HsGK6M iRi+L41Y7s63cyogC/Gsae2RAvYv29ZpvE91lmon2u+VBlTpMdOFX9EhWS6RqOBF cV30bhsw0dyCB7v5jDPtABYEOaR6l1mPLhn1gX3u0Ue/tmPhLX69k4bVWBY6wP3p gmmJD9ub8FuPQtFCGPE7/8ZINjGGrfiKO24DNI2Ty3XEeq21hU4= =UyWC -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: "Core changes: - Make default-domains mandatory for all IOMMU drivers - Remove group refcounting - Add generic_single_device_group() helper and consolidate drivers - Cleanup map/unmap ops - Scaling improvements for the IOVA rcache depot - Convert dart & iommufd to the new domain_alloc_paging() ARM-SMMU: - Device-tree binding update: - Add qcom,sm7150-smmu-v2 for Adreno on SM7150 SoC - SMMUv2: - Support for Qualcomm SDM670 (MDSS) and SM7150 SoCs - SMMUv3: - Large refactoring of the context descriptor code to move the CD table into the master, paving the way for '->set_dev_pasid()' support on non-SVA domains - Minor cleanups to the SVA code Intel VT-d: - Enable debugfs to dump domain attached to a pasid - Remove an unnecessary inline function AMD IOMMU: - Initial patches for SVA support (not complete yet) S390 IOMMU: - DMA-API conversion and optimized IOTLB flushing And some smaller fixes and improvements" * tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (102 commits) iommu/dart: Remove the force_bypass variable iommu/dart: Call apple_dart_finalize_domain() as part of alloc_paging() iommu/dart: Convert to domain_alloc_paging() iommu/dart: Move the blocked domain support to a global static iommu/dart: Use static global identity domains iommufd: Convert to alloc_domain_paging() iommu/vt-d: Use ops->blocked_domain iommu/vt-d: Update the definition of the blocking domain iommu: Move IOMMU_DOMAIN_BLOCKED global statics to ops->blocked_domain Revert "iommu/vt-d: Remove unused function" iommu/amd: Remove DMA_FQ type from domain allocation path iommu: change iommu_map_sgtable to return signed values iommu/virtio: Add __counted_by for struct viommu_request and use struct_size() iommu/vt-d: debugfs: Support dumping a specified page table iommu/vt-d: debugfs: Create/remove debugfs file per {device, pasid} iommu/vt-d: debugfs: Dump entry pointing to huge page iommu/vt-d: Remove unused function iommu/arm-smmu-v3-sva: Remove bond refcount iommu/arm-smmu-v3-sva: Remove unused iommu_sva handle iommu/arm-smmu-v3: Rename cdcfg to cd_table ... |
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Linus Torvalds
|
babe393974 |
The number of commits for documentation is not huge this time around, but
there are some significant changes nonetheless: - Some more Spanish-language and Chinese translations. - The much-discussed documentation of the confidential-computing threat model. - Powerpc and RISCV documentation move under Documentation/arch - these complete this particular bit of documentation churn. - A large traditional-Chinese documentation update. - A new document on backporting and conflict resolution. - Some kernel-doc and Sphinx fixes. Plus the usual smattering of smaller updates and typo fixes. -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEIw+MvkEiF49krdp9F0NaE2wMflgFAmVBNv8PHGNvcmJldEBs d24ubmV0AAoJEBdDWhNsDH5Y0JkH/36MOpkaDnsY69/dMRKSuD4mAAP2H6LS8V63 SsMgH5VCj8lcy/Tz1+J89t14pbcX8l0viKxSo4UxvzoJ5snrz8A8gZ9oqY7NCcNs nMtolnN5IwdbgGnEGqASSLsl07lnabhRK0VYv9ZO7lHjYQp97VsJ/qrjJn385HFE vYW8iRcxcKdwtuuwOtbPcdAMjP54saJdNC5wMLsfMR0csKcGbzaSNpqpiGovzT7l phG2DSxrJH0gUZyeGPryroNppaf+mVKSDSiwRdI8mzm0J67p6dZYYwBS1Iw6Awbf 8iYoj6W63/FVQbXffPx5d6ffOSQh4JkAskxgBUOzluSGusSDc+4= =9HU5 -----END PGP SIGNATURE----- Merge tag 'docs-6.7' of git://git.lwn.net/linux Pull documentation updates from Jonathan Corbet: "The number of commits for documentation is not huge this time around, but there are some significant changes nonetheless: - Some more Spanish-language and Chinese translations - The much-discussed documentation of the confidential-computing threat model - Powerpc and RISCV documentation move under Documentation/arch - these complete this particular bit of documentation churn - A large traditional-Chinese documentation update - A new document on backporting and conflict resolution - Some kernel-doc and Sphinx fixes Plus the usual smattering of smaller updates and typo fixes" * tag 'docs-6.7' of git://git.lwn.net/linux: (40 commits) scripts/kernel-doc: Fix the regex for matching -Werror flag docs: backporting: address feedback Documentation: driver-api: pps: Update PPS generator documentation speakup: Document USB support doc: blk-ioprio: Bring the doc in line with the implementation docs: usb: fix reference to nonexistent file in UVC Gadget docs: doc-guide: mention 'make refcheckdocs' Documentation: fix typo in dynamic-debug howto scripts/kernel-doc: match -Werror flag strictly Documentation/sphinx: Remove the repeated word "the" in comments. docs: sparse: add SPDX-License-Identifier docs/zh_CN: Add subsystem-apis Chinese translation docs/zh_TW: update contents for zh_TW docs: submitting-patches: encourage direct notifications to commenters docs: add backporting and conflict resolution document docs: move riscv under arch docs: update link to powerpc/vmemmap_dedup.rst mm/memory-hotplug: fix typo in documentation docs: move powerpc under arch PCI: Update the devres documentation regarding to pcim_*() ... |
||
Linus Torvalds
|
385903a7ec |
SoC driver updates for 6.7
The highlights for the driver support this time are - Qualcomm platforms gain support for the Qualcomm Secure Execution Environment firmware interface to access EFI variables on certain devices, and new features for multiple platform and firmware drivers. - Arm FF-A firmware support gains support for v1.1 specification features, in particular notification and memory transaction descriptor changes. - SCMI firmware support now support v3.2 features for clock and DVFS configuration and a new transport for Qualcomm platforms. - Minor cleanups and bugfixes are added to pretty much all the active platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and more. In particular, this contains portions of the treewide conversion to use __counted_by annotations and the device_get_match_data helper. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmVC10IACgkQYKtH/8kJ UifFoQ//Tw7aux88EA2UkyL2Wulv80NwRQn3tQlxI/6ltjBX64yeQ6Y8OzmYdSYK 20NEpbU7VWOFftN+D6Jp1HLrvfi0OV9uJn3WiTX3ChgDXixpOXo4TYgNNTlb9uZ4 MrSTG3NkS27m/oTaCmYprOObgSNLq1FRCGIP7w4U9gyMk9N9FSKMpSJjlH06qPz6 WBLTaIwPgBsyrLfCdxfA1y7AFCAHVxQJO4bp0VWSIalTrneGTeQrd2FgYMUesQ2e fIUNCaU4mpmj8XnQ/W19Wsek8FRB+fOh0hn/Gl+iHYibpxusIsn7bkdZ5BOJn2J0 OY3C1biopaaxXcZ+wmnX9X0ieZ3TDsHzYOEf0zmNGzMZaZkV8kQt4/Ykv77xz6Gc 4Bl6JI5QZ4rTZvlHYGMYxhy3hKuB31mO2rHbei7eR7J7UmjzWcl5P6HYfCgj7wzH crIWj1IR1Nx6Dt/wXf3HlRcEiAEJ2D0M3KIFjAVT239TsxacBfDrRk+YedF2bKbn WMYfVM6jJnPOykGg/gMRlttS/o/7TqHBl3y/900Idiijcm3cRPbQ+uKfkpHXftN/ 2vOtsw7pzEg7QQI9GVrb4drTrLvYJ7GQOi4o0twXTCshlXUk2V684jvHt0emFkdX ew9Zft4YLAYSmuJ3XqGhhMP63FsHKMlB1aSTKKPeswdIJmrdO80= =QIut -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "The highlights for the driver support this time are - Qualcomm platforms gain support for the Qualcomm Secure Execution Environment firmware interface to access EFI variables on certain devices, and new features for multiple platform and firmware drivers. - Arm FF-A firmware support gains support for v1.1 specification features, in particular notification and memory transaction descriptor changes. - SCMI firmware support now support v3.2 features for clock and DVFS configuration and a new transport for Qualcomm platforms. - Minor cleanups and bugfixes are added to pretty much all the active platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and more. In particular, this contains portions of the treewide conversion to use __counted_by annotations and the device_get_match_data helper" * tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits) soc: qcom: pmic_glink_altmode: Print return value on error firmware: qcom: scm: remove unneeded 'extern' specifiers firmware: qcom: scm: add a missing forward declaration for struct device firmware: qcom: move Qualcomm code into its own directory soc: samsung: exynos-chipid: Convert to platform remove callback returning void soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size() soc: qcom: pmic_glink: fix connector type to be DisplayPort soc: ti: k3-socinfo: Avoid overriding return value soc: ti: k3-socinfo: Fix typo in bitfield documentation soc: ti: knav_qmss_queue: Use device_get_match_data() firmware: ti_sci: Use device_get_match_data() firmware: qcom: qseecom: add missing include guards soc/pxa: ssp: Convert to platform remove callback returning void soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void soc/mediatek: mtk-devapc: Convert to platform remove callback returning void soc/loongson: loongson2_guts: Convert to platform remove callback returning void soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void ... |
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Sascha Hauer
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481d97ba61 |
PM / devfreq: rockchip-dfi: add support for RK3588
Add support for the RK3588 to the driver. The RK3588 has four DDR channels with a register stride of 0x4000 between the channel registers, also it has a DDRMON_CTRL register per channel. Link: https://lore.kernel.org/all/20231018061714.3553817-20-s.hauer@pengutronix.de/ Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Sascha Hauer
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4d586b5724 |
PM / devfreq: rockchip-dfi: Add perf support
The DFI is a unit which is suitable for measuring DDR utilization, but so far it could only be used as an event driver for the DDR frequency scaling driver. This adds perf support to the DFI driver. Usage with the 'perf' tool can look like: perf stat -a -e rockchip_ddr/cycles/,\ rockchip_ddr/read-bytes/,\ rockchip_ddr/write-bytes/,\ rockchip_ddr/bytes/ sleep 1 Performance counter stats for 'system wide': 1582524826 rockchip_ddr/cycles/ 1802.25 MB rockchip_ddr/read-bytes/ 1793.72 MB rockchip_ddr/write-bytes/ 3595.90 MB rockchip_ddr/bytes/ 1.014369709 seconds time elapsed perf support has been tested on a RK3568 and a RK3399, the latter with dual channel DDR. Link: https://lore.kernel.org/all/20231019064819.3496740-1-s.hauer@pengutronix.de/ Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [cw00.choi: Fix typo from 'write_acccess' to 'write_access'] Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Sascha Hauer
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d8c6e337e7 |
PM / devfreq: rockchip-dfi: Handle LPDDR4X
In the DFI driver LPDDR4X can be handled in the same way as LPDDR4. Add the missing case. Link: https://lore.kernel.org/all/20231018061714.3553817-13-s.hauer@pengutronix.de/ Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Sascha Hauer
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076b0597f5 |
PM / devfreq: rockchip-dfi: Add RK3568 support
This adds RK3568 support to the DFI driver. Only iniitialization differs from the currently supported RK3399. Link: https://lore.kernel.org/all/20231018061714.3553817-11-s.hauer@pengutronix.de/ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Sascha Hauer
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74002e668d |
PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines
The DDRTYPE defines are named to be RK3399 specific, but they can be used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_ prefix with ROCKCHIP_. They are defined in a SoC specific header file, so when generalizing the prefix also move the new defines to a SoC agnostic header file. While at it use GENMASK to define the DDRTYPE bitfield and give it a name including the full register name. Link: https://lore.kernel.org/all/20231018061714.3553817-9-s.hauer@pengutronix.de/ Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Sumit Gupta
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ea608a01d4 |
firmware: tegra: Add suspend hook and reset BPMP IPC early on resume
Add suspend hook and a 'suspended' field in the 'struct tegra_bpmp'
to mark if BPMP is suspended. Also, add a 'flags' field in the
'struct tegra_bpmp_message' whose 'TEGRA_BPMP_MESSAGE_RESET' bit can be
set from the Tegra MC driver to signal that the reset of BPMP IPC
channels is required before sending MRQ to the BPMP FW. Together both
the fields allow us to handle any requests that might be sent too soon
as they can cause hang during system resume.
One case where we see BPMP requests being sent before the BPMP driver
has resumed is the memory bandwidth requests which are triggered by
onlining the CPUs during system resume. The CPUs are onlined before the
BPMP has resumed and we need to reset the BPMP IPC channels to handle
these requests.
The additional check for 'flags' is done to avoid any un-intended BPMP
IPC reset if the tegra_bpmp_transfer*() API gets called during suspend
sequence after the BPMP driver is suspended.
Fixes:
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Deming Wang
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bde3ce7257 |
firmware: tegra: Fix a typo
successfully, not 'succesfully' Signed-off-by: Deming Wang <wangdeming@inspur.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Costa Shulyupin
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17e02586ed |
docs: move powerpc under arch
and fix all in-tree references. Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation directory and making the docs hierarchy more closely match the source hierarchy. Signed-off-by: Costa Shulyupin <costa.shul@redhat.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/r/20230826165737.2101199-1-costa.shul@redhat.com |
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Jason Gunthorpe
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c462944901 |
iommu/tegra-gart: Remove tegra-gart
Thierry says this is not used anymore, and doesn't think it makes sense as an iommu driver. The HW it supports is about 10 years old now and newer HW uses different IOMMU drivers. As this is the only driver with a GART approach, and it doesn't really meet the driver expectations from the IOMMU core, let's just remove it so we don't have to think about how to make it fit in. It has a number of identified problems: - The assignment of iommu_groups doesn't match the HW behavior - It claims to have an UNMANAGED domain but it is really an IDENTITY domain with a translation aperture. This is inconsistent with the core expectation for security sensitive operations - It doesn't implement a SW page table under struct iommu_domain so * It can't accept a map until the domain is attached * It forgets about all maps after the domain is detached * It doesn't clear the HW of maps once the domain is detached (made worse by having the wrong groups) Cc: Thierry Reding <treding@nvidia.com> Cc: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/6-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de> |