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firmware: tegra: Changes for v5.8-rc1
This contains a change that makes the BPMP driver a regular driver, which fixes some weird suspend/resume ordering issues. Another fix is also included to implement another way of enabling the L2 cache after LP2 suspend. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl7HzNgTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zocQIEAC4Da9k2QGfyIAKXBxAaQuIJkHQ4KiO uqjaxWBIRxVRXrwdpF1KR0TbWExoR0lhNwE8OXbRsXeRLnpevDqp2Rne6yDgYqAD ++lo2sc16oarAAAtzfIswLODZEFP8oYSXFX0uYrnqp0RQNhY0HYZ4uiPgrONOSPl FYO8eVTQa3hgpUdYj7npdf5y++OMzZ3nnps0brT35c3bN6LorIv/ADAK5Hz0xdWQ kA9LUhFo18NHLkMKcA4d7AM53D2qdji1w51hap/y7xL2b8k6KvKv0qjiEATKQfip CpUrwoFGg4d6eWsja7DjKQgBezW/KLccKXQ4DGAE0WDqoyIbqZWJ24j9BlqZ3VmG GfsrT2v6zfi0bOpxyPF3GpzZdilnWejSOs/dDB7YKa2C84SOjX29/q+qO34GCYoO fYEU6+TUzolNzPZXvn/AcUs7HbkG+2z040DBNWDM9laJAaybXxTloLSGci85Mxak A6XDMKc0uzTkXzb2LLZliBGeSQ9tJutnmxy2NHRgW6u21D+kQL6nzRD4vsiyTSty zl55QLqSE39ZyqxDWOjBCbp9c+cXedW52lgsz2rJZ8j9FJqDFkBDj6ESRmXBKKc1 mLYAAz/QANInDgDHy4HwKIHEClQYYom+w/4Fi0DKrKpThLcRZB+5O/8bqDHQsQtn gjQ2ikFsnLq7sQ== =wn+X -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.8-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers firmware: tegra: Changes for v5.8-rc1 This contains a change that makes the BPMP driver a regular driver, which fixes some weird suspend/resume ordering issues. Another fix is also included to implement another way of enabling the L2 cache after LP2 suspend. * tag 'tegra-for-5.8-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: tegra: Defer BPMP probe if shared memory not available firmware: tf: Different way of L2 cache enabling after LP2 suspend firmware: tegra: Make BPMP a regular driver Link: https://lore.kernel.org/r/20200515145311.1580134-6-thierry.reding@gmail.com Link: https://lore.kernel.org/r/20200522142846.2376224-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
fff4a87f44
@ -176,7 +176,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
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priv->tx.pool = of_gen_pool_get(bpmp->dev->of_node, "shmem", 0);
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if (!priv->tx.pool) {
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dev_err(bpmp->dev, "TX shmem pool not found\n");
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return -ENOMEM;
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return -EPROBE_DEFER;
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}
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priv->tx.virt = gen_pool_dma_alloc(priv->tx.pool, 4096, &priv->tx.phys);
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@ -188,7 +188,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
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priv->rx.pool = of_gen_pool_get(bpmp->dev->of_node, "shmem", 1);
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if (!priv->rx.pool) {
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dev_err(bpmp->dev, "RX shmem pool not found\n");
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err = -ENOMEM;
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err = -EPROBE_DEFER;
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goto free_tx;
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}
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@ -6,6 +6,7 @@
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#include <linux/clk/tegra.h>
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#include <linux/genalloc.h>
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#include <linux/mailbox_client.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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@ -869,12 +870,8 @@ static struct platform_driver tegra_bpmp_driver = {
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.name = "tegra-bpmp",
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.of_match_table = tegra_bpmp_match,
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.pm = &tegra_bpmp_pm_ops,
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.suppress_bind_attrs = true,
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},
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.probe = tegra_bpmp_probe,
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};
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static int __init tegra_bpmp_init(void)
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{
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return platform_driver_register(&tegra_bpmp_driver);
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}
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core_initcall(tegra_bpmp_init);
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builtin_platform_driver(tegra_bpmp_driver);
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@ -19,6 +19,7 @@
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#define TF_CACHE_ENABLE 1
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#define TF_CACHE_DISABLE 2
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#define TF_CACHE_REENABLE 4
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#define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
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@ -29,6 +30,7 @@
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#define TF_CPU_PM_S1 0xffffffe4
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#define TF_CPU_PM_S1_NOFLUSH_L2 0xffffffe7
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static unsigned long tf_idle_mode = TF_PM_MODE_NONE;
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static unsigned long cpu_boot_addr;
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static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
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@ -85,25 +87,40 @@ static int tf_prepare_idle(unsigned long mode)
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cpu_boot_addr);
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break;
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case TF_PM_MODE_NONE:
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break;
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default:
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return -EINVAL;
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}
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tf_idle_mode = mode;
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return 0;
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}
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#ifdef CONFIG_CACHE_L2X0
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static void tf_cache_write_sec(unsigned long val, unsigned int reg)
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{
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u32 l2x0_way_mask = 0xff;
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u32 enable_op, l2x0_way_mask = 0xff;
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switch (reg) {
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case L2X0_CTRL:
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if (l2x0_saved_regs.aux_ctrl & L310_AUX_CTRL_ASSOCIATIVITY_16)
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l2x0_way_mask = 0xffff;
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switch (tf_idle_mode) {
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case TF_PM_MODE_LP2:
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enable_op = TF_CACHE_REENABLE;
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break;
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default:
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enable_op = TF_CACHE_ENABLE;
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break;
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}
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if (val == L2X0_CTRL_EN)
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tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_ENABLE,
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tf_generic_smc(TF_CACHE_MAINT, enable_op,
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l2x0_saved_regs.aux_ctrl);
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else
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tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE,
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@ -32,6 +32,7 @@
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#define TF_PM_MODE_LP1_NO_MC_CLK 2
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#define TF_PM_MODE_LP2 3
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#define TF_PM_MODE_LP2_NOFLUSH_L2 4
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#define TF_PM_MODE_NONE 5
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struct trusted_foundations_platform_data {
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unsigned int version_major;
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