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dmaengine: imx: correct sdmac->status for cyclic dma tx

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In cyclic dma tx's handler sdma_handle_channel_loop(),
SDMA channel statue is set to either DMA_ERROR or DMA_IN_PROGRESS
based on each period's status. This has the following issues:

1) If one period's status is BD_RROR, then channel status
   will be set to DMA_ERROR, but it will be overwritten to DMA_IN_PROGRESS
   if the following periods are OK.
2) DMA client may call sdma_control(DMA_TERMINATE_ALL) to stop the cyclic dma
   operation, sdma channel status will be set to DMA_ERROR,
   but if after this handler is called, then again the channel status will be overwritten
   to DMA_IN_PROGRESS. Then the following dmaengine_prep_dma_cyclic() will always fail,
   as channel status is DMA_IN_PROGRESS.

As in cyclic dma tx, channel status will be initially set to DMA_IN_PROGRESS,
driver only needs to change it to DMA_ERROR, when something wrong happens
(one period status is wrong, or stoped by client explicitly).

Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Jiada Wang 2014-05-14 18:22:13 -07:00 committed by Vinod Koul
parent a15783c34f
commit ffe59b2930
1 changed files with 0 additions and 2 deletions
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2
drivers/dma/imx-sdma.c
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@ -607,8 +607,6 @@ static void sdma_handle_channel_loop(struct sdma_channel *sdmac)
if (bd->mode.status & BD_RROR)
sdmac->status = DMA_ERROR;
else
sdmac->status = DMA_IN_PROGRESS;
bd->mode.status |= BD_DONE;
sdmac->buf_tail++;