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clk: qcom: Update the force mem core bit for GPU clocks
There are few GPU clocks which are powering up the memories and thus enable the FORCE_MEM_PERIPH always for these clocks to force the periph_on signal to remain active during halt state of the clock. Fixes:a3cc092196
("clk: qcom: Add Global Clock controller (GCC) driver for SC7280") Fixes:3e0f01d6c7
("clk: qcom: Add graphics clock controller driver for SC7280") Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Link: https://lore.kernel.org/r/1666159535-6447-1-git-send-email-quic_c_skakit@quicinc.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -3467,6 +3467,7 @@ static int gcc_sc7280_probe(struct platform_device *pdev)
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regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0));
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regmap_update_bits(regmap, 0x28014, BIT(0), BIT(0));
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regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
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regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13));
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ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
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ARRAY_SIZE(gcc_dfs_clocks));
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@ -463,6 +463,7 @@ static int gpu_cc_sc7280_probe(struct platform_device *pdev)
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*/
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regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0));
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regmap_update_bits(regmap, 0x1098, BIT(0), BIT(0));
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regmap_update_bits(regmap, 0x1098, BIT(13), BIT(13));
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return qcom_cc_really_probe(pdev, &gpu_cc_sc7280_desc, regmap);
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}
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