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media: meson: vdec: add sm1 platform
Add support for the Amlogic SM1 platform for the current MPEG1 & MPEG2 support. The SM1 family, very close to the G12A SoCs, has a slighly different power management control, thus needing a separate compatible and family id. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -960,6 +960,8 @@ static const struct of_device_id vdec_dt_match[] = {
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.data = &vdec_platform_gxl },
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{ .compatible = "amlogic,g12a-vdec",
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.data = &vdec_platform_g12a },
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{ .compatible = "amlogic,sm1-vdec",
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.data = &vdec_platform_sm1 },
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{}
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};
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MODULE_DEVICE_TABLE(of, vdec_dt_match);
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@ -1010,7 +1012,8 @@ static int vdec_probe(struct platform_device *pdev)
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of_id = of_match_node(vdec_dt_match, dev->of_node);
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core->platform = of_id->data;
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if (core->platform->revision == VDEC_REVISION_G12A) {
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if (core->platform->revision == VDEC_REVISION_G12A ||
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core->platform->revision == VDEC_REVISION_SM1) {
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core->vdec_hevcf_clk = devm_clk_get(dev, "vdec_hevcf");
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if (IS_ERR(core->vdec_hevcf_clk))
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return -EPROBE_DEFER;
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@ -18,6 +18,7 @@
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#define AO_RTI_GEN_PWR_SLEEP0 0xe8
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#define AO_RTI_GEN_PWR_ISO0 0xec
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#define GEN_PWR_VDEC_1 (BIT(3) | BIT(2))
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#define GEN_PWR_VDEC_1_SM1 (BIT(1))
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#define MC_SIZE (4096 * 4)
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@ -142,12 +143,20 @@ static int vdec_1_stop(struct amvdec_session *sess)
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amvdec_read_dos(core, DOS_SW_RESET0);
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/* enable vdec1 isolation */
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regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0xc0);
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if (core->platform->revision == VDEC_REVISION_SM1)
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_ISO0,
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GEN_PWR_VDEC_1_SM1, GEN_PWR_VDEC_1_SM1);
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else
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regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0xc0);
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/* power off vdec1 memories */
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amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0xffffffff);
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/* power off vdec1 */
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1, GEN_PWR_VDEC_1);
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if (core->platform->revision == VDEC_REVISION_SM1)
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1_SM1, GEN_PWR_VDEC_1_SM1);
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else
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1, GEN_PWR_VDEC_1);
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clk_disable_unprepare(core->vdec_1_clk);
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@ -170,8 +179,12 @@ static int vdec_1_start(struct amvdec_session *sess)
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return ret;
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/* Enable power for VDEC_1 */
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1, 0);
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if (core->platform->revision == VDEC_REVISION_SM1)
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1_SM1, 0);
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else
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
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GEN_PWR_VDEC_1, 0);
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usleep_range(10, 20);
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/* Reset VDEC1 */
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@ -183,7 +196,11 @@ static int vdec_1_start(struct amvdec_session *sess)
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/* enable VDEC Memories */
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amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0);
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/* Remove VDEC1 Isolation */
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regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0);
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if (core->platform->revision == VDEC_REVISION_SM1)
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regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_ISO0,
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GEN_PWR_VDEC_1_SM1, 0);
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else
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regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0);
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/* Reset DOS top registers */
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amvdec_write_dos(core, DOS_VDEC_MCRCC_STALL_CTRL, 0);
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@ -106,6 +106,30 @@ static const struct amvdec_format vdec_formats_g12a[] = {
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},
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};
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static const struct amvdec_format vdec_formats_sm1[] = {
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{
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.pixfmt = V4L2_PIX_FMT_MPEG1,
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.min_buffers = 8,
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.max_buffers = 8,
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.max_width = 1920,
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.max_height = 1080,
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.vdec_ops = &vdec_1_ops,
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.codec_ops = &codec_mpeg12_ops,
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.firmware_path = "meson/vdec/gxl_mpeg12.bin",
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.pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
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}, {
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.pixfmt = V4L2_PIX_FMT_MPEG2,
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.min_buffers = 8,
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.max_buffers = 8,
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.max_width = 1920,
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.max_height = 1080,
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.vdec_ops = &vdec_1_ops,
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.codec_ops = &codec_mpeg12_ops,
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.firmware_path = "meson/vdec/gxl_mpeg12.bin",
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.pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
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},
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};
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const struct vdec_platform vdec_platform_gxbb = {
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.formats = vdec_formats_gxbb,
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.num_formats = ARRAY_SIZE(vdec_formats_gxbb),
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@ -129,3 +153,9 @@ const struct vdec_platform vdec_platform_g12a = {
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.num_formats = ARRAY_SIZE(vdec_formats_g12a),
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.revision = VDEC_REVISION_G12A,
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};
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const struct vdec_platform vdec_platform_sm1 = {
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.formats = vdec_formats_sm1,
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.num_formats = ARRAY_SIZE(vdec_formats_sm1),
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.revision = VDEC_REVISION_SM1,
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};
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@ -16,6 +16,7 @@ enum vdec_revision {
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VDEC_REVISION_GXL,
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VDEC_REVISION_GXM,
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VDEC_REVISION_G12A,
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VDEC_REVISION_SM1,
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};
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struct vdec_platform {
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@ -28,5 +29,6 @@ extern const struct vdec_platform vdec_platform_gxbb;
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extern const struct vdec_platform vdec_platform_gxm;
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extern const struct vdec_platform vdec_platform_gxl;
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extern const struct vdec_platform vdec_platform_g12a;
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extern const struct vdec_platform vdec_platform_sm1;
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#endif
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