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ARM: mx53: Add support for missing UARTs
MX53 has five UART ports. Add support for the missing UART4 and UART5 ports. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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2e534b21a5
commit
fce43f9963
arch/arm
@ -1254,12 +1254,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
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NULL, NULL, &ipg_clk, &aips_tz1_clk);
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DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
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NULL, NULL, &ipg_clk, &spba_clk);
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DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET,
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NULL, NULL, &ipg_clk, &spba_clk);
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DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET,
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NULL, NULL, &ipg_clk, &spba_clk);
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DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
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NULL, NULL, &uart_root_clk, &uart1_ipg_clk);
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DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
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NULL, NULL, &uart_root_clk, &uart2_ipg_clk);
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DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
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NULL, NULL, &uart_root_clk, &uart3_ipg_clk);
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DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET,
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NULL, NULL, &uart_root_clk, &uart4_ipg_clk);
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DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET,
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NULL, NULL, &uart_root_clk, &uart5_ipg_clk);
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/* GPT */
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DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
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@ -1464,6 +1472,8 @@ static struct clk_lookup mx53_lookups[] = {
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_REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
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_REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
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_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
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_REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk)
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_REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk)
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_REGISTER_CLOCK(NULL, "gpt", gpt_clk)
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_REGISTER_CLOCK("fec.0", NULL, fec_clk)
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_REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
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@ -114,6 +114,8 @@
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#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78)
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#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C)
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#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80)
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#define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84)
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#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84)
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/* Define the bits in register CCR */
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@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = {
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imx53_imx_uart_data_entry(0, 1),
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imx53_imx_uart_data_entry(1, 2),
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imx53_imx_uart_data_entry(2, 3),
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imx53_imx_uart_data_entry(3, 4),
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imx53_imx_uart_data_entry(4, 5),
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};
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#endif /* ifdef CONFIG_SOC_IMX53 */
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@ -241,7 +241,7 @@
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#define MX53_INT_IPU_ERR 10
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#define MX53_INT_IPU_SYN 11
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#define MX53_INT_GPU 12
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#define MX53_INT_RESV13 13
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#define MX53_INT_UART4 13
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#define MX53_INT_USB_H1 14
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#define MX53_INT_EMI 15
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#define MX53_INT_USB_H2 16
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@ -314,7 +314,7 @@
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#define MX53_INT_CAN2 83
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#define MX53_INT_GPU2_IRQ 84
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#define MX53_INT_GPU2_BUSY 85
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#define MX53_INT_RESV86 86
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#define MX53_INT_UART5 86
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#define MX53_INT_FEC 87
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#define MX53_INT_OWIRE 88
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#define MX53_INT_CTI1_TG2 89
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