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clk: core: support clocks which requires parents enable (part 2)
On Freescale i.MX7D platform, all clocks operations, including enable/disable, rate change and re-parent, requires its parent clock on. Current clock core can not support it well. This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in clock core that enable its parent clock firstly for each operation and disable it later after operation complete. The patch part 2 fixes set clock rate and set parent while its parent is off. The most special case is for set_parent() operation which requires all parents including both old and new one to be enabled at the same time during the operation. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@codeaurora.org: Move set_rate tracepoint after prepare_enable] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -1172,7 +1172,9 @@ static struct clk_core *__clk_set_parent_before(struct clk_core *core,
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struct clk_core *old_parent = core->parent;
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/*
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* Migrate prepare state between parents and prevent race with
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* 1. enable parents for CLK_OPS_PARENT_ENABLE clock
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*
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* 2. Migrate prepare state between parents and prevent race with
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* clk_enable().
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*
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* If the clock is not prepared, then a race with
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@ -1188,12 +1190,17 @@ static struct clk_core *__clk_set_parent_before(struct clk_core *core,
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*
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* See also: Comment for clk_set_parent() below.
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*/
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/* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
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if (core->flags & CLK_OPS_PARENT_ENABLE) {
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clk_core_prepare_enable(old_parent);
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clk_core_prepare_enable(parent);
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}
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/* migrate prepare count if > 0 */
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if (core->prepare_count) {
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clk_core_prepare(parent);
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flags = clk_enable_lock();
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clk_core_enable(parent);
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clk_core_enable(core);
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clk_enable_unlock(flags);
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clk_core_prepare_enable(parent);
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clk_core_enable_lock(core);
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}
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/* update the clk tree topology */
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@ -1208,18 +1215,19 @@ static void __clk_set_parent_after(struct clk_core *core,
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struct clk_core *parent,
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struct clk_core *old_parent)
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{
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unsigned long flags;
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/*
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* Finish the migration of prepare state and undo the changes done
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* for preventing a race with clk_enable().
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*/
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if (core->prepare_count) {
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flags = clk_enable_lock();
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clk_core_disable(core);
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clk_core_disable(old_parent);
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clk_enable_unlock(flags);
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clk_core_unprepare(old_parent);
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clk_core_disable_lock(core);
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clk_core_disable_unprepare(old_parent);
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}
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/* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
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if (core->flags & CLK_OPS_PARENT_ENABLE) {
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clk_core_disable_unprepare(parent);
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clk_core_disable_unprepare(old_parent);
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}
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}
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@ -1466,13 +1474,17 @@ static void clk_change_rate(struct clk_core *core)
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unsigned long best_parent_rate = 0;
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bool skip_set_rate = false;
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struct clk_core *old_parent;
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struct clk_core *parent = NULL;
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old_rate = core->rate;
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if (core->new_parent)
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if (core->new_parent) {
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parent = core->new_parent;
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best_parent_rate = core->new_parent->rate;
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else if (core->parent)
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} else if (core->parent) {
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parent = core->parent;
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best_parent_rate = core->parent->rate;
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}
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if (core->flags & CLK_SET_RATE_UNGATE) {
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unsigned long flags;
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@ -1500,6 +1512,9 @@ static void clk_change_rate(struct clk_core *core)
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__clk_set_parent_after(core, core->new_parent, old_parent);
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}
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if (core->flags & CLK_OPS_PARENT_ENABLE)
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clk_core_prepare_enable(parent);
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trace_clk_set_rate(core, core->new_rate);
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if (!skip_set_rate && core->ops->set_rate)
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@ -1518,6 +1533,9 @@ static void clk_change_rate(struct clk_core *core)
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clk_core_unprepare(core);
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}
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if (core->flags & CLK_OPS_PARENT_ENABLE)
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clk_core_disable_unprepare(parent);
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if (core->notifier_count && old_rate != core->rate)
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__clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
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