mirror of
https://github.com/torvalds/linux.git
synced 2024-11-28 23:21:31 +00:00
Merge drm/drm-next into drm-xe-next
Bring changes from drm-misc-next that got merged in drm-next back to drm-xe so they can be used for additional features. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
This commit is contained in:
Lucas De Marchi
commit
fbb944086f
13
CREDITS
13
CREDITS
@ -2161,6 +2161,19 @@ N: Mike Kravetz
|
||||
E: mike.kravetz@oracle.com
|
||||
D: Maintenance and development of the hugetlb subsystem
|
||||
|
||||
N: Seth Jennings
|
||||
E: sjenning@redhat.com
|
||||
D: Creation and maintenance of zswap
|
||||
|
||||
N: Dan Streetman
|
||||
E: ddstreet@ieee.org
|
||||
D: Maintenance and development of zswap
|
||||
D: Creation and maintenance of the zpool API
|
||||
|
||||
N: Vitaly Wool
|
||||
E: vitaly.wool@konsulko.com
|
||||
D: Maintenance and development of zswap
|
||||
|
||||
N: Andreas S. Krebs
|
||||
E: akrebs@altavista.net
|
||||
D: CYPRESS CY82C693 chipset IDE, Digital's PC-Alpha 164SX boards
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
What: /sys/class/<iface>/queues/rx-<queue>/rps_cpus
|
||||
What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
|
||||
Date: March 2010
|
||||
KernelVersion: 2.6.35
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -8,7 +8,7 @@ Description:
|
||||
network device queue. Possible values depend on the number
|
||||
of available CPU(s) in the system.
|
||||
|
||||
What: /sys/class/<iface>/queues/rx-<queue>/rps_flow_cnt
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||||
What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
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||||
Date: April 2010
|
||||
KernelVersion: 2.6.35
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -16,7 +16,7 @@ Description:
|
||||
Number of Receive Packet Steering flows being currently
|
||||
processed by this particular network device receive queue.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/tx_timeout
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
|
||||
Date: November 2011
|
||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -24,7 +24,7 @@ Description:
|
||||
Indicates the number of transmit timeout events seen by this
|
||||
network interface transmit queue.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/tx_maxrate
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
|
||||
Date: March 2015
|
||||
KernelVersion: 4.1
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -32,7 +32,7 @@ Description:
|
||||
A Mbps max-rate set for the queue, a value of zero means disabled,
|
||||
default is disabled.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/xps_cpus
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
|
||||
Date: November 2010
|
||||
KernelVersion: 2.6.38
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -42,7 +42,7 @@ Description:
|
||||
network device transmit queue. Possible values depend on the
|
||||
number of available CPU(s) in the system.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/xps_rxqs
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What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
|
||||
Date: June 2018
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||||
KernelVersion: 4.18.0
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Contact: netdev@vger.kernel.org
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||||
@ -53,7 +53,7 @@ Description:
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number of available receive queue(s) in the network device.
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Default is disabled.
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What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
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What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
|
||||
Date: November 2011
|
||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -62,7 +62,7 @@ Description:
|
||||
of this particular network device transmit queue.
|
||||
Default value is 1000.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
|
||||
Date: November 2011
|
||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -70,7 +70,7 @@ Description:
|
||||
Indicates the number of bytes (objects) in flight on this
|
||||
network device transmit queue.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit
|
||||
Date: November 2011
|
||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -79,7 +79,7 @@ Description:
|
||||
on this network device transmit queue. This value is clamped
|
||||
to be within the bounds defined by limit_max and limit_min.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
|
||||
Date: November 2011
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||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
@ -88,7 +88,7 @@ Description:
|
||||
queued on this network device transmit queue. See
|
||||
include/linux/dynamic_queue_limits.h for the default value.
|
||||
|
||||
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
|
||||
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
|
||||
Date: November 2011
|
||||
KernelVersion: 3.3
|
||||
Contact: netdev@vger.kernel.org
|
||||
|
||||
@ -10,6 +10,7 @@ What: /sys/devices/platform/silicom-platform/power_cycle
|
||||
Date: November 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Henry Shi <henrys@silicom-usa.com>
|
||||
Description:
|
||||
This file allow user to power cycle the platform.
|
||||
Default value is 0; when set to 1, it powers down
|
||||
the platform, waits 5 seconds, then powers on the
|
||||
|
||||
@ -101,8 +101,8 @@ External References
|
||||
email threads
|
||||
-------------
|
||||
|
||||
* `Initial discussion on the New subsystem for acceleration devices <https://lkml.org/lkml/2022/7/31/83>`_ - Oded Gabbay (2022)
|
||||
* `patch-set to add the new subsystem <https://lkml.org/lkml/2022/10/22/544>`_ - Oded Gabbay (2022)
|
||||
* `Initial discussion on the New subsystem for acceleration devices <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>`_ - Oded Gabbay (2022)
|
||||
* `patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_ - Oded Gabbay (2022)
|
||||
|
||||
Conference talks
|
||||
----------------
|
||||
|
||||
@ -218,8 +218,3 @@ bytes respectively. Such letter suffixes can also be entirely omitted:
|
||||
|
||||
.. include:: kernel-parameters.txt
|
||||
:literal:
|
||||
|
||||
Todo
|
||||
----
|
||||
|
||||
Add more DRM drivers.
|
||||
|
||||
@ -243,13 +243,9 @@ To reduce its OS jitter, do any of the following:
|
||||
3. Do any of the following needed to avoid jitter that your
|
||||
application cannot tolerate:
|
||||
|
||||
a. Build your kernel with CONFIG_SLUB=y rather than
|
||||
CONFIG_SLAB=y, thus avoiding the slab allocator's periodic
|
||||
use of each CPU's workqueues to run its cache_reap()
|
||||
function.
|
||||
b. Avoid using oprofile, thus avoiding OS jitter from
|
||||
a. Avoid using oprofile, thus avoiding OS jitter from
|
||||
wq_sync_buffer().
|
||||
c. Limit your CPU frequency so that a CPU-frequency
|
||||
b. Limit your CPU frequency so that a CPU-frequency
|
||||
governor is not required, possibly enlisting the aid of
|
||||
special heatsinks or other cooling technologies. If done
|
||||
correctly, and if you CPU architecture permits, you should
|
||||
@ -259,7 +255,7 @@ To reduce its OS jitter, do any of the following:
|
||||
|
||||
WARNING: Please check your CPU specifications to
|
||||
make sure that this is safe on your particular system.
|
||||
d. As of v3.18, Christoph Lameter's on-demand vmstat workers
|
||||
c. As of v3.18, Christoph Lameter's on-demand vmstat workers
|
||||
commit prevents OS jitter due to vmstat_update() on
|
||||
CONFIG_SMP=y systems. Before v3.18, is not possible
|
||||
to entirely get rid of the OS jitter, but you can
|
||||
@ -274,7 +270,7 @@ To reduce its OS jitter, do any of the following:
|
||||
(based on an earlier one from Gilad Ben-Yossef) that
|
||||
reduces or even eliminates vmstat overhead for some
|
||||
workloads at https://lore.kernel.org/r/00000140e9dfd6bd-40db3d4f-c1be-434f-8132-7820f81bb586-000000@email.amazonses.com.
|
||||
e. If running on high-end powerpc servers, build with
|
||||
d. If running on high-end powerpc servers, build with
|
||||
CONFIG_PPC_RTAS_DAEMON=n. This prevents the RTAS
|
||||
daemon from running on each CPU every second or so.
|
||||
(This will require editing Kconfig files and will defeat
|
||||
@ -282,12 +278,12 @@ To reduce its OS jitter, do any of the following:
|
||||
due to the rtas_event_scan() function.
|
||||
WARNING: Please check your CPU specifications to
|
||||
make sure that this is safe on your particular system.
|
||||
f. If running on Cell Processor, build your kernel with
|
||||
e. If running on Cell Processor, build your kernel with
|
||||
CBE_CPUFREQ_SPU_GOVERNOR=n to avoid OS jitter from
|
||||
spu_gov_work().
|
||||
WARNING: Please check your CPU specifications to
|
||||
make sure that this is safe on your particular system.
|
||||
g. If running on PowerMAC, build your kernel with
|
||||
f. If running on PowerMAC, build your kernel with
|
||||
CONFIG_PMAC_RACKMETER=n to disable the CPU-meter,
|
||||
avoiding OS jitter from rackmeter_do_timer().
|
||||
|
||||
|
||||
@ -671,8 +671,23 @@ Testing Static Functions
|
||||
------------------------
|
||||
|
||||
If we do not want to expose functions or variables for testing, one option is to
|
||||
conditionally ``#include`` the test file at the end of your .c file. For
|
||||
example:
|
||||
conditionally export the used symbol. For example:
|
||||
|
||||
.. code-block:: c
|
||||
|
||||
/* In my_file.c */
|
||||
|
||||
VISIBLE_IF_KUNIT int do_interesting_thing();
|
||||
EXPORT_SYMBOL_IF_KUNIT(do_interesting_thing);
|
||||
|
||||
/* In my_file.h */
|
||||
|
||||
#if IS_ENABLED(CONFIG_KUNIT)
|
||||
int do_interesting_thing(void);
|
||||
#endif
|
||||
|
||||
Alternatively, you could conditionally ``#include`` the test file at the end of
|
||||
your .c file. For example:
|
||||
|
||||
.. code-block:: c
|
||||
|
||||
|
||||
@ -0,0 +1,102 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8MP DWC HDMI TX Encoder
|
||||
|
||||
maintainers:
|
||||
- Lucas Stach <l.stach@pengutronix.de>
|
||||
|
||||
description:
|
||||
The i.MX8MP HDMI transmitter is a Synopsys DesignWare
|
||||
HDMI 2.0a TX controller IP.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8mp-hdmi-tx
|
||||
|
||||
reg-io-width:
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: iahb
|
||||
- const: isfr
|
||||
- const: cec
|
||||
- const: pix
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Parallel RGB input port
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: HDMI output port
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- power-domains
|
||||
- ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/power/imx8mp-power.h>
|
||||
|
||||
hdmi@32fd8000 {
|
||||
compatible = "fsl,imx8mp-hdmi-tx";
|
||||
reg = <0x32fd8000 0x7eff>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MP_CLK_HDMI_APB>,
|
||||
<&clk IMX8MP_CLK_HDMI_REF_266M>,
|
||||
<&clk IMX8MP_CLK_32K>,
|
||||
<&hdmi_tx_phy>;
|
||||
clock-names = "iahb", "isfr", "cec", "pix";
|
||||
power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
|
||||
reg-io-width = <1>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
hdmi_tx_from_pvi: endpoint {
|
||||
remote-endpoint = <&pvi_to_hdmi_tx>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
hdmi_tx_out: endpoint {
|
||||
remote-endpoint = <&hdmi0_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: SN65DSI86 DSI to eDP bridge chip
|
||||
|
||||
maintainers:
|
||||
- Sandeep Panda <spanda@codeaurora.org>
|
||||
- Douglas Anderson <dianders@chromium.org>
|
||||
|
||||
description: |
|
||||
The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
|
||||
|
||||
@ -0,0 +1,84 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8MP HDMI Parallel Video Interface
|
||||
|
||||
maintainers:
|
||||
- Lucas Stach <l.stach@pengutronix.de>
|
||||
|
||||
description:
|
||||
The HDMI parallel video interface is a timing and sync generator block in the
|
||||
i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8mp-hdmi-pvi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Input from the LCDIF controller.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Output to the HDMI TX controller.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/power/imx8mp-power.h>
|
||||
|
||||
display-bridge@32fc4000 {
|
||||
compatible = "fsl,imx8mp-hdmi-pvi";
|
||||
reg = <0x32fc4000 0x44>;
|
||||
interrupt-parent = <&irqsteer_hdmi>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
pvi_from_lcdif3: endpoint {
|
||||
remote-endpoint = <&lcdif3_to_pvi>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
pvi_to_hdmi_tx: endpoint {
|
||||
remote-endpoint = <&hdmi_tx_from_pvi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: BOE TH101MB31IG002-28A WXGA DSI Display Panel
|
||||
|
||||
maintainers:
|
||||
- Manuel Traut <manut@mecka.net>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
|
||||
- boe,th101mb31ig002-28a
|
||||
|
||||
reg: true
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
port: true
|
||||
rotation: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- enable-gpios
|
||||
- power-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
compatible = "boe,th101mb31ig002-28a";
|
||||
reg = <0>;
|
||||
backlight = <&backlight_lcd0>;
|
||||
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
rotation = <90>;
|
||||
power-supply = <&vcc_3v3>;
|
||||
port {
|
||||
panel_in_dsi: endpoint {
|
||||
remote-endpoint = <&dsi_out_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -15,7 +15,9 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: hydis,hva40wv1
|
||||
- enum:
|
||||
- frida,frd400b25025
|
||||
- hydis,hva40wv1
|
||||
- const: novatek,nt35510
|
||||
description: This indicates the panel manufacturer of the panel
|
||||
that is in turn using the NT35510 panel driver. The compatible
|
||||
|
||||
@ -0,0 +1,66 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/novatek,nt36672e.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Novatek NT36672E LCD DSI Panel
|
||||
|
||||
maintainers:
|
||||
- Ritesh Kumar <quic_riteshk@quicinc.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: novatek,nt36672e
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: DSI virtual channel
|
||||
|
||||
vddi-supply: true
|
||||
avdd-supply: true
|
||||
avee-supply: true
|
||||
port: true
|
||||
reset-gpios: true
|
||||
backlight: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vddi-supply
|
||||
- avdd-supply
|
||||
- avee-supply
|
||||
- reset-gpios
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
compatible = "novatek,nt36672e";
|
||||
reg = <0>;
|
||||
|
||||
reset-gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
vddi-supply = <&vreg_l8c_1p8>;
|
||||
avdd-supply = <&disp_avdd>;
|
||||
avee-supply = <&disp_avee>;
|
||||
|
||||
backlight = <&pwm_backlight>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -42,6 +42,8 @@ properties:
|
||||
- auo,b101ew05
|
||||
# Chunghwa Picture Tubes Ltd. 7" WXGA (800x1280) TFT LCD LVDS panel
|
||||
- chunghwa,claa070wp03xg
|
||||
# EDT ETML0700Z9NDHA 7.0" WSVGA (1024x600) color TFT LCD LVDS panel
|
||||
- edt,etml0700z9ndha
|
||||
# HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS panel
|
||||
- hannstar,hsd101pww2
|
||||
# Hydis Technologies 7" WXGA (800x1280) TFT LCD LVDS panel
|
||||
|
||||
@ -141,6 +141,8 @@ properties:
|
||||
- edt,etm0700g0edh6
|
||||
# Emerging Display Technology Corp. LVDS WSVGA TFT Display with capacitive touch
|
||||
- edt,etml0700y5dha
|
||||
# Emerging Display Technology Corp. 10.1" LVDS WXGA TFT Display with capacitive touch
|
||||
- edt,etml1010g3dra
|
||||
# Emerging Display Technology Corp. 5.7" VGA TFT LCD panel with
|
||||
# capacitive touch
|
||||
- edt,etmv570g2dhu
|
||||
|
||||
@ -22,6 +22,8 @@ properties:
|
||||
enum:
|
||||
# Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
|
||||
- anbernic,rg353v-panel-v2
|
||||
# Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel
|
||||
- powkiddy,rgb10max3-panel
|
||||
# Powkiddy RGB30 3.0" 720x720 TFT LCD panel
|
||||
- powkiddy,rgb30-panel
|
||||
# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
|
||||
@ -43,6 +45,7 @@ properties:
|
||||
reset-gpios: true
|
||||
|
||||
backlight: true
|
||||
rotation: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Visionox model RM69299 Panels
|
||||
|
||||
maintainers:
|
||||
- Harigovindan P <harigovi@codeaurora.org>
|
||||
- Abhinav Kumar <quic_abhinavk@quicinc.com>
|
||||
- Jessica Zhang <quic_jesszhan@quicinc.com>
|
||||
|
||||
description: |
|
||||
This binding is for display panels using a Visionox RM692999 panel.
|
||||
|
||||
@ -94,11 +94,14 @@ properties:
|
||||
- const: default
|
||||
- const: unwedge
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
"^port(@0)?$":
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Input of the DWC HDMI TX
|
||||
properties:
|
||||
@ -108,11 +111,14 @@ properties:
|
||||
description: Connection to the VOPB
|
||||
endpoint@1:
|
||||
description: Connection to the VOPL
|
||||
properties:
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Output of the DWC HDMI TX
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
rockchip,grf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
@ -135,19 +141,25 @@ examples:
|
||||
#include <dt-bindings/clock/rk3288-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/power/rk3288-power.h>
|
||||
|
||||
hdmi: hdmi@ff980000 {
|
||||
compatible = "rockchip,rk3288-dw-hdmi";
|
||||
reg = <0xff980000 0x20000>;
|
||||
reg-io-width = <4>;
|
||||
ddc-i2c-bus = <&i2c5>;
|
||||
rockchip,grf = <&grf>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
|
||||
clock-names = "iahb", "isfr";
|
||||
ddc-i2c-bus = <&i2c5>;
|
||||
power-domains = <&power RK3288_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -155,11 +167,20 @@ examples:
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vopb_out_hdmi>;
|
||||
};
|
||||
|
||||
hdmi_in_vopl: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&vopl_out_hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -85,7 +85,7 @@ allOf:
|
||||
clocks:
|
||||
minItems: 6
|
||||
maxItems: 6
|
||||
regs:
|
||||
reg:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
@ -99,7 +99,7 @@ allOf:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
regs:
|
||||
reg:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
@ -116,7 +116,7 @@ allOf:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
regs:
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
|
||||
|
||||
@ -131,9 +131,9 @@ allOf:
|
||||
const: sinowealth,sh1106
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 132
|
||||
height:
|
||||
solomon,height:
|
||||
default: 64
|
||||
solomon,dclk-div:
|
||||
default: 1
|
||||
@ -149,9 +149,9 @@ allOf:
|
||||
- solomon,ssd1305
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 132
|
||||
height:
|
||||
solomon,height:
|
||||
default: 64
|
||||
solomon,dclk-div:
|
||||
default: 1
|
||||
@ -167,9 +167,9 @@ allOf:
|
||||
- solomon,ssd1306
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 128
|
||||
height:
|
||||
solomon,height:
|
||||
default: 64
|
||||
solomon,dclk-div:
|
||||
default: 1
|
||||
@ -185,9 +185,9 @@ allOf:
|
||||
- solomon,ssd1307
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 128
|
||||
height:
|
||||
solomon,height:
|
||||
default: 39
|
||||
solomon,dclk-div:
|
||||
default: 2
|
||||
@ -205,9 +205,9 @@ allOf:
|
||||
- solomon,ssd1309
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 128
|
||||
height:
|
||||
solomon,height:
|
||||
default: 64
|
||||
solomon,dclk-div:
|
||||
default: 1
|
||||
|
||||
@ -30,9 +30,9 @@ allOf:
|
||||
const: solomon,ssd1322
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 480
|
||||
height:
|
||||
solomon,height:
|
||||
default: 128
|
||||
|
||||
- if:
|
||||
@ -42,9 +42,9 @@ allOf:
|
||||
const: solomon,ssd1325
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 128
|
||||
height:
|
||||
solomon,height:
|
||||
default: 80
|
||||
|
||||
- if:
|
||||
@ -54,9 +54,9 @@ allOf:
|
||||
const: solomon,ssd1327
|
||||
then:
|
||||
properties:
|
||||
width:
|
||||
solomon,width:
|
||||
default: 128
|
||||
height:
|
||||
solomon,height:
|
||||
default: 128
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/solomon,ssd133x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Solomon SSD133x OLED Display Controllers
|
||||
|
||||
maintainers:
|
||||
- Javier Martinez Canillas <javierm@redhat.com>
|
||||
|
||||
allOf:
|
||||
- $ref: solomon,ssd-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- solomon,ssd1331
|
||||
|
||||
solomon,width:
|
||||
default: 96
|
||||
|
||||
solomon,height:
|
||||
default: 64
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
oled@0 {
|
||||
compatible = "solomon,ssd1331";
|
||||
reg = <0x0>;
|
||||
reset-gpios = <&gpio2 7>;
|
||||
dc-gpios = <&gpio2 8>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
@ -17,7 +17,7 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- ti,k3-j721s2-wave521c
|
||||
- ti,j721s2-wave521c
|
||||
- const: cnm,wave521c
|
||||
|
||||
reg:
|
||||
@ -53,7 +53,7 @@ additionalProperties: false
|
||||
examples:
|
||||
- |
|
||||
vpu: video-codec@12345678 {
|
||||
compatible = "ti,k3-j721s2-wave521c", "cnm,wave521c";
|
||||
compatible = "ti,j721s2-wave521c", "cnm,wave521c";
|
||||
reg = <0x12345678 0x1000>;
|
||||
clocks = <&clks 42>;
|
||||
interrupts = <42>;
|
||||
|
||||
@ -22,6 +22,7 @@ properties:
|
||||
- const: allwinner,sun6i-a31-spdif
|
||||
- const: allwinner,sun8i-h3-spdif
|
||||
- const: allwinner,sun50i-h6-spdif
|
||||
- const: allwinner,sun50i-h616-spdif
|
||||
- items:
|
||||
- const: allwinner,sun8i-a83t-spdif
|
||||
- const: allwinner,sun8i-h3-spdif
|
||||
@ -62,6 +63,8 @@ allOf:
|
||||
enum:
|
||||
- allwinner,sun6i-a31-spdif
|
||||
- allwinner,sun8i-h3-spdif
|
||||
- allwinner,sun50i-h6-spdif
|
||||
- allwinner,sun50i-h616-spdif
|
||||
|
||||
then:
|
||||
required:
|
||||
@ -73,7 +76,7 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- allwinner,sun8i-h3-spdif
|
||||
- allwinner,sun50i-h6-spdif
|
||||
- allwinner,sun50i-h616-spdif
|
||||
|
||||
then:
|
||||
properties:
|
||||
|
||||
@ -145,7 +145,9 @@ filesystem, an overlay filesystem needs to record in the upper filesystem
|
||||
that files have been removed. This is done using whiteouts and opaque
|
||||
directories (non-directories are always opaque).
|
||||
|
||||
A whiteout is created as a character device with 0/0 device number.
|
||||
A whiteout is created as a character device with 0/0 device number or
|
||||
as a zero-size regular file with the xattr "trusted.overlay.whiteout".
|
||||
|
||||
When a whiteout is found in the upper level of a merged directory, any
|
||||
matching name in the lower level is ignored, and the whiteout itself
|
||||
is also hidden.
|
||||
@ -154,6 +156,13 @@ A directory is made opaque by setting the xattr "trusted.overlay.opaque"
|
||||
to "y". Where the upper filesystem contains an opaque directory, any
|
||||
directory in the lower filesystem with the same name is ignored.
|
||||
|
||||
An opaque directory should not conntain any whiteouts, because they do not
|
||||
serve any purpose. A merge directory containing regular files with the xattr
|
||||
"trusted.overlay.whiteout", should be additionally marked by setting the xattr
|
||||
"trusted.overlay.opaque" to "x" on the merge directory itself.
|
||||
This is needed to avoid the overhead of checking the "trusted.overlay.whiteout"
|
||||
on all entries during readdir in the common case.
|
||||
|
||||
readdir
|
||||
-------
|
||||
|
||||
@ -534,8 +543,9 @@ A lower dir with a regular whiteout will always be handled by the overlayfs
|
||||
mount, so to support storing an effective whiteout file in an overlayfs mount an
|
||||
alternative form of whiteout is supported. This form is a regular, zero-size
|
||||
file with the "overlay.whiteout" xattr set, inside a directory with the
|
||||
"overlay.whiteouts" xattr set. Such whiteouts are never created by overlayfs,
|
||||
but can be used by userspace tools (like containers) that generate lower layers.
|
||||
"overlay.opaque" xattr set to "x" (see `whiteouts and opaque directories`_).
|
||||
These alternative whiteouts are never created by overlayfs, but can be used by
|
||||
userspace tools (like containers) that generate lower layers.
|
||||
These alternative whiteouts can be escaped using the standard xattr escape
|
||||
mechanism in order to properly nest to any depth.
|
||||
|
||||
|
||||
@ -16,6 +16,7 @@ Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10,
|
||||
AMD Radeon (Pro) VII /MI50 /MI60, VEGA20, DCE 12, 9.4.0, VCE 4.1.0 / UVD 7.2.0, 4.2.0
|
||||
MI100, ARCTURUS, *, 9.4.1, VCN 2.5.0, 4.2.2
|
||||
MI200, ALDEBARAN, *, 9.4.2, VCN 2.6.0, 4.4.0
|
||||
MI300, AQUA_VANGARAM, *, 9.4.3, VCN 4.0.3, 4.4.2
|
||||
AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0
|
||||
AMD Radeon (Pro) 5300 /5500XTB/5500(XT|M) /W5500M /W5500, NAVI14, DCN 2.0.0, 10.1.1, VCN 2.0.2, 5.0.2
|
||||
AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0
|
||||
@ -23,4 +24,5 @@ AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0
|
||||
AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4
|
||||
AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5
|
||||
AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0
|
||||
AMD Radeon RX 7800 XT, , DCN 3.2.0, 11.0.3, VCN 4.0.0, 6.0.3
|
||||
AMD Radeon RX 7600M (XT) /7700S /7600S, , DCN 3.2.1, 11.0.2, VCN 4.0.4, 6.0.2
|
||||
|
||||
|
78
Documentation/gpu/amdgpu/display/dcn-blocks.rst
Normal file
78
Documentation/gpu/amdgpu/display/dcn-blocks.rst
Normal file
@ -0,0 +1,78 @@
|
||||
==========
|
||||
DCN Blocks
|
||||
==========
|
||||
|
||||
In this section, you will find some extra details about some of the DCN blocks
|
||||
and the code documentation when it is automatically generated.
|
||||
|
||||
DCHUBBUB
|
||||
--------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:internal:
|
||||
|
||||
HUBP
|
||||
----
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:internal:
|
||||
|
||||
DPP
|
||||
---
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
|
||||
:internal:
|
||||
|
||||
MPC
|
||||
---
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
|
||||
:internal:
|
||||
|
||||
OPP
|
||||
---
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
|
||||
:internal:
|
||||
|
||||
DIO
|
||||
---
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
|
||||
:internal:
|
||||
168
Documentation/gpu/amdgpu/display/display-contributing.rst
Normal file
168
Documentation/gpu/amdgpu/display/display-contributing.rst
Normal file
@ -0,0 +1,168 @@
|
||||
.. _display_todos:
|
||||
|
||||
==============================
|
||||
AMDGPU - Display Contributions
|
||||
==============================
|
||||
|
||||
First of all, if you are here, you probably want to give some technical
|
||||
contribution to the display code, and for that, we say thank you :)
|
||||
|
||||
This page summarizes some of the issues you can help with; keep in mind that
|
||||
this is a static page, and it is always a good idea to try to reach developers
|
||||
in the amdgfx or some of the maintainers. Finally, this page follows the DRM
|
||||
way of creating a TODO list; for more information, check
|
||||
'Documentation/gpu/todo.rst'.
|
||||
|
||||
Gitlab issues
|
||||
=============
|
||||
|
||||
Users can report issues associated with AMD GPUs at:
|
||||
|
||||
- https://gitlab.freedesktop.org/drm/amd
|
||||
|
||||
Usually, we try to add a proper label to all new tickets to make it easy to
|
||||
filter issues. If you can reproduce any problem, you could help by adding more
|
||||
information or fixing the issue.
|
||||
|
||||
Level: diverse
|
||||
|
||||
IGT
|
||||
===
|
||||
|
||||
`IGT`_ provides many integration tests that can be run on your GPU. We always
|
||||
want to pass a large set of tests to increase the test coverage in our CI. If
|
||||
you wish to contribute to the display code but are unsure where a good place
|
||||
is, we recommend you run all IGT tests and try to fix any failure you see in
|
||||
your hardware. Keep in mind that this failure can be an IGT problem or a kernel
|
||||
issue; it is necessary to analyze case-by-case.
|
||||
|
||||
Level: diverse
|
||||
|
||||
.. _IGT: https://gitlab.freedesktop.org/drm/igt-gpu-tools
|
||||
|
||||
Compilation
|
||||
===========
|
||||
|
||||
Fix compilation warnings
|
||||
------------------------
|
||||
|
||||
Enable the W1 or W2 warning level in the kernel compilation and try to fix the
|
||||
issues on the display side.
|
||||
|
||||
Level: Starter
|
||||
|
||||
Fix compilation issues when using um architecture
|
||||
-------------------------------------------------
|
||||
|
||||
Linux has a User-mode Linux (UML) feature, and the kernel can be compiled to
|
||||
the **um** architecture. Compiling for **um** can bring multiple advantages
|
||||
from the test perspective. We currently have some compilation issues in this
|
||||
area that we need to fix.
|
||||
|
||||
Level: Intermediate
|
||||
|
||||
Code Refactor
|
||||
=============
|
||||
|
||||
Add prefix to DC functions to improve the debug with ftrace
|
||||
-----------------------------------------------------------
|
||||
|
||||
The Ftrace debug feature (check 'Documentation/trace/ftrace.rst') is a
|
||||
fantastic way to check the code path when developers try to make sense of a
|
||||
bug. Ftrace provides a filter mechanism that can be useful when the developer
|
||||
has some hunch of which part of the code can cause the issue; for this reason,
|
||||
if a set of functions has a proper prefix, it becomes easy to create a good
|
||||
filter. Additionally, prefixes can improve stack trace readability.
|
||||
|
||||
The DC code does not follow some prefix rules, which makes the Ftrace filter
|
||||
more complicated and reduces the readability of the stack trace. If you want
|
||||
something simple to start contributing to the display, you can make patches for
|
||||
adding prefixes to DC functions. To create those prefixes, use part of the file
|
||||
name as a prefix for all functions in the target file. Check the
|
||||
'amdgpu_dm_crtc.c` and `amdgpu_dm_plane.c` for some references. However, we
|
||||
strongly advise not to send huge patches changing these prefixes; otherwise, it
|
||||
will be hard to review and test, which can generate second thoughts from
|
||||
maintainers. Try small steps; in case of double, you can ask before you put in
|
||||
effort. We recommend first looking at folders like dceXYZ, dcnXYZ, basics,
|
||||
bios, core, clk_mgr, hwss, resource, and irq.
|
||||
|
||||
Level: Starter
|
||||
|
||||
Reduce code duplication
|
||||
-----------------------
|
||||
|
||||
AMD has an extensive portfolio with various dGPUs and APUs that amdgpu
|
||||
supports. To maintain the new hardware release cadence, DCE/DCN was designed in
|
||||
a modular design, making the bring-up for new hardware fast. Over the years,
|
||||
amdgpu accumulated some technical debt in the code duplication area. For this
|
||||
task, it would be a good idea to find a tool that can discover code duplication
|
||||
(including patterns) and use it as guidance to reduce duplications.
|
||||
|
||||
Level: Intermediate
|
||||
|
||||
Make atomic_commit_[check|tail] more readable
|
||||
---------------------------------------------
|
||||
|
||||
The functions responsible for atomic commit and tail are intricate and
|
||||
extensive. In particular `amdgpu_dm_atomic_commit_tail` is a long function and
|
||||
could benefit from being split into smaller helpers. Improvements in this area
|
||||
are more than welcome, but keep in mind that changes in this area will affect
|
||||
all ASICs, meaning that refactoring requires a comprehensive verification; in
|
||||
other words, this effort can take some time for validation.
|
||||
|
||||
Level: Advanced
|
||||
|
||||
Documentation
|
||||
=============
|
||||
|
||||
Expand kernel-doc
|
||||
-----------------
|
||||
|
||||
Many DC functions do not have a proper kernel-doc; understanding a function and
|
||||
adding documentation is a great way to learn more about the amdgpu driver and
|
||||
also leave an outstanding contribution to the entire community.
|
||||
|
||||
Level: Starter
|
||||
|
||||
Beyond AMDGPU
|
||||
=============
|
||||
|
||||
AMDGPU provides features that are not yet enabled in the userspace. This
|
||||
section highlights some of the coolest display features, which could be enabled
|
||||
with the userspace developer helper.
|
||||
|
||||
Enable underlay
|
||||
---------------
|
||||
|
||||
AMD display has this feature called underlay (which you can read more about at
|
||||
'Documentation/GPU/amdgpu/display/mpo-overview.rst') which is intended to
|
||||
save power when playing a video. The basic idea is to put a video in the
|
||||
underlay plane at the bottom and the desktop in the plane above it with a hole
|
||||
in the video area. This feature is enabled in ChromeOS, and from our data
|
||||
measurement, it can save power.
|
||||
|
||||
Level: Unknown
|
||||
|
||||
Adaptive Backlight Modulation (ABM)
|
||||
-----------------------------------
|
||||
|
||||
ABM is a feature that adjusts the display panel's backlight level and pixel
|
||||
values depending on the displayed image. This power-saving feature can be very
|
||||
useful when the system starts to run off battery; since this will impact the
|
||||
display output fidelity, it would be good if this option was something that
|
||||
users could turn on or off.
|
||||
|
||||
Level: Unknown
|
||||
|
||||
|
||||
HDR & Color management & VRR
|
||||
----------------------------
|
||||
|
||||
HDR, Color Management, and VRR are huge topics and it's hard to put these into
|
||||
concise ToDos. If you are interested in this topic, we recommend checking some
|
||||
blog posts from the community developers to better understand some of the
|
||||
specific challenges and people working on the subject. If anyone wants to work
|
||||
on some particular part, we can try to help with some basic guidance. Finally,
|
||||
keep in mind that we already have some kernel-doc in place for those areas.
|
||||
|
||||
Level: Unknown
|
||||
@ -131,9 +131,6 @@ The DRM blend mode and its elements are then mapped by AMDGPU display manager
|
||||
(DM) to program the blending configuration of the Multiple Pipe/Plane Combined
|
||||
(MPC), as follows:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
|
||||
:doc: mpc-overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
|
||||
:functions: mpcc_blnd_cfg
|
||||
|
||||
|
||||
@ -7,18 +7,80 @@ drm/amd/display - Display Core (DC)
|
||||
AMD display engine is partially shared with other operating systems; for this
|
||||
reason, our Display Core Driver is divided into two pieces:
|
||||
|
||||
1. **Display Core (DC)** contains the OS-agnostic components. Things like
|
||||
#. **Display Core (DC)** contains the OS-agnostic components. Things like
|
||||
hardware programming and resource management are handled here.
|
||||
2. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
|
||||
amdgpu base driver and DRM are implemented here.
|
||||
#. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
|
||||
amdgpu base driver and DRM are implemented here. For example, you can check
|
||||
display/amdgpu_dm/ folder.
|
||||
|
||||
------------------
|
||||
DC Code validation
|
||||
------------------
|
||||
|
||||
Maintaining the same code base across multiple OSes requires a lot of
|
||||
synchronization effort between repositories and exhaustive validation. In the
|
||||
DC case, we maintain a tree to centralize code from different parts. The shared
|
||||
repository has integration tests with our Internal Linux CI farm, and we run a
|
||||
comprehensive set of IGT tests in various AMD GPUs/APUs (mostly recent dGPUs
|
||||
and APUs). Our CI also checks ARM64/32, PPC64/32, and x86_64/32 compilation
|
||||
with DCN enabled and disabled.
|
||||
|
||||
When we upstream a new feature or some patches, we pack them in a patchset with
|
||||
the prefix **DC Patches for <DATE>**, which is created based on the latest
|
||||
`amd-staging-drm-next <https://gitlab.freedesktop.org/agd5f/linux>`_. All of
|
||||
those patches are under a DC version tested as follows:
|
||||
|
||||
* Ensure that every patch compiles and the entire series pass our set of IGT
|
||||
test in different hardware.
|
||||
* Prepare a branch with those patches for our validation team. If there is an
|
||||
error, a developer will debug as fast as possible; usually, a simple bisect
|
||||
in the series is enough to point to a bad change, and two possible actions
|
||||
emerge: fix the issue or drop the patch. If it is not an easy fix, the bad
|
||||
patch is dropped.
|
||||
* Finally, developers wait a few days for community feedback before we merge
|
||||
the series.
|
||||
|
||||
It is good to stress that the test phase is something that we take extremely
|
||||
seriously, and we never merge anything that fails our validation. Follows an
|
||||
overview of our test set:
|
||||
|
||||
#. Manual test
|
||||
* Multiple Hotplugs with DP and HDMI.
|
||||
* Stress test with multiple display configuration changes via the user interface.
|
||||
* Validate VRR behaviour.
|
||||
* Check PSR.
|
||||
* Validate MPO when playing video.
|
||||
* Test more than two displays connected at the same time.
|
||||
* Check suspend/resume.
|
||||
* Validate FPO.
|
||||
* Check MST.
|
||||
#. Automated test
|
||||
* IGT tests in a farm with GPUs and APUs that support DCN and DCE.
|
||||
* Compilation validation with the latest GCC and Clang from LTS distro.
|
||||
* Cross-compilation for PowerPC 64/32, ARM 64/32, and x86 32.
|
||||
|
||||
In terms of test setup for CI and manual tests, we usually use:
|
||||
|
||||
#. The latest Ubuntu LTS.
|
||||
#. In terms of userspace, we only use fully updated open-source components
|
||||
provided by the distribution official package manager.
|
||||
#. Regarding IGT, we use the latest code from the upstream.
|
||||
#. Most of the manual tests are conducted in the GNome but we also use KDE.
|
||||
|
||||
Notice that someone from our test team will always reply to the cover letter
|
||||
with the test report.
|
||||
|
||||
--------------
|
||||
DC Information
|
||||
--------------
|
||||
|
||||
The display pipe is responsible for "scanning out" a rendered frame from the
|
||||
GPU memory (also called VRAM, FrameBuffer, etc.) to a display. In other words,
|
||||
it would:
|
||||
|
||||
1. Read frame information from memory;
|
||||
2. Perform required transformation;
|
||||
3. Send pixel data to sink devices.
|
||||
#. Read frame information from memory;
|
||||
#. Perform required transformation;
|
||||
#. Send pixel data to sink devices.
|
||||
|
||||
If you want to learn more about our driver details, take a look at the below
|
||||
table of content:
|
||||
@ -26,7 +88,9 @@ table of content:
|
||||
.. toctree::
|
||||
|
||||
display-manager.rst
|
||||
dc-debug.rst
|
||||
dcn-overview.rst
|
||||
dcn-blocks.rst
|
||||
mpo-overview.rst
|
||||
dc-debug.rst
|
||||
display-contributing.rst
|
||||
dc-glossary.rst
|
||||
|
||||
@ -153,18 +153,6 @@ Managed Resources
|
||||
.. kernel-doc:: include/drm/drm_managed.h
|
||||
:internal:
|
||||
|
||||
Bus-specific Device Registration and PCI Support
|
||||
------------------------------------------------
|
||||
|
||||
A number of functions are provided to help with device registration. The
|
||||
functions deal with PCI and platform devices respectively and are only
|
||||
provided for historical reasons. These are all deprecated and shouldn't
|
||||
be used in new drivers. Besides that there's a few helpers for pci
|
||||
drivers.
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_pci.c
|
||||
:export:
|
||||
|
||||
Open/Close, File Operations and IOCTLs
|
||||
======================================
|
||||
|
||||
|
||||
@ -164,6 +164,8 @@ Conference talks
|
||||
Slides and articles
|
||||
-------------------
|
||||
|
||||
* `The Linux graphics stack in a nutshell, part 1 <https://lwn.net/Articles/955376/>`_ - Thomas Zimmermann (2023)
|
||||
* `The Linux graphics stack in a nutshell, part 2 <https://lwn.net/Articles/955708/>`_ - Thomas Zimmermann (2023)
|
||||
* `Understanding the Linux Graphics Stack <https://bootlin.com/doc/training/graphics/graphics-slides.pdf>`_ - Bootlin (2022)
|
||||
* `DRM KMS overview <https://wiki.st.com/stm32mpu/wiki/DRM_KMS_overview>`_ - STMicroelectronics (2021)
|
||||
* `Linux graphic stack <https://studiopixl.com/2017-05-13/linux-graphic-stack-an-overview>`_ - Nathan Gauër (2017)
|
||||
|
||||
@ -31,7 +31,3 @@ host such documentation:
|
||||
.. toctree::
|
||||
|
||||
i915_vm_bind.rst
|
||||
|
||||
.. toctree::
|
||||
|
||||
xe.rst
|
||||
|
||||
@ -1,234 +0,0 @@
|
||||
==========================
|
||||
Xe – Merge Acceptance Plan
|
||||
==========================
|
||||
Xe is a new driver for Intel GPUs that supports both integrated and
|
||||
discrete platforms starting with Tiger Lake (first Intel Xe Architecture).
|
||||
|
||||
This document aims to establish a merge plan for the Xe, by writing down clear
|
||||
pre-merge goals, in order to avoid unnecessary delays.
|
||||
|
||||
Xe – Overview
|
||||
=============
|
||||
The main motivation of Xe is to have a fresh base to work from that is
|
||||
unencumbered by older platforms, whilst also taking the opportunity to
|
||||
rearchitect our driver to increase sharing across the drm subsystem, both
|
||||
leveraging and allowing us to contribute more towards other shared components
|
||||
like TTM and drm/scheduler.
|
||||
|
||||
This is also an opportunity to start from the beginning with a clean uAPI that is
|
||||
extensible by design and already aligned with the modern userspace needs. For
|
||||
this reason, the memory model is solely based on GPU Virtual Address space
|
||||
bind/unbind (‘VM_BIND’) of GEM buffer objects (BOs) and execution only supporting
|
||||
explicit synchronization. With persistent mapping across the execution, the
|
||||
userspace does not need to provide a list of all required mappings during each
|
||||
submission.
|
||||
|
||||
The new driver leverages a lot from i915. As for display, the intent is to share
|
||||
the display code with the i915 driver so that there is maximum reuse there.
|
||||
|
||||
As for the power management area, the goal is to have a much-simplified support
|
||||
for the system suspend states (S-states), PCI device suspend states (D-states),
|
||||
GPU/Render suspend states (R-states) and frequency management. It should leverage
|
||||
as much as possible all the existent PCI-subsystem infrastructure (pm and
|
||||
runtime_pm) and underlying firmware components such PCODE and GuC for the power
|
||||
states and frequency decisions.
|
||||
|
||||
Repository:
|
||||
|
||||
https://gitlab.freedesktop.org/drm/xe/kernel (branch drm-xe-next)
|
||||
|
||||
Xe – Platforms
|
||||
==============
|
||||
Currently, Xe is already functional and has experimental support for multiple
|
||||
platforms starting from Tiger Lake, with initial support in userspace implemented
|
||||
in Mesa (for Iris and Anv, our OpenGL and Vulkan drivers), as well as in NEO
|
||||
(for OpenCL and Level0).
|
||||
|
||||
During a transition period, platforms will be supported by both Xe and i915.
|
||||
However, the force_probe mechanism existent in both drivers will allow only one
|
||||
official and by-default probe at a given time.
|
||||
|
||||
For instance, in order to probe a DG2 which PCI ID is 0x5690 by Xe instead of
|
||||
i915, the following set of parameters need to be used:
|
||||
|
||||
```
|
||||
i915.force_probe=!5690 xe.force_probe=5690
|
||||
```
|
||||
|
||||
In both drivers, the ‘.require_force_probe’ protection forces the user to use the
|
||||
force_probe parameter while the driver is under development. This protection is
|
||||
only removed when the support for the platform and the uAPI are stable. Stability
|
||||
which needs to be demonstrated by CI results.
|
||||
|
||||
In order to avoid user space regressions, i915 will continue to support all the
|
||||
current platforms that are already out of this protection. Xe support will be
|
||||
forever experimental and dependent on the usage of force_probe for these
|
||||
platforms.
|
||||
|
||||
When the time comes for Xe, the protection will be lifted on Xe and kept in i915.
|
||||
|
||||
Xe – Pre-Merge Goals - Work-in-Progress
|
||||
=======================================
|
||||
|
||||
Display integration with i915
|
||||
-----------------------------
|
||||
In order to share the display code with the i915 driver so that there is maximum
|
||||
reuse, the i915/display/ code is built twice, once for i915.ko and then for
|
||||
xe.ko. Currently, the i915/display code in Xe tree is polluted with many 'ifdefs'
|
||||
depending on the build target. The goal is to refactor both Xe and i915/display
|
||||
code simultaneously in order to get a clean result before they land upstream, so
|
||||
that display can already be part of the initial pull request towards drm-next.
|
||||
|
||||
However, display code should not gate the acceptance of Xe in upstream. Xe
|
||||
patches will be refactored in a way that display code can be removed, if needed,
|
||||
from the first pull request of Xe towards drm-next. The expectation is that when
|
||||
both drivers are part of the drm-tip, the introduction of cleaner patches will be
|
||||
easier and speed up.
|
||||
|
||||
Xe – uAPI high level overview
|
||||
=============================
|
||||
|
||||
...Warning: To be done in follow up patches after/when/where the main consensus in various items are individually reached.
|
||||
|
||||
Xe – Pre-Merge Goals - Completed
|
||||
================================
|
||||
|
||||
Drm_exec
|
||||
--------
|
||||
Helper to make dma_resv locking for a big number of buffers is getting removed in
|
||||
the drm_exec series proposed in https://patchwork.freedesktop.org/patch/524376/
|
||||
If that happens, Xe needs to change and incorporate the changes in the driver.
|
||||
The goal is to engage with the Community to understand if the best approach is to
|
||||
move that to the drivers that are using it or if we should keep the helpers in
|
||||
place waiting for Xe to get merged.
|
||||
|
||||
This item ties into the GPUVA, VM_BIND, and even long-running compute support.
|
||||
|
||||
As a key measurable result, we need to have a community consensus documented in
|
||||
this document and the Xe driver prepared for the changes, if necessary.
|
||||
|
||||
Userptr integration and vm_bind
|
||||
-------------------------------
|
||||
Different drivers implement different ways of dealing with execution of userptr.
|
||||
With multiple drivers currently introducing support to VM_BIND, the goal is to
|
||||
aim for a DRM consensus on what’s the best way to have that support. To some
|
||||
extent this is already getting addressed itself with the GPUVA where likely the
|
||||
userptr will be a GPUVA with a NULL GEM call VM bind directly on the userptr.
|
||||
However, there are more aspects around the rules for that and the usage of
|
||||
mmu_notifiers, locking and other aspects.
|
||||
|
||||
This task here has the goal of introducing a documentation of the basic rules.
|
||||
|
||||
The documentation *needs* to first live in this document (API session below) and
|
||||
then moved to another more specific document or at Xe level or at DRM level.
|
||||
|
||||
Documentation should include:
|
||||
|
||||
* The userptr part of the VM_BIND api.
|
||||
|
||||
* Locking, including the page-faulting case.
|
||||
|
||||
* O(1) complexity under VM_BIND.
|
||||
|
||||
The document is now included in the drm documentation :doc:`here </gpu/drm-vm-bind-async>`.
|
||||
|
||||
Some parts of userptr like mmu_notifiers should become GPUVA or DRM helpers when
|
||||
the second driver supporting VM_BIND+userptr appears. Details to be defined when
|
||||
the time comes.
|
||||
|
||||
The DRM GPUVM helpers do not yet include the userptr parts, but discussions
|
||||
about implementing them are ongoing.
|
||||
|
||||
ASYNC VM_BIND
|
||||
-------------
|
||||
Although having a common DRM level IOCTL for VM_BIND is not a requirement to get
|
||||
Xe merged, it is mandatory to have a consensus with other drivers and Mesa.
|
||||
It needs to be clear how to handle async VM_BIND and interactions with userspace
|
||||
memory fences. Ideally with helper support so people don't get it wrong in all
|
||||
possible ways.
|
||||
|
||||
As a key measurable result, the benefits of ASYNC VM_BIND and a discussion of
|
||||
various flavors, error handling and sample API suggestions are documented in
|
||||
:doc:`The ASYNC VM_BIND document </gpu/drm-vm-bind-async>`.
|
||||
|
||||
Drm_scheduler
|
||||
-------------
|
||||
Xe primarily uses Firmware based scheduling (GuC FW). However, it will use
|
||||
drm_scheduler as the scheduler ‘frontend’ for userspace submission in order to
|
||||
resolve syncobj and dma-buf implicit sync dependencies. However, drm_scheduler is
|
||||
not yet prepared to handle the 1-to-1 relationship between drm_gpu_scheduler and
|
||||
drm_sched_entity.
|
||||
|
||||
Deeper changes to drm_scheduler should *not* be required to get Xe accepted, but
|
||||
some consensus needs to be reached between Xe and other community drivers that
|
||||
could also benefit from this work, for coupling FW based/assisted submission such
|
||||
as the ARM’s new Mali GPU driver, and others.
|
||||
|
||||
As a key measurable result, the patch series introducing Xe itself shall not
|
||||
depend on any other patch touching drm_scheduler itself that was not yet merged
|
||||
through drm-misc. This, by itself, already includes the reach of an agreement for
|
||||
uniform 1 to 1 relationship implementation / usage across drivers.
|
||||
|
||||
Long running compute: minimal data structure/scaffolding
|
||||
--------------------------------------------------------
|
||||
The generic scheduler code needs to include the handling of endless compute
|
||||
contexts, with the minimal scaffolding for preempt-ctx fences (probably on the
|
||||
drm_sched_entity) and making sure drm_scheduler can cope with the lack of job
|
||||
completion fence.
|
||||
|
||||
The goal is to achieve a consensus ahead of Xe initial pull-request, ideally with
|
||||
this minimal drm/scheduler work, if needed, merged to drm-misc in a way that any
|
||||
drm driver, including Xe, could re-use and add their own individual needs on top
|
||||
in a next stage. However, this should not block the initial merge.
|
||||
|
||||
Dev_coredump
|
||||
------------
|
||||
|
||||
Xe needs to align with other drivers on the way that the error states are
|
||||
dumped, avoiding a Xe only error_state solution. The goal is to use devcoredump
|
||||
infrastructure to report error states, since it produces a standardized way
|
||||
by exposing a virtual and temporary /sys/class/devcoredump device.
|
||||
|
||||
As the key measurable result, Xe driver needs to provide GPU snapshots captured
|
||||
at hang time through devcoredump, but without depending on any core modification
|
||||
of devcoredump infrastructure itself.
|
||||
|
||||
Later, when we are in-tree, the goal is to collaborate with devcoredump
|
||||
infrastructure with overall possible improvements, like multiple file support
|
||||
for better organization of the dumps, snapshot support, dmesg extra print,
|
||||
and whatever may make sense and help the overall infrastructure.
|
||||
|
||||
DRM_VM_BIND
|
||||
-----------
|
||||
Nouveau, and Xe are all implementing ‘VM_BIND’ and new ‘Exec’ uAPIs in order to
|
||||
fulfill the needs of the modern uAPI. Xe merge should *not* be blocked on the
|
||||
development of a common new drm_infrastructure. However, the Xe team needs to
|
||||
engage with the community to explore the options of a common API.
|
||||
|
||||
As a key measurable result, the DRM_VM_BIND needs to be documented in this file
|
||||
below, or this entire block deleted if the consensus is for independent drivers
|
||||
vm_bind ioctls.
|
||||
|
||||
Although having a common DRM level IOCTL for VM_BIND is not a requirement to get
|
||||
Xe merged, it is mandatory to enforce the overall locking scheme for all major
|
||||
structs and list (so vm and vma). So, a consensus is needed, and possibly some
|
||||
common helpers. If helpers are needed, they should be also documented in this
|
||||
document.
|
||||
|
||||
GPU VA
|
||||
------
|
||||
Two main goals of Xe are meeting together here:
|
||||
|
||||
1) Have an uAPI that aligns with modern UMD needs.
|
||||
|
||||
2) Early upstream engagement.
|
||||
|
||||
RedHat engineers working on Nouveau proposed a new DRM feature to handle keeping
|
||||
track of GPU virtual address mappings. This is still not merged upstream, but
|
||||
this aligns very well with our goals and with our VM_BIND. The engagement with
|
||||
upstream and the port of Xe towards GPUVA is already ongoing.
|
||||
|
||||
As a key measurable result, Xe needs to be aligned with the GPU VA and working in
|
||||
our tree. Missing Nouveau patches should *not* block Xe and any needed GPUVA
|
||||
related patch should be independent and present on dri-devel or acked by
|
||||
maintainers to go along with the first Xe pull request towards drm-next.
|
||||
@ -120,6 +120,29 @@ Contact: Daniel Vetter, respective driver maintainers
|
||||
|
||||
Level: Advanced
|
||||
|
||||
Rename drm_atomic_state
|
||||
-----------------------
|
||||
|
||||
The KMS framework uses two slightly different definitions for the ``state``
|
||||
concept. For a given object (plane, CRTC, encoder, etc., so
|
||||
``drm_$OBJECT_state``), the state is the entire state of that object. However,
|
||||
at the device level, ``drm_atomic_state`` refers to a state update for a
|
||||
limited number of objects.
|
||||
|
||||
The state isn't the entire device state, but only the full state of some
|
||||
objects in that device. This is confusing to newcomers, and
|
||||
``drm_atomic_state`` should be renamed to something clearer like
|
||||
``drm_atomic_commit``.
|
||||
|
||||
In addition to renaming the structure itself, it would also imply renaming some
|
||||
related functions (``drm_atomic_state_alloc``, ``drm_atomic_state_get``,
|
||||
``drm_atomic_state_put``, ``drm_atomic_state_init``,
|
||||
``__drm_atomic_state_free``, etc.).
|
||||
|
||||
Contact: Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
Level: Advanced
|
||||
|
||||
Fallout from atomic KMS
|
||||
-----------------------
|
||||
|
||||
|
||||
@ -942,6 +942,10 @@ attribute-sets:
|
||||
-
|
||||
name: gro-ipv4-max-size
|
||||
type: u32
|
||||
-
|
||||
name: dpll-pin
|
||||
type: nest
|
||||
nested-attributes: link-dpll-pin-attrs
|
||||
-
|
||||
name: af-spec-attrs
|
||||
attributes:
|
||||
@ -1627,6 +1631,12 @@ attribute-sets:
|
||||
-
|
||||
name: used
|
||||
type: u8
|
||||
-
|
||||
name: link-dpll-pin-attrs
|
||||
attributes:
|
||||
-
|
||||
name: id
|
||||
type: u32
|
||||
|
||||
sub-messages:
|
||||
-
|
||||
|
||||
@ -12,5 +12,7 @@
|
||||
<script type="text/javascript"> <!--
|
||||
var sbar = document.getElementsByClassName("sphinxsidebar")[0];
|
||||
let currents = document.getElementsByClassName("current")
|
||||
sbar.scrollTop = currents[currents.length - 1].offsetTop;
|
||||
if (currents.length) {
|
||||
sbar.scrollTop = currents[currents.length - 1].offsetTop;
|
||||
}
|
||||
--> </script>
|
||||
|
||||
@ -448,17 +448,17 @@ Function-specific configfs interface
|
||||
The function name to use when creating the function directory is "ncm".
|
||||
The NCM function provides these attributes in its function directory:
|
||||
|
||||
=============== ==================================================
|
||||
ifname network device interface name associated with this
|
||||
function instance
|
||||
qmult queue length multiplier for high and super speed
|
||||
host_addr MAC address of host's end of this
|
||||
Ethernet over USB link
|
||||
dev_addr MAC address of device's end of this
|
||||
Ethernet over USB link
|
||||
max_segment_size Segment size required for P2P connections. This
|
||||
will set MTU to (max_segment_size - 14 bytes)
|
||||
=============== ==================================================
|
||||
======================= ==================================================
|
||||
ifname network device interface name associated with this
|
||||
function instance
|
||||
qmult queue length multiplier for high and super speed
|
||||
host_addr MAC address of host's end of this
|
||||
Ethernet over USB link
|
||||
dev_addr MAC address of device's end of this
|
||||
Ethernet over USB link
|
||||
max_segment_size Segment size required for P2P connections. This
|
||||
will set MTU to 14 bytes
|
||||
======================= ==================================================
|
||||
|
||||
and after creating the functions/ncm.<instance name> they contain default
|
||||
values: qmult is 5, dev_addr and host_addr are randomly selected.
|
||||
|
||||
38
MAINTAINERS
38
MAINTAINERS
@ -3168,10 +3168,10 @@ F: drivers/hwmon/asus-ec-sensors.c
|
||||
|
||||
ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
|
||||
M: Corentin Chary <corentin.chary@gmail.com>
|
||||
L: acpi4asus-user@lists.sourceforge.net
|
||||
M: Luke D. Jones <luke@ljones.dev>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://acpi4asus.sf.net
|
||||
W: https://asus-linux.org/
|
||||
F: drivers/platform/x86/asus*.c
|
||||
F: drivers/platform/x86/eeepc*.c
|
||||
|
||||
@ -4547,7 +4547,7 @@ F: drivers/net/ieee802154/ca8210.c
|
||||
|
||||
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
L: netfs@lists.linux.dev
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/cachefiles.rst
|
||||
F: fs/cachefiles/
|
||||
@ -5958,7 +5958,6 @@ S: Maintained
|
||||
F: drivers/platform/x86/dell/dell-wmi-descriptor.c
|
||||
|
||||
DELL WMI HARDWARE PRIVACY SUPPORT
|
||||
M: Perry Yuan <Perry.Yuan@dell.com>
|
||||
L: Dell.Client.Kernel@dell.com
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
@ -7309,6 +7308,7 @@ F: drivers/gpu/drm/xlnx/
|
||||
|
||||
DRM GPU SCHEDULER
|
||||
M: Luben Tuikov <ltuikov89@gmail.com>
|
||||
M: Matthew Brost <matthew.brost@intel.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
@ -7955,12 +7955,13 @@ L: rust-for-linux@vger.kernel.org
|
||||
S: Maintained
|
||||
F: rust/kernel/net/phy.rs
|
||||
|
||||
EXEC & BINFMT API
|
||||
EXEC & BINFMT API, ELF
|
||||
R: Eric Biederman <ebiederm@xmission.com>
|
||||
R: Kees Cook <keescook@chromium.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/execve
|
||||
F: Documentation/userspace-api/ELF.rst
|
||||
F: fs/*binfmt_*.c
|
||||
F: fs/exec.c
|
||||
F: include/linux/binfmts.h
|
||||
@ -8223,7 +8224,8 @@ F: include/linux/iomap.h
|
||||
|
||||
FILESYSTEMS [NETFS LIBRARY]
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
R: Jeff Layton <jlayton@kernel.org>
|
||||
L: netfs@lists.linux.dev
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/
|
||||
@ -10090,7 +10092,7 @@ L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
W: https://i2c.wiki.kernel.org/
|
||||
Q: https://patchwork.ozlabs.org/project/linux-i2c/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux.git
|
||||
F: Documentation/devicetree/bindings/i2c/
|
||||
F: drivers/i2c/algos/
|
||||
F: drivers/i2c/busses/
|
||||
@ -10282,7 +10284,7 @@ F: drivers/scsi/ibmvscsi/ibmvscsi*
|
||||
F: include/scsi/viosrp.h
|
||||
|
||||
IBM Power Virtual SCSI Device Target Driver
|
||||
M: Michael Cyr <mikecyr@linux.ibm.com>
|
||||
M: Tyrel Datwyler <tyreld@linux.ibm.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
L: target-devel@vger.kernel.org
|
||||
S: Supported
|
||||
@ -10466,7 +10468,6 @@ F: drivers/media/rc/img-ir/
|
||||
|
||||
IMGTEC POWERVR DRM DRIVER
|
||||
M: Frank Binns <frank.binns@imgtec.com>
|
||||
M: Donald Robson <donald.robson@imgtec.com>
|
||||
M: Matt Coster <matt.coster@imgtec.com>
|
||||
S: Supported
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
@ -11724,6 +11725,7 @@ F: fs/smb/server/
|
||||
KERNEL UNIT TESTING FRAMEWORK (KUnit)
|
||||
M: Brendan Higgins <brendanhiggins@google.com>
|
||||
M: David Gow <davidgow@google.com>
|
||||
R: Rae Moar <rmoar@google.com>
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
L: kunit-dev@googlegroups.com
|
||||
S: Maintained
|
||||
@ -12902,6 +12904,8 @@ M: Alejandro Colomar <alx@kernel.org>
|
||||
L: linux-man@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.kernel.org/doc/man-pages
|
||||
T: git git://git.kernel.org/pub/scm/docs/man-pages/man-pages.git
|
||||
T: git git://www.alejandro-colomar.es/src/alx/linux/man-pages/man-pages.git
|
||||
|
||||
MANAGEMENT COMPONENT TRANSPORT PROTOCOL (MCTP)
|
||||
M: Jeremy Kerr <jk@codeconstruct.com.au>
|
||||
@ -15177,6 +15181,7 @@ F: Documentation/networking/net_cachelines/net_device.rst
|
||||
F: drivers/connector/
|
||||
F: drivers/net/
|
||||
F: include/dt-bindings/net/
|
||||
F: include/linux/cn_proc.h
|
||||
F: include/linux/etherdevice.h
|
||||
F: include/linux/fcdevice.h
|
||||
F: include/linux/fddidevice.h
|
||||
@ -15184,6 +15189,7 @@ F: include/linux/hippidevice.h
|
||||
F: include/linux/if_*
|
||||
F: include/linux/inetdevice.h
|
||||
F: include/linux/netdevice.h
|
||||
F: include/uapi/linux/cn_proc.h
|
||||
F: include/uapi/linux/if_*
|
||||
F: include/uapi/linux/netdevice.h
|
||||
X: drivers/net/wireless/
|
||||
@ -16856,9 +16862,8 @@ F: Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
|
||||
F: drivers/pci/controller/pcie-xilinx-cpm.c
|
||||
|
||||
PCI ENDPOINT SUBSYSTEM
|
||||
M: Lorenzo Pieralisi <lpieralisi@kernel.org>
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
M: Krzysztof Wilczyński <kw@linux.com>
|
||||
R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
R: Kishon Vijay Abraham I <kishon@kernel.org>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
@ -18081,7 +18086,6 @@ F: drivers/net/ethernet/qualcomm/emac/
|
||||
|
||||
QUALCOMM ETHQOS ETHERNET DRIVER
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
R: Bhupesh Sharma <bhupesh.sharma@linaro.org>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
@ -20549,6 +20553,7 @@ F: Documentation/translations/sp_SP/
|
||||
|
||||
SPARC + UltraSPARC (sparc/sparc64)
|
||||
M: "David S. Miller" <davem@davemloft.net>
|
||||
M: Andreas Larsson <andreas@gaisler.com>
|
||||
L: sparclinux@vger.kernel.org
|
||||
S: Maintained
|
||||
Q: http://patchwork.ozlabs.org/project/sparclinux/list/
|
||||
@ -24339,13 +24344,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefs.git
|
||||
F: Documentation/filesystems/zonefs.rst
|
||||
F: fs/zonefs/
|
||||
|
||||
ZPOOL COMPRESSED PAGE STORAGE API
|
||||
M: Dan Streetman <ddstreet@ieee.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: include/linux/zpool.h
|
||||
F: mm/zpool.c
|
||||
|
||||
ZR36067 VIDEO FOR LINUX DRIVER
|
||||
M: Corentin Labbe <clabbe@baylibre.com>
|
||||
L: mjpeg-users@lists.sourceforge.net
|
||||
@ -24397,7 +24395,9 @@ M: Nhat Pham <nphamcs@gmail.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: Documentation/admin-guide/mm/zswap.rst
|
||||
F: include/linux/zpool.h
|
||||
F: include/linux/zswap.h
|
||||
F: mm/zpool.c
|
||||
F: mm/zswap.c
|
||||
|
||||
THE REST
|
||||
|
||||
20
Makefile
20
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -294,15 +294,15 @@ may-sync-config := 1
|
||||
single-build :=
|
||||
|
||||
ifneq ($(filter $(no-dot-config-targets), $(MAKECMDGOALS)),)
|
||||
ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),)
|
||||
ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),)
|
||||
need-config :=
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq ($(filter $(no-sync-config-targets), $(MAKECMDGOALS)),)
|
||||
ifeq ($(filter-out $(no-sync-config-targets), $(MAKECMDGOALS)),)
|
||||
ifeq ($(filter-out $(no-sync-config-targets), $(MAKECMDGOALS)),)
|
||||
may-sync-config :=
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
need-compiler := $(may-sync-config)
|
||||
@ -323,9 +323,9 @@ endif
|
||||
# We cannot build single targets and the others at the same time
|
||||
ifneq ($(filter $(single-targets), $(MAKECMDGOALS)),)
|
||||
single-build := 1
|
||||
ifneq ($(filter-out $(single-targets), $(MAKECMDGOALS)),)
|
||||
ifneq ($(filter-out $(single-targets), $(MAKECMDGOALS)),)
|
||||
mixed-build := 1
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
# For "make -j clean all", "make -j mrproper defconfig all", etc.
|
||||
@ -986,6 +986,10 @@ NOSTDINC_FLAGS += -nostdinc
|
||||
# perform bounds checking.
|
||||
KBUILD_CFLAGS += $(call cc-option, -fstrict-flex-arrays=3)
|
||||
|
||||
#Currently, disable -Wstringop-overflow for GCC 11, globally.
|
||||
KBUILD_CFLAGS-$(CONFIG_CC_NO_STRINGOP_OVERFLOW) += $(call cc-option, -Wno-stringop-overflow)
|
||||
KBUILD_CFLAGS-$(CONFIG_CC_STRINGOP_OVERFLOW) += $(call cc-option, -Wstringop-overflow)
|
||||
|
||||
# disable invalid "can't wrap" optimizations for signed / pointers
|
||||
KBUILD_CFLAGS += -fno-strict-overflow
|
||||
|
||||
@ -1662,7 +1666,7 @@ help:
|
||||
@echo ' (sparse by default)'
|
||||
@echo ' make C=2 [targets] Force check of all c source with $$CHECK'
|
||||
@echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections'
|
||||
@echo ' make W=n [targets] Enable extra build checks, n=1,2,3 where'
|
||||
@echo ' make W=n [targets] Enable extra build checks, n=1,2,3,c,e where'
|
||||
@echo ' 1: warnings which may be relevant and do not occur too often'
|
||||
@echo ' 2: warnings which occur quite often but may still be relevant'
|
||||
@echo ' 3: more obscure warnings, can most likely be ignored'
|
||||
|
||||
@ -673,6 +673,7 @@ config SHADOW_CALL_STACK
|
||||
bool "Shadow Call Stack"
|
||||
depends on ARCH_SUPPORTS_SHADOW_CALL_STACK
|
||||
depends on DYNAMIC_FTRACE_WITH_ARGS || DYNAMIC_FTRACE_WITH_REGS || !FUNCTION_GRAPH_TRACER
|
||||
depends on MMU
|
||||
help
|
||||
This option enables the compiler's Shadow Call Stack, which
|
||||
uses a shadow stack to protect function return addresses from
|
||||
|
||||
@ -45,8 +45,8 @@
|
||||
num-chipselects = <1>;
|
||||
cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
|
||||
|
||||
tpmdev@0 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
tpm@0 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
spi-max-frequency = <33000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
@ -80,8 +80,8 @@
|
||||
gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
|
||||
num-chipselects = <1>;
|
||||
|
||||
tpmdev@0 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
tpm@0 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
spi-max-frequency = <33000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
@ -456,7 +456,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm: tpm@2e {
|
||||
compatible = "tcg,tpm-tis-i2c";
|
||||
compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c";
|
||||
reg = <0x2e>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -35,8 +35,8 @@
|
||||
gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
|
||||
gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
|
||||
|
||||
tpmdev@0 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
tpm@0 {
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
spi-max-frequency = <33000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
@ -116,7 +116,7 @@
|
||||
tpm_tis: tpm@1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tpm>;
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <20000000>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
|
||||
@ -130,7 +130,7 @@
|
||||
* TCG specification - Section 6.4.1 Clocking:
|
||||
* TPM shall support a SPI clock frequency range of 10-24 MHz.
|
||||
*/
|
||||
st33htph: tpm-tis@0 {
|
||||
st33htph: tpm@0 {
|
||||
compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <24000000>;
|
||||
|
||||
@ -434,6 +434,7 @@
|
||||
};
|
||||
|
||||
&fimd {
|
||||
samsung,invert-vclk;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@ -217,7 +217,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
|
||||
tpm_spi_tis@0 {
|
||||
tpm@0 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <500000>;
|
||||
|
||||
@ -195,7 +195,7 @@ vdso_prepare: prepare0
|
||||
include/generated/vdso-offsets.h arch/arm64/kernel/vdso/vdso.so
|
||||
ifdef CONFIG_COMPAT_VDSO
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 \
|
||||
include/generated/vdso32-offsets.h arch/arm64/kernel/vdso32/vdso.so
|
||||
arch/arm64/kernel/vdso32/vdso.so
|
||||
endif
|
||||
endif
|
||||
|
||||
|
||||
@ -289,7 +289,7 @@
|
||||
#clock-cells = <1>;
|
||||
clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>,
|
||||
<&cmu_top CLK_DOUT_CMU_MISC_SSS>;
|
||||
clock-names = "dout_cmu_misc_bus", "dout_cmu_misc_sss";
|
||||
clock-names = "bus", "sss";
|
||||
};
|
||||
|
||||
watchdog_cl0: watchdog@10060000 {
|
||||
|
||||
@ -120,7 +120,7 @@
|
||||
};
|
||||
|
||||
tpm: tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -89,7 +89,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
|
||||
@ -109,7 +109,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
|
||||
@ -234,7 +234,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm: tpm@0 {
|
||||
compatible = "infineon,slb9670";
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tpm>;
|
||||
|
||||
@ -103,7 +103,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
|
||||
@ -115,7 +115,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
|
||||
@ -196,7 +196,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@0 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
|
||||
@ -65,7 +65,7 @@
|
||||
status = "okay";
|
||||
|
||||
tpm@0 {
|
||||
compatible = "infineon,slb9670";
|
||||
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <43000000>;
|
||||
};
|
||||
|
||||
@ -888,7 +888,7 @@
|
||||
status = "okay";
|
||||
cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
|
||||
|
||||
cr50@0 {
|
||||
tpm@0 {
|
||||
compatible = "google,cr50";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
@ -1402,7 +1402,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi5_pins>;
|
||||
|
||||
cr50@0 {
|
||||
tpm@0 {
|
||||
compatible = "google,cr50";
|
||||
reg = <0>;
|
||||
interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
@ -70,7 +70,7 @@
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
cr50@0 {
|
||||
tpm@0 {
|
||||
compatible = "google,cr50";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
|
||||
@ -706,7 +706,7 @@ camera: &i2c7 {
|
||||
&spi2 {
|
||||
status = "okay";
|
||||
|
||||
cr50@0 {
|
||||
tpm@0 {
|
||||
compatible = "google,cr50";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
|
||||
@ -17,9 +17,6 @@
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <generated/vdso-offsets.h>
|
||||
#ifdef CONFIG_COMPAT_VDSO
|
||||
#include <generated/vdso32-offsets.h>
|
||||
#endif
|
||||
|
||||
#define VDSO_SYMBOL(base, name) \
|
||||
({ \
|
||||
|
||||
@ -77,9 +77,9 @@ obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS) += patch-scs.o
|
||||
# We need to prevent the SCS patching code from patching itself. Using
|
||||
# -mbranch-protection=none here to avoid the patchable PAC opcodes from being
|
||||
# generated triggers an issue with full LTO on Clang, which stops emitting PAC
|
||||
# instructions altogether. So instead, omit the unwind tables used by the
|
||||
# patching code, so it will not be able to locate its own PAC instructions.
|
||||
CFLAGS_patch-scs.o += -fno-asynchronous-unwind-tables -fno-unwind-tables
|
||||
# instructions altogether. So disable LTO as well for the compilation unit.
|
||||
CFLAGS_patch-scs.o += -mbranch-protection=none
|
||||
CFLAGS_REMOVE_patch-scs.o += $(CC_FLAGS_LTO)
|
||||
|
||||
# Force dependency (vdso*-wrap.S includes vdso.so through incbin)
|
||||
$(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so
|
||||
|
||||
@ -127,9 +127,6 @@ obj-vdso := $(c-obj-vdso) $(c-obj-vdso-gettimeofday) $(asm-obj-vdso)
|
||||
targets += vdso.lds
|
||||
CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
|
||||
|
||||
include/generated/vdso32-offsets.h: $(obj)/vdso32.so.dbg FORCE
|
||||
$(call if_changed,vdsosym)
|
||||
|
||||
# Strip rule for vdso.so
|
||||
$(obj)/vdso.so: OBJCOPYFLAGS := -S
|
||||
$(obj)/vdso.so: $(obj)/vdso32.so.dbg FORCE
|
||||
@ -166,9 +163,3 @@ quiet_cmd_vdsoas = AS32 $@
|
||||
|
||||
quiet_cmd_vdsomunge = MUNGE $@
|
||||
cmd_vdsomunge = $(obj)/$(munge) $< $@
|
||||
|
||||
# Generate vDSO offsets using helper script (borrowed from the 64-bit vDSO)
|
||||
gen-vdsosym := $(srctree)/$(src)/../vdso/gen_vdso_offsets.sh
|
||||
quiet_cmd_vdsosym = VDSOSYM $@
|
||||
# The AArch64 nm should be able to read an AArch32 binary
|
||||
cmd_vdsosym = $(NM) $< | $(gen-vdsosym) | LC_ALL=C sort > $@
|
||||
|
||||
@ -60,7 +60,7 @@ int kvm_own_lsx(struct kvm_vcpu *vcpu);
|
||||
void kvm_save_lsx(struct loongarch_fpu *fpu);
|
||||
void kvm_restore_lsx(struct loongarch_fpu *fpu);
|
||||
#else
|
||||
static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { }
|
||||
static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { return -EINVAL; }
|
||||
static inline void kvm_save_lsx(struct loongarch_fpu *fpu) { }
|
||||
static inline void kvm_restore_lsx(struct loongarch_fpu *fpu) { }
|
||||
#endif
|
||||
@ -70,7 +70,7 @@ int kvm_own_lasx(struct kvm_vcpu *vcpu);
|
||||
void kvm_save_lasx(struct loongarch_fpu *fpu);
|
||||
void kvm_restore_lasx(struct loongarch_fpu *fpu);
|
||||
#else
|
||||
static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { }
|
||||
static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { return -EINVAL; }
|
||||
static inline void kvm_save_lasx(struct loongarch_fpu *fpu) { }
|
||||
static inline void kvm_restore_lasx(struct loongarch_fpu *fpu) { }
|
||||
#endif
|
||||
|
||||
@ -509,7 +509,6 @@ asmlinkage void start_secondary(void)
|
||||
sync_counter();
|
||||
cpu = raw_smp_processor_id();
|
||||
set_my_cpu_offset(per_cpu_offset(cpu));
|
||||
rcutree_report_cpu_starting(cpu);
|
||||
|
||||
cpu_probe();
|
||||
constant_clockevent_init();
|
||||
|
||||
@ -675,7 +675,7 @@ static bool fault_supports_huge_mapping(struct kvm_memory_slot *memslot,
|
||||
*
|
||||
* There are several ways to safely use this helper:
|
||||
*
|
||||
* - Check mmu_invalidate_retry_hva() after grabbing the mapping level, before
|
||||
* - Check mmu_invalidate_retry_gfn() after grabbing the mapping level, before
|
||||
* consuming it. In this case, mmu_lock doesn't need to be held during the
|
||||
* lookup, but it does need to be held while checking the MMU notifier.
|
||||
*
|
||||
@ -855,7 +855,7 @@ retry:
|
||||
|
||||
/* Check if an invalidation has taken place since we got pfn */
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
if (mmu_invalidate_retry_hva(kvm, mmu_seq, hva)) {
|
||||
if (mmu_invalidate_retry_gfn(kvm, mmu_seq, gfn)) {
|
||||
/*
|
||||
* This can happen when mappings are changed asynchronously, but
|
||||
* also synchronously if a COW is triggered by
|
||||
|
||||
@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu)
|
||||
set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);
|
||||
set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);
|
||||
set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);
|
||||
}
|
||||
} else {
|
||||
int vec_sz __maybe_unused;
|
||||
void *addr __maybe_unused;
|
||||
struct page *page __maybe_unused;
|
||||
|
||||
/* Avoid lockdep warning */
|
||||
rcutree_report_cpu_starting(cpu);
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
else {
|
||||
void *addr;
|
||||
struct page *page;
|
||||
const int vec_sz = sizeof(exception_handlers);
|
||||
vec_sz = sizeof(exception_handlers);
|
||||
|
||||
if (pcpu_handlers[cpu])
|
||||
return;
|
||||
@ -305,8 +309,8 @@ static void setup_tlb_handler(int cpu)
|
||||
csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);
|
||||
csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);
|
||||
csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
void tlb_init(int cpu)
|
||||
|
||||
@ -15,10 +15,10 @@
|
||||
KBUILD_DEFCONFIG := multi_defconfig
|
||||
|
||||
ifdef cross_compiling
|
||||
ifeq ($(CROSS_COMPILE),)
|
||||
ifeq ($(CROSS_COMPILE),)
|
||||
CROSS_COMPILE := $(call cc-cross-prefix, \
|
||||
m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
#
|
||||
|
||||
@ -40,6 +40,7 @@
|
||||
#include <linux/string.h>
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
#include <prom.h>
|
||||
|
||||
int prom_argc;
|
||||
char **prom_argv;
|
||||
|
||||
@ -30,13 +30,11 @@
|
||||
#include <linux/mm.h>
|
||||
#include <linux/dma-map-ops.h> /* for dma_default_coherent */
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/mipsregs.h>
|
||||
|
||||
#include <au1000.h>
|
||||
|
||||
extern void __init board_setup(void);
|
||||
extern void __init alchemy_set_lpj(void);
|
||||
|
||||
static bool alchemy_dma_coherent(void)
|
||||
{
|
||||
switch (alchemy_get_cputype()) {
|
||||
|
||||
@ -702,7 +702,7 @@ static struct ssb_sprom bcm63xx_sprom = {
|
||||
.boardflags_hi = 0x0000,
|
||||
};
|
||||
|
||||
int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
|
||||
static int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
|
||||
{
|
||||
if (bus->bustype == SSB_BUSTYPE_PCI) {
|
||||
memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
|
||||
|
||||
@ -26,7 +26,7 @@ static struct platform_device bcm63xx_rng_device = {
|
||||
.resource = rng_resources,
|
||||
};
|
||||
|
||||
int __init bcm63xx_rng_register(void)
|
||||
static int __init bcm63xx_rng_register(void)
|
||||
{
|
||||
if (!BCMCPU_IS_6368())
|
||||
return -ENODEV;
|
||||
|
||||
@ -10,6 +10,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_uart.h>
|
||||
|
||||
static struct resource uart0_resources[] = {
|
||||
{
|
||||
|
||||
@ -34,7 +34,7 @@ static struct platform_device bcm63xx_wdt_device = {
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_wdt_register(void)
|
||||
static int __init bcm63xx_wdt_register(void)
|
||||
{
|
||||
wdt_resources[0].start = bcm63xx_regset_address(RSET_WDT);
|
||||
wdt_resources[0].end = wdt_resources[0].start;
|
||||
|
||||
@ -72,7 +72,7 @@ static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
|
||||
*/
|
||||
|
||||
#define BUILD_IPIC_INTERNAL(width) \
|
||||
void __dispatch_internal_##width(int cpu) \
|
||||
static void __dispatch_internal_##width(int cpu) \
|
||||
{ \
|
||||
u32 pending[width / 32]; \
|
||||
unsigned int src, tgt; \
|
||||
|
||||
@ -159,7 +159,7 @@ void __init plat_mem_setup(void)
|
||||
board_setup();
|
||||
}
|
||||
|
||||
int __init bcm63xx_register_devices(void)
|
||||
static int __init bcm63xx_register_devices(void)
|
||||
{
|
||||
/* register gpiochip */
|
||||
bcm63xx_gpio_init();
|
||||
|
||||
@ -178,7 +178,7 @@ int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us)
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_set);
|
||||
|
||||
int bcm63xx_timer_init(void)
|
||||
static int bcm63xx_timer_init(void)
|
||||
{
|
||||
int ret, irq;
|
||||
u32 reg;
|
||||
|
||||
@ -23,9 +23,6 @@
|
||||
|
||||
#include <cobalt.h>
|
||||
|
||||
extern void cobalt_machine_restart(char *command);
|
||||
extern void cobalt_machine_halt(void);
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
switch (cobalt_board_id) {
|
||||
|
||||
@ -37,7 +37,7 @@ static unsigned int nr_prom_mem __initdata;
|
||||
*/
|
||||
#define ARC_PAGE_SHIFT 12
|
||||
|
||||
struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
|
||||
static struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
|
||||
{
|
||||
return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
|
||||
}
|
||||
|
||||
@ -597,6 +597,9 @@
|
||||
|
||||
#include <asm/cpu.h>
|
||||
|
||||
void alchemy_set_lpj(void);
|
||||
void board_setup(void);
|
||||
|
||||
/* helpers to access the SYS_* registers */
|
||||
static inline unsigned long alchemy_rdsys(int regofs)
|
||||
{
|
||||
|
||||
@ -19,4 +19,7 @@ extern int cobalt_board_id;
|
||||
#define COBALT_BRD_ID_QUBE2 0x5
|
||||
#define COBALT_BRD_ID_RAQ2 0x6
|
||||
|
||||
void cobalt_machine_halt(void);
|
||||
void cobalt_machine_restart(char *command);
|
||||
|
||||
#endif /* __ASM_COBALT_H */
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
|
||||
#include <asm/cpu-features.h>
|
||||
#include <asm/cpu-info.h>
|
||||
#include <asm/fpu.h>
|
||||
|
||||
#ifdef CONFIG_MIPS_FP_SUPPORT
|
||||
|
||||
@ -309,6 +310,11 @@ void mips_set_personality_nan(struct arch_elf_state *state)
|
||||
struct cpuinfo_mips *c = &boot_cpu_data;
|
||||
struct task_struct *t = current;
|
||||
|
||||
/* Do this early so t->thread.fpu.fcr31 won't be clobbered in case
|
||||
* we are preempted before the lose_fpu(0) in start_thread.
|
||||
*/
|
||||
lose_fpu(0);
|
||||
|
||||
t->thread.fpu.fcr31 = c->fpu_csr31;
|
||||
switch (state->nan_2008) {
|
||||
case 0:
|
||||
|
||||
@ -2007,7 +2007,13 @@ unsigned long vi_handlers[64];
|
||||
|
||||
void reserve_exception_space(phys_addr_t addr, unsigned long size)
|
||||
{
|
||||
memblock_reserve(addr, size);
|
||||
/*
|
||||
* reserve exception space on CPUs other than CPU0
|
||||
* is too late, since memblock is unavailable when APs
|
||||
* up
|
||||
*/
|
||||
if (smp_processor_id() == 0)
|
||||
memblock_reserve(addr, size);
|
||||
}
|
||||
|
||||
void __init *set_except_vector(int n, void *addr)
|
||||
|
||||
@ -108,10 +108,9 @@ void __init prom_init(void)
|
||||
prom_init_cmdline();
|
||||
|
||||
#if defined(CONFIG_MIPS_MT_SMP)
|
||||
if (cpu_has_mipsmt) {
|
||||
lantiq_smp_ops = vsmp_smp_ops;
|
||||
lantiq_smp_ops = vsmp_smp_ops;
|
||||
if (cpu_has_mipsmt)
|
||||
lantiq_smp_ops.init_secondary = lantiq_init_secondary;
|
||||
register_smp_ops(&lantiq_smp_ops);
|
||||
}
|
||||
register_smp_ops(&lantiq_smp_ops);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -103,6 +103,9 @@ void __init szmem(unsigned int node)
|
||||
if (loongson_sysconf.vgabios_addr)
|
||||
memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr),
|
||||
SZ_256K);
|
||||
/* set nid for reserved memory */
|
||||
memblock_set_node((u64)node << 44, (u64)(node + 1) << 44,
|
||||
&memblock.reserved, node);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_NUMA
|
||||
|
||||
@ -132,6 +132,8 @@ static void __init node_mem_init(unsigned int node)
|
||||
|
||||
/* Reserve pfn range 0~node[0]->node_start_pfn */
|
||||
memblock_reserve(0, PAGE_SIZE * start_pfn);
|
||||
/* set nid for reserved memory on node 0 */
|
||||
memblock_set_node(0, 1ULL << 44, &memblock.reserved, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
|
||||
obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o \
|
||||
ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o \
|
||||
ip27-hubio.o ip27-xtalk.o
|
||||
ip27-xtalk.o
|
||||
|
||||
obj-$(CONFIG_EARLY_PRINTK) += ip27-console.o
|
||||
obj-$(CONFIG_SMP) += ip27-smp.o
|
||||
|
||||
@ -22,6 +22,8 @@
|
||||
#include <asm/traps.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include "ip27-common.h"
|
||||
|
||||
static void dump_hub_information(unsigned long errst0, unsigned long errst1)
|
||||
{
|
||||
static char *err_type[2][8] = {
|
||||
@ -57,7 +59,7 @@ static void dump_hub_information(unsigned long errst0, unsigned long errst1)
|
||||
[st0.pi_stat0_fmt.s0_err_type] ? : "invalid");
|
||||
}
|
||||
|
||||
int ip27_be_handler(struct pt_regs *regs, int is_fixup)
|
||||
static int ip27_be_handler(struct pt_regs *regs, int is_fixup)
|
||||
{
|
||||
unsigned long errst0, errst1;
|
||||
int data = regs->cp0_cause & 4;
|
||||
|
||||
@ -10,6 +10,7 @@ extern void hub_rt_clock_event_init(void);
|
||||
extern void hub_rtc_init(nasid_t nasid);
|
||||
extern void install_cpu_nmi_handler(int slice);
|
||||
extern void install_ipi(void);
|
||||
extern void ip27_be_init(void);
|
||||
extern void ip27_reboot_setup(void);
|
||||
extern const struct plat_smp_ops ip27_smp_ops;
|
||||
extern unsigned long node_getfirstfree(nasid_t nasid);
|
||||
@ -17,4 +18,5 @@ extern void per_cpu_init(void);
|
||||
extern void replicate_kernel_text(void);
|
||||
extern void setup_replication_mask(void);
|
||||
|
||||
|
||||
#endif /* __IP27_COMMON_H */
|
||||
|
||||
@ -1,185 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc.
|
||||
* Copyright (C) 2004 Christoph Hellwig.
|
||||
*
|
||||
* Support functions for the HUB ASIC - mostly PIO mapping related.
|
||||
*/
|
||||
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mmzone.h>
|
||||
#include <asm/sn/addrs.h>
|
||||
#include <asm/sn/arch.h>
|
||||
#include <asm/sn/agent.h>
|
||||
#include <asm/sn/io.h>
|
||||
#include <asm/xtalk/xtalk.h>
|
||||
|
||||
|
||||
static int force_fire_and_forget = 1;
|
||||
|
||||
/**
|
||||
* hub_pio_map - establish a HUB PIO mapping
|
||||
*
|
||||
* @nasid: nasid to perform PIO mapping on
|
||||
* @widget: widget ID to perform PIO mapping for
|
||||
* @xtalk_addr: xtalk_address that needs to be mapped
|
||||
* @size: size of the PIO mapping
|
||||
*
|
||||
**/
|
||||
unsigned long hub_pio_map(nasid_t nasid, xwidgetnum_t widget,
|
||||
unsigned long xtalk_addr, size_t size)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* use small-window mapping if possible */
|
||||
if ((xtalk_addr % SWIN_SIZE) + size <= SWIN_SIZE)
|
||||
return NODE_SWIN_BASE(nasid, widget) + (xtalk_addr % SWIN_SIZE);
|
||||
|
||||
if ((xtalk_addr % BWIN_SIZE) + size > BWIN_SIZE) {
|
||||
printk(KERN_WARNING "PIO mapping at hub %d widget %d addr 0x%lx"
|
||||
" too big (%ld)\n",
|
||||
nasid, widget, xtalk_addr, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
xtalk_addr &= ~(BWIN_SIZE-1);
|
||||
for (i = 0; i < HUB_NUM_BIG_WINDOW; i++) {
|
||||
if (test_and_set_bit(i, hub_data(nasid)->h_bigwin_used))
|
||||
continue;
|
||||
|
||||
/*
|
||||
* The code below does a PIO write to setup an ITTE entry.
|
||||
*
|
||||
* We need to prevent other CPUs from seeing our updated
|
||||
* memory shadow of the ITTE (in the piomap) until the ITTE
|
||||
* entry is actually set up; otherwise, another CPU might
|
||||
* attempt a PIO prematurely.
|
||||
*
|
||||
* Also, the only way we can know that an entry has been
|
||||
* received by the hub and can be used by future PIO reads/
|
||||
* writes is by reading back the ITTE entry after writing it.
|
||||
*
|
||||
* For these two reasons, we PIO read back the ITTE entry
|
||||
* after we write it.
|
||||
*/
|
||||
IIO_ITTE_PUT(nasid, i, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr);
|
||||
__raw_readq(IIO_ITTE_GET(nasid, i));
|
||||
|
||||
return NODE_BWIN_BASE(nasid, widget) + (xtalk_addr % BWIN_SIZE);
|
||||
}
|
||||
|
||||
printk(KERN_WARNING "unable to establish PIO mapping for at"
|
||||
" hub %d widget %d addr 0x%lx\n",
|
||||
nasid, widget, xtalk_addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* hub_setup_prb(nasid, prbnum, credits, conveyor)
|
||||
*
|
||||
* Put a PRB into fire-and-forget mode if conveyor isn't set. Otherwise,
|
||||
* put it into conveyor belt mode with the specified number of credits.
|
||||
*/
|
||||
static void hub_setup_prb(nasid_t nasid, int prbnum, int credits)
|
||||
{
|
||||
union iprb_u prb;
|
||||
int prb_offset;
|
||||
|
||||
/*
|
||||
* Get the current register value.
|
||||
*/
|
||||
prb_offset = IIO_IOPRB(prbnum);
|
||||
prb.iprb_regval = REMOTE_HUB_L(nasid, prb_offset);
|
||||
|
||||
/*
|
||||
* Clear out some fields.
|
||||
*/
|
||||
prb.iprb_ovflow = 1;
|
||||
prb.iprb_bnakctr = 0;
|
||||
prb.iprb_anakctr = 0;
|
||||
|
||||
/*
|
||||
* Enable or disable fire-and-forget mode.
|
||||
*/
|
||||
prb.iprb_ff = force_fire_and_forget ? 1 : 0;
|
||||
|
||||
/*
|
||||
* Set the appropriate number of PIO credits for the widget.
|
||||
*/
|
||||
prb.iprb_xtalkctr = credits;
|
||||
|
||||
/*
|
||||
* Store the new value to the register.
|
||||
*/
|
||||
REMOTE_HUB_S(nasid, prb_offset, prb.iprb_regval);
|
||||
}
|
||||
|
||||
/**
|
||||
* hub_set_piomode - set pio mode for a given hub
|
||||
*
|
||||
* @nasid: physical node ID for the hub in question
|
||||
*
|
||||
* Put the hub into either "PIO conveyor belt" mode or "fire-and-forget" mode.
|
||||
* To do this, we have to make absolutely sure that no PIOs are in progress
|
||||
* so we turn off access to all widgets for the duration of the function.
|
||||
*
|
||||
* XXX - This code should really check what kind of widget we're talking
|
||||
* to. Bridges can only handle three requests, but XG will do more.
|
||||
* How many can crossbow handle to widget 0? We're assuming 1.
|
||||
*
|
||||
* XXX - There is a bug in the crossbow that link reset PIOs do not
|
||||
* return write responses. The easiest solution to this problem is to
|
||||
* leave widget 0 (xbow) in fire-and-forget mode at all times. This
|
||||
* only affects pio's to xbow registers, which should be rare.
|
||||
**/
|
||||
static void hub_set_piomode(nasid_t nasid)
|
||||
{
|
||||
u64 ii_iowa;
|
||||
union hubii_wcr_u ii_wcr;
|
||||
unsigned i;
|
||||
|
||||
ii_iowa = REMOTE_HUB_L(nasid, IIO_OUTWIDGET_ACCESS);
|
||||
REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, 0);
|
||||
|
||||
ii_wcr.wcr_reg_value = REMOTE_HUB_L(nasid, IIO_WCR);
|
||||
|
||||
if (ii_wcr.iwcr_dir_con) {
|
||||
/*
|
||||
* Assume a bridge here.
|
||||
*/
|
||||
hub_setup_prb(nasid, 0, 3);
|
||||
} else {
|
||||
/*
|
||||
* Assume a crossbow here.
|
||||
*/
|
||||
hub_setup_prb(nasid, 0, 1);
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX - Here's where we should take the widget type into
|
||||
* when account assigning credits.
|
||||
*/
|
||||
for (i = HUB_WIDGET_ID_MIN; i <= HUB_WIDGET_ID_MAX; i++)
|
||||
hub_setup_prb(nasid, i, 3);
|
||||
|
||||
REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, ii_iowa);
|
||||
}
|
||||
|
||||
/*
|
||||
* hub_pio_init - PIO-related hub initialization
|
||||
*
|
||||
* @hub: hubinfo structure for our hub
|
||||
*/
|
||||
void hub_pio_init(nasid_t nasid)
|
||||
{
|
||||
unsigned i;
|
||||
|
||||
/* initialize big window piomaps for this hub */
|
||||
bitmap_zero(hub_data(nasid)->h_bigwin_used, HUB_NUM_BIG_WINDOW);
|
||||
for (i = 0; i < HUB_NUM_BIG_WINDOW; i++)
|
||||
IIO_ITTE_DISABLE(nasid, i);
|
||||
|
||||
hub_set_piomode(nasid);
|
||||
}
|
||||
@ -23,6 +23,8 @@
|
||||
#include <asm/sn/intr.h>
|
||||
#include <asm/sn/irq_alloc.h>
|
||||
|
||||
#include "ip27-common.h"
|
||||
|
||||
struct hub_irq_data {
|
||||
u64 *irq_mask[2];
|
||||
cpuid_t cpu;
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/sgialib.h>
|
||||
|
||||
#include <asm/sn/arch.h>
|
||||
#include <asm/sn/agent.h>
|
||||
|
||||
@ -11,6 +11,8 @@
|
||||
#include <asm/sn/arch.h>
|
||||
#include <asm/sn/agent.h>
|
||||
|
||||
#include "ip27-common.h"
|
||||
|
||||
#if 0
|
||||
#define NODE_NUM_CPUS(n) CNODE_NUM_CPUS(n)
|
||||
#else
|
||||
@ -23,16 +25,7 @@
|
||||
typedef unsigned long machreg_t;
|
||||
|
||||
static arch_spinlock_t nmi_lock = __ARCH_SPIN_LOCK_UNLOCKED;
|
||||
|
||||
/*
|
||||
* Let's see what else we need to do here. Set up sp, gp?
|
||||
*/
|
||||
void nmi_dump(void)
|
||||
{
|
||||
void cont_nmi_dump(void);
|
||||
|
||||
cont_nmi_dump();
|
||||
}
|
||||
static void nmi_dump(void);
|
||||
|
||||
void install_cpu_nmi_handler(int slice)
|
||||
{
|
||||
@ -53,7 +46,7 @@ void install_cpu_nmi_handler(int slice)
|
||||
* into the eframe format for the node under consideration.
|
||||
*/
|
||||
|
||||
void nmi_cpu_eframe_save(nasid_t nasid, int slice)
|
||||
static void nmi_cpu_eframe_save(nasid_t nasid, int slice)
|
||||
{
|
||||
struct reg_struct *nr;
|
||||
int i;
|
||||
@ -129,7 +122,7 @@ void nmi_cpu_eframe_save(nasid_t nasid, int slice)
|
||||
pr_emerg("\n");
|
||||
}
|
||||
|
||||
void nmi_dump_hub_irq(nasid_t nasid, int slice)
|
||||
static void nmi_dump_hub_irq(nasid_t nasid, int slice)
|
||||
{
|
||||
u64 mask0, mask1, pend0, pend1;
|
||||
|
||||
@ -153,7 +146,7 @@ void nmi_dump_hub_irq(nasid_t nasid, int slice)
|
||||
* Copy the cpu registers which have been saved in the IP27prom format
|
||||
* into the eframe format for the node under consideration.
|
||||
*/
|
||||
void nmi_node_eframe_save(nasid_t nasid)
|
||||
static void nmi_node_eframe_save(nasid_t nasid)
|
||||
{
|
||||
int slice;
|
||||
|
||||
@ -170,8 +163,7 @@ void nmi_node_eframe_save(nasid_t nasid)
|
||||
/*
|
||||
* Save the nmi cpu registers for all cpus in the system.
|
||||
*/
|
||||
void
|
||||
nmi_eframes_save(void)
|
||||
static void nmi_eframes_save(void)
|
||||
{
|
||||
nasid_t nasid;
|
||||
|
||||
@ -179,8 +171,7 @@ nmi_eframes_save(void)
|
||||
nmi_node_eframe_save(nasid);
|
||||
}
|
||||
|
||||
void
|
||||
cont_nmi_dump(void)
|
||||
static void nmi_dump(void)
|
||||
{
|
||||
#ifndef REAL_NMI_SIGNAL
|
||||
static atomic_t nmied_cpus = ATOMIC_INIT(0);
|
||||
|
||||
@ -3,6 +3,7 @@
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/sn/ioc3.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
static inline struct ioc3_uartregs *console_uart(void)
|
||||
{
|
||||
|
||||
@ -14,6 +14,7 @@
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/memblock.h>
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/smp-ops.h>
|
||||
#include <asm/sgialib.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
@ -18,6 +18,8 @@
|
||||
#include <asm/ip32/crime.h>
|
||||
#include <asm/ip32/mace.h>
|
||||
|
||||
#include "ip32-common.h"
|
||||
|
||||
struct sgi_crime __iomem *crime;
|
||||
struct sgi_mace __iomem *mace;
|
||||
|
||||
@ -39,7 +41,7 @@ void __init crime_init(void)
|
||||
id, rev, field, (unsigned long) CRIME_BASE);
|
||||
}
|
||||
|
||||
irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
|
||||
irqreturn_t crime_memerr_intr(int irq, void *dev_id)
|
||||
{
|
||||
unsigned long stat, addr;
|
||||
int fatal = 0;
|
||||
@ -90,7 +92,7 @@ irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
|
||||
irqreturn_t crime_cpuerr_intr(int irq, void *dev_id)
|
||||
{
|
||||
unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
|
||||
unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
|
||||
|
||||
@ -18,6 +18,8 @@
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/tlbdebug.h>
|
||||
|
||||
#include "ip32-common.h"
|
||||
|
||||
static int ip32_be_handler(struct pt_regs *regs, int is_fixup)
|
||||
{
|
||||
int data = regs->cp0_cause & 4;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user